I-AN 824 FPGA SDK yeBhodi ye-OpenCL
Inkxaso yePakethi yeFloorplan
Isikhokelo somsebenzisi

 Intel® FPGA SDK ye I-OpenCL ™ yeBhodi yeNkxaso yePakethe yeSikhokelo sokuSebenzisa i-Floorplan
I-Intel/® FPGA SDK ye-OpenCL™ yeBhodi yeNkxaso yePakeji (BSP) IsiKhokelo sokuPhucula iFloorplan sibonelela ngezikhokelo zokucwangcisa umgangatho we-OpenCL) BSP. Ikwabonelela ngesikhokelo malunga nendlela onokufumana ngayo imbewu esisiseko ngowona mlinganiselo uphakamileyo wokusebenza rhoqo kwaye uvavanye ukusebenza kakuhle kobutyebi be-BSP.
Olu xwebhu luthatha ukuba uqhelene ne-OpenCL(2) iikhonsepthi njengoko kuchaziwe kwi-OpenCL Specification version 1.0 liQela le-Khronos.

I-OpenCL BSP Compilation Flow
I-OpenCL BSP ixhasa ezi ndidi zilandelayo zokuqukuqela okuqukuqelayo:

• I-Flat compile [-bsp-flow flat]: Yenza uqulunqo olusicaba loyilo lonke uyilo (BSP kunye ne-kernel generated hardware).
• Uqulunqo lwesiseko [-bsp-flow base]: Yenza uqulunqo lwesiseko ngokusebenzisa izithintelo zeLogicLock ukusuka kwisiseko.qsf file. Ithagethi yewotshi ye-kernel ikhululekile ukuze i-hardware ye-BSP ibe nenkululeko engakumbi yokuhlangabezana nexesha. Isiseko sedatha ye-base.qar senzelwe ukugcina i-hardware ye-BSP, eyingingqi emileyo.
• Thatha ngaphandle indibaniselwano [ ]: Ibuyisela ixesha elivaliweyo kwingingqi ye-static ukusuka kwisiseko sedatha ye-base.qar kwaye iqulunqa kuphela i-kernel eyenziwe nge-hardware. Ikwanyusa ithagethi yewotshi yekernel ukufumana eyona kernel iphezulu yokusebenza frequency (fmax).

ISahlulo se-OpenCL BSP Floorplan
Iplani yomgangatho we-OpenCL BSP yohlulwe ikakhulu kule mimandla mibini ilandelayo:

• Ummandla omileyo: Umele ummandla onezixhobo ezinxulumene ne-BSP ezihlala zimile. Ixesha livaliwe kulo mmandla ngexesha lokuhlanganiswa kwesiseko. Ngokubanzi, injongo kukunciphisa izixhobo zechip ezisetyenziswa ngulo mmandla ukuvala ixesha.
• Ummandla we-Kernel: Imele uqwalaselo ngokutsha olungaphelelanga (PR) ummandla ogcinelwe ufrize_wrapper_inst|kernel_system_inst imodyuli, equlathe ikernel. Ngokubanzi, injongo kukugcina izixhobo zechip ukuya kumlinganiselo omkhulu kulo mmandla.

1. I-Intel FPGA SDK ye-OpenCL isekelwe kwiNkcazo ye-Khronos epapashwe, kwaye iphumelele iNkqubo yoVavanyo lwe-Khronos. Imeko yangoku yokuthotyelwa inokufumaneka apha www.khronos.org/conformance.
2. I-OpenCL kunye nelogo ye-OpenCL ziimpawu zentengiso ze-Apple Inc. kwaye zisetyenziswa ngemvume yeKhronos Group™.

Intel Corporation. Onke Amalungelo Agciniwe. I-Intel, ilogo ye-Intel, kunye nezinye iimpawu ze-Intel ziimpawu zorhwebo ze-Intel Corporation okanye iinkampani eziphantsi kwayo. I-Intel iqinisekisa ukusebenza kweFPGA yayo kunye neemveliso zesemiconductor kwiinkcukacha zangoku ngokuhambelana newaranti esemgangathweni ye-Intel, kodwa inelungelo lokwenza utshintsho kuzo naziphi na iimveliso kunye neenkonzo nangaliphi na ixesha ngaphandle kwesaziso. I-Intel ayithathi xanduva okanye ityala elivela kwisicelo okanye ukusetyenziswa kwalo naluphi na ulwazi, imveliso, okanye inkonzo echazwe apha ngaphandle kokuba kuvunyelwene ngokubhaliweyo yi-Intel. Abathengi be-Intel bayacetyiswa ukuba bafumane inguqulelo yamva nje yeenkcazo zesixhobo ngaphambi kokuba baxhomekeke kulo naluphi na ulwazi olupapashiweyo naphambi kokubeka iiodolo zeemveliso okanye iinkonzo.
*Amanye amagama kunye neempawu zingabangwa njengempahla yabanye.

Izikhokelo ze-OpenCL BSP Floorplanning

• Qalisa ngokuhlanganiswa okucaba ukuqonda apho onke amacandelo aphambili e-BSP abekwa ngokwendalo (ingakumbi iibhloko ze-IP ezinonxibelelwano lwe-I/O olufana ne-PCIe okanye i-DDR). Ngelixa uyila i-BSP, kusenokufuneka ucinge ngokuseka imibhobho stages phakathi kwe IPs ukuvala ixesha. Kufuneka uqale uqhube inkqubo yokutshayela imbewu ukuze uchonge iindlela ezingaphumeleliyo, uze uzame ukuzilungisa.
  Ingcebiso: — Izinga elilungileyo lokuvalwa kwexesha lokutshintshwa kwembewu eqokelelweyo liya kuba namathuba aphezulu okuvala ixesha lokuqokelela isiseko.
  — Ukuba ubona ukusilela okungaguqukiyo kwi-mm_interconnect* (icandelo elongeziweyo yi-Qsys), emva koko vula iNkqubo ngeQsys Interconnect viewer kwaye ujonge ukuntsonkotha koqhagamshelo olungaphumeleliyo. Unokongeza i-pipelining flipflops kwi viewer ukuphucula ixesha. Ukuba awukakwazi kujongana nalo mba, kungafuneka waphule mm_interconnect* indlela ebalulekileyo ngokongeza iibhulorho zemibhobho yeAvalon.
• Ngexesha lokudityaniswa kwesiseko, qala ngeLogicLock kwingingqi yekernel equlathe freeze_wrapper_inst|kernel_system_inst. Ngaphandle kweminye imiqobo, i-Intel Quartus Prime inokubeka i-hardware ye-BSP ngokukhululekileyo kwindawo eseleyo ye-chip. Sebenzisa i-flat compile kunye ne-chip planner ukuchonga ubungakanani kunye nendawo ye-hardware ye-BSP, njenge-PCIe kunye ne-DDR. Ke, gcina ummandla we-kernel ngokusebenzisa i-LogicLock ngelixa unqanda ezona ndawo zidibeneyo ze-BSP hardware.
  Ingcebiso: Ukuba usapho lwetshiphu olusetyenzisiweyo luyafana neqonga lereferensi kwaye ukuba amacandelo e-BSP ayafana, kunokukhawuleza ukuqalisa ngemimandla ye-LogicLock ye-freeze_wrapper_inst|kernel_system_inst ethunyelwa nge-OpenCL reference BSP kwaye kusetyenzwe ngokusilela.
• Unokongeza la malungu alandelayo kwi-BSP yakho:
  - Iibhanki zememori: Ukuba wongeza ngakumbi iibhanki zememori, kuya kufuneka uchonge indawo yebhanki ye-I/O kuba unokufuna ukongeza iibhulorho zemibhobho ukuhlangabezana nexesha.
  — Iitshaneli ze-I/O: Unokongeza iitshaneli ze-I/O ezinjengevidiyo, i-Ethernet, okanye ujongano lweserial. Ukuba wongeza amajelo e-I/O, kuya kufuneka uchonge indawo yebhanki ye-I/O kuba unokufuna ukusebenzisa imimandla emitsha ye-LogicLock yokufaka imibhobho ukuba ixesha lokuvala linzima.
  Ingcebiso: Ukuba ufuna ukongeza iibhulorho zemibhobho (ngokomzekeloampLe, ngenxa yolibaziseko olukhulu lwendlela olubangela ukusilela kwexesha), emva koko qwalasela umgama womzila ukusuka kwimvelaphi ukuya kwindawo yokufikela kwingqiqo kwitshiphu kwaye ukhulule isithuba esibekelwe ummandla wekernel.
• Landela ezi zikhokelo ngokubanzi xa ugcina imimandla ye-LogicLock kwi-kernel:
  — Zama ukubeka zonke iikholamu ze-DSP kwi-kernel_system ngaphandle kokuba kufunwa yi-BSP.
  - Ukuzama ukugcina izixhobo ezininzi ze-kernel_system.
  - Zama ukugcina inani leenotshi kwingingqi yekernel ukuba lincinci.
  Lo mzobo ulandelayo ubonisa inotshi eyongeziweyo ukubeka ibhulorho yombhobho phakathi kwePCIe kunye neDDR bank.

Umfanekiso 1. I-OpenCL BSP Floorplan ye-Intel Arria® 10 GX kwi-17.0 Khupha

Izikhokelo zoKusebenza kwaMaxa amaninzi
Ubuninzi be-frequency yokusebenza (fmax) ezuzwe ngeenkozo ubukhulu becala ixhomekeke kwisantya se-FPGA kuba uninzi lwee-IPs kufuneka zibe sele zilungisiwe. Nangona kunjalo, kunokubakho i-fmax elahlekileyo ngokuxhomekeke kwiplani yomgangatho we-BSP. UmzekeloampLe, ngokwesiqhelo inani lokusikwa kwindawo yekernel ye BSP ichaphazela ikernel fmax.
Njengoko kubonisiwe kulo mfanekiso ulandelayo, ukufumana eyona mbewu isisiseko ivelisa owona mndilili ungcono wefmax:

1. Yenza ukutshatyalaliswa kwembewu kwisiseko sokuhlanganiswa endaweni yokukhetha imbewu yokuqala ehambelana nexesha.
2. Yenza uhlanganiselo lwangaphandle (ngokusebenzisa iinkozo ezimbalwa ukusuka kwi-example uyilo) kuzo zonke iimbewu zesiseko ezidlulayo.
3. Bala umndilili wefmax kuzo zonke iimbewu ezisisiseko.
4. Khetha imbewu esisiseko evelisa owona mndilili uphezulu wefmax.
   Imbewu esisiseko ene-avareji engcono kakhulu ye-fmax ngumgqatswa olungileyo wokukhululwa nge-BSP. Ukuba uthatha isigqibo sokulandela indlela eyahlukileyo kunamanyathelo acetyiswayo, unokujonga i-5-10% umahluko kwi-fmax yenkqubo yokuhlanganiswa kwe-kernel yokungenisa.

Umzobo 2. Ukuchonga eyona Mbewu iSiseko iBalaseleyo

• Ukuqonda ukuba i-kernel inokubaleka kangakanani ngaphandle kwezithintelo zeplani yomgangatho:
  1. Yenza udibaniso olucaba lwekernel kwaye ujonge i-fmax.
  2. Yenza udibaniso lokungenisa elizweni kwi-kernel efanayo kwaye ujonge i-fmax.
  3. Thelekisa iziphumo zefmax.
  Ngenxa yezithintelo zeplan yomgangatho, ukuqokelelwa ngaphandle kwefmax kuhlala kusezantsi kuneflat compile fmax. Ukunqanda ingxolo yembewu, qulunqa ikernel kunye neembewu ezisisiseko kwaye uqwalasele umndilili wefmax ngelixa uthelekisa iziphumo zefmax.
• Ungaze uthelekise i-kernel fmax ukusuka kwisiseko sokudityaniswa kunye neflethi okanye ukuqokelelwa kokungenisa elizweni. Iithagethi zewotshi yeKernel zihlaziyekile ngexesha lokudityaniswa kwesiseko kwaye ngenxa yoko, awusoze ufumane iziphumo ezilungileyo.
• Qwalasela iwotshi yekernel indlela ebalulekileyo kwisiseko okanye ekuhlanganiseni okungenisa elizweni. Ukuba indlela ebalulekileyo inqumla i-kernel ukuya kwindawo engatshintshiyo kwi-floorplan, tshintsha i-floorplan okanye usebenzise iimbewu ezimbalwa ezisisiseko ukuphepha le ndlela inzima.

Izikhokelo zoVavanyo lwe-BSP yokuSebenza ngokuLungileyo kweziBonelelo

Iphezulu ipesenti yokusetyenziswa kobutyebitage, kungcono usetyenziso lwendawo kwindawo emileyo ye-BSP yakho. Ipesenti yokusetyenziswa kwezixhobo eziphezulutage ikwathetha ukuba izibonelelo ezininzi ziyafumaneka kwingingqi yekernel.
Landela la manyathelo angezantsi ukubala ipesenti yokusetyenziswa kobutyebitagiBSP yakho:

1. Fumana amaxabiso azo zonke izibonelelo kwiFPGA ukusuka phezulu.fit.rpt okanye base.fit.rpt ekhoyo phantsi kwecandelo leNkcazo yeSahlulo sengxelo yeFitter.
2. Kutsalwa ixabiso le-“freeze_wrapper_inst|kernel_system_inst” (ummandla wekernel).

Ingcebiso:
Gxininisa ngakumbi kumaxabiso emodyuli ye-adaptive logic (ALM) kunexabiso lezinye izibonelelo. Ukuqinisekisa ukuba ipesenti yokusetyenziswa kwezibonelelotagI-e ye-ALM ikufutshane ne-OpenCL reference BSP. Ipesenti ephezulu kakhulutagI-e ye-ALM inokukhokelela kwingxinano, enokuthi inyuse ixesha lokudibanisa kwaye yazise ukuxinana kwendlela kwiinkozo ezintsonkothileyo. Nangona kunjalo, unokuhlala usonyusa okanye unciphisa indawo yengingqi emileyo, kwaye ujonge ixesha lokudibanisa kunye ne-fmax.
Le theyibhile ilandelayo ibonisa ukusetyenziswa kwe-OpenCL BSP yezixhobo ze-Arria ® 10 GX kwi-17.0 yokukhululwa.

Uluhlu loku-1.
I-OpenCL BSP Resource Usetyenziso lwe-IntelArria 10 GX izixhobo kwi-17.0 Release

	Iyonke ekhoyo	Igcinelwe iKernel	Iyafumaneka kwi-BSP	Isetyenziswa yi-BSP	0/0
LM	427200	393800	33400	23818.	I-71.%
Iirejista	1708800	1575200	133600	38913	I-29.%
M2OK	2713	2534	179	134	I-75.%
I-DSP	1518	1518	0	0	N / A

Qaphela ukuba ucwangciso lomgangatho lwenziwa ngendlela yokuba ummandla omileyo ungabi nazo naziphi na iibhloko ze-DSP.

Imbali yoHlaziyo loxwebhu

Uluhlu loku-2.
Imbali yoHlaziyo lweNgxelo ye-Intel FPGA SDK ye-OpenCL yeBhodi yeNkxaso yeSikhokelo sokuLungisa iPakethe yeFloorplan

Umhla	Inguqulelo	Iinguqu
Agasti-17		Ukukhutshwa kokuqala.

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Ukuzisa impendulo
I-ID: 683312
I-AN-824
Inguqulelo: 2017.08.08
I-AN 824: Intel® FPGA SDK yeBhodi ye-OpenCL™
ISikhokelo soPhuculo sePakethe yeFloorplan

Amaxwebhu / Izibonelelo

intel AN 824 FPGA SDK for OpenCL Board Support Package Floorplan [pdf] Isikhokelo somsebenzisi I-AN 824 FPGA SDK ye-OpenCL Board Support Package Floorplan, AN 824, FPGA SDK ye-OpenCL Board Support Package Floorplan, i-OpenCL Board Support Package Floorplan, i-Board Support Package Floorplan, i-Support Package Floorplan, i-Package Floorplan,

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