MICROCHIP v2.3 Gen 2 Pule Fa'atonu

Folasaga

Fai se Fesili

O lenei CoreRxIODBitAlign aʻoaʻoga lautele IP o loʻo faʻaaogaina i le IO gearing block i le Rx auala mo Bit Alignment e tutoatasi mai faʻamaumauga poʻo faʻasalalauga o loʻo faʻaaogaina. Ole CoreRxIODBitAlign e fa'atagaina oe e fetu'una'i le fa'atuai ile ala fa'amatalaga e fa'atatau ile ala uati.

CoreRxIODBitAlign Aotelega

Autu Fa'aliliuga	O lenei pepa e fa'atatau ile CoreRxIODBitAlign v2.3
Masini Lagolago	CoreRxIODBitAlign e lagolagoina aiga nei:
Aiga	• PolarFire® SoC
	• PolarFire
	Fa'aaliga: Mo nisi fa'amatalaga, asiasi ile itulau oloa
Lagolago Meafaigaluega tafe	Manaomia Libero® SoC v12.0 po'o fa'asalalauga mulimuli ane
Fa'afeso'ota'i Lagolago	—
Laisene	CoreRxIODBitAlign e le mana'omia se laisene
Fa'atonuga fa'apipi'i	CoreRxIODBitAlign e tatau ona faʻapipiʻi i le IP Catalog of Libero SoC software otometi, e ala i le IP Catalog update function i Libero SoC software, pe sii mai ma le lima mai le lisi. O le taimi lava e faʻapipiʻi ai le IP core i le Libero SoC software IP Catalog, e faʻapipiʻiina, gaosia, ma faʻapipiʻiina i totonu o SmartDesign mo le faʻaofiina i totonu o le poloketi Libero.
Fa'aogaina o masini ma Fa'atinoga	O se aotelega o le faʻaogaina ma faʻamatalaga faʻatinoga mo CoreRxIODBitAlign o loʻo lisiina i le 8. Faʻaogaina o Mea ma Pertulaga

CoreRxIODBitAlign Change Log Information

O lenei vaega o loʻo tuʻuina atu se faʻamatalaga atoatoaview o foliga fa'ato'a tu'ufa'atasia, amata i le fa'asalalauga lata mai. Mo nisi fa'amatalaga e uiga i fa'afitauli ua fo'ia, va'ai le vaega 7. Fa'afitauli.

CoreRxIODBitAlign v2.3	O le a Fou                   • Fa'afou mo le fa'aa'oa'oga fa'avae MIPI
CoreRxIODBitAlign v2.2	O le a le mea Fou        • Fa'aopoopo le Agagavale ma le Taumatau EYE Tap e fa'atuai ai fa'amatalaga i le pito i luga

Vaega

Fai se Fesili

CoreRxIODBitAlign ei ai uiga nei:

• Lagolagoina le Fa'aa'otonuina o Bit ma 'ese'ese Laulau Mata 1–7
• Lagolago eseese Fabric Double Data Rate (DDR) Modes 2/4/3p5/5
• Lagolago Fa'ase'e ma Toe amata/Taumau masini
• Lagolagoina a'oa'oga Fa'afeso'ota'i Fa'agaio'iga Fa'atekonolosi Fe'avea'i (MIPI) e ala ile LP fa'ailoga Amata ole Fa'avaa
• Lagolago 256 Tap Fa'atuai mo Bit Alignment

Fa'amatalaga Fa'atino

Fai se Fesili

CoreRxIODBitAlign with Rx IOD Interface

Fai se Fesili

O le ata o loʻo i lalo o loʻo faʻaalia ai se ata poloka maualuga o le CoreRxIODBitAlign.

• O le faʻamatalaga e faʻatatau i le CoreRxIODBitAlign e lagolagoina PolarFire® ma PolarFire SoC masini.
• CoreRxIODBitAlign fa'atino a'oa'oga ma e nafa fo'i ma fa'afeso'ota'i masini IO Digital (IOD) ma IO Gearing (IOG) e lagolago ai e avea o se puna malosi ma fetuutuuna'i fa'atuai e pu'e sa'o ai fa'amaumauga.
• O lo'o fa'amatalaina atoa le fa'agasologa o a'oa'oga i le vaega 5. Fa'asologa o Taimi.
• E lagolagoina malosi e CoreRxIODBitAlign le fa'aopoopo pe aveese le tuai mai le ala fa'amatalaga e fa'atatau i le ala o le uati. O le RX_DDRX_DYN Interface e tu'uina atu ai fa'atonuga i le CoreRxIODBitAlign e fa'atino ai le a'oa'oga pito i luga ole uati-i-fa'amatalaga e ala i le fa'aopoopoina o fa'atuai o tapuni ile itu agai i luga. CoreRxIODBitAlign, i le isi itu mo le toe faia mulimuli aneview (o fa'atupu fa'atuai ta'i ta'i ta'itasi), e teu ai fa'ailoga o le tulaga fa'aalia mai le RX_DDRX_DYN Interface.
• O le CoreRxIODBitAlign e fa'aauau a'oa'oga mo fa'aopoopoga ta'i uma se'ia o'o le RX_DDRX_DYN Interface i le tulaga i fafo.
• Ma le mea mulimuli, o le CoreRxIODBitAlign na te saluina le faʻailoga atoatoa o faʻamatalaga. Ole la'asaga lea e fa'asilisiliina ma fa'atatauina le fa'asologa o fa'amaumauga e 90 tikeri fa'atotonugalemu mai pito o le uati.
• O fa'ai'uga tuai fa'atulagaina o lo'o fa'atūina i le RX_DDRX_DYN Interface e fa'amae'a ai le a'oa'oga fa'avasegaga.
• O foliga o loʻo lagolagoina e lenei CoreRxIODBitAlign o loʻo lisiina auiliili e pei ona taua i lalo.

Mechanism Toe a'oa'oina

Fai se Fesili

• CoreRxIODBitAlign fa'aauau pea ona mata'ituina fu'a Tulaga o Manatu (IOD_EARLY/IOD_LATE) ma siaki pe o feliuliua'i fu'a.
• O le IP muamua e fetuutuunai paipa sa fuafuaina muamua e ala i le +/- 4 taps i luga pe agai i lalo. E oo lava i lena taimi, afai e feliuliuai fuʻa, o le IP e toe faʻaosoina le toleniga.

Taofi Mechanism (Fai se Fesili)

• E fa'aoga lea vaega pe a mana'omia le a'oa'oga ile tulaga Taofi. O le BIT_ALGN_HOLD o lo'o galue-maualuga fa'avae fa'aoga ma e tatau ona fa'amaonia e taofi ma fa'amalo e fa'aauau le a'oa'oga.
• O le HOLD_TRNG parameter e tatau ona seti i le 1 i le configurator e mafai ai lenei vaega. O lenei parakalafa ua seti i le 0 ona o le faaletonu.

Toe amata le Mechanism (Fai se Fesili)

• O lenei vaega e faʻaaogaina e toe amata ai aʻoaʻoga. Ina ia toe amata le a'oa'oga, o le BIT_ALGN_RSTRT fa'aoga e tatau ona fa'amaua mo le tasi le uati pulse Serial Clock (SCLK).
• Ole mea lea e amata ai le toe setiina malu ole IP, lea e toe setiina le BIT_ALGN_DONE ile 0 ma le BIT_ALGN_START ile 1.

Faamisi Mechanism (Fai se Fesili)

• O lenei vaega e faʻaaogaina pe a le manaʻomia le aʻoaʻoga, ma le aʻoaʻoga atoatoa e mafai ona faʻafefe. O le BIT_ALGN_SKIP o lo'o galue-maualuga fa'avae fa'aoga ma e tatau ona fa'amaonia e fa'amisi le a'oa'oga atoa.
• Ole SKIP_TRNG e tatau ona seti ile 1 ile configurator ina ia mafai ai lenei vaega. O lenei parakalafa ua seti i le 0 ona o le faaletonu.

Fa'aa'oa'oga fa'avae MIPI (Fai se Fesili)

• O le MIPI_TRNG parameter e tatau ona seti i le 1 i le configurator e mafai ai lenei vaega. Afai e seti, ona faʻaopoopoina lea o le LP_IN input port i le CoreRxIODBitAlign.
• E iloa e le IP le pito pa'u o le LP_IN input port, lea e faʻaalia ai le amataga aoga o le faʻavaa e amata ai le aʻoaʻoga.

CoreRxIODBitAlign Parameters ma Fa'ailoga Fa'amatalaga

Fai se Fesili

Fa'asologa GUI Parameters (Fai se Fesili)

E leai ni fa'asologa fa'atulagaina mo lenei fa'asalalauga autu.

Taulaga (Fai se Fesili)

O le laulau o loʻo i lalo o loʻo lisiina ai faʻailoga faʻaoga ma faʻaogaina o loʻo faʻaaogaina i le mamanu o CoreRxIODBitAlign.

Laulau 3-1. Fa'ailoga Ulufale ma Fa'ailoga

Fa'ailoga	Fa'atonuga	Lautele o le taulaga (bits)	Fa'amatalaga
Uati ma Toe setiina
SILK	Ulufale	1	Uati ie
PLL_LOCK	Ulufale	1	PLL Loka
TOE FAI	Ulufale	1	Active-Low toe setiina asynchronous
Fa'amatalaga pasi ma le Pulea
IOD_EARLY	Ulufale	1	Fa'amatalaga mata mata'ituina vave fu'a
IOD_LATE	Ulufale	1	Fa'amatalaga mata mata'ituina tuai fu'a
IOD_ OOR	Ulufale	1	Mata'i mata fa'amatalaga fu'a i fafo mo le laina tuai
BIT_ALGN_EYE_IN	Ulufale	3	E seti e le tagata fa'aoga le fa'amatalaga mata mata'ituina lautele
BIT_ALGN_RSTRT	Ulufale	1	Toe amata a'oa'oga Bit Align (Pulse-based assertion) 1— Toe amata le Toleniga 0— Leai se Toe Toe Fa'aa'oa'oga
BIT_ALGN_CLR_FLGS	Tuuina atu	1	Fa'amama fu'a Early po'o Late
BIT_ALGN_LOAD	Tuuina atu	1	uta le faaletonu
BIT_ALGN_DIR	Tuuina atu	1	Fa'atuai laina i luga po'o lalo itu 1— I luga (fa'aopoopo 1 tap) 0— I lalo (fa'aitiitia 1 tap)
BIT_ALGN_MOVE	Tuuina atu	1	Fa'atuputeleina le tuai o le pa'u o le gaioi
BIT_ALIGN_SKIP	Ulufale	1	Fa'ase'e a'oa'oga Bit Align (Fa'amatalaga fa'avae) 1— Fa'ase'e le a'oa'oga ma na'o le aoga pe a seti le SKIP_TRNG parameter ile 1 0— E tatau ona fa'aauau a'oa'oga e pei ona masani ai
BIT_ALIGN_HOLD	Ulufale	1	Bit Align a'oa'oga taofi (tulaga fa'avae) 1— Taofi le toleniga ma na'o le aoga pe a fa'atulaga le parameter HOLD_TRNG i le 1 0— E tatau ona fa'aauau a'oa'oga e pei ona masani ai
BIT_ALIGN_ERR	Tuuina atu	1	Bit Align training error (Level-based assertion) 1— Sese 0— Leai se Sese
BIT_ALGN_START	Tuuina atu	1	Bit Align amata a'oa'oga (Fa'amatalaga fa'avae) 1— Amata 0— E le'i amataina
BIT_ALGN_FAIA	Tuuina atu	1	Fa'aa'oa'oga Bit Fa'a'aoga ua mae'a (Fa'amatalaga fa'avae) 1— Maea 0— E le'i mae'a

Fa'ailoga	Fa'atonuga	Lautele o le taulaga (bits)	Fa'amatalaga
LP_IN	Ulufale	1	O a'oa'oga fa'ava'a fa'avae a le MIPI (Tulaga fa'avae) 1— Fa'ailo Active-Low e tatau ona fa'amaulalo e fa'ailoa ai le amataga o le fa'avaa ma e tatau ona tu'u na'o le pito o le fa'avaa. 0— O a'oa'oga e tatau ona fa'agasolo e pei ona masani ai ma o lenei fa'ailoga e tatau ona fa'amaulalo i totonu.
DEM_BIT_ALGN_TAPDLY	Tuuina atu	8	Fuafua le tuai o le TAP ma aoga pe a fa'atū maualuga le BIT_ALGN_DONE e le IP.
RX_BIT_ALIGN_LEFT_WIN	Tuuina atu	8	Fa'amatalaga Taugavale Mata mataitu tau Fa'aaliga: E na'o le aoga ia tau pe a seti le BIT_ALGN_DONE i le 1 ae fa'atulaga le BIT_ALGN_START i le 0. Afai ua seti le parakalafa SKIP_TRNG ona toe fo'i lea i le 0.
RX_BIT_ALIGN_RGHT_WIN	Tuuina atu	8	Fa'amatalaga Taumatau Tau mata'itu mata Fa'aaliga: E na'o le aoga ia tau pe a seti le BIT_ALGN_DONE i le 1 ae fa'atulaga le BIT_ALGN_START i le 0. Afai ua seti le parakalafa SKIP_TRNG ona toe fo'i lea i le 0.

Fa'atinoina CoreRxIODBitAlign i Libero Design Suite

Fai se Fesili

SmartDesign (Fai se Fesili)

• CoreRxIODBitAlign o loʻo faʻapipiʻiina muamua i totonu ole SmartDesign IP deployment design environment. O le ata lea o lo'o fa'aalia ai se example fa'asologa o CoreRxIODBitAlign.
• O le autu e faʻapipiʻiina e faʻaaoga ai le faʻamalama faʻapipiʻi i le SmartDesign, e pei ona faʻaalia i le Ata 4-2.
• Mo nisi faʻamatalaga e uiga i le faʻaaogaina o le SmartDesign e faʻavave ma faʻatupu ai fatu, vaʻai SmartDesign User Guide.

Fa'atonu CoreRxIODBitAlign i SmartDesign (Fai se Fesili)

• O le autu e faʻapipiʻiina e faʻaaoga ai le GUI faʻatulagaina i totonu o SmartDesign e pei ona faʻaalia i le ata o loʻo i lalo.

Fa'ata'ita'iga tafe (Fai se Fesili)

• O le suʻega faʻaoga mo CoreRxIODBitAlign o loʻo aofia i faʻasalalauga uma.
• Ina ia faʻataʻitaʻiina faʻataʻitaʻiga, faʻatino le laasaga o loʻo i lalo: filifili le Suʻega Testbench faʻaaogaina i totonu o le SmartDesign, ona kiliki lea o le Save and Generate on the Generate pane.
• O le User testbench e filifilia e ala i le autu o le testbench Configuration GUI. A faʻatupuina e SmartDesign le poloketi Libero® SoC, faʻapipiʻi le suʻega suʻega a le tagata files.
• Ina ia faʻatautaia le suʻega suʻega a le tagata, seti le aʻa mamanu i le CoreRxIODBitAlign instantiation i le Libero SoC design hierarchy pane, ona kiliki lea o le Simulation i le Libero SoC Design Flow window.
• Ole mea lea e fa'atalosagaina ai le ModelSim® ma otometi ona fa'atautaia le fa'ata'ita'iga.
• O le ata lea o loʻo faʻaalia mai ai le example o se faiga fa'atusa fa'atusa. E fa'aogaina le vaega IOG_IOD DDRX4 ma le DDTX4 i le loopback mode ma le CoreRxIODBitAlign mo fa'ata'ita'iga.
• O iinei, o faʻamaumauga a le PRBS na gaosia e tuʻuina atu e le DDTX4 faʻasolosolo i le DDRX4 ma mulimuli ane, o le PRBS checker e faʻaaogaina e siaki ai le faʻamaoni o faʻamaumauga pe a maeʻa le aʻoaʻoga.

Fa'asologa i Libero SoC (Fai se Fesili)

• Ina ia faʻatautaia le faʻasologa ma le faʻatulagaga ua filifilia i le GUI faʻatulagaina, seti le aʻa mamanu talafeagai. I lalo o le Implement Design, i le Design Flow tab, kiliki-i luga ole Synthesize ma kiliki Run.

Nofoaga ma Auala ile Libero SoC (Fai se Fesili)

• A maeʻa ona faʻatulaga lelei le aʻa o le mamanu ma faʻatautaia le Synthesis. I lalo o le Implement Design i le Design Flow tab, kiliki i luga o le Nofoaga ma le Auala, ma kiliki le Run.

System Integration (Fai se Fesili)

• O lenei vaega o loʻo faʻaalia e faʻafaigofie le tuʻufaʻatasia o CoreRxIODBitAlign.
• O le Rx/Tx IOG na fa'aogaina e lagolagoina le tele o fa'aoga ma fa'atinoga. O nei fa'amaumauga ma fua o le uati e ono fa'agesegese ma i nisi tulaga e vave, e fa'atatau i le fa'ailoga fa'ai'u.
• O le laulau o lo'o i lalo o lo'o lisiina ai fa'amaumauga ma le fua o le uati.

Laulau 4-1. Fa'amatalaga ma Fua Faatatau Uati

Faiga IOG	Fa'atonuga	Fuafuaga o Meafaigaluega	Max IO Fa'amatalaga Fua Fa'atatau	IO Uati Fa'atatau	Autu Uati Fa'atatau	Ituaiga Fa'amatalaga
DDRX4	Ulufale	8:1	1600 Mbps	800 MHz	200 MHz	DDR

O le ata lea o loʻo faʻaalia mai ai le example ole CoreRXIODBitAlign subsystem integration.

• O lo'o fa'aogaina e le subsystem muamua le vaega IOG_IOD DDRX4 ma le DDTX4 ile Loopback mode ma le CoreRxIODBitAlign mo fa'ata'ita'iga. O iinei, o faʻamaumauga a le PRBS na gaosia e faʻasalalau e IOG_IOD_DDRTX4_0, faʻasolosolo ile IOG_IOD_DDRX4_PF_0.
• O le CoreRxIODBitAlign o loʻo faia le aʻoaʻoga (BIT_ALIGN_START seti i le 1, BIT_ALIGN_DONE seti i le 0) faʻatasi ai ma le vaega IOG_IOD_DDRX4_PF_0, ma mulimuli ane, a maeʻa aʻoaʻoga (BIT_ALIGN_START seti i le 0, BIT_ALIGN_DONE seti i le 1) o le PRBS siaki faʻamaumauga o loʻo faʻaaogaina

Su'ega (Fai se Fesili)

• O lo'o fa'aogaina se su'ega tu'ufa'atasi e fa'amaonia ma fa'ata'ita'i le CoreRxIODBitAlign ua ta'ua o le su'ega fa'aoga.

User Testbench (Fai se Fesili)

• O loʻo aofia ai le suʻega suʻega faʻatasi ma faʻasalalauga o CoreRxIODBitAlign lea e faʻamaonia ai nai vaega o le CoreRxIODBitAlign. O le ata o loʻo i lalo o loʻo faʻaalia ai le CoreRxIODBitAlign user testbench.
• E pei ona faʻaalia i le ata muamua, o le suʻega suʻega a le tagata faʻaoga e aofia ai le Microchip DirectCore CoreRxIODBitAlign DUT, PRBS_GEN, PRBS_CHK, CCC, IOG_IOD_TX, ma IOG_IOD_RX e faʻamaonia i le Loopback mode.
• O le Clock Conditioning Circuit (CCC) e ave le CORE_CLK ma le IO_CLK pe a mautu le uati.
• PRBS_GEN ave fa'amaumauga tutusa i IOG_IOD_TX, ona maua lea e IOG_ID_RX fa'amaumauga fa'asologa i le tutusa.
• O le CoreRxIODBitAlign DUT o loʻo faʻatinoina aʻoaʻoga ma faʻailoga IOD_CTRL. A maeʻa le aʻoaʻoga, e mafai e le PRBS_CHK poloka ona siaki faʻamaumauga mai le poloka IOG_IOD_RX mo faʻamaumauga saʻo.
• Taua: E lagolagoina e le tagata su'esu'e na'o le fa'atulagaina tumau.

Ata o Taimi

(Fai se Fesili)

• O lenei vaega o loʻo faʻamatalaina le ata o le taimi o le CoreRxIODBitAlign.

CoreRxIODBitAlign Taimi Taimi o A'oa'oga (Fai se Fesili)

• Ole ata ole taimi lea ole example o se fa'asologa o a'oa'oga fa'atasi ma ta'iala nei.
• O le CoreRxIODBitAlign e galue e fa'atatau i le Ie uati po'o le SCLK, po'o le OUT2_FABCLK_* mai le CCC po'o le PLL vaega, ma le PF_IOD_GENERIC_RX IOD vaega fa'aaoga galuega e fa'atatau i le OUT*_HS_IO_CLK_* po'o le Uati Faletupe po'o le BCLK mo sina fa'aogaina. O iinei, o le PF_IOD_GENERIC_RX IOD vaega maua le fa'amaumauga fa'asologa mo sina alignment. Mo example, afai o le fua faatatau manaomia o le 1000 Mbps i le DDRx4 Fabric mode, o le OUT2_FABCLK_0 poʻo le SCLK e tatau ona tulia mai le PLL poʻo le CCC vaega e pei o le 125 MHz ma le OUT0_HS_IO_CLK_0 poʻo le BCLK i le PF_IOD_GENERIC_RX e tatau ona 500 MHz.
• CoreRxIODBitAlign amata le toleniga pe a mautu le PLL_LOCK ma ave maualuga. Ona amata loa lea o a'oa'oga e ala ile ave ole BIT_ALGN_START ile maualuga ma le BIT_ALGN_DONE ile maualalo ona fa'ato'a fa'asolo lea ole fa'atinoina o le BIT_ALGN_LOAD e fa'ae'e ai fa'atonuga ile vaega PF_IOD_GENERIC_RX. O le BIT_ALGN_CLR_FLGS e fa'aoga e fa'amama ai fu'a IOD_EARLY, IOD_LATE, ma BIT_ALGN_OOR.
• CoreRxIODBitAlign fa'asolo ile BIT_ALGN_MOVE sosoo ai ma le BIT_ALGN_CLR_FLGS mo TAP uma ma fa'amaumau fu'a IOD_EARLY ma IOD_LATE. O le taimi lava e maualuga ai le BIT_ALGN_OOR e le vaega PF_IOD_GENERIC_RX, CoreRxIODBitAlign salu le fu'a EARLY ma LATE ua faamaumauina ma maua ai fu'a Early ma Late e sili ona lelei e fuafua ai le tuai o le TAP mo le fa'aogaina o le uati ma fa'amaumauga.
• O le CoreRxIODBitAlign e utaina le tuai o le TAP ma ave le BIT_ALGN_START maualalo ma le BIT_ALGN_DONE maualuga e faailoa ai le maeʻa o le aʻoaʻoga.
• CoreRxIODBitAlign fa'aauauina le toe a'oa'o malosi pe a maua le pisa IOD_EARLY po'o le IOD_LATE fa'amatalaga tali mai le vaega PF_IOD_GENERIC_RX. O iinei, o le BIT_ALGN_DONE ua toe setiina ma ave i lalo ma le BIT_ALGN_START ua toe fa'aoso maualuga e CoreRxIODBitAlign e fa'ailoa ai le toe amata o le toleniga. Ole fa'ailoga ole taimi ole a o'o ile tu'utu'uga ole taimi ole, fa'ailoa le BIT_ALGN_ERR ile fa'ai'uga ole a'oa'oga.
• Ua saunia foi e CoreRxIODBitAlign se faiga toe amata mo le tagata fa'au'u e toe amata le a'oa'oga pe a mana'omia. O le BIT_ALGN_RSTRT fa'aoga o lo'o galue-maualuga le pulupulu e tatau ona fa'aoso maualuga, mo se fa'ata'ita'igaample, valu uati.
• O iinei o le BIT_ALGN_DONE ua toe setiina ma ave i lalo, ma o le BIT_ALGN_START e toe faʻaoso maualuga e CoreRxIODBitAlign, e faʻaalia ai le amataga fou o le toleniga.
• CoreRxIODBitAlign o loʻo tuʻuina atu foi se masini e taofi ai le aʻoaʻoga i le ogatotonu. O iinei o le HOLD_TRNG e tatau ona seti i le 1, ona faʻaaoga lea e CoreRxIODBitAlign le BIT_ALGN_HOLD faʻaoga ma e tatau ona faʻamalosia le maualuga maualuga e faʻavae seia oʻo ina manaʻomia le CoreRxIODBitAlign e faia le aʻoaʻoga ona faʻaauau lea o le aʻoaʻoga pe a faʻaitiitia le faʻaoga BIT_ALGN_HOLD.

Faamatalaga Faaopoopo

(Fai se Fesili)

• O lenei vaega o loʻo tuʻuina atu ai se lisi o faʻamatalaga faaopoopo.
• Mo fa'afouga ma fa'amatalaga fa'aopoopo e uiga i le polokalama, masini, ma meafaigaluega, asiasi i itulau o Meatotino Tau le Atamai i le Microchip FPGA Intellectual Property Cores.

Fa'afitauli iloga ma fofo (Fai se Fesili)

• E leai ni tapula'a iloa po'o ni fofo i le CoreRxIODBitAlign v2.3.

Fa'agata Fa'atino ma Meafaigaluega (Fai se Fesili)

• E leai ni mea fa'agata ma masini i CoreRxIODBitAlign v2.3.

Fa'afitauli

(Fai se Fesili)

• O le laulau o lo'o i lalo o lo'o lisi uma ai fa'afitauli ua fo'ia mo fa'asalalauga eseese a CoreRxIODbitAlign.

Laulau 7-1. Fa'afitauli

Fa'asa'oloto	Fa'amatalaga
2.3	E leai ni fa'afitauli ua fo'ia i lenei fa'asalalauga v2.3
2.2	E leai ni fa'afitauli ua fo'ia i lenei fa'asalalauga v2.2
1.0	Uluai Fa'asalalauga

Fa'aaogāina ma Fa'atinoga

(Fai se Fesili)

O le CoreRxIODBitAlign macro o loʻo faʻatinoina i aiga o loʻo lisiina i le laulau o loʻo i lalo.

Laulau 8-1. Fa'aaogāina ma Fa'atinoga

Meafaigaluega Fa'amatalaga		FPGA Punaoa			Fa'atinoga (MHz)
Aiga	Meafaigaluega	DFF	LUTs	Fa'atatau Elemene	SILK
PolarFire®	MPF300TS	788	1004	1432	261
PolarFire SoC	MPF250TS	788	1004	1416	240

• Taua: Le fa'amaumauga i le laulau muamua e maua i le fa'aaogaina o le Libero® SoC v2023.2.
• O fa'amaumauga i le laulau o lo'o muamua atu e maua i le fa'aogaina o fa'asologa masani ma fa'atulagaina.
• O lo'o mulimuli mai fa'asologa maualuga GUI fa'asologa ua suia mai a latou tau fa'aletonu.
• O tau fa'aletonu nei:
  • SKIP_TRNG = 1
  • HOLD_TRNG = 1
  • MIPI_TRNG = 1
  • DEM_TAP_WAIT_CNT_WIDTH = 3
• O lo'o mulimuli mai le fa'atapula'aina o le uati e fa'aaoga e ausia ai numera fa'atinoga:
  • SCLK = 200 MHz
  • Vasega saosaoa = −1
• Ole fa'asologa ole fa'atatau e fa'apea: (Bit width/Numera o ta'amilosaga) × Uati Fua (Fa'atinoga).

Toe Iloilo Tala'aga

(Fai se Fesili)

O le tala fa'asolopito o lo'o fa'amatalaina suiga na fa'atinoina i le pepa. O suiga o lo'o lisiina e ala i toe iloiloga, amata i le lomiga aupito lata mai.

Laulau 9-1. Toe Iloilo Tala'aga

Toe Iloiloga	Aso	Fa'amatalaga
B	02/2024	Ole lisi lea o suiga ile toe teuteuga B ole pepa: • Fa'afou mo CoreRxIODBitAlign v2.3 • Fa'aopoopo le fa'amatalaga o fa'amaumauga o Suiga i le vaega Fa'atomuaga • Fa'afouina 8. Vaega o Fa'aaogāga ma Fa'atinoga • Faaopoopo le 7. Vaega o Mataupu
A	03/2022	Ole lisi lea o suiga ile toe iloiloga A ole pepa: • O le pepa na ave i le mamanu Microchip • Na suia le numera o pepa mai le 50200861 i le DS50003255
3	—	Ole lisi lea o suiga ile toe iloiloga 3 ole pepa: • Fa'afouina mo CoreRxIODBitAlign v2.2. • Fa'afouina le ta'iala mo fa'amatalaga agavale ma taumatau fa'ailoga mata i le pito i luga. Mo fa'amatalaga fa'aopoopo, tagai ile Ata 2-1 ma le 3.2. Taulaga.
2	—	Ole lisi lea o suiga ile toe iloiloga 2 ole pepa: • Fa'afouina mo CoreRxIODBitAlign v2.1. • Fa'afouina: 2. Fa'amatalaga Fa'atino ma 5. Fa'asologa o Taimi.
1	—	Toefuataiga 1.0 o le lomiga muamua lea o lenei pepa. Fausia mo CoreRxIODBitAlign v2.0.

Microchip FPGA Lagolago

• Microchip FPGA products group backs its products with various support services, including Customer Service, Customer Technical Support Center, a webnofoaga, ma ofisa faatau i le lalolagi atoa.
• E fautuaina tagata fa'atau e asiasi i Microchip i luga ole laiga a'o le'i fa'afeso'ota'i le lagolago ona e foliga mai ua uma ona tali a latou fesili.
• Fa'afeso'ota'i le Technical Support Center e ala ile webnofoaga i www.microchip.com/support. Ta'ua le
• FPGA Device Numera Vaega, filifili le vaega o mataupu talafeagai, ma faʻapipiʻi le mamanu files a'o faia se mataupu lagolago fa'apitoa.
• Fa'afeso'ota'i Auaunaga Fa'atau mo le lagolago o oloa e le fa'apitoa, e pei o le tau o oloa, fa'aleleia o oloa, fa'afouga fa'amatalaga, tulaga oka, ma le fa'atagaina.
• Mai Amerika i Matu, valaau 8002621060
• Mai le lalolagi atoa, valaau 6503184460
• Fax, mai so'o se mea i le lalolagi, 6503188044

Microchip Fa'amatalaga

Le Microchip Webnofoaga

• Microchip e maua le lagolago i luga ole laiga e ala i la matou webnofoaga i www.microchip.com/. Lenei web'upega tafa'ilagi e fa'aoga e fai ai files ma fa'amatalaga faigofie ona maua e tagata fa'atau. O nisi o mea e maua e aofia ai:
• Lagolago oloa - Pepa o faʻamaumauga ma mea sese, faʻamatalaga o talosaga ma samppolokalame, punaoa mamanu, ta'iala a le tagata fa'aoga ma pepa lagolago mo meafaigaluega, fa'asalalauga fou fa'akomepiuta ma polokalama fa'amaumauga
• Lagolago Fa'atekinisi Lautele - Fesili e masani ona fesiligia (FAQs), talosaga lagolago faʻapitoa, vaega faʻatalanoaga i luga ole laiga, Microchip design paaga polokalame lisi sui auai
• Pisinisi o Microchip – Filifiliga oloa ma taʻiala faʻatonu, faʻasalalauga lata mai a le Microchip, se lisi o semina ma mea na tutupu, lisi o ofisa faʻatau Microchip, tufatufaina, ma sui fale gaosi oloa

Au'aunaga Fa'asilasilaga Suiga o Mea

• O le auaunaga fa'asilasilaga suiga o oloa a Microchip e fesoasoani e fa'amautu ai tagata fa'atau i oloa Microchip.
• O le a maua e le au fai saofaga faʻamatalaga imeli i soʻo se taimi e iai suiga, faʻafouga, toe teuteuga, poʻo mea sese e fesoʻotaʻi ma se aiga o oloa faʻapitoa poʻo meafaigaluega faʻaleleia o tului.
• Ina ia lesitala, alu i www.microchip.com/pcn ma mulimuli i faatonuga o le resitalaina.

Lagolago Tagata Fa'atau

• O tagata fa'aoga o oloa Microchip e mafai ona maua fesoasoani e ala i le tele o auala:
• Fa'asoa po'o le Sui
• Ofisa Fa'atauga Fa'alotoifale
• Embedded Solutions Engineer (ESE)
• Lagolago Fa'atekinisi
• E tatau i tagata fa'atau ona fa'afeso'ota'i le latou tufatufaina, sui, po'o le ESE mo le lagolago. O loʻo avanoa foʻi ofisa faʻatau i le lotoifale e fesoasoani i tagata faʻatau. O se lisi o ofisa fa'atau ma nofoaga o lo'o aofia i totonu o lenei pepa.
• E maua le lagolago fa'apitoa e ala ile webnofoaga i: www.microchip.com/support

Fa'ailoga Puipuiga o Fa'ailoga Fa'atonu a Microchip

• Manatua o fa'amatalaga o lo'o mulimuli mai o le fa'ailoga puipuia o tulafono i luga o oloa Microchip.
• O oloa Microchip e fetaui ma faʻamatalaga o loʻo i totonu o la latou Pepa Faʻamatalaga Microchip.
• E talitonu Microchip o lona aiga o oloa e saogalemu pe a faʻaaogaina i le auala faʻamoemoeina, i totonu o faʻamatalaga faʻaogaina, ma i lalo o tulaga masani.
• Microchip fa'atauaina ma puipuia fa'amalosi ana aia tatau tau meatotino. O taumafaiga e soli le tulafono o le puipuiga o oloa Microchip e matua fa'asaina ma e ono solia ai le Digital Millennium Copyright Act.
• E le mafai e le Microchip poʻo se isi mea gaosi semiconductor ona faʻamaonia le saogalemu o lana tulafono. O le puipuiga o tulafono laiti e le o lona uiga o loʻo matou faʻamaonia le oloa e "le mafai ona motusia".
• O le puipuiga o tulafono laiti o lo'o fa'asolosolo pea. Microchip ua tuuto atu i le faʻaauauina pea o le faʻaleleia atili o uiga puipuia o tulafono a tatou oloa.

Faasilasilaga Faaletulafono

• O lenei lomiga ma faʻamatalaga o loʻo i totonu e mafai ona faʻaaogaina i oloa Microchip, e aofia ai le mamanu, suʻega, ma tuʻufaʻatasia oloa Microchip ma lau talosaga. O le fa'aogaina o nei fa'amatalaga i so'o se isi lava faiga e solia ai nei aiaiga. O fa'amatalaga e uiga i le fa'aogaina o masini e tu'uina atu mo na'o lou fa'amalieina ma e ono suia i fa'afouga. O lau matafaioi le faʻamautinoa o lau talosaga e fetaui ma au faʻamatalaga. Fa'afeso'ota'i lou ofisa fa'atau Microchip fa'apitonu'u mo se lagolago fa'aopoopo pe, maua se lagolago fa'aopoopo ile www.microchip.com/en-us/support/design-help/client-support-services.
• O LENEI FAʻAMATALAGA E TUUINA E MICROCHIP "AS IS". E LEAI FAIA e le MICROCHIP ni sui po'o se fa'amaoniga o so'o se ituaiga pe fa'aalia pe fa'aali, tusia pe tugutu, tulāfono po'o se isi mea, e feso'ota'i ma fa'amatalaga e aofia ai ae le tapula'a i so'o se fa'amaoniaga fa'amaonia, fa'amaonia, ma le fa'amaoniaina. FAAMOEMOEGA, POO WARRANTY E FAI I ONA TULAGA, TULAGA, POO LE FAIGALUEGA.
• E LEAI SE MEA E TATAU AI MICROCHIP MO SO'O SE FA'AMATALAGA, FA'AMATALAGA, FA'ASA'OGA, FA'AMATALAGA, PO'O LE FA'A'ALI'AGA MA'U'U, FA'AFIA, TAU, PO'O LE TU'U'UINA O SO'O SE I'UGA SO'O SE FA'AIGA I LE FA'AMATALAGA POO LONA FA'A'OGA, PE'O LE MEA NA FA'AUPUNA'I, E tusa lava pe fa'aletonu. FA'AFIO PO'O LE FA'AFIA E MAFAI ILOA. I LE AGATO'O FA'AALIGA E LE TULAFONO, O LE UMA AOFA'I A MICROCHIP I TOTOGI UMA I SO'O SE AUALA E FA'AIGA I LE FA'AMATALAGA POO LONA FA'A'OA'OGA E LE'A LOLOA I LE FA'AMATALAGA O TOTOGI, AFAI E IAI, NA E TOTOINA SA'O I LE MICROCHIP MO LE FA'AMATALAGA.
• O le fa'aogaina o masini Microchip i le tausiga o le ola ma/po'o le saogalemu o talosaga e matua'i lava le fa'atau, ma ua malie le tagata fa'atau e puipuia, fa'asala, ma taofia le Microchip e le afaina mai so'o se mea leaga, tagi, suti, po'o tupe alu e mafua mai i lea fa'aoga. E leai ni laisene e tu'uina atu, fa'aalia po'o se isi mea, i lalo o so'o se Microchip aia tatau tau le atamai se'i vagana ua ta'ua.

Fa'ailoga Fa'ailoga

• Le igoa Microchip ma le logo, le Microchip logo, Adaptec, AVR, AVR logo, AVR Freaks, BesTime, BitCloud, CryptoMemory, CryptoRF, dsPIC, flexPWR, HELDO, IGLOO, JukeBlox, KeeLoq, Kleer, LANCheck, LinkMD, maXStylus, maXTouch MediaLB, megaAVR, Microsemi, Microsemi logo, MOST, MOST logo, MPLAB, OptoLyzer, PIC, picoPower, PICSTART, PIC32 logo, PolarFire, Prochip Designer, QTouch, SAM-BA, SenGenuity, SpyNIC, SST, SST Logo, SuperFlash, Symmetricom , SyncServer, Tachyon, TimeSource, tinyAVR, UNI/O, Vectron, ma XMEGA o fa'ailoga fa'amaufa'ailoga a Microchip Technology Incorporated i Amerika ma isi atunu'u.
• AgileSwitch, ClockWorks, The Embedded Control Solutions Company, EtherSynch, Flashtec, Hyper Speed ​​Control, HyperLight Load, Libero, nofoa afi, mTouch, Powermite 3, Precision Edge, ProASIC, ProASIC Plus, ProASIC Plus logo, Quiet-Wire, SmartFusion, SyncWorld , TimeCesium, TimeHub, TimePictra, TimeProvider, ma ZL o faʻailoga faʻamaufaʻailoga a Microchip Technology Incorporated i Amerika.
• Taofi Fa'aigoa Fa'atasi, AKS, Analog-mo-le-Digital Age, So'o se Capacitor, So'o se In, So'o'Out, Suiga Fa'aopoopo, BlueSky, BodyCom, Clockstudio, CodeGuard, CryptoAuthentication, CryptoAutomotive, CryptoCompanion, CryptoController, dsPICDEM, dsPICDEM.net Matching, Dynamic Average Matching , DAM, ECAN, Espresso T1S, EtherGREEN, EyeOpen, GridTime, IdealBridge, IGaT, In-Circuit Serial Programming, ICSP, INICnet, Intelligent Parallel, IntelliMOS, Inter-Chip Connectivity, JitterBlocker, Knob-on-Display, MarginLink, maxC maualugaView, membrane, Mindi, MiWi, MPASM, MPF, MPLAB Faʻamaonia logo, MPLIB, MPLINK, mSiC, MultiTRAK, NetDetach, Omniscient Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, Power MOS IV, Power MOS 7, PowerSmart, PureSilicon , QMatrix, ICE MONI, Ripple Blocker, RTAX, RTG4, SAM-ICE, Fa'asologa Quad I/O,
• faafanua faigofie, SimpliPHY, SmartBuffer, SmartHLS, SMART-IS, storClad, SQI, SuperSwitcher, SuperSwitcher II, Switchtec, SynchroPHY, Aofa'i Tumau, Taimi Fa'alagolago, TSHARC, Turing, USBCheck, VariSense, VectorBlox, VeriPHY, ViewSpan, WiperLock,
• XpressConnect ma ZENA o fa'ailoga fa'ailoga a Microchip Technology Incorporated i Amerika ma isi atunu'u.
• SQTP ose fa'ailoga tautua a Microchip Technology Incorporated i Amerika
• O le logo Adaptec, Frequency on Demand, Silicon Storage Technology, ma Symmcom o fa'ailoga fa'amaufa'ailoga a Microchip Technology Inc. i isi atunu'u.
• GestIC ose fa'ailoga fa'amaufa'ailoga a Microchip Technology Germany II GmbH & Co. KG, ose lala o Microchip Technology Inc., i isi atunu'u.
• O isi fa'ailoga tau fefa'ataua'iga uma o lo'o ta'ua i inei o meatotino a latou kamupani.
• © 2024, Microchip Technology Incorporated ma ona lala. Ua Taofia Aia Tatau Uma.
• ISBN: 9781668339879

Faiga Fa'atonuga

• Mo faʻamatalaga e uiga i Microchip's Quality Management Systems, faʻamolemole asiasi www.microchip.com/quality.

Fa'atauga ma Au'aunaga i le Lalolagi Atoa

AMERIKA	ASIA/ PASIFIK	ASIA/ PASIFIK	Europa
Kamupani Ofisa 2355 Sisifo Chandler Blvd. Chandler, AZ 85224-6199 Telefoni: 480-792-7200 Fax: 480-792-7277 Lagolago Fa'atekinisi: www.microchip.com/support Web tuatusi: www.microchip.com Atlanta Duluth, GA Telefoni: 678-957-9614 Fax: 678-957-1455 Austin, TX Telefoni: 512-257-3370 Boston Westborough, MA Telefoni: 774-760-0087 Fax: 774-760-0088 Chicago Itasca, IL Telefoni: 630-285-0071 Fax: 630-285-0075 Dallas Addison, TX Telefoni: 972-818-7423 Fax: 972-818-2924 Detroit Novi, MI Telefoni: 248-848-4000 Houston, TX Telefoni: 281-894-5983 Indianapolis Noblesville, IN Tel: 317-773-8323 Fax: 317-773-5453 Telefoni: 317-536-2380 Los Angeles Mission Viejo, CA Telefoni: 949-462-9523 Fax: 949-462-9608 Telefoni: 951-273-7800 Raleigh, NC Telefoni: 919-844-7510 Fou Ioka, NY Telefoni: 631-435-6000 San Iose, CA Telefoni: 408-735-9110 Telefoni: 408-436-4270 Kanata – Toronto Telefoni: 905-695-1980 Fax: 905-695-2078	Ausetalia – Sini Telefoni: 61-2-9868-6733 Saina - Beijing Telefoni: 86-10-8569-7000 Saina – Chengdu Telefoni: 86-28-8665-5511 Saina – Chongqing Telefoni: 86-23-8980-9588 Saina – Dongguan Telefoni: 86-769-8702-9880 Saina – Guangzhou Telefoni: 86-20-8755-8029 Saina – Hangzhou Telefoni: 86-571-8792-8115 Saina – Hong Kong SAR Telefoni: 852-2943-5100 Saina – Nanjing Telefoni: 86-25-8473-2460 Saina – Qingdao Telefoni: 86-532-8502-7355 Saina – Shanghai Telefoni: 86-21-3326-8000 Saina – Shenyang Telefoni: 86-24-2334-2829 Saina – Shenzhen Telefoni: 86-755-8864-2200 Saina – Suzhou Telefoni: 86-186-6233-1526 Saina - Wuhan Telefoni: 86-27-5980-5300 Saina – Xian Telefoni: 86-29-8833-7252 Saina – Xiamen Telefoni: 86-592-2388138 Saina – Zhuhai Telefoni: 86-756-3210040	Initia – Bangalore Telefoni: 91-80-3090-4444 Initia – New Delhi Telefoni: 91-11-4160-8631 Initia – Pune Telefoni: 91-20-4121-0141 Iapani – Osaka Telefoni: 81-6-6152-7160 Iapani – Tokyo Telefoni: 81-3-6880-3770 Korea – Daegu Telefoni: 82-53-744-4301 Korea – Seoul Telefoni: 82-2-554-7200 Meleisia – Kuala Lumpur Telefoni: 60-3-7651-7906 Meleisia – Penang Telefoni: 60-4-227-8870 Filipino – Manila Telefoni: 63-2-634-9065 Singapore Telefoni: 65-6334-8870 Taiuani – Hsin Chu Telefoni: 886-3-577-8366 Taiuani – Kaohsiung Telefoni: 886-7-213-7830 Taiuani – Taipei Telefoni: 886-2-2508-8600 Thailand – Bangkok Telefoni: 66-2-694-1351 Vietnam – Ho Chi Minh Telefoni: 84-28-5448-2100	Austria – Uelese Telefoni: 43-7242-2244-39 Fax: 43-7242-2244-393 Denmark – Copenhagen Telefoni: 45-4485-5910 Fax: 45-4485-2829 Finland – Espoo Telefoni: 358-9-4520-820 Falani - Pale Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79 Siamani – Garching Telefoni: 49-8931-9700 Siamani – Haan Telefoni: 49-2129-3766400 Siamani – Heilbronn Telefoni: 49-7131-72400 Siamani – Karlsruhe Telefoni: 49-721-625370 Siamani – Munich Tel: 49-89-627-144-0 Fax: 49-89-627-144-44 Siamani – Rosenheim Telefoni: 49-8031-354-560 Isalaeru – Ra'anana Telefoni: 972-9-744-7705 Italia – Milan Telefoni: 39-0331-742611 Fax: 39-0331-466781 Italia – Padova Telefoni: 39-049-7625286 Netherlands – Drunen Telefoni: 31-416-690399 Fax: 31-416-690340 Norway – Trondheim Telefoni: 47-72884388 Polani – Warsaw Telefoni: 48-22-3325737 Romania – Bucharest Tel: 40-21-407-87-50 Sepania - Madrid Tel: 34-91-708-08-90 Fax: 34-91-708-08-91 Suetena – Gothenburg Tel: 46-31-704-60-40 Suetena - Stockholm Telefoni: 46-8-5090-4654 Peretania - Wokingham Telefoni: 44-118-921-5800 Fax: 44-118-921-5820

Pepa / Punaoa

MICROCHIP v2.3 Gen 2 Pule Fa'atonu [pdf] Taiala mo Tagata Fa'aoga v2.3, v2.2, v2.3 Gen 2 Pule Fa'atonu, v2.3, Gen 2 Pule Fa'atonu, Pule Fa'atonu, Pule

Fa'asinomaga

• Tusi Taiala