ʻO MICROCHIP v2.3 Gen 2 Mea hoʻoponopono
Hoʻolauna
Hoʻohana ʻia kēia IP hoʻomaʻamaʻa maʻamau CoreRxIODBitAlign ma ka pahu hoʻokele IO ma ke ala Rx no ka Bit Alignment kūʻokoʻa i ka ʻikepili a i ʻole ka protocol i hoʻohana ʻia. ʻO ka CoreRxIODBitAlign hiki iā ʻoe ke hoʻoponopono i ka lohi o ke ala ʻikepili e pili ana i ke ala uaki.
CoreRxIODBitAlign Summary
| Core Manao | Pili kēia palapala iā CoreRxIODBitAlign v2.3 |
| Mea kākoʻo ʻia | Kākoʻo ʻo CoreRxIODBitAlign i kēia mau ʻohana: |
| Nā ʻohana | • PolarFire® SoC |
| • PolarFire | |
| Nānā: No ka 'ike hou aku, e kipa i ka ʻaoʻao huahana | |
| Kākoʻo ʻia ka holo ʻana o ka hāmeʻa | Pono ʻo Libero® SoC v12.0 a i ʻole nā hoʻokuʻu hope |
| Kākoʻo Interfaces | — |
| Laikini | ʻAʻole koi ʻo CoreRxIODBitAlign i kahi laikini |
| Nā kuhikuhi hoʻokomo | Pono e hoʻokomo ʻia ʻo CoreRxIODBitAlign i ka IP Catalog of Libero SoC software, ma o ka IP Catalog update function ma Libero SoC software, a i ʻole e hoʻoiho lima ʻia mai ka catalog. Ke hoʻokomoʻia ka IP core i ka Libero SoC software IP Catalog, ua hoʻonohonohoʻia, hanaʻia, a hoʻokomo kokeʻia i loko o SmartDesign no ka hoʻokomoʻana i ka papahana Libero. |
| Ka hoʻohana ʻana i nā hāmeʻa a me
hana |
He hōʻuluʻulu manaʻo o ka hoʻohana ʻana a me ka ʻike hana no CoreRxIODBitAlign i helu ʻia ma 8. Mea hoʻohana a me ka Pe.rʻano ʻano |
CoreRxIODBitAlign Change Log Information
Hāʻawi kēia ʻāpana i kahi ʻike pihaview o nā hiʻohiʻona hou i hoʻohui ʻia, e hoʻomaka ana me ka hoʻokuʻu hou loa. No ka ʻike hou aku e pili ana i nā pilikia i hoʻoholo ʻia, e ʻike i ka ʻāpana 7. Resolved Issues.
| CoreRxIODBitAlign v2.3 | He aha Hou • Hoʻohou hou ʻia no ka mīkini hoʻomaʻamaʻa kumu MIPI |
| CoreRxIODBitAlign v2.2 | He aha ka mea hou • Hoʻohui ʻia ka hema a me ka ʻākau EYE Tap e hoʻopaneʻe i ka ʻike ma ka module luna |
Nā hiʻohiʻona
Loaʻa iā CoreRxIODBitAlign nā hiʻohiʻona aʻe:
- Kākoʻo ʻo Bit Alignment me nā ʻokoʻa o nā maka ākea 1-7
- Kākoʻo i nā ʻano ʻano ʻokoʻa ʻē aʻe o ka lole 2/4/3p5/5
- Kākoʻo ʻo Skip a hoʻomaka hou / paʻa i ka mīkini
- Kākoʻo ʻo Mobile Industry Processor Interface (MIPI) i ka hoʻomaʻamaʻa ʻana ma o LP hōʻailona hoʻomaka o ka Frame
- Kākoʻo iā 256 Tap Hoʻopaneʻe no ka Bit Alignment
Ka wehewehe hana
CoreRxIODBitAlign me Rx IOD Interface
Hōʻike ke kiʻi ma lalo nei i kahi kiʻina poloka kiʻekiʻe o ka CoreRxIODBitAlign.
- ʻO ka wehewehe e pili ana i ka CoreRxIODBitAlign e kākoʻo ana i nā polokalamu PolarFire® a me PolarFire SoC.
- Hana ʻo CoreRxIODBitAlign i ka hoʻomaʻamaʻa ʻana a ʻo ia hoʻi ke kuleana no ka hoʻopili ʻana i nā polokalamu IO Digital (IOD) a me IO Gearing (IOG) e kākoʻo ma ke ʻano he kumu ikaika me ka hoʻoponopono ʻana i nā lohi e hopu pololei i ka ʻikepili.
- Ua wehewehe ʻia ka holo ʻana o ka mīkini hoʻomaʻamaʻa piha ma ka ʻāpana 5. Timing Diagrams.
- Kākoʻo ikaika ʻo CoreRxIODBitAlign i ka hoʻohui ʻana a i ʻole ka wehe ʻana i ka lohi mai ke ala ʻikepili pili i ke ala uaki. Ma ʻaneʻi, hāʻawi ʻo RX_DDRX_DYN Interface i nā mana i ka CoreRxIODBitAlign e hana i ka hoʻomaʻamaʻa margin clock-to-data ma ka hoʻohui ʻana i nā lohi paʻi ma kahi ala i luna. ʻO CoreRxIODBitAlign, ma ka huli ʻana no ka review (ʻo kēlā me kēia piʻi hoʻopaneʻe hoʻonui), mālama i nā hae kūlana manaʻo mai RX_DDRX_DYN Interface.
- Ke hoʻomau nei ka CoreRxIODBitAlign i ka hoʻomaʻamaʻa ʻana no kēlā me kēia piʻi ʻana a hiki i ka RX_DDRX_DYN Interface i ke kūlana ma waho.
- ʻO ka hope loa, hoʻopau ka CoreRxIODBitAlign i nā hae kūlana pane piha. Hoʻoponopono kēia ʻanuʻu a helu i ka alignment bit o ka ʻikepili i 90 degere ke kikowaena mai nā ʻaoʻao o ka uaki.
- Hoʻokomo ʻia nā lohi hope i helu ʻia ma ka RX_DDRX_DYN Interface e hoʻopau i ka hoʻomaʻamaʻa ʻana i ka bit alignment.
- ʻO nā hiʻohiʻona i kākoʻo ʻia e kēia CoreRxIODBitAlign i helu ʻia ma nā kikoʻī penei.
Mechanism hoʻomaʻamaʻa hou
- Ke nānā mau nei ʻo CoreRxIODBitAlign i nā hae Kūlana Manaʻo (IOD_EARLY/IOD_LATE) a nānā inā e huli ana nā hae.
- Hoʻoponopono mua ka IP i nā paʻi i helu mua ʻia e +/- 4 paʻi i luna a i lalo paha. ʻOiai, inā hoʻololi nā hae, hoʻomaka hou ka IP i ke aʻo ʻana.
Mechanism Paʻa (E ninau mai)
- Hoʻohana ʻia kēia hiʻohiʻona i ka wā e pono ai ke aʻo ʻana ma ka mokuʻāina Paʻa. ʻO ka BIT_ALGN_HOLD ka mea hoʻokomo i ka pae kiʻekiʻe kiʻekiʻe a pono e hoʻopaʻa a hoʻopau ʻia e hoʻomau i ke aʻo ʻana.
- Pono e hoʻonoho ʻia ka ʻāpana HOLD_TRNG i 1 i ka configurator e hiki ai i kēia hiʻohiʻona. Hoʻonohonoho ʻia kēia ʻāpana i ka 0 ma ka paʻamau.
Hoʻomaka hou i ka mīkini (E ninau mai)
- Hoʻohana ʻia kēia hiʻohiʻona e hoʻomaka hou i ke aʻo ʻana. No ka hoʻomaka hou ʻana i ke aʻo ʻana, pono e hoʻokomo ʻia ka BIT_ALGN_RSTRT hoʻokomo no hoʻokahi hola pulse Serial Clock (SCLK).
- Hoʻomaka kēia i ka hoʻoponopono hou ʻana o ka IP, e hoʻihoʻi ana i ka BIT_ALGN_DONE i ka 0 a me ka BIT_ALGN_START i ka 1.
Holoi Mechanism (E ninau mai)
- Hoʻohana ʻia kēia hiʻohiʻona inā ʻaʻole koi ʻia ke aʻo ʻana, a hiki ke kāpae ʻia ka hoʻomaʻamaʻa piha. ʻO ka BIT_ALGN_SKIP ka mea hoʻokomo kiʻekiʻe kiʻekiʻe ma muli o ka hoʻokomo ʻana a pono e ʻōlelo ʻia e hoʻokuʻu i ka hoʻomaʻamaʻa piha.
- Pono e hoʻonoho ʻia ka ʻāpana SKIP_TRNG i ka 1 i loko o ka configurator e hiki ai i kēia hiʻohiʻona. Hoʻonohonoho ʻia kēia ʻāpana i ka 0 ma ka paʻamau.
Mechanism Hoʻomaʻamaʻa ma muli o MIPI (E ninau mai)
- Pono e hoʻonoho ʻia ka ʻāpana MIPI_TRNG i 1 i ka configurator e hiki ai i kēia hiʻohiʻona. Inā hoʻonoho ʻia, a laila hoʻohui ʻia ka port input LP_IN i ka CoreRxIODBitAlign.
- ʻIke ka IP i ka hāʻule ʻana o ke awa komo LP_IN, e hōʻike ana i ka hoʻomaka kūpono o ke kiʻi e hoʻomaka i ke aʻo ʻana.
Nā ʻāpana CoreRxIODBitAlign a me nā hōʻailona Interface
Nā ʻāpana GUI hoʻonohonoho (E ninau mai)
ʻAʻohe palena hoʻonohonoho no kēia hoʻokuʻu kumu.
Nā awa (E ninau mai)
Hōʻike ka papa ma lalo i nā hōʻailona hoʻokomo a me nā hōʻailona i hoʻohana ʻia i ka hoʻolālā ʻana o CoreRxIODBitAlign.
Papa 3-1. Nā hōʻailona hoʻokomo a me nā hōʻailona
| hōʻailona | Kuhikuhi | Laulā awa (mau ʻāpana) | wehewehe |
| Uaki a Hoʻoponopono hou | |||
| SILK | Hookomo | 1 | Uaki lole |
| PLL_LOCK | Hookomo | 1 | Laka PLL |
| HOOLAHA HOU | Hookomo | 1 | Hoʻihoʻi hou ʻole asynchronous ʻeleu |
| Kaʻa ʻikepili a me ka Mana | |||
| IOD_EARLY | Hookomo | 1 | ʻIke maka maka hae mua |
| IOD_LATE | Hookomo | 1 | ʻIke maka maka hae hae hope |
| IOD_ OOR | Hookomo | 1 | Nānā maka ʻikepili i waho o ka hae no ka laina lohi |
| BIT_ALGN_EYE_IN | Hookomo | 3 | Hoʻonohonoho ka mea hoʻohana i ka laula nānā maka ʻikepili |
| BIT_ALGN_RSRT | Hookomo | 1 | Hoʻomaka hou ka hoʻomaʻamaʻa Bit Align (Pulse-based assertion) 1— Hoʻomaka hou i ka hoʻomaʻamaʻa 0— ʻAʻohe Hoʻomaka Hoʻomaʻamaʻa. |
| BIT_ALGN_CLR_FLGS | Hoʻopuka | 1 | Hoʻomaʻemaʻe i nā hae mua a i ʻole Late |
| BIT_ALGN_LOAD | Hoʻopuka | 1 | Hoʻouka paʻamau |
| BIT_ALGN_DIR | Hoʻopuka | 1 | Hoʻopaneʻe ka laina i luna a i lalo paha 1— I luna (hoʻonui 1 tap) 0— I lalo (hoʻemi 1 tap) |
| BIT_ALGN_MOVE | Hoʻopuka | 1 | Hoʻonui i ka lohi i ka pulse neʻe |
| BIT_ALIGN_SKIP | Hookomo | 1 | Hoʻokuʻu i ka hoʻomaʻamaʻa ʻana Bit Align (ʻōlelo hoʻopaʻapaʻa ma ka pae)
1— Hoʻokuʻu i ka hoʻomaʻamaʻa ʻana a hoʻopaʻa wale ʻia ke hoʻonohonoho ʻia ka ʻāpana SKIP_TRNG i 1 0— Pono e hoʻomaʻamaʻa e like me ka mea maʻamau |
| BIT_ALIGN_HOLD | Hookomo | 1 | Paʻa hoʻomaʻamaʻa Bit Align (ʻōlelo hoʻopaʻapaʻa ma ka pae)
1— E hoʻopaʻa i ka hoʻomaʻamaʻa ʻana a hoʻopaʻa wale ʻia ke hoʻonohonoho ʻia ka ʻāpana HOLD_TRNG i 1 0— Pono e hoʻomaʻamaʻa e like me ka mea maʻamau |
| BIT_ALIGN_ERR | Hoʻopuka | 1 | Bit Align training error (Level-based assertion) 1— Hapa 0— ʻAʻohe Hapa |
| BIT_ALGN_START | Hoʻopuka | 1 | Hoʻomaka hoʻomaʻamaʻa Bit Align (Level-based assertion) 1— Hoʻomaka 0— ʻAʻole i hoʻomaka |
| BIT_ALGN_DONE | Hoʻopuka | 1 | Hana ʻia ka hoʻomaʻamaʻa Bit Align (Level based assertion) 1— Hoʻopau 0— ʻAʻole i pau |
| hōʻailona | Kuhikuhi | Laulā awa (mau ʻāpana) | wehewehe |
| LP_IN | Hookomo | 1 | Ka hoʻomaʻamaʻa ʻana i ka pahu ma muli o MIPI
1— Pono e hōʻike haʻahaʻa ka hōʻailona Active-Low e hōʻike i ka hoʻomaka ʻana o ke kiʻi a ma ka hope wale nō o ke kiʻi. 0— Pono e hoʻomaʻamaʻa e like me ka mea maʻamau a pono e hoʻopaʻa haʻahaʻa kēia hōʻailona ma loko. |
| DEM_BIT_ALGN_TAPDLY | Hoʻopuka | 8 | Ua helu ʻia nā hoʻopaneʻe TAP a kūpono i ka manawa i hoʻonoho ʻia ai ka BIT_ALGN_DONE kiʻekiʻe e ka IP. |
| RX_BIT_ALIGN_LEFT_WIN | Hoʻopuka | 8 | Waiwai maka kiaʻi ʻikepili hema
Nānā: Pono nā koina i ka wā i ho'onoho 'ia ai ka BIT_ALGN_DONE i ka 1 a me ka ho'opuka 'ana BIT_ALGN_START i ka 0. Inā ho'onohonoho 'ia ka mea koho SKIP_TRNG a laila e ho'iho'i 'ia ka 0. |
| RX_BIT_ALIGN_RGHT_WIN | Hoʻopuka | 8 | ʻIkepili ʻĀkau maka waiwai
Nānā: Pono nā koina i ka wā i ho'onoho 'ia ai ka BIT_ALGN_DONE i ka 1 a me ka ho'opuka 'ana BIT_ALGN_START i ka 0. Inā ho'onohonoho 'ia ka mea koho SKIP_TRNG a laila e ho'iho'i 'ia ka 0. |
Ke hoʻokō nei i ka CoreRxIODBitAlign ma Libero Design Suite
Hoʻolālā akamai (E ninau mai)
- Hoʻokomo mua ʻia ʻo CoreRxIODBitAlign i loko o ke kaiapuni hoʻolālā hoʻolālā SmartDesign IP. Hōʻike kēia kiʻi i kahi example o CoreRxIODBitAlign i hoʻomaka koke ʻia.
- Hoʻonohonoho ʻia ke kumu me ka hoʻohana ʻana i ka puka makani hoʻonohonoho i ka SmartDesign, e like me ka mea i hōʻike ʻia ma ka Figure 4-2.
- No ka ʻike hou aku e pili ana i ka hoʻohana ʻana i ka SmartDesign e hoʻomaka koke a hana i nā cores, ʻike Ke alakaʻi hoʻohana SmartDesign.
Ka hoʻonohonoho ʻana iā CoreRxIODBitAlign ma SmartDesign (E ninau mai)
- Hoʻonohonoho ʻia ke kumu me ka hoʻohana ʻana i ka GUI hoʻonohonoho i loko o SmartDesign e like me ka mea i hōʻike ʻia ma kēia kiʻi.
Kahe hoʻohālike (E ninau mai)
- Hoʻokomo ʻia ka mea hoʻohana testbench no CoreRxIODBitAlign i nā hoʻokuʻu āpau.
- No ka holo ʻana i nā simulation, e hana i kēia ʻanuʻu: koho i ka mea hoʻohana Testbench kahe i ka SmartDesign, a laila kaomi Save a Generate ma ka Generate pane.
- Ua koho ʻia ka mea hoʻohana testbench ma o ka GUI Configuration Testbench. Ke hana ʻo SmartDesign i ka papahana Libero® SoC, hoʻokomo ʻo ia i ka mea hoʻohana testbench files.
- No ka holo ʻana i ka mea hoʻohana testbench, hoʻonoho i ke kumu hoʻolālā i ka CoreRxIODBitAlign instantiation ma ka Libero SoC design hierarchy pane, a laila kaomi i ka Simulation ma ka pukaaniani Libero SoC Design Flow.
- Kāhea kēia i ModelSim® a holo maʻalahi i ka simulation.
- Hōʻike kēia kiʻi i kahi example o kahi subsystem simulation. Hoʻohana ia i ka ʻāpana IOG_IOD DDRX4 a me DDTX4 ma ke ʻano loopback me ka CoreRxIODBitAlign no ka hoʻohālikelike.
- Maʻaneʻi, hoʻounaʻia kaʻikepili PRBS e DDTX4 serially i DDRX4 a ma hope, hoʻohanaʻia ka PRBS checker e nānā i ka pono o kaʻikepili ma hope o ka pauʻana o ke aʻoʻana.
Hoʻohui ʻia ma Libero SoC (E ninau mai)
- No ka holo ʻana i ka synthesis me ka hoʻonohonoho i koho ʻia i ka GUI hoʻonohonoho, hoʻonohonoho pono i ke kumu hoʻolālā. Ma lalo o Implement Design, ma ka Design Flow tab, kaomi pololei ma ka Synthesize a kaomi i ka Run.
Kahi a me ke alanui ma Libero SoC (E ninau mai)
- Ma hope o ka hoʻonohonoho pono ʻana i ke kumu hoʻolālā a holo i ka Synthesis. Ma lalo o Implement Design in the Design Flow tab, kaomi ʻākau ma Place and Route, a kaomi iā Run.
Hui Pūnaehana (E ninau mai)
- Hōʻike kēia ʻāpana e hōʻoluʻolu i ka hoʻohui ʻana o CoreRxIODBitAlign.
- Kākoʻo ka Rx/Tx IOG i nā ʻano hoʻokomo a me nā ʻano hoʻopuka. ʻOi aku ka lohi o kēia mau ʻikepili a me ka uaki a i kekahi mau manawa ʻoi aku ka wikiwiki, e pili ana i ka hōʻike silika hope loa.
- Hōʻike ka papa ma lalo nei i ka ʻikepili a me ka nui o ka uaki.
Papa 4-1. ʻIkepili a me ka Uki
| ʻO ke ʻano IOG | Kuhikuhi | Laki Laki | Manaʻo ʻia ka nui o ka ʻikepili IO | IO Uaki Laki | Core Uaki Laki | ʻAno ʻIkepili |
| DDRX4 | Hookomo | 8:1 | 1600 Mbps | 800 MHz | 200 MHz | DDR |
Hōʻike kēia kiʻi i kahi example o CoreRXIODBitAlign subsystem hoʻohui.
- Hoʻohana ka subsystem mua i ka ʻāpana IOG_IOD DDRX4 a me DDTX4 ma ke ʻano Loopback me ka CoreRxIODBitAlign no ka hoʻohālikelike. Ma ʻaneʻi, hoʻouna ʻia ka ʻikepili PRBS i hana ʻia e IOG_IOD_DDRTX4_0, i ka IOG_IOD_DDRX4_PF_0.
- Hana ka CoreRxIODBitAlign i ke aʻo ʻana (BIT_ALIGN_START i ka 1, BIT_ALIGN_DONE i 0) me ka ʻāpana IOG_IOD_DDRX4_PF_0, a hope, i ka pau ʻana o ka hoʻomaʻamaʻa ʻana (BIT_ALIGN_START i hoʻonoho ʻia i 0, BIT_ALIGN_DONE i hoʻonoho ʻia i ka 1.
Papa hoao (E ninau mai)
- Hoʻohana ʻia kahi testbench hui e hōʻoia a hoʻāʻo iā CoreRxIODBitAlign i kapa ʻia he mea hoʻohana testbench.
Mea hoʻohana Testbench (E ninau mai)
- Hoʻokomo ʻia ka mea hoʻohana testbench me nā hoʻokuʻu o CoreRxIODBitAlign e hōʻoia i kekahi mau hiʻohiʻona o ka CoreRxIODBitAlign. Hōʻike kēia kiʻi i ka mea hoʻohana ʻo CoreRxIODBitAlign testbench.
- E like me ka mea i hōʻike ʻia ma ka helu ma mua, aia ka mea hoʻohana i kahi Microchip DirectCore CoreRxIODBitAlign DUT, PRBS_GEN, PRBS_CHK, CCC, IOG_IOD_TX, a me IOG_IOD_RX e hōʻoia i ke ʻano Loopback.
- Hoʻokele ka Clock Conditioning Circuit (CCC) i ka CORE_CLK a me IO_CLK ke paʻa ka uaki.
- Hoʻokuʻu ʻo PRBS_GEN i ka ʻikepili like i IOG_IOD_TX, a laila loaʻa iā IOG_ID_RX ka ʻikepili serial ma ke ʻano like.
- Hana ka CoreRxIODBitAlign DUT i ke aʻo ʻana me nā hōʻailona IOD_CTRL. Ke pau ka hoʻomaʻamaʻa ʻana, hiki i ka poloka PRBS_CHK ke nānā i ka ʻikepili mai ka poloka IOG_IOD_RX no ka pono o ka ʻikepili.
mea nui: Kākoʻo ka mea hoʻohana testbench i ka hoʻonohonoho paʻa.
Nā Kiʻikuhi manawa
- Hōʻike kēia ʻāpana i ke kiʻina manawa o ka CoreRxIODBitAlign.
CoreRxIODBitAlign Hoʻolālā manawa hoʻomaʻamaʻa (E ninau mai)
- He example o kahi kaʻina hoʻomaʻamaʻa me kēia mau ʻāpana.
- Hana ʻo CoreRxIODBitAlign ma muli o ka uaki Fabric a i ʻole SCLK, a i ʻole OUT2_FABCLK_* mai CCC a i ʻole PLL, a me PF_IOD_GENERIC_RX IOD i hoʻohana ʻia i nā hana ma muli o OUT*_HS_IO_CLK_* a i ʻole uaki Bank a i ʻole BCLK no ka hoʻonohonoho ʻana. Maʻaneʻi, loaʻa i ka ʻāpana PF_IOD_GENERIC_RX IOD ka ʻikepili serial no ka alignment bit. No exampinā he 1000 Mbps ka helu ʻikepili i makemake ʻia ma DDRx4 Fabric mode, pono e hoʻokuke ʻia ka OUT2_FABCLK_0 a i ʻole SCLK mai ka PLL a i ʻole CCC e like me 125 MHz a me OUT0_HS_IO_CLK_0 a i ʻole BCLK i PF_IOD_GENERIC_RX he 500 MHz.
- Hoʻomaka ʻo CoreRxIODBitAlign i ke aʻo ʻana i ka wā e paʻa ai ka PLL_LOCK a kiʻekiʻe. A laila e hoʻomaka i ka hoʻomaʻamaʻa ʻana ma ke kaʻa ʻana i ka BIT_ALGN_START ma ke kiʻekiʻe a me ka BIT_ALGN_DONE ma ka haʻahaʻa a laila e hoʻokau i ka BIT_ALGN_LOAD i ka hoʻopuka e hoʻouka i nā hoʻonohonoho paʻamau i ka māhele PF_IOD_GENERIC_RX. Hoʻohana ʻia ka BIT_ALGN_CLR_FLGS e holoi i nā hae IOD_EARLY, IOD_LATE, a me BIT_ALGN_OOR.
- Hoʻomaka ʻo CoreRxIODBitAlign me BIT_ALGN_MOVE a ukali ʻia e BIT_ALGN_CLR_FLGS no kēlā me kēia TAP a hoʻopaʻa i nā hae IOD_EARLY a me IOD_LATE. Ke hoʻokiʻekiʻe ʻia ʻo BIT_ALGN_OOR e ka ʻāpana PF_IOD_GENERIC_RX, hoʻopau ʻo CoreRxIODBitAlign i nā hae EARLY a me LATE i hoʻopaʻa ʻia a loaʻa i nā hae Early a me Late maikaʻi loa e helu i nā lohi TAP pono no ka alignment bit data.
- Hoʻouka ʻo CoreRxIODBitAlign i nā lohi TAP i helu ʻia a hoʻokele i ka BIT_ALGN_START haʻahaʻa a me BIT_ALGN_DONE kiʻekiʻe e hōʻike i ka pau ʻana o ke aʻo ʻana.
- Ke hoʻomau nei ʻo CoreRxIODBitAlign i ka hoʻomaʻamaʻa hou ʻana inā ʻike ʻo ia i ka walaʻau IOD_EARLY a i ʻole IOD_LATE manaʻo manaʻo mai ka ʻāpana PF_IOD_GENERIC_RX. Ma ʻaneʻi, hoʻihoʻi ʻia ka BIT_ALGN_DONE a hoʻokuʻu haʻahaʻa a hoʻokele hou ʻia ʻo BIT_ALGN_START e CoreRxIODBitAlign e hōʻike i ka hoʻomaka hou ʻana o ke aʻo ʻana. ʻO ka counter time-out ke hiki i ke kūlana manawa-out, e hōʻoia i ka BIT_ALGN_ERR ma ka hopena o ke aʻo ʻana.
- Hāʻawi pū ʻo CoreRxIODBitAlign i kahi hana hoʻomaka hou no ka mea hoʻohana hope e hoʻomaka hou i ke aʻo ʻana i ka wā e pono ai. ʻO ka mea hoʻokomo BIT_ALGN_RSTRT he puʻupuʻu ikaika-kiʻekiʻe pono e hoʻokiʻekiʻe kiʻekiʻe, no ka example, ewalu wati.
- Eia ka BIT_ALGN_DONE e ho'iho'i hou 'ia a ho'oku'u 'ia ha'aha'a, a 'o BIT_ALGN_START i ho'oki'eki'e hou 'ia e CoreRxIODBitAlign, e hō'ike i ka ho'omaka hou o ke a'o 'ana.
- Hāʻawi pū ʻo CoreRxIODBitAlign i kahi mīkini paʻa e hoʻopaʻa i ke aʻo ʻana ma waena. Pono e hoʻonoho ʻia ka ʻāpana HOLD_TRNG i 1, a laila hoʻohana ʻo CoreRxIODBitAlign i ka hoʻokomo BIT_ALGN_HOLD a pono e hōʻoia i ka pae kiʻekiʻe kiʻekiʻe a hiki i ka koi ʻana iā CoreRxIODBitAlign e hoʻopaʻa i ke aʻo ʻana a laila hoʻomau i ka hoʻomaʻamaʻa ʻana i ka wā i hoʻohaʻahaʻa ʻia ai ka helu BIT_ALGN_HOLD.
Hoʻopuka hou
- Hāʻawi kēia ʻāpana i kahi papa inoa o nā ʻike hou aʻe.
- No nā mea hou a me nā ʻike hou aʻe e pili ana i ka lako polokalamu, nā mea hana, a me nā lako, e kipa i nā ʻaoʻao Intellectual Property ma ka Microchip FPGA Naʻauao Waiwai.
Nā pilikia i ʻike ʻia a me nā hoʻoponopono (E ninau mai)
- ʻAʻohe palena i ʻike ʻia a i ʻole workarounds ma ka CoreRxIODBitAlign v2.3.
ʻO nā hiʻohiʻona a me nā mea hana i hoʻopau ʻia (E ninau mai)
- ʻAʻohe mea i hoʻopau ʻia a me nā mea hana ma CoreRxIODBitAlign v2.3.
Nā pilikia i hoʻoholo ʻia
- Hōʻike ka papa ma lalo nei i nā pilikia a pau i hoʻoholo ʻia no nā hoʻokuʻu CoreRxIODbitAlign like ʻole.
Papa 7-1. Nā pilikia i hoʻoholo ʻia
| Hoʻokuʻu | wehewehe |
| 2.3 | ʻAʻohe pilikia i hoʻoholo ʻia ma kēia hoʻokuʻu v2.3 |
| 2.2 | ʻAʻohe pilikia i hoʻoholo ʻia ma kēia hoʻokuʻu v2.2 |
| 1.0 | Hoʻokuʻu mua |
Ka hoʻohana ʻana a me ka hana ʻana
Hoʻokomo ʻia ka macro CoreRxIODBitAlign i nā ʻohana i helu ʻia ma ka papa aʻe.
Papa 8-1. Ka hoʻohana ʻana a me ka hana ʻana
| Mea lako Nā kikoʻī | FPGA Nā kumuwaiwai | Hana (MHz) | |||
| ʻOhana | Mea lako | DFF | LUTs | Lokokala ʻElemu | SILK |
| PolarFire® | MPF300TS | 788 | 1004 | 1432 | 261 |
| PolarFire SoC | MPF250TS | 788 | 1004 | 1416 | 240 |
- Mea nui: Ka Loaʻa ka ʻikepili ma ka papa ma mua me ka hoʻohana ʻana iā Libero® SoC v2023.2.
- Loaʻa ka ʻikepili ma ka papa ma mua me ka hoʻohana ʻana i ka synthesis maʻamau a me nā hoʻonohonoho hoʻonohonoho.
- Ua hoʻololi ʻia nā ʻōkuhi GUI hoʻonohonoho kiʻekiʻe ma hope mai ko lākou mau waiwai paʻamau.
- Eia nā waiwai paʻamau:
- SKIP_TRNG = 1
- HOLD_TRNG = 1
- MIPI_TRNG = 1
- DEM_TAP_WAIT_CNT_WIDTH = 3
- Eia nā kaohi o ka uaki i hoʻohana ʻia no ka hoʻokō ʻana i nā helu hana:
- SCLK = 200 MHz
- Papa wikiwiki = −1
- Hoʻopili ʻia ka throughput penei: (Bit width/Number of cycles) × Uki Uki (Hana).
Moolelo Hooponopono
Hōʻike ka mōʻaukala hoʻoponopono i nā loli i hoʻokō ʻia ma ka palapala. Ua helu ʻia nā hoʻololi e ka loiloi, e hoʻomaka ana me ka paʻi hou loa.
Papa 9-1. Moolelo Hooponopono
| Hoʻoponopono | Lā | wehewehe |
| B | 02/2024 | Eia ka papa inoa o nā hoʻololi i ka loiloi B o ka palapala:
• Hoʻouka hou ʻia no CoreRxIODBitAlign v2.3 • Hoʻohui ʻia ka ʻike log Hoʻololi i ka ʻāpana Hoʻomaka • Hoʻohou 8. ʻO ka ʻāpana hoʻohana a me ka hana hana • Hoʻohui ʻia 7. ʻO ka pauku i hoʻoholo ʻia |
| A | 03/2022 | Eia ka papa inoa o nā hoʻololi i ka hoʻoponopono A o ka palapala:
• Ua neʻe ʻia ka palapala i ka laʻana Microchip • Ua hoʻololi ʻia ka helu palapala mai 50200861 a i DS50003255 |
| 3 | — | Eia ka papa inoa o nā hoʻololi i ka hoʻoponopono 3 o ka palapala:
• Hoʻouka hou ʻia no CoreRxIODBitAlign v2.2. • Hoʻohou i ke alakaʻi hoʻohana no nā hōʻailona maka ʻikepili hema ma luna. No ka ʻike hou aku, e nānā i ke Kiʻi 2-1 a me 3.2. Awa. |
| 2 | — | Eia ka papa inoa o nā hoʻololi i ka hoʻoponopono 2 o ka palapala:
• Hoʻouka hou ʻia no CoreRxIODBitAlign v2.1. • Hoʻohou ʻia: 2. ʻO ka wehewehe hana a me 5. Nā kiʻi manawa. |
| 1 | — | ʻO ka Hoʻoponopono 1.0 ka paʻi mua ʻana o kēia palapala. Hana ʻia no CoreRxIODBitAlign v2.0. |
Kākoʻo FPGA Microchip
- Hoʻihoʻi ka hui huahana Microchip FPGA i kāna mau huahana me nā lawelawe kākoʻo like ʻole, me ka Customer Service, Customer Technical Support Center, a webkahua, a me nā keʻena kūʻai honua.
- Manaʻo ʻia nā mea kūʻai aku e kipa i nā kumuwaiwai pūnaewele Microchip ma mua o ka hoʻopili ʻana i ke kākoʻo no ka mea ua pane ʻia kā lākou mau nīnau.
- E hoʻokaʻaʻike i ke Keʻena kākoʻo ʻenehana ma o ka webkahua ma www.microchip.com/support. E haʻi i ka
- FPGA Device Helu hapa, koho i ka wae hihia kūpono, a hoʻouka i ka hoʻolālā files i ka hana ʻana i kahi hihia kākoʻo ʻenehana.
- Hoʻokaʻaʻike i ka Customer Service no ke kākoʻo huahana ʻole, e like me ke kumu kūʻai huahana, hoʻonui huahana, ʻike hou, kūlana kauoha, a me ka ʻae.
- Mai ʻAmelika ʻĀkau, e kelepona iā 8002621060
- Mai ke koena o ka honua, e kelepona iā 6503184460
- Fax, mai nā wahi a pau o ka honua, 6503188044
ʻIkepili Microchip
ʻO ka Microchip Webpaena
- Hāʻawi ʻo Microchip i ke kākoʻo pūnaewele ma o kā mākou webkahua ma www.microchip.com/. ʻO kēia webhoʻohana ʻia ka pūnaewele e hana files a me ka 'ike maʻalahi i nā mea kūʻai mai. Aia kekahi o nā mea i loaʻa:
- Kākoʻo Huahana - Pepa ʻikepili a me ka hewa, nā palapala noi a me nā sampnā papahana, nā kumuwaiwai hoʻolālā, nā alakaʻi a me nā palapala kākoʻo ʻenehana, nā hoʻokuʻu polokalamu hou loa a me nā polokalamu waihona
- Kākoʻo ʻenehana nui - Nā nīnau i nīnau pinepine ʻia (FAQ), nā noi kākoʻo ʻenehana, nā hui kūkākūkā pūnaewele, ka papa inoa o nā lālā o ka papahana hoʻolālā Microchip.
- ʻoihana o Microchip - ʻO ka mea koho huahana a me nā alakaʻi kauoha, nā mea paʻi Microchip hou loa, kahi papa inoa o nā seminar a me nā hanana, nā papa inoa o nā keʻena kūʻai Microchip, nā mea hoʻolaha, a me nā ʻelele hale hana.
Hana Hoʻolaha Hoʻololi Huahana
- Kōkua ka lawelawe hoʻolaha hoʻololi huahana a Microchip e mālama i nā mea kūʻai aku i nā huahana Microchip.
- E loaʻa nā leka uila i ka poʻe kākau inoa inā loaʻa nā loli, nā mea hou, nā hoʻoponopono, a i ʻole nā hewa e pili ana i kahi ʻohana huahana a i ʻole nā mea hana hoʻomohala hoihoi.
- No ka hoʻopaʻa inoa, hele i www.microchip.com/pcn a hahai i na kuhikuhi kakau inoa.
Kākoʻo mea kūʻai aku
- Hiki i nā mea hoʻohana o nā huahana Microchip ke loaʻa ke kōkua ma o nā ala he nui:
- Mea hoolaha a Lunamakaainana paha
- Keena Kūʻai Kūloko
- ʻEnekinia Hoʻoponopono Hoʻokomo ʻia (ESE)
- Kākoʻo ʻenehana
- Pono nā mea kūʻai aku e hoʻokaʻaʻike i kā lākou mea hoʻolaha, ʻelele, a i ʻole ESE no ke kākoʻo. Loaʻa nā keʻena kūʻai kūloko e kōkua i nā mea kūʻai aku. Aia kekahi papa inoa o nā keʻena kūʻai a me nā wahi i loko o kēia palapala.
- Loaʻa ke kākoʻo ʻenehana ma o ka webkahua ma: www.microchip.com/support
Nā hiʻohiʻona pale code microchip
- Nānā nā kikoʻī aʻe o ka hiʻohiʻona pale code ma nā huahana Microchip.
- Hoʻokō nā huahana Microchip i nā kikoʻī i loko o kā lākou Microchip Data Sheet.
- Manaʻo ʻo Microchip ua paʻa kona ʻohana huahana ke hoʻohana ʻia ma ke ʻano i manaʻo ʻia, i loko o nā kikoʻī hana, a ma lalo o nā kūlana maʻamau.
- ʻO nā waiwai Microchip a pale ikaika i kāna mau pono waiwai naʻauao. Ua pāpā loa ʻia ka hoʻāʻo ʻana e uhaki i nā hiʻohiʻona pale code o nā huahana Microchip a hiki ke hōʻeha i ke Digital Millennium Copyright Act.
- ʻAʻole hiki i ka Microchip a me nā mea hana semiconductor ʻē aʻe ke hōʻoia i ka palekana o kāna code. ʻAʻole manaʻo ka pale code e hōʻoiaʻiʻo ana mākou i ka huahana "unbreakable".
- Ke ulu mau nei ka pale code. Ua kūpaʻa ʻo Microchip i ka hoʻomaikaʻi mau ʻana i nā hiʻohiʻona pale code o kā mākou huahana.
Hoolaha Kanawai
- Hiki ke hoʻohana ʻia kēia hoʻolaha a me ka ʻike ma ʻaneʻi me nā huahana Microchip, me ka hoʻolālā, hoʻāʻo, a hoʻohui i nā huahana Microchip me kāu noi. ʻO ka hoʻohana ʻana i kēia ʻike ma nā ʻano ʻē aʻe e kūʻē i kēia mau ʻōlelo. Hāʻawi ʻia ka ʻike e pili ana i nā noi hāmeʻa no kou ʻoluʻolu wale nō a hiki ke pani ʻia e nā mea hou. Nau ke kuleana e hōʻoia i kāu noi e hoʻokō i kāu mau kikoʻī. E kelepona i kāu keʻena kūʻai Microchip kūloko no ke kākoʻo hou a i ʻole, e kiʻi i ke kākoʻo hou ma www.microchip.com/en-us/support/design-help/client-support-services.
- HOʻolako ʻia kēia ʻike e MICROCHIP "AS IS". ʻAʻole hana ʻo MICROCHIP i nā hōʻike a i ʻole nā palapala hōʻoia o kēlā me kēia ʻano inā he hōʻike a i ʻole i ʻōlelo ʻia, kākau ʻia a waha, kānāwai a i ʻole nā mea ʻē aʻe, e pili ana i ka ʻike me ka ʻaʻole i kaupalena ʻia i nā palapala hōʻoia ʻole o ka waiwai ʻole, ka hoʻopaʻa ʻole ʻana. KUMUMANA, A I OLE PALAPALA E PILI ANA I KONA KULANA, KA ANOAI, A I OLE KA HANA.
- ʻAʻole e kuleana ʻo MICROCHIP no kekahi mea ʻole, kūikawā, PUNITIVE, INCIDENTAL, a i ʻole nā hopena hopena, ʻino, kumu, a i ʻole nā lilo o kēlā me kēia ʻano mea e pili ana i ka ʻike a i ʻole kona hoʻohana ʻana, akā naʻe, ua hana ʻia, ʻoiai he hewa. IKE AUANEI KA PONO A I OLE. I KA LOA LOA I A'E IA E KE KANAWAI, KA HOPE O MICROCHIP MA NA KOI A PAU I KE ANO E PILI ANA I KA IKE A I OLE I KONA HOohana AOLE E OI I KA HELU O NA Uku, Ina He La, I Uku pololei aku ai oe ia Microchip No ka Hoike.
- ʻO ka hoʻohana ʻana i nā polokalamu Microchip i ke kākoʻo ola a / a i ʻole nā noi palekana e pili ana i ka mea kūʻai aku, a ʻae ka mea kūʻai aku e pale, hoʻopaʻa, a paʻa ʻole i ka Microchip mai nā pohō, nā koi, nā hoʻopiʻi, a me nā lilo i hopena mai ia hoʻohana. ʻAʻole hāʻawi ʻia nā laikini, ma ke ʻano a i ʻole nā mea ʻē aʻe, ma lalo o nā kuleana waiwai naʻauao Microchip ke ʻole ka ʻōlelo ʻē aʻe.
Nā hōʻailona
- ʻO ka inoa a me ka hōʻailona Microchip, ka logo Microchip, Adaptec, AVR, AVR logo, AVR Freaks, BesTime, BitCloud, CryptoMemory, CryptoRF, dsPIC, flexPWR, HELDO, IGLOO, JukeBlox, KeeLoq, Kleer, LANCheck, LinkMD, maXStylus, maXTouch, MediaLB, megaAVR, Microsemi, Microsemi logo, MOST, MOST logo, MPLAB, OptoLyzer, PIC, picoPower, PICSTART, PIC32 logo, PolarFire, Prochip Designer, QTouch, SAM-BA, SenGenuity, SpyNIC, SST, SST Logo, SuperFlash, Symmetricom , SyncServer, Tachyon, TimeSource, tinyAVR, UNI/O, Vectron, a me XMEGA he mau inoa inoa inoa o Microchip Technology Incorporated ma USA a me nā ʻāina ʻē aʻe.
- AgileSwitch, ClockWorks, The Embedded Control Solutions Company, EtherSynch, Flashtec, Hyper Speed Control, HyperLight Load, Libero, kaʻa kaʻa, mTouch, Powermite 3, Precision Edge, ProASIC, ProASIC Plus, ProASIC Plus logo, Quiet-Wire, SmartFusion, SyncWorld , TimeCesium, TimeHub, TimePictra, TimeProvider, a me ZL he mau inoa inoa inoa o Microchip Technology Incorporated ma USA.
- Kāohi kī pili, AKS, Analog-no-ka-Digital Age, Kekahi Capacitor, AnyIn, AnyOut, Hoʻololi i hoʻonui ʻia, BlueSky, BodyCom, Clockstudio, CodeGuard, CryptoAuthentication, CryptoAutomotive, CryptoCompanion, CryptoController, dsPICDEM, dsPICDEM.net Matching, Dynamic Average Matching , DAM, ECAN, Espresso T1S, EtherGREEN, EyeOpen, GridTime, IdealBridge, IGaT, In-Circuit Serial Programming, ICSP, INICnet, Intelligent Parallel, IntelliMOS, Inter-Chip Connectivity, JitterBlocker, Knob-on-Display, MarginLink, maxC maxView, membrane, Mindi, MiWi, MPASM, MPF, MPLAB Lei hōʻoia ʻia, MPLIB, MPLINK, mSiC, MultiTRAK, NetDetach, Omniscient Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, Power MOS IV, Power MOS 7, PowerSmart, PureSilicon , QMatrix, REAL ICE, Ripple Blocker, RTAX, RTG4, SAM-ICE, Hui Pūʻali Quad I/O,
- palapala maʻalahi, SimpliPHY, SmartBuffer, SmartHLS, SMART-IS, storClad, SQI, SuperSwitcher, SuperSwitcher II, Switchtec, SynchroPHY, Endurance Total, Manawa hilinaʻi, TSHARC, Turing, USBCheck, VariSense, VectorBlox, VeriPHY, ViewSpan, WiperLock,
- ʻO XpressConnect a me ZENA nā hōʻailona o Microchip Technology Incorporated ma USA a me nā ʻāina ʻē aʻe.
- ʻO SQTP kahi hōʻailona lawelawe o Microchip Technology Incorporated ma USA
- ʻO ka logo Adaptec, Frequency on Demand, Silicon Storage Technology, a me Symmcom he mau inoa inoa inoa o Microchip Technology Inc. ma nā ʻāina ʻē aʻe.
- He hōʻailona inoa inoa ʻo GestIC o Microchip Technology Germany II GmbH & Co. KG, he lālā o Microchip Technology Inc., ma nā ʻāina ʻē aʻe.
- ʻO nā hōʻailona ʻē aʻe a pau i ʻōlelo ʻia ma ʻaneʻi, ʻo ia ka waiwai o kā lākou hui.
- © 2024, Microchip Technology Incorporated a me kāna mau lālā. Mālama ʻia nā kuleana a pau.
- ISBN: 9781668339879
Pūnaehana hoʻokele maikaʻi
- No ka 'ike e pili ana i ka Microchip's Quality Management Systems, e 'olu'olu e kipa www.microchip.com/quality.
Nā Kūʻai a me nā lawelawe o ka honua holoʻokoʻa
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Kelepona: 91-80-3090-4444 ʻĪnia – New Delhi Kelepona: 91-11-4160-8631 ʻInia – Pune Kelepona: 91-20-4121-0141 Iapana – Osaka Kelepona: 81-6-6152-7160 Iapana – Tokyo Kelepona: 81-3-6880-3770 Korea – Daegu Kelepona: 82-53-744-4301 Korea – Seoul Kelepona: 82-2-554-7200 Malaysia – Kuala Lumpur Kelepona: 60-3-7651-7906 Malaysia – Penang Kelepona: 60-4-227-8870 ʻĀina Pilipino – Manila Kelepona: 63-2-634-9065 Sinapoa Kelepona: 65-6334-8870 Taiwan – Hsin Chu Kelepona: 886-3-577-8366 Taiwan – Kaohsiung Kelepona: 886-7-213-7830 Taiwan – Taipei Kelepona: 886-2-2508-8600 Tailani – Bangkok Kelepona: 66-2-694-1351 Vietnam – Ho Chi Minh Kelepona: 84-28-5448-2100 |
ʻAukekulia – Wels
Kelepona: 43-7242-2244-39 Fax: 43-7242-2244-393 Kenemaka – Kopenhagen Kelepona: 45-4485-5910 Fax: 45-4485-2829 Pinilana – Espoo Kelepona: 358-9-4520-820 Palani - Palika Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79 Kelemānia – ʻO Garching Kelepona: 49-8931-9700 Kelemānia – Haan Kelepona: 49-2129-3766400 Kelemānia – Heilbronn Kelepona: 49-7131-72400 Kelemānia – Karlsruhe Kelepona: 49-721-625370 Kelemānia – Munich Tel: 49-89-627-144-0 Fax: 49-89-627-144-44 Kelemānia – Rosenheim Kelepona: 49-8031-354-560 Iseraela – Raʻanana Kelepona: 972-9-744-7705 Italia – Milana Kelepona: 39-0331-742611 Fax: 39-0331-466781 Italia – Padova Kelepona: 39-049-7625286 Holani – Drunen Kelepona: 31-416-690399 Fax: 31-416-690340 Nolewai – Trondheim Kelepona: 47-72884388 Pōlani – Warsaw Kelepona: 48-22-3325737 Romānia – Bucharest Tel: 40-21-407-87-50 Sepania – Madeda Tel: 34-91-708-08-90 Fax: 34-91-708-08-91 Kuekene – Gothenburg Tel: 46-31-704-60-40 Kuekene – Stockholm Kelepona: 46-8-5090-4654 UK – Wokingham Kelepona: 44-118-921-5800 Fax: 44-118-921-5820 |
Palapala / Punawai
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ʻO MICROCHIP v2.3 Gen 2 Mea hoʻoponopono [pdf] Ke alakaʻi hoʻohana v2.3, v2.2, v2.3 Gen 2 Mea Mana Mana, v2.3, Gen 2 Mea Mana Mana, Mana Mana, Mana Mana. |
