eSRAM Intel FPGA IP
Fa'amatalaga o oloa
O le oloa o le Intel FPGA IP, lea e fetaui ma le polokalama Intel Quartus Prime Design Suite. O le IP e iai fa'aliliuga eseese e fetaui ma fa'apolokalame fa'apipi'i se'ia o'o i le v19.1. Amata mai le polokalama faakomepiuta version 19.2, ua fa'alauiloa mai se polokalame fou mo le Intel FPGA IP.
O fa'aliliuga IP e fa'apea:
| Fa'aliliuga | Aso | Intel Quartus Prime Version | Fa'amatalaga | A'afiaga |
|---|---|---|---|---|
| v20.1.0 | 2022.09.26 | 22.3 | Fa'aagaoioi le Intel AgilexTM eSRAM IP feso'ota'iga vaega lagolago ile mea faigaluega Platform Designer. |
ISO 9001:2015 Resitala |
| v20.0.0 | 2021.10.04 | 21.3 | Fa'afou le ch{0-7}_ecc_dec_eccmode ma le ch{0-7}_ecc_enc_eccmode tapu'e ile ECC_DISABLED mo ports e le'i fa'aogaina. |
E manaʻomia le faʻaleleia o le IP ina ia maua ai le tuʻufaʻatasiga o pasi mamanu fa'atasi ai ma le Intel Quartus Prime Pro Edition software version 21.3. |
| v19.2.1 | 2021.06.29 | 21.2 | Fa'amauina le soliga taofi e ala i le fa'aopoopoina (* altera_attribute = -name HYPER_REGISTER_DELAY_CHAIN 100*) i le eSRAM Intel Agilex FPGA IP. |
O le suiga e faitalia. E manaʻomia se faʻaleleia o le IP pe a fai lau IP e le mafai ona ausia le maualuga o faʻamatalaga faʻatinoga ona o se taofi soliga. |
| v19.2.0 | 2020.12.14 | 19.4 | Ave'ese le ECC encoder ma le decoder - pasi uiga. |
N/A |
| v19.1.1 | 2019.07.01 | 19.2 | Fa'asalalauga muamua mo masini Intel Agilex. | N/A |
Afai e le maua se faʻamatalaga faʻasalalau mo se faʻamatalaga IP patino, o lona uiga e leai ni suiga i lena faʻamatalaga.
Fa'aaliga: Ole numera ole Intel FPGA IP (XYZ) e mafai ona suia ile Intel Quartus Prime software version.
Fa'atonuga o le Fa'aaogaina o Mea
Ina ia fa'aoga le Intel FPGA IP, mulimuli i laasaga nei:
- Ia mautinoa o lo'o iai le polokalama fa'akomepiuta Intel Quartus Prime Design Suite fa'apipi'i i lau masini.
- La'u mai le fa'aoga Intel FPGA IP e fetaui ma lau fa'apolokalame.
- Aveese le IP na sii mai files i se nofoaga talafeagai i lau komepiuta.
- Tatala le polokalama Intel Quartus Prime ma fai se poloketi fou pe tatala se poloketi o loʻo iai.
- I totonu o le faʻatulagaina o poloketi poʻo le IP catalog, suʻe ma faʻaopopo le Intel FPGA IP i lau poloketi.
- Fa'atulaga le IP fa'atatau e tusa ai ma ou mana'oga.
- Faʻafesoʻotaʻi le IP i isi vaega poʻo modules i lau mamanu e faʻaaoga ai le meafaigaluega a le Platform Designer.
- Ia mautinoa o so'o se fa'aleleia o le IP e mana'omia e fa'atino pe a fa'amaoti mai i fa'amatalaga o oloa.
- Fa'aopoopo ma fa'amaonia lau mamanu e fa'aaoga ai le polokalama Intel Quartus Prime.
- Fa'agasolo i isi laasaga e tusa ai ma ou mana'oga mamanu ma sini o galuega.
eSRAM Intel® Agilex™ FPGA IP
Fa'amatalaga Fa'amatalaga
Afai e le maua se faʻamatalaga faʻasaʻo mo se faʻamatalaga IP patino, e leai se suiga o le IP i lena faʻamatalaga. Mo fa'amatalaga i fa'amatalaga fa'afouga IP e o'o atu i le v18.1, fa'asino ile Intel® Quartus® Prime Design Suite Update Release Notes.
Intel FPGA IP versions e fetaui ma le Intel Quartus Prime Design Suite versions software seia oo i le v19.1. Amata ile Intel Quartus Prime Design Suite software version 19.2, Intel FPGA IP o loʻo i ai se polokalame faʻasologa fou.
Ole numera ole Intel FPGA IP (XYZ) e mafai ona suia ile Intel Quartus Prime software version.
- X o loʻo faʻaalia se toe iloiloga tele o le IP. Afai e te faʻafouina le polokalama Intel Quartus Prime, e tatau ona e toe faʻafouina le IP.
- Y faʻaalia le IP e aofia ai foliga fou. Toe fa'afouina lau IP e fa'aofi ai nei foliga fou.
- O le Z o loʻo faʻaalia ai le IP e aofia ai suiga laiti. Toe fa'afouina lau IP e fa'aofi ai nei suiga.
Fa'amatalaga Fa'atatau
- Intel Quartus Prime Design Suite Fa'afouina Fa'amatalaga Fa'amatalaga
- Intel Agilex™ Embedded Memory User Guide
- Errata mo le eSRAM Intel Agilex™ FPGA IP i le Fa'avae o le Poto
eSRAM Intel Agilex™ FPGA IP v20.1.0
Laulau 1. v20.1.0 2022.09.26
| Intel Quartus Prime Version | Fa'amatalaga | A'afiaga |
| 22.3 | Fa'aagaoioi le Intel Agilex ™ eSRAM IP feso'ota'iga feso'ota'iga feso'ota'iga i le meafaigaluega a le Platform Designer. | O le fa'aleleia o le IP e filifili ile Intel Quartus Prime Pro Edition software version 22.3.
|
eSRAM Intel Agilex FPGA IP v20.0.0
Laulau 2. v20.0.0 2021.10.04
| Intel Quartus Prime Version | Fa'amatalaga | A'afiaga |
| 21.3 | Fa'afou le ch{0-7}_ecc_dec_eccmode ma le ch{0-7}_ecc_enc_eccmode para'i ile ECC_DISABLED mo ports e le'i fa'aogaina. | E mana'omia le fa'aleleia o le IP ina ia maua ai le tu'ufa'atasiga o pepa fa'ata'ita'iga fa'atasi ma le Intel Quartus Prime Pro Edition software version 21.3. |
Laulau 3. v19.2.1 2021.06.29
| Intel Quartus Prime Version | Fa'amatalaga | A'afiaga |
| 21.2 | Fa'amauina le soliga taofi e ala i le fa'aopoopoina (* altera_attribute = “-igoa HYPER_REGISTER_DELAY_CHAIN 100″*) i le eSRAM Intel Agilex FPGA IP. | O le suiga e faitalia. E mana'omia oe e fai se fa'aleleia o le IP pe afai e le mafai e lau IP ona ausia le maualuga o fa'amatalaga fa'atinoga ona o se soliga taofi. |
eSRAM Intel Agilex FPGA IP v19.2.0
Laulau 4. v19.2.0 2020.12.14
| Intel Quartus Prime Version | Fa'amatalaga | A'afiaga |
| 19.4 | Ave'ese le fa'aogaina o le ECC encoder ma le decoder bypass feature. | — |
eSRAM Intel Agilex FPGA IP v19.1.1
Laulau 5. v19.1.1 2019.07.01
| Intel Quartus Prime Version | Fa'amatalaga | A'afiaga |
| 19.2 | Fa'asalalauga muamua mo masini Intel Agilex. | — |
eSRAM Intel FPGA IP Release Notes (Intel Stratix® 10 Devices)
Afai e le maua se faʻamatalaga faʻasaʻo mo se faʻamatalaga IP patino, e leai se suiga o le IP i lena faʻamatalaga. Mo fa'amatalaga i fa'amatalaga fa'afouga IP e o'o atu i le v18.1, fa'asino ile Intel Quartus Prime Design Suite Update Release Notes.
Intel FPGA IP versions e fetaui ma le Intel Quartus Prime Design Suite versions software seia oo i le v19.1. Amata ile Intel Quartus Prime Design Suite software version 19.2, Intel FPGA IP o loʻo i ai se polokalame faʻasologa fou.
Ole numera ole Intel FPGA IP (XYZ) e mafai ona suia ile Intel Quartus Prime software version. Se suiga i:
- X o loʻo faʻaalia se toe iloiloga tele o le IP. Afai e te faʻafouina le polokalama Intel Quartus Prime, e tatau ona e toe faʻafouina le IP.
- Y faʻaalia le IP e aofia ai foliga fou. Toe fa'afouina lau IP e fa'aofi ai nei foliga fou.
- O le Z o loʻo faʻaalia ai le IP e aofia ai suiga laiti. Toe fa'afouina lau IP e fa'aofi ai nei suiga.
Fa'amatalaga Fa'atatau
- Intel Quartus Prime Design Suite Fa'afouina Fa'amatalaga Fa'amatalaga
- Intel Stratix® 10 Embedded Memory User Guide
- Errata mo le eSRAM Intel FPGA IP i le Faʻamatalaga Faʻamatalaga
eSRAM Intel FPGA IP v19.2.0
Laulau 6. v19.2.0 2022.09.26
| Intel Quartus Prime Version | Fa'amatalaga | A'afiaga |
| 22.3 | Fa'aagaoioi le Intel Stratix® 10 eSRAM IP le feso'ota'iga feso'ota'iga feso'ota'iga i le meafaigaluega a le Platform Designer. | O le fa'aleleia o le IP e filifili ile Intel Quartus Prime Pro Edition software version 22.3.
|
eSRAM Intel FPGA IP v19.1.5
Laulau 7. v19.1.5 2020.10.12
| Intel Quartus Prime Version | Fa'amatalaga | A'afiaga |
| 20.3 | Fa'afouina le fa'amatalaga mo Fa'aagaaga Faiga Malosi maualalo i le eSRAM Intel FPGA IP editor parameter. | — |
eSRAM Intel FPGA IP v19.1.4
Laulau 8. v19.1.4 2020.08.03
| Intel Quartus Prime Version | Fa'amatalaga | A'afiaga |
| 20.2 | Toe fa'aigoaina le I/O PLL fileigoa e aveese le savali lapatai mai le IOPLL file.
Afai o eSRAM e lua e tutusa le PLL (PLL reference clock frequency ma le PLL mana'omia le taimi o le uati), e mafai ona le amanaiaina le savali lapatai. Afai o eSRAM e lua e eseese PLL parakalafa, pe a uma ona tuʻufaʻatasia o le a seti i latou tutusa PLL alalaupapa mai se tasi o eSRAM Intel FPGA IP tapulaʻa. Fa'asino i le Lipoti a Quartus Fitter ➤ Fuafuaga Stage ➤ PLL Fa'aoga Aotelega e mata'ituina le fa'atinoina ole eSRAM IOPLL. E manaʻomia le faʻafouina o le IP pe a ese le PLL parameter mo eSRAM e lua. |
— |
eSRAM Intel FPGA IP v19.1.3
Laulau 9. v19.1.3 2019.10.11
| Intel Quartus Prime Version | Fa'amatalaga | A'afiaga |
| 19.3 | Fa'afouina le fa'amatalaga mo PLL Reference Clock Frequency i le eSRAM Intel FPGA IP editor parameter. | — |
eSRAM Intel FPGA IP v18.1
Laulau 10. v18.1 2018.10.03
| Intel Quartus Prime Version | Fa'amatalaga | A'afiaga |
| 18.1 | Aveese le resitala HIPI mo iopll_lock2core_reg. | E mafai ona e fa'aleleia lau IP core. |
eSRAM Intel FPGA IP v18.0
Laulau 11. v18.0 Me 2018
| Fa'amatalaga | A'afiaga |
| Toe fa'aigoa Native eSRAM IP core ile eSRAM Intel FPGA IP e pei ole Intel rebranding. | — |
Fa'aopoopoina se fa'ailoga fou o feso'ota'iga:
tulaga loka eSRAM IOPLL. |
— |
Fa'amatalaga Fa'atatau
- Folasaga i Intel FPGA IP Cores
- Intel Stratix 10 Embedded Memory User Guide
- Errata mo isi IP cores i le Knowledge Base
Native eSRAM IP Core v17.1
Laulau 12. v17.1 Novema 2017
| Fa'amatalaga | A'afiaga |
| Fa'asalalauga muamua. O lenei IP autu e maua na'o Intel Stratix 10 masini. | — |
Fa'amatalaga Fa'atatau
- Folasaga i Intel FPGA IP Cores
- Intel Stratix 10 Embedded Memory User Guide
- Errata mo isi IP cores i le Knowledge Base
Intel Stratix 10 Embedded Memory User Guide Archives
Mo fa'amatalaga lata mai ma muamua o lenei ta'iala fa'aoga, fa'asino ile Intel® Stratix® 10 Embedded Memory User Guide. Afai e le o lisiina se IP po'o se polokalama faakomepiuta, e fa'aoga le ta'iala mo le IP muamua po'o le polokalama faakomepiuta.
eSRAM Intel® FPGA IP Fa'amatalaga Fa'amatalaga
Pepa / Punaoa
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intel eSRAM Intel FPGA IP [pdf] Taiala mo Tagata Fa'aoga eSRAM Intel FPGA IP, Intel FPGA IP, FPGA IP, IP |
