ALPHA DATA ADM-PCIE-9H3 High Performance FPGA Processing Card
Folasaga
O le ADM-PCIE-9H3 o se kata fa'akomepiuta e mafai ona fa'atulagaina maualuga e fa'amoemoe mo talosaga a le Nofoaga Autu o Fa'amaumauga, e fa'aalia ai le Xilinx Virtex UltraScale + Plus FPGA ma le High Bandwidth Memory (HBM).
Vaega Autu
- PCIe Gen1/2/3 x1/2/4/8/16 capable
- Fa'atonuga ole pulega fa'amama fa'agaioiga
- 1/2 umi, maualalo profile, x16 pito PCIe foliga fa'ailoga
- 8GB HBM on-die manatua e mafai ona 460GB/s
- Tasi le fale QSFP-DD e mafai ona fa'amauina fa'amaumauga e o'o atu i le 28 Gbps i le 8 laina (224 Gbps)
- E tasi le 8 laina Ultraport SlimSAS feso'ota'iga fa'atasi ma OpenCAPI ma talafeagai mo le fa'alauteleina IO
- Lagolago VU33P po'o VU35P Virtex UltraScale+ FPGAs
- Panel pito i luma ma pito i tua JTAG avanoa e ala i le uafu USB
- FPGA mafai ona fetuutuunai i luga ole USB/JTAG ma le SPI fetuutuunaiga moli
- Voltagu, mataituina o le taimi nei, ma le vevela
- 8 fa'ailoga GPIO ma le 1 tu'ufa'atasi taimi fa'aoga
Tulafono Fa'atonu
ADM-PCIE-9H3
ADM-PCIE-9H3/NF (e aunoa ma se ili e filifili ai)
Vaai http://www.alpha-data.com/pdfs/adm-pcie-9h3.pdf mo filifiliga atoatoa oka.
Faamatalaga a le Komiti
Fa'amatalaga Fa'aletino
O le ADM-PCIE-9H3 e ogatasi ma le PCI Express CEM revision 3.0.
Laulau 1: Fua Fa'ainisinia (Inc. Front Panel)
| Fa'amatalaga | Fua |
| Aofa'iga Dy | 80.1 mm |
| Aofa'iga Dx | 181.5 mm |
| Aofa'iga Dz | 19.7 mm |
| mamafa | 350 kalama |
Manaoga Chassis
PCI Express
O le ADM-PCIE-9H3 e mafai ona PCIe Gen 1/2/3 faʻatasi ma 1/2/4/8/16 laina, faʻaaoga le Xilinx Integrated Block mo PCI Express.
Manaoga Fa'ainisinia
E mana'omia le 16-lane physical slot PCIe mo le fa'aogaina o masini.
Malosiaga Manaomia
O le ADM-PCIE-9H3 e toso uma le mana mai le PCIe Edge. E tusa ai ma faʻamatalaga PCIe, e faʻatapulaʻaina le faʻaaogaina o le eletise i le maualuga 75W.
E mana'omia le fa'aogaina o le Xilinx XPE fa'atatau i le fa'aaogāina o le eletise ma se meafaigaluega e fa'atatau i le eletise e maua mai le Alpha Data. Fa'amolemole fa'afeso'ota'i support@alpha-data.com e maua ai lenei meafaigaluega.
O le malosiaga o loʻo avanoa i nofoaafi e faʻatatau ile XPE e faʻapea:
Laulau 2: Maua Malosiaga E ala i nofoaafi
| Voltage | Igoa Puna | Agava'a i le taimi nei |
| 0.72-0.90 | VCC_INT + VCCINT_IO + VCC_BRAM | 42A |
| 0.9 | MGTAVCC | 5A |
| 1.2 | MGTAVTT | 9A |
| 1.2 | VCC_HBM * VCC_IO_HBM | 14A |
| 1.8 | VCCAUX + VCCAUX_IO + VCCO_1.8V | 1.5A |
| 1.8 | MGTVCCAUX | 0.5A |
| 2.5 | VCCAUX_HBM | 2.2A |
| 3.3 | 3.3V mo Optis | 3.6A |
Fa'atinoga Fa'avevela
Afai e sili atu le vevela o le FPGA i le 105 tikeri Celsius, o le a kilia le mamanu FPGA e puipuia ai le kata mai le vevela.
O le ADM-PCIE-9H3 e sau ma se vevela vevela e faʻaitiitia ai le vevela o le FPGA, lea e masani lava o le pito sili ona vevela i luga o le kata. E tatau ona tumau le vevela o le FPGA i lalo ole 100 tikeri Celsius. Ina ia fa'atatau le vevela o le FPGA, ave lau mana fa'aoga, fa'atele i le Theta JA mai le laulau o lo'o i lalo, ma fa'aopoopo i lau masini le vevela i totonu. O le kalafi o loʻo i lalo o loʻo faʻaalia ai laina e lua, o le tasi na faʻataʻitaʻiina i totonu o se ala faʻapipiʻi faʻapipiʻi, ma le isi na faʻataʻitaʻiina e aunoa ma le ufiufi. E masani ona sili atu le faatinoga e aunoa ma ni ie, ae latou te maua le faʻaleleia atili o le taulimaina ma faʻaitiitia le toe faʻaleleia o le ea i totonu o sapalai faʻapitoa. E mafai ona aveese le ufiufi e faʻaaoga ai se avetaavale hex 1/16″. Afai o lo'o e fa'aogaina le ili o lo'o tu'uina atu ma le laupapa, o le ae mauaina le JA e tusa ma le 1.43 degC/W mo le laupapa i luga o le ea ma pe leai fo'i le fa'apipi'i.
E mafai ona fa'atatauina le fa'amama o le paoa e ala i le fa'aogaina o le Alpha Data power estimator fa'atasi ma le Xilinx Power Estimator (XPE) e mafai ona sii mai ile http://www.xilinx.com/products/technology/power/xpe.html. La'u mai
le meafaigaluega UltraScale ma seti le masini i le Virtex UltraScale +, VU33P, FSVH2104, -2, -2L, poʻo le -3, faʻalautele. Seti le vevela ole ambient ile lou system ambient ma filifili le 'user override' mo le aoga theta JA ma fa'aofi le ata e feso'ota'i ma lau system LFM i le avanoa avanoa. Fa'agasolo e tu'u uma elemene mamanu talafeagai ma le fa'aogaina i luga o fa'asologa o laupepa o lo'o mulimuli mai. Soso'o maua le 9H3 mana fa'atatau mai le Alpha Data e ala ile fa'afeso'ota'i
support@alpha-data.com. Ona e fa'apipi'i lea i fa'amaumauga o le malosiaga FPGA fa'atasi ai ma fa'asologa o le Optical module e maua ai se fua fa'atatau o le laupapa.
Active VS Passive Thermal Management
O le ADM-PCIE-9H3 vaʻa faʻatasi ma se tamaʻi faʻapipiʻi filifiliga mo le malulu malosi i faiga e le lelei le tafe o le ea. Afai o le ADM-PCIE-9H3 o le a faʻapipiʻiina i totonu o se 'auʻaunaga faʻatasi ai ma le faʻaogaina o le ea, e mafai ona faʻaogaina le filifiliga /NF e maua ai kata e aunoa ma lenei vaega faaopoopo. E sili atu le pu'upu'u o le taimi a le au fa'afiafia i le va o le fa'aletonu (MTBF) nai lo le isi vaega o le fa'apotopotoga, o le mea lea e sili atu le umi o le ola o kata pasi a'o le'i mana'omia le tausiga. O le ADM-PCIE-9H3 o loʻo aofia ai foʻi le faʻatonutonuina o le saoasaoa o le ili, faʻatagaina le saoasaoa o le ili e faʻavae i luga o le vevela vevela, ma
su'esu'eina o se ili ua le manuia (silasila i le vaega o Fan Controllers).
Fa'asinomaga
Ole Alpha Data e maua ai le tele o filifiliga fa'apitoa i oloa fa'atau oloa o lo'o iai i fafo (COTS).
O nisi o filifiliga e aofia ai, ae e le gata i: fa'aopoopo fa'alava feso'ota'iga i avanoa fa'atasi po'o le pro atoatoafile, fa'aleleia atili fa'a'avevela, pa'u, ma fa'aopoopoga fa'avili.
Fa'amolemole fa'afeso'ota'i sales@alpha-data.com ia maua se upusii ma amata lau poloketi i le aso.
Fa'amatalaga Fa'atino
Ua umaview
O le ADM-PCIE-9H3 o se faʻaogaina faʻapipiʻi faʻapipiʻi faʻapipiʻi faʻatasi ma se Virtex UltraScale + VU33P / VU35P FPGA, o se Gen3x16 PCIe interface, 8GB o le HBM manatua, tasi QSFP-DD cage, o se OpenCAPI compatible Ultraport SlimSAS fesoʻotaʻiga e mafai foi ona 28G/channel. se fa'aoga tu'ufua mo se pulupulu fa'amaopoopo taimi, se ulutala pine 12 mo le fa'aoga lautele (fa'ailoga, pine fa'atonutonu, debug, ma isi.), fa'amataina pito i luma, ma se mata'itū faiga malosi.
Suiga
O le ADM-PCIE-9H3 o loʻo i ai se suiga DIP octal SW1, o loʻo i le pito i tua o le laupapa. Ole galuega ole ki ta'itasi ile SW1 o lo'o fa'amatalaina i lalo:
Fuafuaga 3 : Suiga Galuega
| Suiga | Falegaosimea Default | Galuega | OFF Setete | I LE Setete |
| SW1-1 | TOTO | Sui Fa'aoga 0 | Pin AW33 = '1' | Pin BF52 = '0' |
| SW1-2 | TOTO | Sui Fa'aoga 1 | Pin AY36 = '1' | Pin BF47 = '0' |
| SW1-3 | TOTO | Fa'apolopolo | Fa'apolopolo | Fa'apolopolo |
| SW1-4 | TOTO | Pepe Malosi | O le a pule le Komiti | Vave loa le eletise |
| SW1-5 | TOTO | Auala Auaunaga | Faagaioiga masani | Faiga o auaunaga fa'afouina firmware |
| SW1-6 | ON | HOST_I2 C_EN | Sysmon i luga ole PCIe I2C | Sysmon vavae ese |
| SW1-7 | ON | CAPI_VP D_EN | OpenCAPI VPD avanoa | OpenCAPI VPD tuufua |
| SW1-8 | ON | CAPI_VP D_WP | CAPI VPD e puipuia tusitusiga | CAPI VPD e mafai ona tusia |
Fa'aaoga le IO Standard "LVCMOS18" pe a fa'alavelaveina le sui fa'aoga pine.
LED
O loʻo i ai 7 LED i luga o le ADM-PCIE-9H3, 4 o ia faʻamoemoega lautele ma o lona uiga e mafai ona faʻamalamalamaina e le tagata faʻaoga. O le isi 3 o loʻo i ai galuega faʻatulagaina o loʻo faʻamatalaina i lalo:
Laulau 4: Fa'amatalaga o le LED
| Comp. Ref. | Galuega | I LE Setete | OFF Setete |
| D1 | LED_G1 | Fa'amatalaga le tagata fa'aoga '0' | Fa'amatalaga le tagata fa'aoga '1' |
| D3 | LED_A1 | Fa'amatalaga le tagata fa'aoga '0' | Fa'amatalaga le tagata fa'aoga '1' |
| D4 | FAIA | FPGA ua configured | FPGA e le o fa'atulagaina |
| D5 | Tulaga 1 | Vaai Tulaga LED Fa'amatalaga | |
| D6 | Tulaga 0 | Vaai Tulaga LED Fa'amatalaga | |
| D7 | LED_A0 | Fa'amatalaga le tagata fa'aoga '0' | Fa'amatalaga le tagata fa'aoga '1' |
| D9 | LED_G0 | Fa'amatalaga le tagata fa'aoga '0' | Fa'amatalaga le tagata fa'aoga '1' |
Va'ai le Vaega Fa'ato'a Pinout Table mo le lisi atoa o upega ma pine LED e pulea e tagata fa'aoga
Uati
O le ADM-PCIE-9H3 o loʻo tuʻuina atu fofo fetuutuunai faʻamatalaga uati mo le tele o tele-gigabit transceiver quads ma FPGA ie. So'o se uati i fafo o le Si5338 Clock Synthesizer e toe fa'atulagaina mai le pito i luma o le USB USB Interface po'o le Alpha Data sysmon FPGA serial port. Ole mea lea e mafai ai e le tagata fa'aoga ona fa'atulagaina toetoe lava o so'o se fa'asologa o taimi ole uati ile taimi ole talosaga. Ole taimi maualuga ole uati ole 312.5MHz.
O loʻo iai foʻi se avanoa Si5328 jitter attenuator. E mafai ona tu'uina atu uati mama ma fa'atasi i le QSFP-DD ma OpenCAPI (SlimSAS) quad nofoaga i le tele o laina uati. O nei masini e na'o le fa'aogaina o mafaufauga fa'aletonu, o lea e mana'omia ai e le FPGA mamanu le toe fa'atulagaina o le fa'afanua resitala pe a uma so'o se fa'asologa o le eletise.
O igoa uma o le uati i le vaega o loʻo i lalo e mafai ona maua i le Complete Pinout Table.
Si5328
Afai e manaʻomia le faʻaogaina o le jitter faʻamolemole tagaʻi i faʻamaumauga mo le Si5328.
https://www.silabs.com/Support%20Documents/TechnicalDocs/Si5328.pdf
O feso'ota'iga matagaluega fa'ata Xilinx VCU110 ma VCU108, fa'amolemole va'ai Xilinx Dev Boards mo fa'amatalaga
PCIe Fa'asino Uati
O laina 16 MGT e feso'ota'i i le pito o le pepa PCIe e fa'aoga ai le MGT tiles 224 e o'o i le 227 ma fa'aoga le faiga 100 MHz uati (igoa upega PCIE_REFCLK).
I le isi itu, o loʻo maua foi se uati mama, i luga ole laupapa 100MHz (igoa upega PCIE_LCL_REFCLK).
Uati Ie
O le mamanu e ofoina atu se uati ie (igoa upega FABRIC_SRC_CLK) e fa'aletonu ile 300 MHz. O lenei uati ua faʻamoemoe e faʻaoga mo elemene IDELAY i mamanu FPGA. E feso'ota'i le uati ie i se pine Global Clock (GC).
DIFF_TERM_ADV = TERM_100 e manaʻomia mo le faʻamutaina LVDS
Uati Ausilali
O le mamanu e ofoina atu se uati fesoasoani (igoa upega AUX_CLK) lea e fa'aletonu ile 300 MHz. O lenei uati e mafai ona faʻaoga mo soʻo se faʻamoemoega ma e fesoʻotaʻi i se pine Global Clock (GC).
DIFF_TERM_ADV = TERM_100 e manaʻomia mo le faʻamutaina LVDS
Uati Polokalama (EMCCLK)
O le uati 100MHz (igoa upega EMCCLK_B) o lo'o fafaga i totonu o le pine EMCLK e fa'aoso ai le masini moli SPI a'o fa'atulaga le FPGA. Manatua e le o se uati fa'avaomalo mafai IO pine.
QSFP-DD
O le QSFP-DD cage o lo'o i totonu ole MGT tiles 126 ma le 127 ma fa'aoga le 161.1328125MHz fa'ailoga uati.
Manatua e mafai ona suia le taimi o le uati i soʻo se taimi faʻasaʻo e oʻo atu i le 312MHz e ala i le toe faʻapipiʻiina o le Si5338 reprogrammable clock oscillator e ala i le mataʻituina o masini. E mafai ona faia lenei mea i le faʻaaogaina o le Alpha Data API poʻo luga ole USB faʻatasi ai ma meafaigaluega talafeagai Alpha Data Software.
Va'ai igoa upega QSFP_CLK* mo pine nofoaga.
O loʻo iai foʻi le fale QSFP-DD e mafai ona lokaina mai le Si5328 jitter attenuator clock multiplier.
Va'ai igoa ole upega SI5328_OUT_1* mo pine nofoaga.
Ultraport SlimSAS (OpenCAPI)
Ole feso'ota'iga Ultraport SlimSAS o lo'o iai ile MGT tile 124 ma le 125.
Mo OpenCAPI o loʻo tuʻuina atu se uati 156.25MHz fafo i luga o le uaea. Va'ai igoa upega CAPI_CLK_0* mo nofoaga o pine uati.
O le isi fa'apogai o le uati mo lenei atina'e o le Si5338 clock synthesizer lea e fa'aletonu i le 161.1328125MHz. Va'ai igoa upega CAPI_CLK_1* mo pine nofoaga. Manatua e mafai ona suia le taimi o le uati i soʻo se taimi faʻasaʻo e oʻo atu i le 312MHz e ala i le toe faʻapipiʻiina o le Si5338 reprogrammable clock oscillator e ala i le mataʻituina o masini. E mafai ona faia lenei mea i le faʻaaogaina o le Alpha Data API poʻo luga ole USB faʻatasi ai ma meafaigaluega talafeagai Alpha Data Software.
Mo talosaga maaleale jitter, e mafai ona lokaina lenei atinaʻe mai le Si5328 jitter attenuator. Va'ai igoa ole upega SI5328_OUT_0* mo pine nofoaga.
PCI Express
O le ADM-PCIE-9H3 e mafai ona PCIe Gen 1/2/3 faʻatasi ma 1/2/4/8/16 laina. O le FPGA e ave sa'o nei auala e fa'aaoga ai le poloka Integrated PCI Express mai Xilinx. Fa'atalanoaga ole saoasaoa ole feso'ota'iga PCIe ma le numera o laina fa'aoga e masani lava otometi ma e le mana'omia ai le fa'aogaina ole tagata.
PCI Express reset (PERST#) feso'ota'i ile FPGA ile lua nofoaga. Va'ai Fa'ailo Fa'ato'a Pinout Table PERST0_1V8_L ma le PERST1_1V8_L.
O isi pine fa'atonuga mo laina televave o lo'o tu'uina atu i le pine fa'apipi'i i le Complete Pinout Table
O le fa'amatalaga a le PCI Express e mana'omia ai kata fa'aopoopo uma ia saunia mo le fa'avasegaina i totonu ole 120ms pe a mae'a le paoa (100ms pe a mae'a le mana + 20ms pe a uma ona tu'u le PERST). O le ADM-PCIE-9H3 e ausia lenei manaʻoga pe a faʻapipiʻiina mai se bitstream faʻatasi ma faʻalavelave SPI talafeagai o loʻo faʻamatalaina i le vaega:
Fa'atonuga Mai Flash Memory. Mo nisi fa'amatalaga ile fa'atulagaina o feso'ota'iga, va'ai Xilinx xapp 1179.
Fa'aaliga:
Eseese motherboards / backplanes o le a manuia mai polokalame tutusa RX eseese i totonu ole PCIe IP autu na saunia e Xilinx. Alpha Data e fautuaina le faʻaogaina o le faʻatulagaina o loʻo i lalo pe afai e faʻaogaina e le tagata faʻaoga faʻalavelave fesoʻotaʻi poʻo mataupu aʻoaʻoga ma a latou polokalama: i totonu o le IP generator, sui le faiga i le "Advanced" ma tatala le "GT Settings" tab, sui le "form factor driven insertion loss. fetuunaiga" mai le "Add-in Card" i le "Chip-to-Chip" (Vaai Xilinx PG239 mo nisi faamatalaga).
QSFP-DD
E tasi le fale QSFP-DD o loʻo avanoa ile pito i luma. O lenei fale e mafai ona faʻapipiʻi QSFP28 poʻo QSFP-DD uaea (faiga i tua). O fa'ata'ita'iga fa'ata'ita'i fa'atusa uma e lua e fa'aogaina ma fa'aoga pasif QSFP-DD/QSFP28 e fa'amalieina atoatoa. Ole feso'ota'iga feso'ota'iga e mafai ona alu ile 28Gbps ile alalaupapa. O loʻo i ai 8 alalaupapa i luga o le fale QSFP-DD (tele bandwidth maualuga o 224Gbps). O lenei fale e fetaui lelei mo le 8x 10G/25G, 2x 100G Ethernet, poʻo soʻo se isi faʻasalalauga e lagolagoina e le Xilinx GTY Transceivers. Fa'amolemole va'ai Xilinx User Guide UG578 mo nisi fa'amatalaga i le gafatia o le transceivers.
O le QSFP-DD cage o loʻo i ai faailoilo faʻatonutonu e fesoʻotaʻi ma le FPGA. O le feso'ota'iga o lo'o fa'amatalaina i le Complete Pinout Table i le pito o lenei pepa. O le fa'amatalaga o lo'o fa'aogaina i fa'ailoga pine o le QSFP* fa'atasi ai ma nofoaga o lo'o fa'amalamalamaina i le ata o lo'o i lalo.
Fa'aoga le QSFP_SCL_1V8 ma le QSFP_SDA_1V8 pine e pei ona fa'amatalaina i le Complete Pinout Table e feso'ota'i ai ma QSFP28 resitara avanoa.
Fa'aaliga:
O le LP_MODE (Low Power Mode) i le fale puipui o loʻo nonoa i le eleele, faʻaoga le faʻaogaina o le pulega e seti ai tulafono mana.
E mafai e Alpha Data ona faʻapipiʻi muamua le ADM-PCIE-9H3 faʻatasi ma vaega QSFP-DD ma QSFP28. O le laulau o loʻo i lalo o loʻo faʻaalia ai le numera o vaega mo transceivers faʻapipiʻiina pe a faʻatonuina ma lenei laupapa.
Laulau 5 : QSFP28 Vaega Numera
| Tulafono Fa'atonu | Fa'amatalaga | Numera Vaega | Tufuga |
| Q10 | 40G (4×10) QSFP Optical Transceiver | FTL410QE2C | Finisar |
| Q14 | 56G (4×14) QSFP Optical Transceiver | FTL414QB2C | Finisar |
| Q25 | 100G (4×25) QSFP28 Transceiver Optical | FTLC9558REPM | Finisar |
OpenCAPI Ultraport SlimSAS
O le Ultraport SlimSAS faʻamau i tua o le laupapa e mafai ai ona faʻaogaina fesoʻotaʻiga OpenCAPI e faʻatautaia i le 200G (8 alalaupapa i le 25G). Fa'amolemole fa'afeso'ota'i le support@alpha-data.com po'o lou sui IBM mo nisi fa'amatalaga ile OpenCAPI ma ona fa'amanuiaga.
E mafai fo'i ona fa'aoga le feso'ota'iga SlimSAS e fa'afeso'ota'i ai se laupapa fa'aopoopo 2x QSFP28, fa'afeso'ota'i sales@alpha-data.com mo nisi fa'amatalaga. I le isi itu, ia fa'aogaina le ka'a e fa'afeso'ota'i le tele o kata ADM-PCIE-9H3 i totonu o se ta'avale.
Mata'itū faiga
O le ADM-PCIE-9H3 o loʻo i ai le malosi e mataʻituina ai le vevela, voltagu, ma le taimi nei o le faiga e siaki ai le faagaoioiga o le laupapa. O le mataʻituina o loʻo faʻatinoina e faʻaaoga ai le microcontroller Atmel AVR.
Afai ole vevela ole FPGA e sili atu ile 105 tikeri Celsius, ole a kilia le FPGA e puipuia ai le faaleagaina o le kata.
Pulea algorithms i totonu ole microcontroller otometi siaki laina voltagma luga o le vevela ma sea e maua ai faʻamatalaga i le FPGA i luga o se fesoʻotaʻiga faʻapitoa faʻapipiʻi ua fausia i totonu o le Alpha Data reference design package (faʻatau ese). O faʻamatalaga e mafai foi ona maua saʻo mai le microcontroller i luga o le USB interface i le pito i luma poʻo le faʻaogaina o le IPMI o loʻo maua i le PCIe card edge.
Laulau 6 : Voltagu, Mata'ituina o le taimi nei, ma le vevela
| Mataitu | Fa'asinomaga | Fa'amoemoega/Fa'amatalaga |
| ETC | ETC | Fua taimi ua mavae (sekona) |
| EC | EC | Su'e mea e tutupu (ta'amilosaga malosi) |
| 12V | ADC00 | Sapalai o mea e fai a le Komiti |
| 12V_I | ADC01 | 12V fa'aoga i le taimi nei amps |
| 3.3V | ADC02 | Sapalai o mea e fai a le Komiti |
| 3.3V_I | ADC03 | 3.3V fa'aoga i le taimi nei amps |
| 3.3V | ADC05 | Malosiaga fesoasoani fesoasoani |
| 3.3V | ADC05 | 3.3V mo QSFP optics |
| 2.5V | ADC06 | Uati ma DRAM voltagu sapalai |
| 1.8V | ADC07 | FPGA IO voltagu (VCCO) |
| 1.8V | ADC08 | Malosiaga e feavea'i (AVCC_AUX) |
| 1.2V | ADC09 | HBM Malosi |
| 1.2V | ADC10 | Malosi'i Fe'avea'i (AVTT) |
| 0.9V | ADC11 | Malosi'i Fe'avea'i (AVCC) |
| 0.85-0.90V | ADC12 | BRAM + INT_IO (VccINT_IO) |
| 0.72-0.90V | ADC13 | Sapalai Autu FPGA (VccINT) |
| uC_Temp | TMP00 | FPGA i luga ole vevela vevela |
| Fono0_Temp | TMP01 | O le vevela o le laupapa e latalata ile laulau pito i luma |
| Fono1_Temp | TMP02 | O le vevela o le laupapa i tafatafa o le pito i tua pito i luga |
| FPGA_Temp | TMP03 | FPGA i luga ole vevela vevela |
System Monitor Tulaga LEDs
O LED D5 (Mula) ma le D6 (Green) e fa'ailoa mai ai le tulaga o le soifua maloloina.
Laulau 7: Tulaga Fa'amatalaga LED
| LED | Tulaga |
| Lanu meamata | Tamomoe ma leai ni fa'ailo |
| lanumeamata + mumu | Standby (Pepe) |
| Emo lanumeamata + Emo Mumu (fa'atasi) | Fa'alogo - fa'ailo fa'alavelave fa'afuase'i |
| Emo lanumeamata + Emo Mumu (feso'o) | Auala Auaunaga |
| Emo lanumeamata + Mumu | Fa'alogo - fa'amalo le fa'ailo |
| Lanu mumu | O lo'o misi le firmware app po'o le firmware le aoga |
| Mumu mumu | Fa'atonu FPGA fa'amama e puipui le laupapa |
Pule Faaili
O le pasi USB i luga ole laiga o lo'o pulea e le masini mata'ituina e mafai ona maua le MAX6620 fan controller. O lenei masini e mafai ona pulea e ala i le tele o fesoʻotaʻiga mataʻituina o fesoʻotaʻiga, e aofia ai le USB, PCIe Edge SMBUS, ma le FPGA sysmon seral communication port. O lo'o i luga ole I2C pasi 1 ile tuatusi 0x2a le fa'atonu ili. Mo nisi fesili. Fa'afeso'ota'i support@alpha-data.com fa'atasi ai ma fesili fa'aopoopo i le fa'aogaina o nei fa'atonu.
Fa'aoga USB
O le FPGA e mafai ona faʻapipiʻi saʻo mai le fesoʻotaʻiga USB i luga o le pito i luma poʻo le pito i tua.
O le ADM-PCIE-9H3 e fa'aaogaina le Digilent USB-JTAG pusa liliu lea e lagolagoina e le Xilinx software tool suite. Na'o le fa'afeso'ota'i o le micro-USB AB type cable i le va o le ADM-PCIE-9H3 USB port ma se komepiuta talimalo fa'atasi ma Vivado. Vivado Hardware Manager o le a otometi lava ona iloa le FPGA ma faʻatagaina oe e faʻapipiʻi le FPGA ma le SBPI configuration PROM.
O le feso'ota'iga USB lava e tasi o lo'o fa'aogaina e fa'aoga sa'o ai le masini mata'itu. Voltage, au, vevela, ma le fa'aogaina o fa'atulagaga o le uati e le mafai ona fa'aogaina e fa'aaoga ai le polokalama avr2util a le Alpha Data i lenei fa'aoga.
Avr2util mo Windows ma le avetaavale USB fesoʻotaʻi e mafai ona sii mai iinei:
https://support.alpha-data.com/pub/firmware/utilities/windows/
Avr2util mo Linux e mafai ona sii mai iinei:
https://support.alpha-data.com/pub/firmware/utilities/linux/
Fa'aaoga le "avr2util.exe /?" e va'ai i filifiliga uma.
Mo example "avr2util.exe /usbcom com4 display-sensors" o le a faʻaalia uma tulaga taua.
Mo example "avr2util.exe /usbcom com4 setclknv 1 156250000" o le a seti le QSFP uati i le 156.25MHz. setclk index 0 = CAPI_CLK_1, index 1 = QSFP_CLK, index 2 = AUX_CLK, index 3 = FABRIC_CLK.
Suia le 'com4' e fetaui ma le numera o le com port ua tofia i lalo o le windows manager device
Fa'atonuga
E lua auala autu e faʻapipiʻi ai le FPGA i le ADM-PCIE-9H3:
- Mai Flash memory, i le power-on, e pei ona faamatalaina i le Vaega 3.8.1
- Fa'aaogā uaea USB feso'ota'i i so'o se uafu USB Vaega 3.8.2
Fa'atonuga Mai Flash Memory
O le FPGA e mafai ona otometi ona faʻapipiʻiina i le mana mai le lua 256 Mbit QSPI flash memory masini faʻapipiʻiina o se x8 SPI masini (Micron vaega numera MT25QU256ABA8E12-0). O nei masini moli e masani ona vaevaeina i ni vaega se lua o le 32 MiByte taʻitasi, lea e lava le tele o itulagi taʻitasi e taofi ai se bitstream e leʻi faʻapipiʻiina mo se VU33P FPGA.
O le ADM-PCIE-9H3 o loʻo tuʻuina atu i se PCIe faʻaiʻuga faigofie bitstream o loʻo i ai se faʻavae Alpha Data ADXDMA bitstream. Alpha Data e mafai ona utaina i isi aganuʻu bitstreams i le taimi o suʻega gaosiga, faʻamolemole faʻafesoʻotaʻi sales@alpha-data.com mo nisi fa'amatalaga.
E mafai ona faʻaogaina le Multiboot ma se ata faʻafoʻi i luga o lenei meafaigaluega. O le matai SPI fetuutuunaiga atinaʻe ma le Fallback MultiBoot o loʻo talanoaina auiliili ile Xilinx UG570. I le power-on, e taumafai le FPGA e faʻapipiʻi otometi i le faʻasologa o matai faʻavae e faʻatatau i mea o loʻo i totonu o le ulutala i le polokalame. file. Multibook ma le ICAP e mafai ona faʻaogaina e filifili ai i le va o vaega faʻatulagaina e lua e utaina i le FPGA. Va'ai Xilinx UG570 MultiBoot mo fa'amatalaga.
O le ata o loʻo faʻapipiʻiina e mafai foʻi ona lagolagoina le PROM poʻo le PCIE faʻatasi ma metotia faʻafouina o le fanua.
O nei filifiliga e faʻaitiitia ai le taimi e faʻaaogaina ai le eletise e fesoasoani e faʻafetaui le PCIe toe setiina taimi manaʻomia. Faʻatasi ma le fanua e mafai ai foʻi e se faʻalapotopotoga faʻafeiloaʻi ona toe faʻaleleia le faʻaogaina o le FPGA logic e aunoa ma le leiloa o le PCIe soʻotaga, o se mea aoga pe a toe faʻaleleia le faʻaogaina ma le taʻavale eletise e le o se filifiliga.
O le Alpha Data System Monitor e mafai foi ona toe faʻaleleia le manatuaga moli ma toe faʻatulagaina le FPGA.
Ole mea lea e maua ai se faiga fa'aoga le saogalemu e toe fa'apolokalame ai le FPGA tusa lava pe pa'u ese mai le pasi PCIe. E mafai ona maua le mata'ituina o le polokalama i luga ole USB ile pito i luma ma le pito i tua, po'o luga ole SMBUS feso'ota'iga ile pito PCIe.
Fausia ma Polokalama Fa'atonu Ata
Fausia teisifile faʻatasi ai ma nei faʻalavelave (silasila i le xapp1233):
- set_property BITSTREAM.GENERAL.COMPRESS TRUE [ current_design ]
- set_property BITSTREAM.CONFIG.EXTMASTERCCLK_EN {DIV-1} [current_design]
- seti_meatotonu BITSTREAM.CONFIG.SPI_32BIT_ADDR IOE [current_design]
- seti_meatotonu BITSTREAM.CONFIG.SPI_BUSWIDTH 8 [current_design]
- set_property BITSTREAM.CONFIG.SPI_FALL_EDGE IOE [current_design]
- set_property BITSTREAM.CONFIG.UNUSEDPIN {Pullnone} [current_design]
- seti_meatotonu CFGBVS GND [ current_design ]
- seti_meatotonu CONFIG_VOLTAGE 1.8 [fa'ailoga_i le taimi nei ]
- set_property BITSTREAM.CONFIG.OVERTEMPSHUTDOWN Fa'agaoi le [current_design]
Fausia se MCS file fa'atasi ai ma nei meatotino (write_cfgmem):
- -faatulagaina MCS
- - tele 64
- - fa'aoga SPIx8
- -loadbit "up 0x0000000file/filename.bit>” (0 lona nofoaga)
- -loadbit "up 0x2000000file/filename.bit>” (nofoaga muamua, faitalia)
Polokalama ma le vivado hardware manager ma nei faatulagaga (silasila i le xapp1233):
- SPI part: mt25qu256-spi-x1_x2_x4_x8
- Tulaga o pine I/O e le config mem: Toso-leai
- Fa'atatau i le fa files gaosia mai le write_cfgmem tcl poloaiga.
Fa'atonuga e ala i le JTAG
E mafai ona fa'apipi'i se Micro-USB AB Cable i le pito i luma po'o le pito i tua uafu USB. O lenei mea e mafai ai ona toe faʻaleleia le FPGA e faʻaaoga ai le Xilinx Vivado Hardware Manager e ala i le tuufaatasia o le Digilent J.TAG pusa liliu. Ole masini ole a otometi lava ona iloa ile Vivado Hardware Manager.
Mo nisi faʻamatalaga auiliili, faʻamolemole tagaʻi i le "Faʻaaogaina o se Vivado Hardware Manager e Polokalama se FPGA Device" vaega o Xilinx UG908: https://www.xilinx.com/support/documentation/sw_manuals/xilinx2014_1/ug908-vivado-programming-debugging.pdf
GPIO Feso'ota'i
O le filifiliga GPIO e aofia ai se feso'ota'iga fa'afefe tele mai Molex ma le vaega numera 87832-1222 e tu'uina atu ai i tagata fa'aoga fa'apitoa IO mana'oga fa fa'afeso'ota'i sa'o i fa'ailoga FPGA.
Fautuaina so'o fa'aipoipoga: Molex 0875681273 po'o le 0511101260
Feso'ota'i Fa'ailoga FPGA
E 8 upega ua malepe i le ulutala GPIO, e fa seti o paga eseese. O nei faʻailoga e talafeagai mo soʻo se 1.8V faʻamaonia tulaga faʻamaonia e lagolagoina e le Xilinx UltraScale architecture. Va'ai Xilinx UG571 mo filifiliga IO.
LVDS ma le 1.8 CMOS o filifiliga lauiloa. O le 0th GPIO fa'ailoga fa'ailoga e talafeagai mo se feso'ota'iga uati i le lalolagi.
O faʻamaufaʻailoga GPIO fesoʻotaʻi tuusaʻo e faʻatapulaʻaina i le 1.8V e ala i le quickswitch (74CBTLVD3245PW) ina ia puipuia le FPGA mai le teletage i pine IO. O lenei suiga vave e mafai ai ona fealuai faailoilo i itu e lua ma na o le 4 ohms o le faʻalavelave faʻasolosolo ma itiiti ifo i le 1ns o le faʻatuai o le faʻasalalau. O upega e fesoʻotaʻi saʻo i le FPGA pe a maeʻa le suiga vave.
O igoa fa'ailoga feso'ota'i sa'o e fa'ailoga GPIO_0_1V8_P/N ma GPIO_1_1V8_P/N, ma isi e fa'aalia ai le polarity ma le fa'avasegaina. E mafai ona maua le fa'asoaina o pine fa'ailo ile Fua Fa'ato'a Pinout
Taimi Ulufale
E mafai ona fa'aogaina le J1.1 ma le J1.2 e fai ma fa'ailo fa'aoga taimi tu'ufua (e o'o i le 25MHz). O talosaga e mafai ona fa'afeso'ota'i sa'o i le feso'ota'iga GPIO, po'o le Alpha Data e mafai ona tu'uina atu se tali fa'afeso'ota'i ma se SMA po'o se feso'ota'iga tutusa i le pito i luma. Fa'afeso'ota'i sales@alpha-data.com mo filifiliga feso'ota'iga pito i luma.
Mo nofoaga fa'amau, va'ai le igoa fa'ailoga ISO_CLK ile Fa'ato'a Fa'aitu Laupapa.
O le fa'ailoga e fa'aesea e ala i se numera vaega fa'apitoa fa'apitoa TLP2367 fa'atasi ma le 220 ohm o fa'asologa fa'asologa.
Tagata fa'aoga EEPROM
O le 2Kb I2C fa'aoga EEPROM ua tu'uina atu mo le teuina o tuatusi MAC po'o isi fa'amatalaga fa'aoga. Ole EEPROM ole vaega numera CAT34C02HU4IGT4A
O pine tuatusi A2, A1, ma A0 o lo'o nonoa uma i le '0' talafeagai.
Tusi le puipuiga (WP), Fa'ailoga Uati (SCL), ma Fa'amaumauga Fa'amaumauga (SDA) pine e mafai ona maua i le Complete Pinout Table ma igoa SPARE_WP, SPARE_SCL, ma SPARE_SDA.
WP, SDA, ma SCL faʻailoga uma e iai faʻalavelave toso i fafo i luga o le kata.
Fa'aopoopo A: Ma'ea Pinout Laupapa
Laulau 8: Fa'auma siata Pinout (fa'aauau i le isi itulau)
| Numera Pin | Igoa Faailoga | Igoa Pin | Faletupe Voltage |
| BC18 | AUX_CLK_PIN_N | IO_L11N_T1U_N9_GC_64 | 1.8 (LVCMOS18) |
| BB18 | AUX_CLK_PIN_P | IO_L11P_T1U_N8_GC_64 | 1.8 (LVCMOS18) |
| BF33 | AVR_B2U_1V8 | IO_L2P_T0L_N2_66 | 1.8 (LVCMOS18) |
| BF31 | AVR_HS_B2U_1V8 | IO_L1P_T0L_N0_DBC_66 | 1.8 (LVCMOS18) |
| BB33 | AVR_HS_CLK_1V8 | IO_L12N_T1U_N11_GC_66 | 1.8 (LVCMOS18) |
| BF32 | AVR_HS_U2B_1V8 | IO_L1N_T0L_N1_DBC_66 | 1.8 (LVCMOS18) |
| BA33 | AVR_MON_CLK_1V8 | IO_L12P_T1U_N10_GC_66 | 1.8 (LVCMOS18) |
| BF34 | AVR_U2B_1V8 | IO_L2N_T0L_N3_66 | 1.8 (LVCMOS18) |
| AK39 | CAPI_CLK_0_PIN_N | MGTREFCLK0N_124 | MGT REFCLK |
| AK38 | CAPI_CLK_0_PIN_P | MGTREFCLK0P_124 | MGT REFCLK |
| AF39 | CAPI_CLK_1_PIN_N | MGTREFCLK0N_125 | MGT REFCLK |
| AF38 | CAPI_CLK_1_PIN_P | MGTREFCLK0P_125 | MGT REFCLK |
| BF17 | CAPI_I2C_SCL_1V8 | IO_L1P_T0L_N0_DBC_64 | 1.8 (LVCMOS18) |
| BF16 | CAPI_I2C_SDA_1V8 | IO_L1N_T0L_N1_DBC_64 | 1.8 (LVCMOS18) |
| BF19 | CAPI_INT/RESET_1V8 | IO_L2P_T0L_N2_64 | 1.8 (LVCMOS18) |
| BF43 | CAPI_RX0_N | MGTYRXN0_124 | MGT |
| BF42 | CAPI_RX0_P | MGTYRXP0_124 | MGT |
| BD44 | CAPI_RX1_N | MGTYRXN1_124 | MGT |
| BD43 | CAPI_RX1_P | MGTYRXP1_124 | MGT |
| BB44 | CAPI_RX2_N | MGTYRXN2_124 | MGT |
| BB43 | CAPI_RX2_P | MGTYRXP2_124 | MGT |
| AY44 | CAPI_RX3_N | MGTYRXN3_124 | MGT |
| AY43 | CAPI_RX3_P | MGTYRXP3_124 | MGT |
| BC46 | CAPI_RX4_N | MGTYRXN0_125 | MGT |
| BC45 | CAPI_RX4_P | MGTYRXP0_125 | MGT |
| BA46 | CAPI_RX5_N | MGTYRXN1_125 | MGT |
| BA45 | CAPI_RX5_P | MGTYRXP1_125 | MGT |
| AW46 | CAPI_RX6_N | MGTYRXN2_125 | MGT |
| AW45 | CAPI_RX6_P | MGTYRXP2_125 | MGT |
| AV44 | CAPI_RX7_N | MGTYRXN3_125 | MGT |
| AV43 | CAPI_RX7_P | MGTYRXP3_125 | MGT |
| AT39 | CAPI_TX0_N | MGTYTXN0_124 | MGT |
| AT38 | CAPI_TX0_P | MGTYTXP0_124 | MGT |
| Numera Pin | Igoa Faailoga | Igoa Pin | Faletupe Voltage |
| AR41 | CAPI_TX1_N | MGTYTXN1_124 | MGT |
| AR40 | CAPI_TX1_P | MGTYTXP1_124 | MGT |
| AP39 | CAPI_TX2_N | MGTYTXN2_124 | MGT |
| AP38 | CAPI_TX2_P | MGTYTXP2_124 | MGT |
| AN41 | CAPI_TX3_N | MGTYTXN3_124 | MGT |
| AN40 | CAPI_TX3_P | MGTYTXP3_124 | MGT |
| AM39 | CAPI_TX4_N | MGTYTXN0_125 | MGT |
| AM38 | CAPI_TX4_P | MGTYTXP0_125 | MGT |
| AL41 | CAPI_TX5_N | MGTYTXN1_125 | MGT |
| AL40 | CAPI_TX5_P | MGTYTXP1_125 | MGT |
| AJ41 | CAPI_TX6_N | MGTYTXN2_125 | MGT |
| AJ40 | CAPI_TX6_P | MGTYTXP2_125 | MGT |
| AG41 | CAPI_TX7_N | MGTYTXN3_125 | MGT |
| AG40 | CAPI_TX7_P | MGTYTXP3_125 | MGT |
| AV26 | EMCCLK_B | IO_L24P_T3U_N10_EMCCLK_65 | 1.8 (LVCMOS18) |
| BA31 | FABRIC_CLK_PIN_N | IO_L13N_T2L_N1_GC_QBC_66 | 1.8 (LVDS ma DIFF_TERM_ADV) |
| AY31 | FABRIC_CLK_PIN_P | IO_L13P_T2L_N0_GC_QBC_66 | 1.8 (LVDS ma DIFF_TERM_ADV) |
| BA8 | FPGA_FLASH_CE0_L | RDWR_FCS_B_0 | 1.8 (LVCMOS18) |
| AW24 | FPGA_FLASH_CE1_L | IO_L2N_T0L_N3_FWE_FCS2_B_65 | 1.8 (LVCMOS18) |
| AW7 | FPGA_FLASH_DQ0 | D00_MOSI_0 | 1.8 (LVCMOS18) |
| AV7 | FPGA_FLASH_DQ1 | D01_DIN_0 | 1.8 (LVCMOS18) |
| AW8 | FPGA_FLASH_DQ2 | D02_0 | 1.8 (LVCMOS18) |
| AV8 | FPGA_FLASH_DQ3 | D03_0 | 1.8 (LVCMOS18) |
| AV28 | FPGA_FLASH_DQ4 | IO_L22P_T3U_N6_DBC_AD0P
_D04_65 |
1.8 (LVCMOS18) |
| AW28 | FPGA_FLASH_DQ5 | IO_L22N_T3U_N7_DBC_AD0N
_D05_65 |
1.8 (LVCMOS18) |
| BB28 | FPGA_FLASH_DQ6 | IO_L21P_T3L_N4_AD8P_D06_65 | 1.8 (LVCMOS18) |
| BC28 | FPGA_FLASH_DQ7 | IO_L21N_T3L_N5_AD8N_D07_65 | 1.8 (LVCMOS18) |
| BA19 | GPIO_0_1V8_N | IO_L13N_T2L_N1_GC_QBC_64 | 1.8 (LVCMOS18poʻo LVDS) |
| AY19 | GPIO_0_1V8_P | IO_L13P_T2L_N0_GC_QBC_64 | 1.8 (LVCMOS18poʻo LVDS) |
| AY20 | GPIO_1_1V8_N | IO_L15N_T2L_N5_AD11N_64 | 1.8 (LVCMOS18poʻo LVDS) |
| AY21 | GPIO_1_1V8_P | IO_L15P_T2L_N4_AD11P_64 | 1.8 (LVCMOS18poʻo LVDS) |
| AW20 | GPIO_2_1V8_N | IO_L16N_T2U_N7_QBC_AD3N_64 | 1.8 (LVCMOS18poʻo LVDS) |
| Numera Pin | Igoa Faailoga | Igoa Pin | Faletupe Voltage |
| AV20 | GPIO_2_1V8_P | IO_L16P_T2U_N6_QBC_AD3P_64 | 1.8 (LVCMOS18poʻo LVDS) |
| AW18 | GPIO_3_1V8_N | IO_L17N_T2U_N9_AD10N_64 | 1.8 (LVCMOS18poʻo LVDS) |
| AW19 | GPIO_3_1V8_P | IO_L17P_T2U_N8_AD10P_64 | 1.8 (LVCMOS18poʻo LVDS) |
| BA27 | IBM_PERST_1V8_L | IO_L20P_T3L_N2_AD1P_D08_65 | 1.8 (LVCMOS18) |
| BA18 | ISO_CLK_1V8 | IO_L14P_T2L_N2_GC_64 | 1.8 (LVCMOS18) |
| AD8 | PCIE_LCL_REFCLK_PIN_N | MGTREFCLK0N_226 | MGT REFCLK |
| AD9 | PCIE_LCL_REFCLK_PIN_P | MGTREFCLK0P_226 | MGT REFCLK |
| AF8 | PCIE_REFCLK_1_PIN_N | MGTREFCLK0N_225 | MGT REFCLK |
| AF9 | PCIE_REFCLK_1_PIN_P | MGTREFCLK0P_225 | MGT REFCLK |
| AB8 | PCIE_REFCLK_2_PIN_N | MGTREFCLK0N_227 | MGT REFCLK |
| AB9 | PCIE_REFCLK_2_PIN_P | MGTREFCLK0P_227 | MGT REFCLK |
| AL1 | PCIE_RX0_N | MGTYRXN3_227 | MGT |
| AL2 | PCIE_RX0_P | MGTYRXP3_227 | MGT |
| AM3 | PCIE_RX1_N | MGTYRXN2_227 | MGT |
| AM4 | PCIE_RX1_P | MGTYRXP2_227 | MGT |
| BA1 | PCIE_RX10_N | MGTYRXN1_225 | MGT |
| BA2 | PCIE_RX10_P | MGTYRXP1_225 | MGT |
| BC1 | PCIE_RX11_N | MGTYRXN0_225 | MGT |
| BC2 | PCIE_RX11_P | MGTYRXP0_225 | MGT |
| AY3 | PCIE_RX12_N | MGTYRXN3_224 | MGT |
| AY4 | PCIE_RX12_P | MGTYRXP3_224 | MGT |
| BB3 | PCIE_RX13_N | MGTYRXN2_224 | MGT |
| BB4 | PCIE_RX13_P | MGTYRXP2_224 | MGT |
| BD3 | PCIE_RX14_N | MGTYRXN1_224 | MGT |
| BD4 | PCIE_RX14_P | MGTYRXP1_224 | MGT |
| BE5 | PCIE_RX15_N | MGTYRXN0_224 | MGT |
| BE6 | PCIE_RX15_P | MGTYRXP0_224 | MGT |
| AK3 | PCIE_RX2_N | MGTYRXN1_227 | MGT |
| AK4 | PCIE_RX2_P | MGTYRXP1_227 | MGT |
| AN1 | PCIE_RX3_N | MGTYRXN0_227 | MGT |
| AN2 | PCIE_RX3_P | MGTYRXP0_227 | MGT |
| AP3 | PCIE_RX4_N | MGTYRXN3_226 | MGT |
| AP4 | PCIE_RX4_P | MGTYRXP3_226 | MGT |
| AR1 | PCIE_RX5_N | MGTYRXN2_226 | MGT |
| AR2 | PCIE_RX5_P | MGTYRXP2_226 | MGT |
| Numera Pin | Igoa Faailoga | Igoa Pin | Faletupe Voltage |
| AT3 | PCIE_RX6_N | MGTYRXN1_226 | MGT |
| AT4 | PCIE_RX6_P | MGTYRXP1_226 | MGT |
| AU1 | PCIE_RX7_N | MGTYRXN0_226 | MGT |
| AU2 | PCIE_RX7_P | MGTYRXP0_226 | MGT |
| AV3 | PCIE_RX8_N | MGTYRXN3_225 | MGT |
| AV4 | PCIE_RX8_P | MGTYRXP3_225 | MGT |
| AW1 | PCIE_RX9_N | MGTYRXN2_225 | MGT |
| AW2 | PCIE_RX9_P | MGTYRXP2_225 | MGT |
| Y4 | PCIE_TX0_PIN_N | MGTYTXN3_227 | MGT |
| Y5 | PCIE_TX0_PIN_P | MGTYTXP3_227 | MGT |
| AA6 | PCIE_TX1_PIN_N | MGTYTXN2_227 | MGT |
| AA7 | PCIE_TX1_PIN_P | MGTYTXP2_227 | MGT |
| AL6 | PCIE_TX10_PIN_N | MGTYTXN1_225 | MGT |
| AL7 | PCIE_TX10_PIN_P | MGTYTXP1_225 | MGT |
| AM8 | PCIE_TX11_PIN_N | MGTYTXN0_225 | MGT |
| AM9 | PCIE_TX11_PIN_P | MGTYTXP0_225 | MGT |
| AN6 | PCIE_TX12_PIN_N | MGTYTXN3_224 | MGT |
| AN7 | PCIE_TX12_PIN_P | MGTYTXP3_224 | MGT |
| AP8 | PCIE_TX13_PIN_N | MGTYTXN2_224 | MGT |
| AP9 | PCIE_TX13_PIN_P | MGTYTXP2_224 | MGT |
| AR6 | PCIE_TX14_PIN_N | MGTYTXN1_224 | MGT |
| AR7 | PCIE_TX14_PIN_P | MGTYTXP1_224 | MGT |
| AT8 | PCIE_TX15_PIN_N | MGTYTXN0_224 | MGT |
| AT9 | PCIE_TX15_PIN_P | MGTYTXP0_224 | MGT |
| AB4 | PCIE_TX2_PIN_N | MGTYTXN1_227 | MGT |
| AB5 | PCIE_TX2_PIN_P | MGTYTXP1_227 | MGT |
| AC6 | PCIE_TX3_PIN_N | MGTYTXN0_227 | MGT |
| AC7 | PCIE_TX3_PIN_P | MGTYTXP0_227 | MGT |
| AD4 | PCIE_TX4_PIN_N | MGTYTXN3_226 | MGT |
| AD5 | PCIE_TX4_PIN_P | MGTYTXP3_226 | MGT |
| AF4 | PCIE_TX5_PIN_N | MGTYTXN2_226 | MGT |
| AF5 | PCIE_TX5_PIN_P | MGTYTXP2_226 | MGT |
| AE6 | PCIE_TX6_PIN_N | MGTYTXN1_226 | MGT |
| AE7 | PCIE_TX6_PIN_P | MGTYTXP1_226 | MGT |
| AH4 | PCIE_TX7_PIN_N | MGTYTXN0_226 | MGT |
| Numera Pin | Igoa Faailoga | Igoa Pin | Faletupe Voltage |
| AH5 | PCIE_TX7_PIN_P | MGTYTXP0_226 | MGT |
| AG6 | PCIE_TX8_PIN_N | MGTYTXN3_225 | MGT |
| AG7 | PCIE_TX8_PIN_P | MGTYTXP3_225 | MGT |
| AJ6 | PCIE_TX9_PIN_N | MGTYTXN2_225 | MGT |
| AJ7 | PCIE_TX9_PIN_P | MGTYTXP2_225 | MGT |
| AW27 | PERST0_1V8_L | IO_T3U_N12_PERSTN0_65 | 1.8 (LVCMOS18) |
| AY27 | PERST1_1V8_L | IO_L23N_T3U_N9_PERSTN1_I 2C_SDA_65 | 1.8 (LVCMOS18) |
| AD39 | QSFP_CLK_PIN_N | MGTREFCLK0N_126 | MGT REFCLK |
| AD38 | QSFP_CLK_PIN_P | MGTREFCLK0P_126 | MGT REFCLK |
| AV16 | QSFP_INT_1V8_L | IO_L24P_T3U_N10_64 | 1.8 (LVCMOS18) |
| BA14 | QSFP_MODPRS_L | IO_L22N_T3U_N7_DBC_AD0N_64 | 1.8 (LVCMOS18) |
| AV15 | QSFP_RST_1V8_L | IO_L24N_T3U_N11_64 | 1.8 (LVCMOS18) |
| AU46 | QSFP_RX0_N | MGTYRXN0_126 | MGT |
| AU45 | QSFP_RX0_P | MGTYRXP0_126 | MGT |
| AT44 | QSFP_RX1_N | MGTYRXN1_126 | MGT |
| AT43 | QSFP_RX1_P | MGTYRXP1_126 | MGT |
| AR46 | QSFP_RX2_N | MGTYRXN2_126 | MGT |
| AR45 | QSFP_RX2_P | MGTYRXP2_126 | MGT |
| AP44 | QSFP_RX3_N | MGTYRXN3_126 | MGT |
| AP43 | QSFP_RX3_P | MGTYRXP3_126 | MGT |
| AN46 | QSFP_RX4_N | MGTYRXN0_127 | MGT |
| AN45 | QSFP_RX4_P | MGTYRXP0_127 | MGT |
| AK44 | QSFP_RX5_N | MGTYRXN1_127 | MGT |
| AK43 | QSFP_RX5_P | MGTYRXP1_127 | MGT |
| AM44 | QSFP_RX6_N | MGTYRXN2_127 | MGT |
| AM43 | QSFP_RX6_P | MGTYRXP2_127 | MGT |
| AL46 | QSFP_RX7_N | MGTYRXN3_127 | MGT |
| AL45 | QSFP_RX7_P | MGTYRXP3_127 | MGT |
| AW15 | QSFP_SCL_1V8 | IO_L23P_T3U_N8_64 | 1.8 (LVCMOS18) |
| AW14 | QSFP_SDA_1V8 | IO_L23N_T3U_N9_64 | 1.8 (LVCMOS18) |
| AH43 | QSFP_TX0_N | MGTYTXN0_126 | MGT |
| AH42 | QSFP_TX0_P | MGTYTXP0_126 | MGT |
| AE41 | QSFP_TX1_N | MGTYTXN1_126 | MGT |
| AE40 | QSFP_TX1_P | MGTYTXP1_126 | MGT |
| AF43 | QSFP_TX2_N | MGTYTXN2_126 | MGT |
| Numera Pin | Igoa Faailoga | Igoa Pin | Faletupe Voltage |
| AF42 | QSFP_TX2_P | MGTYTXP2_126 | MGT |
| AD43 | QSFP_TX3_N | MGTYTXN3_126 | MGT |
| AD42 | QSFP_TX3_P | MGTYTXP3_126 | MGT |
| AC41 | QSFP_TX4_N | MGTYTXN0_127 | MGT |
| AC40 | QSFP_TX4_P | MGTYTXP0_127 | MGT |
| AB43 | QSFP_TX5_N | MGTYTXN1_127 | MGT |
| AB42 | QSFP_TX5_P | MGTYTXP1_127 | MGT |
| AA41 | QSFP_TX6_N | MGTYTXN2_127 | MGT |
| AA40 | QSFP_TX6_P | MGTYTXP2_127 | MGT |
| Y43 | QSFP_TX7_N | MGTYTXN3_127 | MGT |
| Y42 | QSFP_TX7_P | MGTYTXP3_127 | MGT |
| AV36 | SI5328_1V8_SCL | IO_L24N_T3U_N11_66 | 1.8 (LVCMOS18) |
| AV35 | SI5328_1V8_SDA | IO_L24P_T3U_N10_66 | 1.8 (LVCMOS18) |
| AE37 | SI5328_OUT_0_PIN_N | MGTREFCLK1N_125 | MGT REFCLK |
| AE36 | SI5328_OUT_0_PIN_P | MGTREFCLK1P_125 | MGT REFCLK |
| AB39 | SI5328_OUT_1_PIN_N | MGTREFCLK0N_127 | MGT REFCLK |
| AB38 | SI5328_OUT_1_PIN_P | MGTREFCLK0P_127 | MGT REFCLK |
| BB19 | SI5328_REFCLK_IN_N | IO_L12N_T1U_N11_GC_64 | 1.8 (LVDS) |
| BB20 | SI5328_REFCLK_IN_P | IO_L12P_T1U_N10_GC_64 | 1.8 (LVDS) |
| AV33 | SI5328_RST_1V8_L | IO_L22P_T3U_N6_DBC_AD0P_66 | 1.8 (LVCMOS18) |
| BE30 | SPARE_SCL | IO_L5N_T0U_N9_AD14N_66 | 1.8 (LVCMOS18) |
| BC30 | SPARE_SDA | IO_L6P_T0U_N10_AD6P_66 | 1.8 (LVCMOS18) |
| BD30 | SPARE_WP | IO_L6N_T0U_N11_AD6N_66 | 1.8 (LVCMOS18) |
| BE31 | SRVC_MD_L_1V8 | IO_L3P_T0L_N4_AD15P_66 | 1.8 (LVCMOS18) |
| AV32 | USER_LED_A0_1V8 | IO_L18N_T2U_N11_AD2N_66 | 1.8 (LVCMOS18) |
| AW32 | USER_LED_A1_1V8 | IO_T2U_N12_66 | 1.8 (LVCMOS18) |
| AY30 | USER_LED_G0_1V8 | IO_L17N_T2U_N9_AD10N_66 | 1.8 (LVCMOS18) |
| AV31 | USER_LED_G1_1V8 | IO_L18P_T2U_N10_AD2P_66 | 1.8 (LVCMOS18) |
| AW33 | USR_SW_0 | IO_L22N_T3U_N7_DBC_AD0N_66 | 1.8 (LVCMOS18) |
| AY36 | USR_SW_1 | IO_L23P_T3U_N8_66 | 1.8 (LVCMOS18) |
Toe Iloilo Tala'aga
| Aso | Toe Iloiloga | Suia e | Natura o Suiga |
| 24 Setema 2018 | 1.0 | K. Roth | Uluai Fa'asalalauga |
|
31 Oke 2018 |
1.1 |
K. Roth |
Fa'afou ata o oloa, suia fa'aletonu uati fa'apolokalameina mo CAPI_CLK_1 i le 161MHz |
|
14 Tesema 2018 |
1.2 |
K. Roth |
Fa'afouina le numera o vaega moli, suia upu o le fa'amatalaga gpio mo le sa'o, fa'aopoopo le mamafa. |
|
24 Oke 2019 |
1.3 |
K. Roth |
Fa'afouina Fa'atonuga e aveese fa'afanua tuatusi ma fa'amatalaga sa'o o le malosi vaega manatua. |
|
25 Ian 2022 |
1.4 |
K. Roth |
Fa'afouina Mafanafana Fa'atinoga e aofia ai fuainumera fa'alelei vevela ma fa'amatalaga e uiga i le a'afiaga o le ufiufi, aveese fa'asino i le QSFP0 ma le QSFP1 mai le vaega QSFP-DD ma fa'afouina 25Gb transceiver vaega numera. |
Auaunaga i tagata
© 2022 Puletaofia Alpha Data Parallel Systems Ltd.
Ua taofia aia tatau uma.
O lenei lomiga e puipuia e le Tulafono o Puletaofia, faatasi ai ma aia tatau uma ua taofia. E leai se vaega o lenei lomiga e mafai ona toe faia, i so'o se foliga po'o se faiga, e aunoa ma se fa'atagaga tusitusia muamua mai le Alpha Data Parallel Systems Ltd.
Ofisa Ulu
Tuatusi: Suite L4A, 160 Dundee Street,
Edinburgh, EH11 1DQ, UK
Telefoni: +44 131 558 2600
Fax: +44 131 558 2700
imeli: sales@alpha-data.com
webnofoaga: http://www.alpha-data.com
US Office
Tuatusi: 10822 West Toller Drive, Suite 250
Littleton, CO 80127
Telefoni: (303) 954 8768
Fax: (866) 820 9956 – leai se totogi
imeli: sales@alpha-data.com
webnofoaga: http://www.alpha-data.com
O fa'ailoga fa'ailoga uma o mea totino a latou tagata e ona.
Tuatusi: Suite L4A, 160 Dundee Street,
Edinburgh, EH11 1DQ, UK
Telefoni: +44 131 558 2600
Fax: +44 131 558 2700
imeli: sales@alpha-data.com
webnofoaga: http://www.alpha-data.com
Tuatusi: 10822 West Toller Drive, Suite 250
Littleton, CO 80127
Telefoni: (303) 954 8768
Fax: (866) 820 9956 – leai se totogi
imeli: sales@alpha-data.com
webnofoaga: http://www.alpha-data.com
Pepa / Punaoa
 |
ALPHA DATA ADM-PCIE-9H3 High Performance FPGA Processing Card [pdf] Tusi Taiala ADM-PCIE-9H3 Pepa Fa'agaio'iga FPGA Maualuga, ADM-PCIE-9H3, Fa'atonuga Fa'atonu FPGA, Pepa Fa'agaio'iga FPGA, Pepa Fa'asologa |
 |
ALPHA DATA ADM-PCIE-9H3 High Performance FPGA Processing Card [pdf] Tusi Taiala ADM-PCIE-9H3 Fa'atonuga Fa'atino FPGA Card, ADM-PCIE-9H3, Fa'atonu FPGA Fa'atonuga Fa'atonu, Fa'atinoga Fa'atino FPGA Fa'agaio'iga Card, FPGA Fa'agaioiina Kata, Fa'agaioiina Kata |
