ALINX AC7Z020 ZYNQ7000 FPGA Development Board

ọja Alaye

Igbimọ Idagbasoke ZYNQ7000 FPGA jẹ igbimọ idagbasoke ti o ṣe ẹya chirún XC7Z100-1CLG400I, eyiti o jẹ apakan ti jara ZYNQ7000. O ni ero isise ohun elo meji-core CortexA9 ti ARM pẹlu iyara aago ti o to 800MHz, 256KB on-chip Ramu, ati wiwo ibi ipamọ ita ti o ṣe atilẹyin 16/32 bit DDR2, wiwo DDR3. Igbimọ naa tun ni atilẹyin Gigabit NIC meji, awọn atọkun USB2.0 OTG meji, awọn atọkun ọkọ akero CAN2.0B meji, kaadi SD meji, SDIO, awọn olutona ibaramu MMC, 2 SPIs, 2 UARTs, awọn atọkun I2C 2, ati awọn orisii 4 ti 32bit GPIO. Igbimọ naa ni igbimọ mojuto (AC7Z010) ti o lo awọn eerun Micron's MT41K128M16TW-107 DDR3 meji pẹlu agbara apapọ ti 256MB ati iwọn ọkọ akero data ti 32-bit. Igbimọ naa tun ni awọn LED olumulo, awọn bọtini olumulo, akọsori imugboroja, JTAG yokokoro ibudo, ati ipese agbara.

Awọn ilana Lilo ọja

Lati lo Igbimọ Idagbasoke FPGA ZYNQ7000, tẹle awọn igbesẹ wọnyi:

1. So ipese agbara si awọn ọkọ.
2. So ọkọ pọ mọ kọmputa rẹ nipa lilo okun USB kan.
3. Fi sori ẹrọ eyikeyi awakọ pataki fun igbimọ lori kọnputa rẹ.
4. Ṣii agbegbe idagbasoke sọfitiwia rẹ ki o ṣẹda iṣẹ akanṣe tuntun kan.
5. Ṣe atunto awọn eto iṣẹ akanṣe rẹ lati lo Igbimọ Idagbasoke FPGA ZYNQ7000.
6. Kọ koodu rẹ ki o si ṣajọ rẹ.
7. Ṣe igbasilẹ koodu ti a ṣajọpọ si igbimọ nipa lilo JTAG yokokoro ibudo.
8. Idanwo koodu rẹ lori ọkọ.

Akiyesi: Tọkasi itọnisọna olumulo fun alaye diẹ sii lori awọn ẹya ara ẹrọ igbimọ ati lilo.

Igbasilẹ ẹya

Ẹya	Ọjọ	Tu silẹ Nipasẹ	Apejuwe
Ìṣí 1.0	2019-12-15	Rachel Zhou	Itusilẹ akọkọ

AC7Z010 mojuto ọkọ

AC7Z010 mojuto ọkọ Ifihan

• AC7Z010 (awoṣe igbimọ mojuto, kanna ni isalẹ) FPGA mojuto ọkọ, ZYNQ ërún da lori XC7Z010-1CLG400I ti XILINX ile-iṣẹ ZYNQ7000 jara. Eto PS chirún ZYNQ ṣepọ awọn ero isise ARM CortexTM-A9 meji, AMBA® interconnects, iranti inu, awọn atọkun iranti ita ati awọn agbeegbe. FPGA ti chirún ZYNQ ni ọrọ ti awọn sẹẹli oye siseto, DSP ati Ramu inu.
• Igbimọ mojuto yii nlo awọn eerun meji Micron's MT41K128M16TW-107 DDR3, ọkọọkan eyiti o ni agbara ti 256MB; awọn meji DDR eerun darapọ fun a fọọmu a 32-bit data akero iwọn, ati aago igbohunsafẹfẹ ti kika ki o si kọ data laarin ZYNQ ati DDR3 Up to 533Mhz; atunto yii le pade awọn iwulo ti sisẹ data bandiwidi giga ti eto naa
• Lati le sopọ pẹlu igbimọ ti ngbe, awọn asopọ igbimọ-si-ọkọ meji ti igbimọ mojuto yii ni a gbooro pẹlu awọn ebute USB ni ẹgbẹ PS, awọn atọkun Gigabit Ethernet, Iho kaadi SD kaadi, ati awọn ebute MIO miiran ti o ku (48). Bii gbogbo awọn ebute oko oju omi IO (100) ti BANK13 (fun AC7Z010 nikan), BAN34 ati BANK35 ni ẹgbẹ PL, awọn ipele IO ti BANK34 ati BANK35 ni a le pese nipasẹ igbimọ ti ngbe lati pade awọn ibeere awọn olumulo fun awọn atọkun ipele oriṣiriṣi. Fun awọn olumulo ti o nilo ọpọlọpọ IO, igbimọ mojuto yii yoo jẹ yiyan ti o dara. Ati apakan asopọ IO, chirún ZYNQ si wiwo laarin ipari dogba ati sisẹ iyatọ, ati iwọn igbimọ mojuto nikan jẹ 35 * 42 (mm), eyiti o dara pupọ fun idagbasoke ile-ẹkọ keji.

Chip ZYNQ

FPGA mojuto ọkọ AC7Z010 nlo Xilinx ká Zynq7000 jara ërún, module XC7Z010-1CLG400I. Eto PS chirún naa ṣepọ awọn ero isise ARM Cortex ™-A9 meji, AMBA® interconnects, iranti inu, awọn atọkun iranti ita ati awọn agbeegbe. Awọn wọnyi ni awọn pẹẹpẹẹpẹ o kun pẹlu USB akero ni wiwo, àjọlò ni wiwo, SD/SDIO ni wiwo, I2C akero ni wiwo, CAN akero ni wiwo, UART ni wiwo, GPIO ati be be lo PS le ṣiṣẹ ominira ki o si bẹrẹ soke ni agbara lori tabi tun. Olusin 2-2-1 ṣe alaye Iwoye Dẹkun Aworan ti ZYNQ7000 Chip.

Awọn ipilẹ akọkọ ti apakan eto PS jẹ atẹle yii:

• ARM meji-mojuto CortexA9-orisun ohun elo ero isise, ARM-v7 faaji, to 800MHz
• Ilana 32KB ipele 1 ati kaṣe data fun Sipiyu, ipele 512KB 2 kaṣe 2 awọn ipin Sipiyu
• On-chip bata ROM ati 256KB on-chip Ramu
• Ni wiwo ipamọ ita, atilẹyin 16/32 bit DDR2, DDR3 ni wiwo
• Atilẹyin Gigabit NIC meji: Divergent-Group DMA, GMII, RGMII, SGMII ni wiwo
• Meji USB2.0 OTG atọkun, kọọkan atilẹyin soke 12 apa
• Meji CAN2.0B akero atọkun
• Kaadi SD meji, SDIO, awọn olutona ibaramu MMC
• 2 SPIs, 2 UARTs, 2 I2C atọkun
• 4 orisii 32bit GPIO, 54 (32 + 22) bi PS eto IO, 64 ti a ti sopọ si PL
• Asopọ bandwidth giga laarin PS ati PS si PL

Awọn paramita akọkọ ti apakan kannaa PL jẹ atẹle yii:

• Awọn sẹẹli kannaa: 28K
• Wo-soke-tabili (LUTs): 17600
• Isipade-flops: 35,200
• 18x25MACCs: 80
• Àgbo Àkọsílẹ: 240KB
• Meji AD converters fun on-chip voltage, imọ iwọn otutu ati to awọn ikanni igbewọle iyatọ ita 17, 1MBPS
• XC7Z100-1CLG400I ërún iyara ite ni -1, ise ite, package ni BGA400, pin ipolowo ni 0.8mm pato ni ërún awoṣe definition ti ZYNQ7000 jara ti han ni Figure 2-2-2

DDR3 DRAM

• Igbimọ FPGA mojuto AC7Z010 ni ipese pẹlu awọn eerun Micron DDR3 SDRAM meji (1GB lapapọ), awoṣe MT41K128M16TW-107 (ibaramu pẹlu Hynix
• H5TQ2G63AFR-PBI). Awọn lapapọ akero iwọn ti DDR3 SDRAM ni 32bit. DDR3 SDRAM nṣiṣẹ ni o pọju iyara ti 533MHz (data rate1066Mbps). Eto iranti DDR3 ti sopọ taara si wiwo iranti ti BANK 502 ti Eto Ṣiṣeto ZYNQ (PS). Iṣeto ni pato ti DDR3 SDRAM ni a fihan ni Tabili 2-3-1 ni isalẹ:

Nọmba Bit	Awoṣe Chip	Agbara	Ile-iṣẹ
U8,U9	MT41K128M16TW-107	256M x 16bit	Micron

Table 2-3-1: DDR3 SDRAM iṣeto ni

Apẹrẹ ohun elo ti DDR3 nilo akiyesi ti o muna ti iduroṣinṣin ifihan. A ti ni kikun ro awọn ibamu resistor / ebute resistance, wa kakiri impedance Iṣakoso, ati itopase Iṣakoso ipari ni Circuit oniru ati PCB oniru lati rii daju ga-iyara ati idurosinsin isẹ ti DDR3.

DDR3 DRAM pin iyansilẹ:

Orukọ ifihan agbara	Orukọ Pin ZYNQ	Nọmba Pin ZYNQ
DDR3_DQS0_P	PS_DDR_DQS_P0_502	C2
DDR3_DQS0_N	PS_DDR_DQS_N0_502	B2
DDR3_DQS1_P	PS_DDR_DQS_P1_502	G2
DDR3_DQS1_N	PS_DDR_DQS_N1_502	F2
DDR3_DQS2_P	PS_DDR_DQS_P2_502	R2
DDR3_DQS2_N	PS_DDR_DQS_N2_502	T2
DDR3_DQS3_P	PS_DDR_DQS_P3_502	W5
DDR3_DQS4_N	PS_DDR_DQS_N3_502	W4
DDR3_D0	PS_DDR_DQ0_502	C3
DDR3_D1	PS_DDR_DQ1_502	B3
DDR3_D2	PS_DDR_DQ2_502	A2
DDR3_D3	PS_DDR_DQ3_502	A4
DDR3_D4	PS_DDR_DQ4_502	D3
DDR3_D5	PS_DDR_DQ5_502	D1
DDR3_D6	PS_DDR_DQ6_502	C1
DDR3_D7	PS_DDR_DQ7_502	E1
DDR3_D8	PS_DDR_DQ8_502	E2
DDR3_D9	PS_DDR_DQ9_502	E3

DDR3_D10	PS_DDR_DQ10_502	G3
DDR3_D11	PS_DDR_DQ11_502	H3
DDR3_D12	PS_DDR_DQ12_502	J3
DDR3_D13	PS_DDR_DQ13_502	H2
DDR3_D14	PS_DDR_DQ14_502	H1
DDR3_D15	PS_DDR_DQ15_502	J1
DDR3_D16	PS_DDR_DQ16_502	P1
DDR3_D17	PS_DDR_DQ17_502	P3
DDR3_D18	PS_DDR_DQ18_502	R3
DDR3_D19	PS_DDR_DQ19_502	R1
DDR3_D20	PS_DDR_DQ20_502	T4
DDR3_D21	PS_DDR_DQ21_502	U4
DDR3_D22	PS_DDR_DQ22_502	U2
DDR3_D23	PS_DDR_DQ23_502	U3
DDR3_D24	PS_DDR_DQ24_502	V1
DDR3_D25	PS_DDR_DQ25_502	Y3
DDR3_D26	PS_DDR_DQ26_502	W1
DDR3_D27	PS_DDR_DQ27_502	Y4
DDR3_D28	PS_DDR_DQ28_502	Y2
DDR3_D29	PS_DDR_DQ29_502	W3
DDR3_D30	PS_DDR_DQ30_502	V2
DDR3_D31	PS_DDR_DQ31_502	V3
DDR3_DM0	PS_DDR_DM0_502	A1
DDR3_DM1	PS_DDR_DM1_502	F1
DDR3_DM2	PS_DDR_DM2_502	T1
DDR3_DM3	PS_DDR_DM3_502	Y1
DDR3_A0	PS_DDR_A0_502	N2
DDR3_A1	PS_DDR_A1_502	K2
DDR3_A2	PS_DDR_A2_502	M3
DDR3_A3	PS_DDR_A3_502	K3
DDR3_A4	PS_DDR_A4_502	M4
DDR3_A5	PS_DDR_A5_502	L1
DDR3_A6	PS_DDR_A6_502	L4
DDR3_A7	PS_DDR_A7_502	K4
DDR3_A8	PS_DDR_A8_502	K1
DDR3_A9	PS_DDR_A9_502	J4

DDR3_A10	PS_DDR_A10_502	F5
DDR3_A11	PS_DDR_A11_502	G4
DDR3_A12	PS_DDR_A12_502	E4
DDR3_A13	PS_DDR_A13_502	D4
DDR3_A14	PS_DDR_A14_502	F4
DDR3_BA0	PS_DDR_BA0_502	L5
DDR3_BA1	PS_DDR_BA1_502	R4
DDR3_BA2	PS_DDR_BA2_502	J5
DDR3_S0	PS_DDR_CS_B_502	N1
DDR3_RAS	PS_DDR_RAS_B_502	P4
DDR3_CAS	PS_DDR_CAS_B_502	P5
DDR3_WE	PS_DDR_WE_B_502	M5
DDR3_ODT	PS_DDR_ODT_502	N5
DDR3_RESET	PS_DDR_DRST_B_502	B4
DDR3_CLK0_P	PS_DDR_CKP_502	L2
DDR3_CLK0_N	PS_DDR_CKN_502	M2
DDR3_CKE	PS_DDR_CKE_502	N3

Filaṣi QSPI

Igbimọ FPGA mojuto AC7Z010 ni ipese pẹlu ọkan 256MBit Quad-SPI FLASH chip, awoṣe filasi jẹ W25Q256FVEI, eyiti o nlo 3.3V CMOS voltage boṣewa. Nitori ẹda ti kii ṣe iyipada ti QSPI FLASH, o le ṣee lo bi ẹrọ bata fun eto lati tọju aworan bata ti eto naa. Awọn aworan wọnyi ni akọkọ pẹlu FPGA bit files, koodu ohun elo ARM, ati data olumulo miiran files. Awọn awoṣe pato ati awọn paramita ti o ni ibatan ti QSPI FLASH ti han ni Tabili 2-4-1.

Ipo	Awoṣe	Agbara	Ile-iṣẹ
U15	W25Q256FVEI	32M Baiti	Winbond

Table 2-4-1: QSPI FLASH Specification
QSPI FLASH ti sopọ si ibudo GPIO ti BANK500 ni apakan PS ti chirún ZYNQ. Ninu apẹrẹ eto, awọn iṣẹ ibudo GPIO ti awọn ebute PS wọnyi nilo lati tunto bi wiwo QSPI FLASH. olusin 2-4-1 fihan QSPI Flash ni sikematiki.

Ṣe atunto awọn iṣẹ iyansilẹ pin chip:

Orukọ ifihan agbara	Orukọ Pin ZYNQ	Nọmba Pin ZYNQ
QSPI_SCK	PS_MIO6_500	A5
QSPI_CS	PS_MIO1_500	A7
QSPI_D0	PS_MIO2_500	B8
QSPI_D1	PS_MIO3_500	D6
QSPI_D2	PS_MIO4_500	B7
QSPI_D3	PS_MIO5_500	A6

Aago iṣeto ni

AC7Z010 mojuto ọkọ pese ohun ti nṣiṣe lọwọ aago fun PS eto, ki PS eto le ṣiṣẹ ominira.
PS eto aago orisun
Chirún ZYNQ n pese titẹ sii aago 33.333333MHz fun apakan PS nipasẹ okuta momọ X1 lori igbimọ mojuto. Iṣagbewọle aago naa ni asopọ si pin PS_CLK_500 ti ZYNQ chip BANK500. Aworan atọka rẹ ti han ni Nọmba 2-5-1:

Iṣẹ iyansilẹ pin aago:

Orukọ ifihan agbara	ZYNQ Pin
PS_CLK_500	E7

Ibi ti ina elekitiriki ti nwa
Ipese agbara voltage ti AC7Z010 mojuto ọkọ ni DC5V, eyi ti o ti pese nipa siṣo awọn ti ngbe ọkọ. Ni afikun, agbara BANK34 ati BANK35 tun pese nipasẹ igbimọ ti ngbe. Aworan atọka ti apẹrẹ ipese agbara lori igbimọ mojuto jẹ afihan ni Nọmba 2-6-1:

Igbimọ idagbasoke FPGA ni agbara nipasẹ + 5V, ati pe o yipada si + 1.0V, + 1.8V, + 1.5V, + 3.3V awọn ipese agbara mẹrin nipasẹ awọn eerun agbara DC / DC mẹrin. Iwajade lọwọlọwọ ti + 1.0V le de ọdọ 6A, + 1.8V ati + 1.5V agbara agbara lọwọlọwọ jẹ 3A, + 3.3V lọwọlọwọ lọwọlọwọ jẹ 500mA. J29 tun ni awọn pinni 4 kọọkan lati pese agbara si FPGA BANK34 ati BANK35. Awọn aiyipada ni 3.3V. Awọn olumulo le yi agbara BANK34 ati BANK35 pada nipa yiyipada VCCIO34 ati VCCIO35 lori ẹhin ọkọ ofurufu. 1.5V ṣe agbejade VTT ati VREF voltages ti a beere nipa DDR3 nipasẹ TI ká TPS51206. Awọn iṣẹ ti pinpin agbara kọọkan ni a fihan ni tabili atẹle:

Ibi ti ina elekitiriki ti nwa	Išẹ
+ 1.0V	ZYNQ PS ati PL apakan Core Voltage
+ 1.8V	ZYNQ PS ati PL apa oluranlowo voltage BANK501 IO voltage
+ 3.3V	ZYNQ Bank0,Bank500,QSIP FLASH aago Crystal

+ 1.5V	DDR3, ZYNQ Bank501
VREF, VTT(+0.75V)	DDR3
VCCIO34/35	Bank34, Bank35

Nitoripe ipese agbara ti ZYNQ FPGA ni awọn ibeere ti o ni agbara-lori, ninu apẹrẹ Circuit, a ti ṣe apẹrẹ gẹgẹbi awọn ibeere agbara ti ërún. Agbara-lori ọkọọkan jẹ + 1.0V-> + 1.8V-> (+ 1.5 V, + 3.3V, VCCIO) Circuit oniru lati rii daju awọn deede isẹ ti awọn ërún. Nitoripe awọn ipele ipele ti BANK34 ati BANK35 jẹ ipinnu nipasẹ ipese agbara ti a pese nipasẹ igbimọ ti ngbe, ti o ga julọ jẹ 3.3V. Nigbati o ba ṣe apẹrẹ igbimọ ti ngbe lati pese agbara VCCIO34 ati VCCIO35 fun igbimọ mojuto, ọna-agbara ni o lọra ju + 5V.

AC7Z010 mojuto Board Iwon Dimension

Board to Board Connectors pin iyansilẹ
Awọn mojuto ọkọ ni o ni a lapapọ ti meji ga-iyara imugboroosi ebute oko. O nlo meji 120-pin inter-board asopo (J29/J30) lati sopọ si awọn ti ngbe ọkọ. Aaye PIN ti igbimọ si asopo igbimọ jẹ 0.5mm, laarin wọn, J29 ti sopọ si agbara 5V, titẹ agbara VCCIO, diẹ ninu awọn ifihan agbara IO ati J.TAG awọn ifihan agbara, ati J30 ti sopọ si awọn ti o ku IO awọn ifihan agbara ati MIO. Ipele IO ti BANK34 ati BANK35 le yipada nipasẹ satunṣe titẹ sii VCCIO lori asopo, ipele ti o ga julọ ko kọja 3.3V. Igbimọ gbigbe AX7Z010 ti a ṣe apẹrẹ jẹ 3.3V nipasẹ aiyipada. Ṣe akiyesi pe IO ti BANK13 kii ṣe

Pin iṣẹ iyansilẹ ti ọkọ si ọkọ asopo J29

J29 Pin	Ifihan agbara  Oruko	ZYNQ Pin Nọmba	J29 Pin	Orukọ ifihan agbara	ZYNQ Pin Nọmba
1	VCC5V	–	2	VCC5V	–
3	VCC5V	–	4	VCC5V	–
5	VCC5V	–	6	VCC5V	–
7	VCC5V	–	8	VCC5V	–
9	GND	–	10	GND	–
11	VCCIO_34	–	12	VCCIO_35	–
13	VCCIO_34	–	14	VCCIO_35	–
15	VCCIO_34	–	16	VCCIO_35	–
17	VCCIO_34	–	18	VCCIO_35	–
19	GND	–	20	GND	–
21	IO34_L10P	V15	22	IO34_L7P	Y16
23	IO34_L10N	W15	24	IO34_L7N	Y17
25	IO34_L15N	U20	26	IO34_L17P	Y18
27	IO34_L15P	T20	28	IO34_L17N	Y19
29	GND	–	30	GND	–
31	IO34_L9N	U17	32	IO34_L8P	W14
33	IO34_L9P	T16	34	IO34_L8N	Y14
35	IO34_L12N	U19	36	IO34_L3P	U13
37	IO34_L12P	U18	38	IO34_L3N	V13
39	GND	–	40	GND	–
41	IO34_L14N	P20	42	IO34_L21N	V18
43	IO34_L14P	N20	44	IO34_L21P	V17
45	IO34_L16N	W20	46	IO34_L18P	V16
47	IO34_L16P	V20	48	IO34_L18N	W16
49	GND	–	50	GND	–
51	IO34_L22N	W19	52	IO34_L23P	N17
53	IO34_L22P	W18	54	IO34_L23N	P18
55	IO34_L20N	R18	56	IO34_L13N	P19
57	IO34_L20P	T17	58	IO34_L13P	N18
59	GND	–	60	GND	–

61	IO34_L19N	R17	62	IO34_L11N	U15
63	IO34_L19P	R16	64	IO34_L11P	U14
65	IO34_L24P	P15	66	IO34_L5N	T15
67	IO34_L24N	P16	68	IO34_L5P	T14
69	GND	–	70	GND	–
71	IO34_L4P	V12	72	IO34_L2N	U12
73	IO34_L4N	W13	74	IO34_L2P	T12
75	IO34_L1P	T11	76	IO34_L6N	R14
77	IO34_L1N	T10	78	IO34_L6P	P14
79	GND	–	80	GND	–
81	IO13_L13P	Y7	82	IO13_L21P	V11
83	IO13_L13N	Y6	84	IO13_L21N	V10
85	IO13_L11N	V7	86	IO13_L14N	Y8
87	IO13_L11P	U7	88	IO13_L14P	Y9
89	GND	–	90	GND	–
91	IO13_L19N	U5	92	IO13_L22N	W6
93	IO13_L19P	T5	94	IO13_L22P	V6
95	IO13_L16P	W10	96	IO13_L15P	V8
97	IO13_L16N	W9	98	IO13_L15N	W8
99	GND	–	100	GND	–
101	IO13_L17P	U9	102	IO13_L20P	Y12
103	IO13_L17N	U8	104	IO13_L20N	Y13
105	IO13_L18P	W11	106	IO13_L12N	U10
107	IO13_L18N	Y11	108	IO13_L12P	T9
109	GND	–	110	GND	–
111	FPGA_TCK	F9	112	VP	K9
113	FPGA_TMS	J6	114	VN	L10
115	FPGA_TDO	F6	116	PS_POR_B	C7
117	FPGA_TDI	G6	118	FPGA_DONE	R11

Pin iṣẹ iyansilẹ ti ọkọ si ọkọ asopo J30

J30 Pin	Orukọ ifihan agbara	ZYNQ Pin Nọmba	J30 Pin	Orukọ ifihan agbara	ZYNQ Nọmba PIN
1	IO35_L1P	C20	2	IO35_L15N	F20

3	IO35_L1N	B20	4	IO35_L15P	F19
5	IO35_L18N	G20	6	IO35_L5P	E18
7	IO35_L18P	G19	8	IO35_L5N	E19
9	GND	T13	10	GND	T13
11	IO35_L10N	J19	12	IO35_L3N	D18
13	IO35_L10P	K19	14	IO35_L3P	E17
15	IO35_L2N	A20	16	IO35_L4P	D19
17	IO35_L2P	B19	18	IO35_L4N	D20
19	GND	T13	20	GND	T13
21	IO35_L8P	M17	22	IO35_L9N	L20
23	IO35_L8N	M18	24	IO35_L9P	L19
25	IO35_L7P	M19	26	IO35_L6P	F16
27	IO35_L7N	M20	28	IO35_L6N	F17
29	GND	T13	30	GND	T13
31	IO35_L17N	H20	32	IO35_L16N	G18
33	IO35_L17P	J20	34	IO35_L16P	G17
35	IO35_L19N	G15	36	IO35_L13N	H17
37	IO35_L19P	H15	38	IO35_L13P	H16
39	GND	T13	40	GND	T13
41	IO35_L12N	K18	42	IO35_L14N	H18
43	IO35_L12P	K17	44	IO35_L14P	J18
45	IO35_L24N	J16	46	IO35_L20P	K14
47	IO35_L24P	K16	48	IO35_L20N	J14
49	GND	T13	50	GND	T13
51	IO35_L21N	N16	52	IO35_L11P	L16
53	IO35_L21P	N15	54	IO35_L11N	L17
55	IO35_L22N	L15	56	IO35_L23P	M14
57	IO35_L22P	L14	58	IO35_L23N	M15
59	GND	T13	60	GND	T13
61	PS_MIO22	B17	62	PS_MIO50	B13
63	PS_MIO27	D13	64	PS_MIO45	B15
65	PS_MIO23	D11	66	PS_MIO46	D16
67	PS_MIO24	A16	68	PS_MIO41	C17
69	GND	T13	70	GND	T13
71	PS_MIO25	F15	72	PS_MIO7	D8
73	PS_MIO26	A15	74	PS_MIO12	D9

75	PS_MIO21	F14	76	PS_MIO10	E9
77	PS_MIO16	A19	78	PS_MIO11	C6
79	GND	T13	80	GND	T13
81	PS_MIO20	A17	82	PS_MIO9	B5
83	PS_MIO19	D10	84	PS_MIO14	C5
85	PS_MIO18	B18	86	PS_MIO8	D5
87	PS_MIO17	E14	88	PS_MIO0	E6
89	GND	T13	90	GND	T13
91	PS_MIO39	C18	92	PS_MIO13	E8
93	PS_MIO38	E13	94	PS_MIO47	B14
95	PS_MIO37	A10	96	PS_MIO48	B12
97	PS_MIO28	C16	98	PS_MIO49	C12
99	GND	T13	100	GND	T13
101	PS_MIO35	F12	102	PS_MIO52	C10
103	PS_MIO34	A12	104	PS_MIO51	B9
105	PS_MIO33	D15	106	PS_MIO40	D14
107	PS_MIO32	A14	108	PS_MIO44	F13
109	GND	T13	110	GND	T13
111	PS_MIO31	E16	112	PS_MIO15	C8
113	PS_MIO36	A11	114	PS_MIO42	E12
115	PS_MIO29	C13	116	PS_MIO43	A9
117	PS_MIO30	C15	118	PS_MIO53	C11
119	QSPI_D3_PS_MIO5	A6	120	QSPI_D2_PS_MIO4	B7

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