Intel OCT FPGA IP

OCT Intel FPGA IP e u lumella ho lekanya I/O ka matla mabapi le mohanyetsi oa kantle. OCT IP e ntlafatsa botšepehi ba matšoao, e fokotsa sebaka sa boto, 'me ea hlokahala bakeng sa ho buisana le lisebelisoa tse ka ntle tse kang li-memory interfaces. OCT IP e fumaneha bakeng sa lisebelisoa tsa Intel Stratix® 10, Intel Arria® 10, le Intel Cyclone® 10 GX. Haeba u falla ho tloha ho lisebelisoa tsa Stratix V, Arria V, le Cyclone V, u lokela ho falla IP. Bakeng sa lintlha tse ling, sheba lintlha tse amanang le tsona.

Lintlha Tse Amanang

• Ho fallisetsa ALTOCT IP ea hau ho OCT Intel FPGA IP leqepheng la 13
  • E fana ka mehato ea ho fallisetsa ALTOCT IP ea hau motheong oa OCT IP.
• Dynamic Calibrated On-Chip Termination (ALTOCT) IP Core User Guide
  • E fana ka tlhahisoleseling mabapi le motheo oa IP oa ALTOCT.
• Kenyelletso ea Intel FPGA IP Cores
  • E fana ka tlhaiso-leseling e akaretsang mabapi le li-cores tsohle tsa Intel FPGA IP, ho kenyelletsa le parameterizing, ho hlahisa, ho ntlafatsa, le ho etsisa li-cores tsa IP.
• Ho theha Lingoliloeng tsa Ketsiso tsa IP le Platform Designer-Ikemetseng
  • Etsa mongolo oa papiso o sa hlokeng lintlafatso tsa software kapa lintlafatso tsa mofuta oa IP.
• Mekhoa e Metle ea Tsamaiso ea Morero
  • Litaelo tsa taolo e nepahetseng le ho nkeha habonolo ha projeke ea hau le IP files.
• OCT Intel FPGA IP User Guide Archives leqepheng la 13
  • E fana ka lethathamo la litataiso tsa basebelisi bakeng sa liphetolelo tse fetileng tsa OCIntel FPGA IP.

OCT Intel FPGA IP Features

OCT IP e tšehetsa likarolo tse latelang

• Ts'ehetso bakeng sa li-block tsa 12 on-chip terminations (OCT).
• Ts'ehetso bakeng sa ho felisoa ha letoto la li-chip (RS) le calibrated on-chip parallel termination (RT) ho lithakhisa tsohle tsa I/O
• Litefiso tse lekantsoeng tsa ho emisa tsa 25 Ω le 50 Ω
• Ts'ehetso ea ho lekanya OCT ka mekhoa ea ho eketsa matla le ea mosebelisi

OCT Intel FPGA IP Overview

Setšoantšo sa OCT IP sa boemo bo holimo

Palo ena e bonts'a setšoantšo sa boemo bo holimo ba OCT IP.

Likarolo tsa IP tsa OCT

Karolo	Tlhaloso
Setšoantšo sa RZQ	Pini e nang le merero e 'meli. Ha e sebelisoa le OCT, pinana e hokahana le mohanyetsi oa kantle oa referense ho bala likhoutu tsa calibration ho kenya ts'ebetsong pherekano e hlokahalang.
OCT thibela	E hlahisa le ho romela mantsoe a khoutu ea calibration ho li-block tsa I/O.
Tlhaloso ea OCT	E amohela mantsoe a khoutu ea calibration ka tatellano ho tsoa ho block ea OCT ebe e romella mantsoe a khoutu ea calibration ka ho tsamaisana le li-buffers.

Setšoantšo sa RZQ

Sebaka se seng le se seng sa OCT se na le phini e le 'ngoe ea RZQ.

• Lithakhisa tsa RZQ ke lithakhisa tse nang le merero e 'meli. Haeba lithakhisa li sa hokahane le boloko ba OCT, u ka sebelisa lithakhisa joalo ka lithakhisa tsa kamehla tsa I/O.
• Lithako tse lekantsoeng li tlameha ho ba le molumo o tšoanang oa VCCIOtage le thibela ea OCT le pinana ea RZQ. Lithakhisa tse lekantsoeng tse hokahantsoeng le bolokong bo tšoanang ba OCT li tlameha ho ba le letoto le ts'oanang la boleng le boleng bo tšoanang ba ho felisa.
• U ka sebelisa litšitiso tsa sebaka ho lithapo tsa RZQ ho fumana hore na ho behoa ha OCT thibela hobane pinana ea RZQ e ka kopanngoa feela le thibela ea eona ea OCT.

OCT Block

Thibelo ea OCT ke karolo e hlahisang likhoutu tsa calibration ho felisa I/Os. Nakong ea ho lekanya, OCT e ts'oana le tšitiso e bonoang ho mohanyetsi oa kantle ka boema-kepe ba rzqin. Ebe, block ea OCT e hlahisa mantsoe a mabeli a khoutu ea 16-bit - lentsoe le le leng le lekanya ho felisoa ha letoto mme lentsoe le leng le lekanya pheliso e tšoanang. Bese e inehetseng e romella mantsoe ka tatellano ho mohopolo oa OCT.

Tlhaloso ea OCT

Sebaka sa OCT se romella mantsoe a khoutu ea calibration ka tatellano ho logic ea OCT ka li-port tsa ser_data. Letšoao la ense, ha le hlohlelletsoa, ​​​​le totobatsa hore na OCT e thibela ho tsoa hokae ho bala mantsoe a khoutu ea calibration. Mantsoe a khoutu ea calibration ebe a bolokoa ho serial-to parallel shift logic. Kamora moo, lets'oao la s2pload le ipapisa le ho romella mantsoe a khoutu ea calibration ka ho bapa le li-buffers tsa I/O. Mantsoe a khoutu ea calibration a kenya tšebetsong kapa a tima li-transistors ka har'a block ea I / O, e tla etsisa letoto kapa khanyetso e ts'oanang ho tsamaisana le impedance.

Litaba tsa ka hare tsa OCT Logic

OCT Intel FPGA IP Tlhaloso ea Mosebetsi

Ho kopana le litlhaloso tsa memori ea DDR, Intel Stratix 10, Intel Arria 10, le lisebelisoa tsa Intel Cyclone 10 GX li tšehetsa ho felisoa ha li-on-chip series (RS OCT) le on-chip parallel termination (RT OCT) bakeng sa litekanyetso tsa I/O tse sa feleng. OCT e ka tšehetsoa bankeng efe kapa efe ea I/O. VCCIO e tlameha ho lumellana le li-I/O tsohle bankeng e fanoeng. Ka sesebelisoa sa Intel Stratix 10, Intel Arria 10, kapa Intel Cyclone 10 GX, ho na le block e le 'ngoe ea OCT bankeng ka 'ngoe ea I/O. Sebaka se seng le se seng sa OCT se hloka setsoalle le mohanyetsi oa kantle oa 240 Ω ka phini ea RZQ.

Pini ea RZQ e arolelana phepelo e tšoanang ea VCCIO le banka ea I / O moo pin e leng teng. Pini ea RZQ ke pini ea I/O e habeli eo u ka e sebelisang e le I/O e tloaelehileng haeba u sa sebelise calibration ea OCT. Ha o sebelisa pinana ea RZQ bakeng sa ho lekanya OCT, phini ea RZQ e hokela block ea OCT fatše ka sehanyetsi sa kantle sa 240 Ω. Lipalo tse latelang li bontša hore na li-OCT li hokahane joang kholumong e le 'ngoe ea I/O (ka ketane ea daisy). OCT e ka lekanya I/O ea banka efe kapa efe, ha feela banka e le kholomong e le 'ngoe mme e kopana le vol.tage litlhoko. Hobane ha ho na likhokahano lipakeng tsa likholomo, OCT e ka arolelanoa feela haeba likhoele e le tsa kholomo e tšoanang ea I/O ea OCT.

Lihokelo tsa OCT Bank-to-Bank

Likholomo tsa I/O ho Intel Quartus® Prime Pin Planner

Palo ena ke example. Sebopeho se fapana pakeng tsa lisebelisoa tse fapaneng tsa Intel Stratix 10, Intel Arria 10, kapa Intel Cyclone 10 GX.

Li-interfaces tsa Mokhoa oa ho Matlafatsa

OCT IP ka mokhoa oa matla-up e na le li-interfaces tse peli tse kholo

• Sebopeho se le seng sa ho kenya se kopanyang FPGA RZQ pad ho OCT block
• Mantsoe a mabeli a 16-bit a hlahisoang a hokahanyang le li-buffers tsa I/O

OCT Interfaces

Mokhoa oa mosebelisi OCT

Mokhoa oa mosebelisi OCT o sebetsa ka mokhoa o ts'oanang le mokhoa oa OCT oa ho eketsa matla, ka tlatsetso ea taolo ea mosebelisi.

Lipontšo tsa FSM

Palo ena e bonts'a mochini o lekanyelitsoeng (FSM) ka har'a mantlha o laola matšoao a basebelisi ba inehetseng ho OCT block. FSM e netefatsa hore block ea OCT e lokisa kapa e romella mantsoe a khoutu ea taolo ho latela kopo ea hau.

Fitter ha e bue ka mokhoa oa mosebelisi OCT. Haeba u batla hore OCT block ea hau e sebelise mokhoa oa mosebelisi sebopeho sa OCT, o tlameha ho hlahisa OCT IP. Leha ho le joalo, ka lebaka la mefokolo ea lisebelisoa, o ka sebelisa OCT IP e le 'ngoe feela ka mokhoa oa mosebedisi OCT moqapong oa hau.

Hlokomela: OCT IP e le 'ngoe e ka laola ho fihla ho 12 OCT blocks.

FSM e fana ka matšoao a latelang

• oache
• tsosolosa
• s2 kenya
• calibration_sebetsa
• calibration_shift_ busy
• kopo ya_calibration

Hlokomela: Lipontšo tsena li fumaneha feela ka mokhoa oa mosebelisi eseng mokhoa oa ho eketsa matla.

Lintlha Tse Amanang

OCT Intel FPGA IP Lipontšo.
E fana ka lintlha tse ling mabapi le matšoao a FSM.

Boholo ba FSM

Phallo ea FSM

Linaha tsa FSM

Naha	Tlhaloso
IDLE	Ha u seta vector ea calibration_request, FSM e tloha sebakeng sa IDLE ho ea sebakeng sa CAL. Boloka calibration_request vector ka boleng ba eona bakeng sa lipotoloho tse peli tsa oache. Kamora 'lipotoloho tse peli tsa oache, FSM e na le kopi ea vector. U tlameha ho seta vector botjha ho qoba ho kgutlisa tshebetso ya ho lekanya hape.
KALA	Nakong ena, FSM e hlahloba hore na ho na le li-bits ho calibration_request vector e ileng ea tiisoa 'me ea ba thusa. Li-block tsa OCT tse tsamaellanang li qala ts'ebetso ea ho lekanya e nkang nako e ka bang 2,000 XNUMX ea lioache ho phethela. Kamora hore calibration e phethe, lets'oao la calibration_busy le tla lokolloa.
Sheba karolo ea mask	FSM e hlahloba karolo e 'ngoe le e' ngoe ka har'a vector hore na bit e setiloe kapa che.

Naha	Tlhaloso
Shift Mask hanyane	Naha ena e ts'oara likotoana tsohle tsa vector ho fihlela e otla 1.
Series Shift	Naha ena ka tatellano e romella khoutu ea ho emisa ho tloha ho block ea OCT ho ea ho logic ea pheliso. Ho nka lipotoloho tse 32 ho phethela phetiso. Ka mor'a phetiso e 'ngoe le e' ngoe, FSM e hlahloba hore na ho na le likotoana life kapa life tse ntseng li le teng ka har'a vector le ho li sebeletsa ka nepo.
Update Pending Bit	Ngoliso e ntseng e emetse e na le likotoana tse tsamaellanang le boloko bo bong le bo bong ba OCT ho OCT Intel FPGA IP. Naha ena e nchafatsa rejisetara e ntseng e emetse ka ho hlophisa bocha kopo e sebelitsoeng.
QETILE	Ha lets'oao la calibration_shift_busy le tlositsoe, u ka bolela hore s2pload e ikemela ka bo eona ho fetisetsa likhoutu tse ncha tsa pheliso ho li-buffers. Letšoao la s2pload le bolela bonyane 25 ns. Ka lebaka la mefokolo ea hardware, u ke ke ua kopa ho lekanyetsoa ho hong ho fihlela likotoana tsohle li kena calibration_shift_busy vector e tlase.

OCT Intel FPGA IP Design Example

OCT IP e ka hlahisa mohlala oa moraloample e lumellanang le tlhophiso e tšoanang e khethiloeng bakeng sa IP. Moqapi example ke moralo o bonolo o sa shebaneng le ts'ebeliso efe kapa efe e khethehileng. U ka sebelisa ex designample e le sesupo sa mokhoa oa ho kenya IP. Ho hlahisa moralo example files, bulela Hlahisa Example Khetho ea Moqapi lebokoseng la puisano la Generation nakong ea tlhahiso ea IP.

Hlokomela: OCT IP ha e tšehetse tlhahiso ea VHDL.

• Software e etsa tlhahiso ea _mohlample_design directory hammoho le IP, moo ke lebitso la IP ea hau.
• The _mohlample_design directory e na le mengolo ea make_qii_design.tcl.
• The .qsys files ke tsa tšebeliso ea ka hare nakong ea moralo example moloko feela. Ha o khone ho edita files.

Ho hlahisa Intel Quartus® Prime Design Example

Sengoliloeng sa make_qii_design.tcl se hlahisa moetso o entsoeng ka boholoample hammoho le projeke ea Intel Quartus® Prime, e loketseng ho hlophisoa. Ho hlahisa moetso oa maiketsetso oa example, latela mehato ena.

1. Ka mor'a ho hlahisa IP hammoho le moqapi oa example files, tsamaisa mongolo o latelang ka taelo ea taelo: quartus_sh -t make_qii_design.tcl.
2. Haeba u batla ho hlakisa sesebelisoa se nepahetseng seo u ka se sebelisang, sebelisa taelo e latelang: quartus_sh -t make_qii_design.tcl .

Mongolo o hlahisa bukana ea qii e nang le morero oa ed_synth.qpf file. U ka bula le ho bokella morero ona ho Intel Quartus Prime software.

OCT Intel FPGA IP References

OCT Intel FPGA IP Parameter Litlhophiso

OCT IP Parameters

Lebitso	Boleng	Tlhaloso
Palo ea li-block tsa OCT	1 ho ea ho 12	E hlalosa palo ea li-block tsa OCT tse lokelang ho etsoa. Boleng ba kamehla ke 1.
Sebelisa mabitso a li-port a tsamaellanang ka morao	On E tima	Sheba sena ho sebelisa mabitso a maemo a holimo a khale a tsamaellanang le ALTOCT IP. Paramethara ena e timisitsoe ke kamehla.
Mokhoa oa OCT	Matlafatsa Mosebedisi	E totobatsa hore na OCT e khona ho laoleha kapa che. Boleng ba kamehla ke Matlafatsoa.
OCT thibela x mokhoa oa ho lekanya	Motho a le mong Habedi POD	E hlalosa mokhoa oa calibration bakeng sa OCT. X e lumellana le palo ea block ea OCT. Boleng ba kamehla ke Motho a le mong.

OCT Intel FPGA IP Lipontšo

Input Interface Signals

Lebitso la Letshwao	Tataiso	Tlhaloso
rzqin	Kenyeletso	Khokahano ea ho kenya ho tloha ho RZQ pad ho ea ho block ea OCT. RZQ pad e hokahane le khanyetso ea kantle. Sebaka sa OCT se sebelisa impedance e amanang le boema-kepe ba rzqin e le sesupo sa ho hlahisa khoutu ea calibration. Letšoao lena le fumaneha bakeng sa mekhoa ea ho eketsa matla le ea basebelisi.
oache	Kenyeletso	Oache ea ho kenya bakeng sa mokhoa oa mosebelisi OCT. Oache e tlameha ho ba 20 MHz kapa ka tlase.
tsosolosa	Kenyeletso	Letšoao la ho seta bocha. Ho seta bocha hoa lumellana.
kopo ya_calibration	Kenyeletso	Kenya vector bakeng sa [NUMBER_OF_OCT:0]. Karolo e 'ngoe le e' ngoe e tsamaisana le block ea OCT. Ha hanyane e behiloe ho 1, OCT e tsamaellanang e lekanya, ebe o fetola lentsoe la khoutu ka har'a block logic ea ho felisa. Kopo e tlameha ho tšoaroa bakeng sa lipotoloho tse peli tsa oache. Ka lebaka la mefokolo ea lisebelisoa, u tlameha ho ema ho fihlela calibration_shift_busy vector e be zero ho fihlela kopo e 'ngoe e fanoa; ho seng joalo kopo ea hau e ke ke ea sebetsoa.
calibration_shift_ busy	Sephetho	Vector ea tlhahiso bakeng sa [NUMBER_OF_OCT:0] e bonts'ang hore na ke boloko bofe ba OCT bo sebetsang hona joale ho lekanya le ho suthisetsa li-code tsa ho emisa ho logic logic block. Ha hanyane e le 1, e bonts'a hore block ea OCT e ntse e leka-lekanya le ho fetola lentsoe la khoutu ho thibela logic block.
calibration_sebetsa	Sephetho	Vector e hlahisoang ke [NUMBER_OF_OCT:0] e bonts'ang hore na ke boloko bofe ba OCT bo ntseng bo sebetsa ho lekanya. Ha hanyane e le 1, e bontša hore block ea OCT e ntse e lekanngoa
oct_ _series_termination control[15:0]	Sephetho	16-bit e hlahisoang ke letšoao, ka ho tloha ho 0 ho isa ho 11. Letšoao lena le hokahana le letoto la taolo ea pheliso ea letoto ho buffer ea ho kenya / sephetho. Boema-kepe bona bo romella letoto la khoutu ea ho emisa e lekanyang Rs.
oct_ _parallel_termination_ control[15:0]	Sephetho	16-bit e hlahisoang ke letšoao, ka ho tloha ho 0 ho ea ho 11. Letšoao lena le hokahana le boema-kepe ba taolo ea pheliso e ts'oanang ho buffer ea ho kenya / sephetho. Boema-kepe bona bo romella khoutu e bapileng ea ho emisa e lekanyang Rt.

Likabelo tsa QSF

Intel Stratix 10, Intel Arria 10, le Intel Cyclone 10 GX lisebelisoa li na le litlhophiso tse latelang tsa Intel Quartus Prime tse amanang le ho felisoa. file (.qsf) likabelo:

• INPUT_TERMINATION
• OUTPUT_TERMINATION
• TERMINATION_CONTROL_BLOCK
• RZQ_GROUP

Likabelo tsa QSF

Mosebetsi oa QSF	Lintlha
INPUT_TERMINATION OUTPUT_TERMINATION	Mosebetsi wa ho kgaotsa ho kenya/sephetho o totobatsa boleng ba ho kgaotsa ho ohm ho phini e potsoeng. ExampLe:
	set_instance_assignment -lebitso INPUT_TERMINATION -ho set_instance_assignment -lebitso OUTPUT_TERMINATION -ho
	Ho nolofalletsa li-port tsa ho emisa letoto la li-parallel, kenyelletsa likabelo tsena, tse hlakisang letoto le litekanyetso tse tšoanang tsa ho emisa bakeng sa liphini. Etsa bonnete ba hore o hokela letoto la taolo ea ho emisa le likou tsa taolo ea pheliso e tšoanang ho tloha ho OCT Intel FPGA IP ho ea ho GPIO Intel FPGA IP. ExampLe:
	set_instance_assignment -name INPUT_TERMINATION “PARALLEL OHM LE CALIBRATION” -ho set_instance_assignment -name OUTPUT_TERMINATION “SERIES OHM LE CALIBRATION” -ho
TERMINATION_CONTROL_BL OCK	E tsamaisa Fitter ho etsa khokahano e nepahetseng ho tloha ho block ea OCT e lakatsehang ho ea ho lithapo tse boletsoeng. Mosebetsi ona o na le thuso ha li-buffers tsa I/O li sa hlahisoe ka mokhoa o hlakileng 'me u hloka ho amahanya lithakhisa le "block" e itseng ea OCT. ExampLe:
	set_instance_assignment -lebitso TERMINATION_CONTROL_BLOCK -ho
RZQ_GROUP	Mosebetsi ona o tšehetsoa ka lisebelisoa tsa Intel Stratix 10, Intel Arria 10, le Intel Cyclone 10 GX feela. Mosebetsi ona o theha OCT IP ntle le ho fetola RTL. The Fitter e batla lebitso la rzq pin lethathamong la marang-rang. Haeba pini e le sieo, Fitter e etsa lebitso la pini hammoho le OCT IP le likhokahano tsa eona tse tsamaisanang. Sena se o lumella ho theha sehlopha sa li-pins tse tla lekanyetsoa ke OCT e teng kapa e seng teng mme Fitter e netefatsa bonnete ba moralo. ExampLe:
	set_instance_assignment -name RZQ_GROUP -ho

Pheliso e ka ba teng ho li-buffers tsa ho kenya le ho tsoa, ​​​​'me ka linako tse ling ka nako e le ngoe. Ho na le mekhoa e 'meli ea ho hokahanya lihlopha tsa pin le block ea OCT:

• Sebelisa mosebetsi oa .qsf ho bontša hore na ke pin (bese) e amanang le boloko ba OCT efe. U ka sebelisa TERMINATION_CONTROL_BLOCK kapa RZQ_GROUP kabelo. Mosebetsi oa pele o amahanya phini le OCT e kentsoeng ho RTL ha ea morao-rao e amahanya phini le OCT e sa tsoa thehoa ntle le ho fetola RTL.
• Kenya li-buffer primitives tsa I/O maemong a holimo 'me u li hokahanye le li-block tsa OCT tse nepahetseng.

Hlokomela: Libanka tsohle tsa I/O tse nang le VCCIO e tšoanang li ka arolelana block e le 'ngoe ea OCT le haeba banka eo ea I/O e na le block ea eona ea OCT. O ka hokela palo efe kapa efe ea lithakhisa tsa I/O tse tšehetsang pheliso e lekantsoeng ho block ea OCT. Netefatsa hore o hokahanya li-I/O le tlhophiso e lumellanang le block ea OCT. U tlameha hape ho etsa bonnete ba hore block ea OCT le li-I/O tse tsamaellanang le tsona li na le VCCIO le letoto kapa litekanyetso tse tšoanang tsa ho felisoa. Ka litlhophiso tsena, Fitter e beha block ea I/Os le OCT kholeng e le 'ngoe. Software ea Intel Quartus Prime e hlahisa melaetsa ea temoso haeba ho se na phini e amanang le block.

Phallo ea Phallo ea IP bakeng sa Arria V, Cyclone V, le Stratix V Devices

Phallo ea phalliso ea IP e u lumella ho falla ALTOCT IP ea lisebelisoa tsa Arria V, Cyclone V, le Stratix V ho ea ho OCT Intel FPGA IP ea Intel Stratix 10, Intel Arria 10, kapa lisebelisoa tsa Intel Cyclone 10 GX. Phallo ea phalliso ea IP e lokisa IP ea OCT ho lumellana le litlhophiso tsa ALTOCT IP, e leng se u lumellang hore u tsosolose IP.

Hlokomela: IP ena e ts'ehetsa phallo ea phalliso ea IP ka mokhoa o le mong oa calibration oa OCT feela. Haeba u sebelisa mokhoa oa ho lekanya habeli kapa oa POD, ha ho hlokahale hore u fallele IP.

Ho fallisetsa ALTOCT IP ea hau ho OCT Intel FPGA IP

Ho fallisetsa ALTOCT IP ea hau ho OCT IP, latela mehato ena

1. Bula ALTOCT IP ea hau ho IP Catalog.
2. Lelapeng la lisebelisoa tse khethiloeng hajoale, khetha Stratix 10, Arria 10, kapa Cyclone 10 GX.
3. Tobetsa Qetella ho bula OCT IP ho parameter editor. Mohlophisi oa parameter o lokisa litlhophiso tsa OCT IP tse tšoanang le litlhophiso tsa ALTOCT IP.
4. Haeba ho na le li-setting life kapa life tse sa lumellaneng lipakeng tsa tse peli, khetha li-setting tse ncha tse tšehetsoeng.
5. Tobetsa Qetella ho nchafatsa IP.
6. Kenya sebaka sa hau sa ALTOCT IP ho RTL ka OCT IP.

Hlokomela: Mabitso a boemakepe ba OCT IP a kanna a se ts'oane le mabitso a boema-kepe ba ALTOCT IP. Ka hona, ho fetola feela lebitso la IP hang-hang ha hoa lekana.

OCT Intel FPGA IP User Guide Archives

Haeba mofuta oa IP core o sa thathamisoa, ho sebetsa tataiso ea mosebelisi bakeng sa mofuta o fetileng oa IP.

IP Core Version	Bukana ea Mosebelisi
17.1	Intel FPGA OCT IP Core User Guide

Nalane ea Tokomane ea Tokomane bakeng sa Tataiso ea Mosebelisi ea OCT Intel FPGA IP

Tokomane Version	Intel Quartus Prime Version	IP Version	Liphetoho
2019.07.03	19.2	19.1	Tšehetso e ekelitsoeng bakeng sa lisebelisoa tsa Intel Stratix 10. E ntlafalitse mabitso a latelang a IP: "Intel FPGA OCT" ho "OCT Intel FPGA IP"  "Intel FPGA GPIO" ho "GPIO Intel FPGA IP" E ntlafalitse lets'oao la s2pload: E tlositsoe s2pload ho tsoa ho matšoao a fumanehang a basebelisi. Litlhaloso tse ntlafalitsoeng mabapi le boitšoaro ba lets'oao la s2pload.

 

Letsatsi	Phetolelo	Liphetoho
La 2017 Pulungoana XNUMX	2017.11.06	Tšehetso e ekelitsoeng bakeng sa lisebelisoa tsa Intel Cyclone 10 GX. E rehiloe lebitso la Altera OCT IP core ho Intel FPGA OCT IP core. Qsys e Felletseng ho Moqapi oa Platform. Mongolo o ntlafalitsoeng bakeng sa ntlafatso e eketsehileng ea Intel.
Motšeanong 2017	2017.05.08	E fetoletsoe joalo ka Intel.
Tšitoe 2015	2015.12.07	Maemo a fetotsoeng a "mega function" ho "IP core". Maemo a fetotsoeng a Quartus II ho Quartus Prime. Liphetoho tse fapaneng tsa litaba le likhokahano ho ntlafatsa setaele le ho hlaka.
Phato, 2014	2014.08.18	Tlhahisoleseding e kenyelelitsoeng mabapi le tlhophiso ea OCT ka mokhoa oa mosebelisi. E ntlafalitse matšoao le liparamente tsa mantlha tsa IP: core_rzqin_export e fetotsoe ho rzqin core_series_termination_control_export e fetotsoe ho oct_ _series_termination control[15:0] core_parallel_termination_control_export e fetotsoe ho oct_ _parallel_termination_control[15:0]
La 2013 Pulungoana XNUMX	2013.11.29	Tokollo ea pele.

ID: 683708
Mofuta: 2019.07.03

Litokomane / Lisebelisoa

Intel OCT FPGA IP [pdf] Bukana ea Mosebelisi OCT FPGA IP, OCT, FPGA IP

Litšupiso

• Bukana ea Mosebelisi