MICROCHIP Costas Loop Itọsọna olumulo
Ọrọ Iṣaaju
Ni gbigbe alailowaya, Atagba (Tx) ati Olugba (Rx) ti yapa nipasẹ ijinna ati iyasọtọ itanna. Paapaa botilẹjẹpe Tx ati Rx mejeeji wa ni aifwy si igbohunsafẹfẹ kanna, aiṣedeede igbohunsafẹfẹ wa laarin awọn igbohunsafẹfẹ ti ngbe nitori iyatọ ppm laarin awọn oscillators ti a lo ninu Tx ati Rx. Aiṣedeede igbohunsafẹfẹ jẹ isanpada nipasẹ lilo iranlọwọ data tabi ti kii ṣe iranlọwọ data (afọju) awọn ọna imuṣiṣẹpọ.
Loop Costas jẹ ọna orisun PLL ti kii ṣe iranlọwọ data fun isanpada aiṣedeede igbohunsafẹfẹ ti ngbe. Ohun elo akọkọ ti awọn lupu Costas wa ni awọn olugba alailowaya. Nipa lilo eyi, aiṣedeede igbohunsafẹfẹ laarin Tx ati Rx jẹ isanpada laisi iranlọwọ ti awọn ohun orin awakọ tabi awọn aami. Costas Loop jẹ imuse fun BPSK ati awọn modulations QPSK pẹlu iyipada ninu idina iṣiro aṣiṣe. Lilo Loop Costas fun ipele tabi amuṣiṣẹpọ igbohunsafẹfẹ le ja si aibikita alakoso, eyiti o gbọdọ ṣe atunṣe nipasẹ awọn ilana bii fifi koodu iyatọ.
Lakotan
Tabili ti o tẹle n pese akopọ ti awọn abuda Loop Costas.
Table 1. Costas Loop abuda
| Ẹya mojuto | Iwe yi kan si Costas Loop v1.0. |
| Awọn idile Ẹrọ atilẹyin |
|
| Atilẹyin Irinṣẹ Sisan | Nilo Libero® SoC v12.0 tabi awọn idasilẹ nigbamii. |
| Iwe-aṣẹ | Costas Loop IP ko RTL jẹ titiipa iwe-aṣẹ ati pe RTL ti paroko wa ni ọfẹ pẹlu iwe-aṣẹ Libero eyikeyi. RTL ti paroko: Pipe koodu RTL ti paroko ti pese fun mojuto, ti o mu ki mojuto le wa ni ese pẹlu Smart Design. Simulation, Synthesis, ati Layout le ṣee ṣe pẹlu sọfitiwia Libero. Ko RTL kuro: Koodu orisun RTL pipe ti pese fun mojuto ati awọn ijoko idanwo. |
Awọn ẹya ara ẹrọ
Costas Loop ni awọn ẹya pataki wọnyi:
- Atilẹyin BPSK ati QPSK modulations
- Awọn paramita lupu Tunable fun iwọn igbohunsafẹfẹ jakejado
Imuse ti IP Core ni Libero® Design Suite
IP mojuto gbọdọ fi sori ẹrọ si Katalogi IP ti sọfitiwia SoC Libero. Eyi ti fi sori ẹrọ laifọwọyi nipasẹ IP
Iṣẹ imudojuiwọn katalogi ninu sọfitiwia SoC Libero, tabi IP mojuto ti wa ni igbasilẹ pẹlu ọwọ lati katalogi naa. Lẹẹkan
IP mojuto ti fi sori ẹrọ ni Libero SoC software IP Catalog, mojuto ti wa ni tunto, ti ipilẹṣẹ, ati instantiated laarin Smart Design ọpa fun ifisi ni Libero ise agbese akojọ.
Lilo Ẹrọ ati Ṣiṣẹ
Awọn tabili atẹle ṣe atokọ ohun elo ẹrọ ti a lo fun Costas Loop.
Table 2. Costas Loop iṣamulo fun QPSK
| Awọn alaye ẹrọ | Oro | Iṣe (MHz) | Awọn Ramu | Math ohun amorindun | Chip Globals | |||
| Idile | Ẹrọ | Awọn LUTs | DFF | LSRAM | μSRAM | |||
| PolarFire® SoC | MPFS250T | 1256 | 197 | 200 | 0 | 0 | 6 | 0 |
| PolarFire | MPF300T | 1256 | 197 | 200 | 0 | 0 | 6 | 0 |
Table 3. Costas Loop iṣamulo fun BPSK
| Awọn alaye ẹrọ | Oro | Iṣe (MHz) | Awọn Ramu | Math ohun amorindun | Chip Globals | |||
| Idile | Ẹrọ | Awọn LUTs | DFF | LSRAM | μSRAM | |||
| PolarFire® SoC | MPFS250T | 1202 | 160 | 200 | 0 | 0 | 7 | 0 |
| Ina pola | MPF300T | 1202 | 160 | 200 | 0 | 0 | 7 | 0 |
Pataki:
- Awọn data ti o wa ninu tabili yii ni a gba pẹlu lilo iṣakojọpọ aṣoju ati awọn eto ifilelẹ. Orisun aago itọkasi CDR ti ṣeto si Ifiṣootọ pẹlu awọn iye atunto miiran ko yipada.
- Aago ti ni ihamọ si 200 MHz lakoko ṣiṣe itupalẹ akoko lati ṣaṣeyọri awọn nọmba iṣẹ.
Apejuwe iṣẹ-ṣiṣe
Abala yii ṣe apejuwe awọn alaye imuse ti Costas Loop.
Nọmba ti o tẹle n ṣe afihan aworan atọka ipele-eto ti Costas Loop.
olusin 1-1. Eto-Ipele Idina aworan ti Costas Loop
Lairi laarin titẹ sii ati abajade ti oke Costas jẹ awọn iyipo aago 11. Iduro THETA_OUT jẹ aago mẹwa 10
awọn iyipo. Kp (iwọn ibakan), Ki (ipin ibakan), ifosiwewe Theta, ati ifosiwewe LIMIT gbọdọ wa ni ipilẹ ni ibamu si agbegbe ariwo ati aiṣedeede igbohunsafẹfẹ ti n ṣafihan. Loop Costas gba akoko diẹ lati tii, bii ninu iṣẹ PLL. Diẹ ninu awọn apo-iwe le sọnu lakoko akoko titiipa akọkọ ti Costas Loop.
Faaji
Imuse Loop Costas nilo awọn bulọọki mẹrin wọnyi:
- Filter Loop (Aṣakoso PI ni imuse yii)
- Theta monomono
- Iṣiro aṣiṣe
- Vector Yiyi
olusin 1-2. Costas Loop Block aworan atọka
Aṣiṣe fun ero iṣatunṣe kan pato jẹ iṣiro da lori yiyi I ati awọn iye Q nipa lilo Module Yiyi Vector. Alakoso PI ṣe iṣiro igbohunsafẹfẹ ti o da lori aṣiṣe, ere iwontunwọnsi Kp, ati ere apapọ Ki. Aiṣedeede igbohunsafẹfẹ ti o pọ julọ ti ṣeto bi iye opin fun iṣelọpọ igbohunsafẹfẹ oludari PI. Theta monomono module gbogbo igun nipasẹ Integration. Iṣagbewọle ifosiwewe theta ṣe ipinnu ite ti iṣọpọ ati gbarale.
lori awọn sampaago ling. Igun ti ipilẹṣẹ lati Theta Generator ni a lo lati yi awọn iye titẹ sii I ati Q. Iṣẹ aṣiṣe jẹ pato si iru awose kan. Bi oluṣakoso PI ti ṣe imuse ni ọna kika ti o wa titi, iwọn-iwọn ni a ṣe lori iwọn ati awọn igbejade ti o jẹ ti oluṣakoso PI.
Bakanna, igbelowọn jẹ imuse fun isọpọ theta.
IP Core Parameters ati Interface Awọn ifihan agbara
Yi apakan ti jiroro awọn paramita ni Costas Loop GUI configurator ati I/O awọn ifihan agbara.
Eto atunto
Tabili ti o tẹle ṣe atokọ apejuwe ti awọn aye atunto ti a lo ninu imuse ohun elo ti Costas Loop. Iwọnyi jẹ awọn paramita jeneriki yatọ gẹgẹ bi ibeere ohun elo naa.
Table 2-1. Paramita iṣeto ni
| Orukọ ifihan agbara | Apejuwe |
| Awose Iru | BPSK tabi QPSK |
Awọn igbewọle ati Awọn ifihan agbara Ijade
Tabili ti o tẹle ṣe atokọ awọn ọna titẹ sii ati awọn ebute oko oju omi ti Costas Loop.
Table 2-2. Awọn ifihan agbara titẹ sii ati Ijade
| Orukọ ifihan agbara | Itọsọna | Iru ifihan agbara | Ìbú | Apejuwe |
| CLK_I | Iṣawọle | — | 1 | Aago ifihan agbara |
| ARST_N_IN | Iṣawọle | — | 1 | Ifihan agbara atunto asynchronous kekere ti nṣiṣe lọwọ |
| I_DATA_IN | Iṣawọle | Ti fowo si | 16 | Ni alakoso / Real data input |
| Q_DATA_IN | Iṣawọle | Ti fowo si | 16 | Quadrature / Iro data Input |
| KP_IN | Iṣawọle | Ti fowo si | 18 | Ibaṣepọ deede ti oludari PI |
| KI_IN | Iṣawọle | Ti fowo si | 18 | Integral ibakan ti PI adarí |
| LIMIT_IN | Iṣawọle | Ti fowo si | 18 | Ifilelẹ fun oluṣakoso PI |
| THETA_FACTOR_IN | Iṣawọle | Ti fowo si | 18 | Theta ifosiwewe fun theta Integration. |
| I_DATA_OUT | Abajade | Ti fowo si | 16 | Ni alakoso / Ijade data gidi |
| Q_DATA_OUT | Abajade | Ti fowo si | 16 | Quadrature / Iro inu data Ijade |
| THETA_OUT | Abajade | Ti fowo si | 10 | Iṣiro atọka Theta (0-1023) fun ijẹrisi naa |
| PI_OUT | Abajade | Ti fowo si | 18 | Ijade PI |
Awọn aworan atọka akoko
Abala yii jiroro lori aworan aago akoko Loop Costas.
Nọmba ti o tẹle n ṣe afihan aworan akoko ti Costas Loop.
olusin 3-1. Costas Loop Time aworan atọka
Testbench
Ijẹẹri iṣọkan kan ni a lo lati rii daju ati idanwo Costas Loop ti a pe ni ibujoko idanwo olumulo. A pese ibujoko idanwo lati ṣayẹwo iṣẹ ṣiṣe ti Costas Loop IP.
Awọn ori ila kikopa
Lati ṣe afarawe mojuto nipa lilo testbench, ṣe awọn igbesẹ wọnyi:
- Ṣii ohun elo Libero SoC, tẹ taabu Catalog, faagun Awọn solusan-Ailowaya, tẹ COSTAS LOOP lẹẹmeji, lẹhinna tẹ O DARA. Awọn iwe ti o ni nkan ṣe pẹlu IP ti wa ni akojọ labẹ Awọn iwe-ipamọ.
Pataki: Ti o ko ba ri taabu Catalog, lilö kiri si View > Akojọ Windows ki o si tẹ Katalogi lati jẹ ki o han.
olusin 4-1. Costas Loop IP Core ni Libero SoC Catalog
- Tunto IP gẹgẹbi fun ibeere rẹ.
olusin 4-2. GUI oluṣeto
Ṣe igbega gbogbo awọn ifihan agbara si ipele oke ati ṣe ipilẹṣẹ apẹrẹ - Lori awọn Stimulus Hierarchy taabu, tẹ Kọ logalomomoise.
olusin 4-3. Kọ Logalomomoise
- Lori awọn Stimulus Hierarchy taabu, tẹ-ọtun testbench (Costas loop bevy), tọka si Ṣiṣe Apẹrẹ Iwaju, lẹhinna tẹ Ṣii Interactively
olusin 4-4. Simulating Pre- Synthesis Design
ModelSim ṣi pẹlu testbench file, bi o ṣe han ninu nọmba atẹle.
olusin 4-5. ModelSim Simulation Window
Pataki: Ti kikopa naa ba ni idilọwọ nitori opin akoko ṣiṣe ti a sọ pato ninu .do file, lo run -all pipaṣẹ lati pari kikopa
Àtúnyẹwò History
Itan atunyẹwo ṣe apejuwe awọn iyipada ti a ṣe imuse ninu iwe-ipamọ naa. Awọn iyipada ti wa ni atokọ nipasẹ atunyẹwo, bẹrẹ pẹlu atẹjade lọwọlọwọ julọ.
Table 5-1. Àtúnyẹwò History
| Àtúnyẹwò | Ọjọ | Apejuwe |
| A | 03/2023 | Itusilẹ akọkọ |
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Ofin Akiyesi
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agbegbe Microchip tita ọfiisi fun afikun support tabi, gba afikun support ni www.microchip.com/en us/support/ design-help/client-support-services.
ALAYE YI NI MICROCHIP “BI O SE WA”. MICROCHIP KO SE Aṣoju TABI ATILẸYIN ỌJA TI IRU KANKAN BOYA KIAKIA TABI TỌRỌ, KỌ TABI ẹnu, Ilana tabi Bibẹkọkọ, ti o jọmọ ALAYE NAA SUGBON KO NI LOPIN SI KANKAN, LATI IKILỌ ỌRỌ, ÀTI IFỌRỌWỌRỌ FUN IDI PATAKI, TABI ATILẸYIN ỌJA TO JEmọ MAJEMU, Didara, TABI Iṣe Rẹ.
LAISI iṣẹlẹ ti yoo ṣe oniduro fun eyikeyi aiṣedeede, PATAKI, ijiya, ijamba, tabi ipadanu, bibajẹ, iye owo, tabi inawo ti eyikeyi iru ohunkohun ti o jọmọ si awọn alaye tabi ti o ti gba, ti o ba ti lo, Ti a gbaniyanju nipa Seese TABI awọn bibajẹ ni o wa tẹlẹ. SI AWỌN NIPA NIPA NIPA TI OFIN, LAPAPA LAPAPO MICROCHIP LORI Gbogbo awọn ẹtọ ni eyikeyi ọna ti o jọmọ ALAYE TABI LILO RE KO NI JU OPO ỌWỌ, TI O BA KAN, PE O TI ṢAN NIPA TODAJU SIROMỌ.
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Didara Management System
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MICROCHIP Costas yipo Management [pdf] Itọsọna olumulo Costas yipo Management, yipo Management, isakoso |