Pusa Meli Client Intel® FPGA IP Fa'amatalaga Fa'amatalaga
Pusa Meli Client Intel® FPGA IP Fa'amatalaga Fa'amatalaga
Intel® Prime Design Suite versions software seia oo i le v19.1. Amata ile Intel Quartus Prime Design Suite software version 19.2, Intel FPGA IP o loʻo iai se polokalame faʻaliliu fou.
FPGA IP versions e fetaui ma le Intel Quartus®
Ole numera ole Intel FPGA IP (XYZ) e mafai ona suia ile Intel Quartus Prime software version. Se suiga i:
- X o loʻo faʻaalia se toe iloiloga tele o le IP. Afai e te faʻafouina le polokalama Intel Quartus Prime, e tatau ona e toe faʻafouina le IP.
- Y faʻaalia le IP e aofia ai foliga fou. Toe fa'afouina lau IP e fa'aofi ai nei foliga fou.
- O le Z o loʻo faʻaalia ai le IP e aofia ai suiga laiti. Toe fa'afouina lau IP e fa'aofi ai nei suiga.
Fa'amatalaga Fa'atatau
- Intel Quartus Prime Design Suite Fa'afouina Fa'amatalaga Fa'amatalaga
- Folasaga i Intel FPGA IP Cores
- Pusa Meli Client Intel FPGA IP User Guide
- Errata mo isi IP cores i le Knowledge Base
1.1. Pusa Meli Client Intel FPGA IP v20.2.0
Laulau 1. v20.2.0 2022.09.26
| Intel Quartus Prime Version |
Fa'amatalaga | A'afiaga |
| 22.3 | Faʻaopoopo le lagolago a le LibRSU ma le Nios® V processor e faʻaoga ma le pule o masini malupuipuia (SDM). | — |
1.2. Pusa Meli Client Intel FPGA IP v20.1.2
Laulau 2. v20.1.2 2022.03.28
| Intel Quartus Prime Version |
Fa'amatalaga | A'afiaga |
| 22. | Fa'afou tali mo le CONFIG_STATUS fa'atonuga e aofia ai fa'amatalaga ile fa'aupuga o le uati. | Fa'ataga le fa'atulagaina o le FPGA e aunoa ma se ta'ele refclk o lo'o iai ile taimi ole fa'atulagaina. |
| Fa'aleleia le tusi resitala tulaga fa'alavelave (ISR) ma fa'alavelave mafai le resitala (IER) e fa'aopoopo le puipuiga mo le fa'atonuga/tali ma faitau/tusi FIF0s. | ||
| Ave'ese le fa'atonuga o le pusameli REBOOT_HPS ona e le'o avanoa lenei fa'atonuga mo lenei IP. |
Intel Corporation. Ua taofia aia tatau uma. Intel, le Intel logo, ma isi fa'ailoga Intel o fa'ailoga fa'ailoga a le Intel Corporation po'o ona lala. E fa'amaonia e Intel le fa'atinoina o ana oloa FPGA ma semiconductor i fa'amatalaga o lo'o iai nei e tusa ai ma le fa'atonuga masani a Intel, ae fa'asaoina le aia tatau e fai ai suiga i so'o se oloa ma auaunaga i so'o se taimi e aunoa ma se fa'aaliga. E leai se tiute po'o se noataga e afua mai i le talosaga po'o le fa'aogaina o so'o se fa'amatalaga, oloa, po'o se auaunaga o lo'o fa'amatalaina i i'i se'i vagana ua malilie fa'aalia i se faiga tusitusia e Intel. Ua fautuaina tagata fa'atau Intel e maua le fa'amatalaga lata mai o fa'amatalaga masini a'o le'i fa'alagolago i so'o se fa'amatalaga fa'asalalau ma a'o le'i tu'uina atu oka mo oloa po'o tautua.
*O isi igoa ma fa'ailoga e mafai ona ta'ua o se meatotino a isi.
1.3. Pusa Meli Client Intel FPGA IP v20.1.1
Laulau 3. v20.1.1 2021.12.13
| Intel Quartus Prime Version |
Fa'amatalaga | A'afiaga |
| 21.4 | • Fa'afou le igoa fa'ata'ita'i o auaunaga crypto mai HAS_OFFLOAD e fa'aagaoi ai le Crypto Service • Suia le fa'atinoga safeclib memcpy ile generic memcpy i le avetaavale HAL. |
— |
1.4. Pusa Meli Client Intel FPGA IP v20.1.0
Laulau 4. v20.1.0 2021.10.04
| Intel Quartus Prime Version |
Fa'amatalaga | A'afiaga |
| 21.3 | Fa'aopoopo le HAS_OFFLOAD parakalafa e lagolago ai ata fa'ata'oto fa'ae'e uta. O lenei vaega e na'o le Intel Agilex™ masini e maua. |
A seti, o le IP e mafai ai le crypto AXI initiator interface. |
| Suia le numera vaega o Fa'amatalaga Fa'asa'oloto mai le RN-1201 i le RN-1259. |
— |
1.5. Pusa Meli Client Intel FPGA IP v20.0.2
Laulau 5. v20.0.2 2021.03.29
| Intel Quartus Prime Version | Fa'amatalaga | A'afiaga |
| 21. | Fa'aopoopoina le lagolago e toe fa'afo'i le Taimi 1 ma le Taimi 2 fa'atuai resitala i le taimi e tupu ai le fa'amatalaga toe setiina o le toe setiina o le FPGA IP Pusa Meli. | Leai se a'afiaga ile Timer 1 ma le Timer 2 resitalaina le fa'aogaina ile Intel Quartus Prime software version mai le 20.2 ma le 20.4. E tatau ona e toe fa'afouina le Pusa Meli Client Intel FPGA IP pe a alu ese mai Intel Quartus Prime software version 20.4 po'o muamua atu ile Intel Quartus Prime software version 21.1. |
| Fa'aopoopoina le lagolago ina ia mafai ai ona feso'ota'i le va o Pusa Meli Client Intel FPGA IP IRQ fa'ailo ma le Nios II fa'ailoga IRQ fa'ailoga. | E tatau ona e alu i le Intel Quartus Prime software version 21.1 ma toe fa'afo'i le Pusa Meli Client Intel FPGA IP ina ia mafai ai lea vaega. |
1.6. Pusa Meli Client Intel FPGA IP v20.0.0
Laulau 6. v20.0.0 2020.04.13
| Intel Quartus Prime Version |
Fa'amatalaga | A'afiaga |
| 20. | Fa'aopoopo le lagolago mo le fa'alavelave EOP_TIMEOUT lea e fa'ailoa mai ai e le'i aofia i le fa'atonuga atoa le Fa'ai'uga o le Fa'aputu. | E mafai ona e faʻaogaina nei faʻalavelave e faʻatautaia le suʻesuʻeina o mea sese mo fefaʻatauaiga le atoatoa. |
| Fa'aopoopo le lagolago mo le fa'alavelave BACKPRESSURE_TIMEOUT e fa'ailoa mai ai na tupu se mea sese i totonu ole SDM. |
1.7. Pusa Meli Client Intel FPGA IP v19.3
Laulau 7. v19.3 2019.09.30
| Intel Quartus Prime Version |
Fa'amatalaga | A'afiaga |
| 19. | Fa'aopoopoina le lagolago masini mo masini Intel Agilex. | E mafai nei ona e faʻaogaina lenei IP i masini Intel Agilex. |
| Fa'aopoopo le lagolago mo se fa'alavelave COMMAND_INVALID e fa'ailoa mai ai le umi o le fa'atonuga ua fa'ailoa mai e le fetaui le ulutala ma le fa'atonuga moni na lafo. | E mafai ona e fa'aogaina le fa'alavelave lea e fa'ailoa ai fa'atonuga sese. | |
| Suia le igoa o lenei IP mai le Intel FPGA Stratix 10 Mailbox Client i le Mailbox Client Intel FPGA IP. | O lenei IP o loʻo lagolagoina uma Intel Stratix® 10 ma Intel Agilex masini. Fa'aoga le igoa fou e su'e ai lenei P i le polokalama Intel Quartus Prime po'o luga ole web. | |
| Fa'aopoopo le fausaga fou ole fa'asologa o le IP. | Ole numera ole IP e ono suia mai le tasi Intel Quartus Prime software version i le isi. |
1.8. Intel FPGA Stratix 10 Pusa Meli Client v17.1
Laulau 8. v17.1 2017.10.30
| Intel Quartus Prime Version |
Fa'amatalaga | A'afiaga |
| 17. | Fa'asalalauga muamua. | — |
1.9. Pusa Meli Client Intel FPGA IP User Guide Archives
Mo lomiga lata mai ma muamua o lenei taiala fa'aoga, tagai ile Pusa Meli Client Intel FPGA IP User Guide. Afai e le o lisiina se IP po'o se polokalama faakomepiuta, e fa'aoga le ta'iala mo le IP muamua po'o le polokalama faakomepiuta.
IP versions e tutusa ma le Intel Quartus Prime Design Suite software versions up to v19.1. Mai le Intel Quartus Prime Design Suite software version 19.2 poʻo mulimuli ane, IP cores o loʻo i ai se polokalame faʻaliliuga IP fou.
Pusa Meli Client Intel®
FPGA IP Fa'amatalaga Fa'amatalaga
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Intel Pusa Meli Client Intel FPGA IP [pdf] Taiala mo Tagata Fa'aoga Pusa Meli Client Intel FPGA IP, Client Intel FPGA IP, Intel FPGA IP, FPGA IP, IP |