Zolemba Zotulutsa Makasitomala Intel® FPGA IP
Zolemba Zotulutsa Makasitomala Intel® FPGA IP
Mapulogalamu a Intel® Prime Design Suite mpaka v19.1. Kuyambira mu Intel Quartus Prime Design Suite software version 19.2, Intel FPGA IP ili ndi ndondomeko yatsopano yomasulira.
Mitundu ya FPGA IP ikufanana ndi Intel Quartus®
Nambala ya Intel FPGA IP (XYZ) imatha kusintha ndi mtundu uliwonse wa pulogalamu ya Intel Quartus Prime. Kusintha kwa:
- X ikuwonetsa kukonzanso kwakukulu kwa IP. Mukasintha pulogalamu ya Intel Quartus Prime, muyenera kukonzanso IP.
- Y akuwonetsa kuti IP ili ndi zatsopano. Panganinso IP yanu kuti muphatikizepo zatsopanozi.
- Z ikuwonetsa kuti IP imaphatikizapo zosintha zazing'ono. Panganinso IP yanu kuti ikhale ndi zosinthazi.
Zambiri Zogwirizana
- Intel Quartus Prime Design Suite Update Release Notes
- Chiyambi cha Intel FPGA IP Cores
- Mailbox Client Intel FPGA IP User Guide
- Errata kwa ma IP cores ena mu Knowledge Base
1.1. Makasitomala Makasitomala Intel FPGA IP v20.2.0
Gulu 1. v20.2.0 2022.09.26
Intel Quartus Prime Version |
Kufotokozera | Zotsatira |
22.3 | Thandizo lowonjezera la LibRSU ndi purosesa ya Nios® V kuti mugwiritse ntchito ndi woyang'anira zida zotetezedwa (SDM). | — |
1.2. Makasitomala Makasitomala Intel FPGA IP v20.1.2
Gulu 2. v20.1.2 2022.03.28
Intel Quartus Prime Version |
Kufotokozera | Zotsatira |
22. | Yankho losinthidwa la lamulo la CONFIG_STATUS kuti liphatikizepo zambiri za kochokera kochokera. | Imalola kasinthidwe ka FPGA popanda tile refclk yomwe ilipo panthawi yokonzekera. |
Kupititsa patsogolo registry ya interrupt status (ISR) ndi interrupt enable register (IER) kuti iwonjezere chitetezo ku lamulo / kuyankha ndikuwerenga / kulemba FIF0s. | ||
Chotsani lamulo la bokosi la makalata REBOOT_HPS popeza lamuloli silikupezeka pa IP iyi. |
Malingaliro a kampani Intel Corporation Maumwini onse ndi otetezedwa. Intel, logo ya Intel, ndi zizindikiro zina za Intel ndi zizindikiro za Intel Corporation kapena mabungwe ake. Intel imatsimikizira kugwira ntchito kwa FPGA yake ndi zida za semiconductor malinga ndi zomwe zili pano malinga ndi chitsimikizo cha Intel, koma ili ndi ufulu wosintha zinthu ndi ntchito zilizonse nthawi iliyonse popanda kuzindikira. Intel sakhala ndi udindo kapena udindo chifukwa chakugwiritsa ntchito kapena kugwiritsa ntchito zidziwitso zilizonse, malonda, kapena ntchito zomwe zafotokozedwa pano kupatula monga momwe Intel adavomerezera momveka bwino. Makasitomala a Intel amalangizidwa kuti apeze mtundu waposachedwa kwambiri wamakina a chipangizocho asanadalire zidziwitso zilizonse zosindikizidwa komanso asanayike maoda azinthu kapena ntchito.
*Mayina ena ndi mtundu zitha kunenedwa kuti ndi za ena.
1.3. Makasitomala Makasitomala Intel FPGA IP v20.1.1
Gulu 3. v20.1.1 2021.12.13
Intel Quartus Prime Version |
Kufotokozera | Zotsatira |
21.4 | • Kusinthidwa dzina la crypto service-specific parameter kuchokera HAS_OFFLOAD kuti Muyambitse Crypto Service • M'malo mwa safeclib memcpy kukhazikitsa ndi generic memcpy mu HAL driver. |
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1.4. Makasitomala Makasitomala Intel FPGA IP v20.1.0
Gulu 4. v20.1.0 2021.10.04
Intel Quartus Prime Version |
Kufotokozera | Zotsatira |
21.3 | Adawonjezedwa magawo a HAS_OFFLOAD kuti athandizire kujambula kutsitsa. Izi zimangopezeka pazida za Intel Agilex™. |
Mukakhazikitsa, IP imathandizira mawonekedwe oyambitsa crypto AXI. |
Anasintha Nambala ya Gawo la Note Notes kuchoka pa RN-1201 kukhala Mtengo wa RN-1259. |
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1.5. Makasitomala Makasitomala Intel FPGA IP v20.0.2
Gulu 5. v20.0.2 2021.03.29
Intel Quartus Prime Version | Kufotokozera | Zotsatira |
21. | Thandizo lowonjezera kuti mukhazikitsenso zolembera zochedwa Timer 1 ndi Timer 2 panthawi ya Mailbox Client Intel FPGA IP reset reset. | Palibe zotsatira mu Timer 1 ndi Timer 2 zolembetsa zogwiritsidwa ntchito mu Intel Quartus Prime software version kuyambira 20.2 ndi 20.4. Muyenera kukonzanso Makasitomala a Mailbox Intel FPGA IP pochoka ku Intel Quartus Prime software mtundu 20.4 kapena m'mbuyomu kwa Intel Quartus Prime software mtundu 21.1. |
Thandizo lowonjezera kuti athe kulumikizana pakati pa Mailbox Client Intel FPGA IP IRQ siginecha ndi Nios II purosesa IRQ chizindikiro. | Muyenera kusamukira ku Intel Quartus Prime software version 21.1 ndikusinthanso Mailbox Client Intel FPGA IP kuti izi zitheke. |
1.6. Makasitomala Makasitomala Intel FPGA IP v20.0.0
Gulu 6. v20.0.0 2020.04.13
Intel Quartus Prime Version |
Kufotokozera | Zotsatira |
20. | Zowonjezera zothandizira kusokoneza kwa EOP_TIMEOUT zomwe zikuwonetsa kuti lamulo lonse silinaphatikizepo Mapeto a Paketi. | Mutha kugwiritsa ntchito zosokonezazi kuti muzitha kuzindikira zolakwika pazochitika zosakwanira. |
Thandizo lowonjezera pakusokoneza kwa BACKPRESSURE_TIMEOUT zomwe zikuwonetsa kuti cholakwika mu SDM chidachitika. |
1.7. Makasitomala Makasitomala Intel FPGA IP v19.3
Gulu 7. v19.3 2019.09.30
Intel Quartus Prime Version |
Kufotokozera | Zotsatira |
19. | Zowonjezera zothandizira zida za Intel Agilex. | Tsopano mutha kugwiritsa ntchito IP iyi pazida za Intel Agilex. |
Thandizo lowonjezera la kusokoneza kwa COMMAND_INVALID lomwe limasonyeza kutalika kwa lamulo lomwe mutu wamutu sukugwirizana ndi lamulo lenileni lomwe latumizidwa. | Mutha kugwiritsa ntchito kusokoneza uku kuti muzindikire malamulo omwe sanatchulidwe molakwika. | |
Anasintha dzina la IP iyi kuchoka ku Intel FPGA Stratix 10 Mailbox Client kukhala Makasitomala a Mailbox Intel FPGA IP. | IP iyi tsopano imathandizira zida za Intel Stratix® 10 ndi Intel Agilex. Gwiritsani ntchito dzina latsopanoli kuti mupeze P iyi mu pulogalamu ya Intel Quartus Prime kapena pa web. | |
Anawonjezera mawonekedwe atsopano a IP. | Nambala ya mtundu wa IP ikhoza kusintha kuchokera ku mtundu wina wa Intel Quartus Prime software kupita ku wina. |
1.8. Intel FPGA Stratix 10 Makasitomala a Mailbox 17.1
Gulu 8. v17.1 2017.10.30
Intel Quartus Prime Version |
Kufotokozera | Zotsatira |
17. | Kutulutsidwa koyamba. | — |
1.9. Makasitomala a Mailbox Intel FPGA IP User Guide Archives
Kwa mitundu yaposachedwa komanso yam'mbuyomu ya bukhuli, onani Makalata Ogwiritsa Ntchito Makasitomala a Intel FPGA IP. Ngati IP kapena pulogalamu ya pulogalamu sinalembedwe, chiwongolero cha ogwiritsa ntchito pa IP yam'mbuyomu kapena pulogalamu yamapulogalamu imagwira ntchito.
Mitundu ya IP ndi yofanana ndi mitundu ya Intel Quartus Prime Design Suite mpaka v19.1. Kuchokera ku Intel Quartus Prime Design Suite software version 19.2 kapena mtsogolo, ma IP cores ali ndi dongosolo latsopano la IP.
Mailbox Client Intel®
FPGA IP Release Notes
Tumizani Ndemanga
Zolemba / Zothandizira
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Intel Mailbox Client Intel FPGA IP [pdf] Buku Logwiritsa Ntchito Makasitomala a Mailbox Intel FPGA IP, Client Intel FPGA IP, Intel FPGA IP, FPGA IP, IP |