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Ndetu mwepụta ndị ahịa Intel® FPGA IP

 

Ndetu mwepụta ndị ahịa Intel® FPGA IP

Ụdị ngwanrọ Intel® Prime Design Suite ruo mgbe v19.1. Malite na ụdị sọftụwia Intel Quartus Prime Design Suite 19.2, Intel FPGA IP nwere atụmatụ mbipụta ọhụrụ.
Ụdị FPGA IP dabara na Intel Quartus®
Nọmba Intel FPGA IP ụdị (XYZ) nwere ike ịgbanwe na ụdị sọftụwia Intel Quartus Prime ọ bụla. Mgbanwe na:

  • X na-egosi ntughari isi nke IP. Ọ bụrụ na imelite ngwa ngwa Intel Quartus Prime, ị ga-emerịrị IP.
  • Y na-egosi na IP gụnyere atụmatụ ọhụrụ. Megharịa IP gị ka ịtinye atụmatụ ọhụrụ ndị a.
  • Z na-egosi na IP gụnyere obere mgbanwe. Megharịa IP gị ka ịtinye mgbanwe ndị a.

Ozi metụtara

  • Ihe ndetu mwepụta nke Intel Quartus Prime Design Suite
  • Okwu mmalite nke Intel FPGA IP Cores
  • Akwụkwọ ozi onye ahịa Intel FPGA IP ntuziaka onye ọrụ
  • Errata maka cores IP ndị ọzọ na ntọala Ọmụma

1.1. Onye ahịa igbe ozi Intel FPGA IP v20.2.0
Okpokoro 1. v20.2.0 2022.09.26

Intel Quartus
Ụdị nke mbụ
Nkọwa Mmetụta
22.3 Nkwado LibRSU agbakwunyere na Nios® V processor iji jiri njikwa ngwaọrụ echedoro (SDM).

1.2. Onye ahịa igbe ozi Intel FPGA IP v20.1.2
Okpokoro 2. v20.1.2 2022.03.28

Intel Quartus
Ụdị nke mbụ
Nkọwa Mmetụta
22. Nzaghachi emelitere maka iwu CONFIG_STATUS ịgụnye ozi na isi mmalite elekere nhazi. Na-enye ohere nhazi nke FPGA na-enweghị refclk tile dị ugbu a n'oge nhazi.
kwalitere ndebanye aha nkwụsịtụ (ISR) wee kwụsị inye aha aha (IER) ka ịtinye nchebe maka iwu/nzaghachi wee gụọ/dee FIF0s.
Iwu igbe ozi ewepụrụ REBOOT_HPS ebe iwu a adịghị maka IP a.

Ụlọ ọrụ Intel. Ikike niile echekwabara. Intel, akara Intel, na akara Intel ndị ọzọ bụ ụghalaahịa nke Intel Corporation ma ọ bụ ndị enyemaka ya. Intel nyere ikike ịrụ ọrụ nke FPGA na ngwaahịa semiconductor na nkọwapụta ugbu a dịka akwụkwọ ikike ọkọlọtọ Intel siri dị, mana nwere ikike ịme mgbanwe na ngwaahịa na ọrụ ọ bụla n'oge ọ bụla na-enweghị ọkwa. Intel anaghị ewere ọrụ ọ bụla ma ọ bụ ụgwọ sitere na ngwa ma ọ bụ iji ozi ọ bụla, ngwaahịa ma ọ bụ ọrụ akọwara n'ime ebe a belụsọ dị ka Intel kwetara na ederede. A dụrụ ndị ahịa Intel ọdụ ka ha nweta ụdị nkọwa ngwaọrụ kachasị ọhụrụ tupu ha adabere na ozi ọ bụla ebipụtara yana tupu ịnye iwu maka ngwaahịa ma ọ bụ ọrụ.
* Enwere ike ịzọrọ aha na akara ndị ọzọ dị ka ihe onwunwe nke ndị ọzọ.

1.3. Onye ahịa igbe ozi Intel FPGA IP v20.1.1
Okpokoro 3. v20.1.1 2021.12.13

Intel Quartus
Ụdị nke mbụ
Nkọwa Mmetụta
21.4 • Aha paramita kpọmkwem ọrụ crypto emelitere site na
HAS_OFFLOAD iji kwado ọrụ Crypto
• Dochie safeclib memcpy mmejuputa atumatu na jeneriki
memcpy na onye ọkwọ ụgbọ ala HAL.

1.4. Onye ahịa igbe ozi Intel FPGA IP v20.1.0
Okpokoro 4. v20.1.0 2021.10.04

Intel Quartus
Ụdị nke mbụ
Nkọwa Mmetụta
21.3 agbakwunyere HAS_OFFLOAD paramita iji kwado cryptographic
mbupu. Njirimara a dị naanị maka ngwaọrụ Intel Agilex™.
Mgbe atọrọ, IP na-enyere aka
crypto AXI initiator interface.
Gbanwee nọmba akụkụ ndetu mwepụta site na RN-1201 ka ọ bụrụ
RN-1259.

1.5. Onye ahịa igbe ozi Intel FPGA IP v20.0.2
Okpokoro 5. v20.0.2 2021.03.29

Intel Quartus Prime Version Nkọwa Mmetụta
21. Nkwado agbakwunyere iji tọgharịa ngụ oge 1 na ngụ oge 2 ndebanye aha n'oge mmemme nke onye ahịa igbe ozi Intel FPGA IP nrụpụta nrụpụta. Enweghị mmetụta na Timer 1 na Timer 2 na-edebanye aha ojiji na ụdị sọftụwia Intel Quartus Prime sitere na 20.2 na 20.4.
Ị ga-emerịrị nke ahụ
Onye ahịa igbe ozi igbe ozi Intel FPGA IP mgbe ọ na-esi na Intel pụọ
Ụdị sọftụwia Quartus Prime 20.4 ma ọ bụ na mbụ gaa na ụdị sọftụwia Intel Quartus Prime 21.1.
Nkwado agbakwunyere iji mee ka ike njikọ dị n'etiti onye ahịa igbe ozi Intel FPGA IP IRQ mgbama yana akara Nios II processor IRQ. Ị ga-akwaga na ụdị sọftụwia Intel Quartus Prime 21.1 wee megharịa igbe ozi igbe ozi Intel FPGA IP iji mee ka njirimara a nwee ike.

1.6. Onye ahịa igbe ozi Intel FPGA IP v20.0.0
Okpokoro 6. v20.0.0 2020.04.13

Intel Quartus
Ụdị nke mbụ
Nkọwa Mmetụta
20. Nkwado agbakwunyere maka nkwụsịtụ EOP_TIMEOUT nke na-egosi na iwu zuru ezu agụnyeghị ngwụcha nke ngwugwu. Ị nwere ike iji nkwụsịtụ ndị a iji dozie nchọpụta njehie maka azụmahịa ezughị ezu.
Nkwado agbakwunyere maka nkwụsịtụ BACKPRESSURE_TIMEOUT nke na-egosi na mperi dị n'ime SDM mere.

1.7. Onye ahịa igbe ozi Intel FPGA IP v19.3
Okpokoro 7. v19.3 2019.09.30

Intel Quartus
Ụdị nke mbụ
Nkọwa Mmetụta
19. Nkwado ngwaọrụ agbakwunyere maka ngwaọrụ Intel Agilex. Ị nwere ike iji IP a ugbu a na ngwaọrụ Intel Agilex.
Nkwado agbakwunyere maka nkwụsịtụ COMMAND_INVALID nke na-egosi ogologo iwu akọwapụtara na nkụnye eji isi mee adabaghị n'ezie iwu ezitere. Ị nwere ike iji nkwụsịtụ a chọpụta iwu akọwapụtara ezighi ezi.
Gbanwee aha IP a site na onye ahịa Intel FPGA Stratix 10 Mailbox ka ọ bụrụ onye ahịa Intel FPGA IP. IP a na-akwado ma ngwaọrụ Intel Stratix® 10 na Intel Agilex. Jiri aha ọhụrụ chọta P a na Intel Quartus Prime software ma ọ bụ na web.
Agbakwunyere nhazi ụdị IP ọhụrụ. Nọmba ụdị IP nwere ike ịgbanwe site na otu ụdị sọftụwia Intel Quartus Prime gaa na nke ọzọ.

1.8. Intel FPGA Stratix 10 Onye ahịa igbe ozi v17.1
Okpokoro 8. v17.1 2017.10.30

Intel Quartus
Ụdị nke mbụ
Nkọwa Mmetụta
17. Ntọhapụ mbụ.

1.9. Ebe nchekwa akwụkwọ ntuziaka onye ahịa Intel FPGA IP
Maka nsụgharị ntuziaka onye ọrụ kachasị ọhụrụ na nke gara aga, rụtụ aka na ntuziaka onye ọrụ Intel FPGA IP Client igbe ozi. Ọ bụrụ na edepụtaghị ụdị IP ma ọ bụ sọftụwia, ntuziaka onye ọrụ maka ụdị IP gara aga ma ọ bụ ụdị ngwanrọ na-emetụta.
Ụdị IP bụ otu ụdị sọftụwia Intel Quartus Prime Design Suite ruo v19.1. Site na ụdị sọftụwia Intel Quartus Prime Design Suite 19.2 ma ọ bụ karịa, IP cores nwere atụmatụ mbipụta IP ọhụrụ.

Ndị ahịa Intel® igbe ozi
Ndetu mwepụta FPGA IP
Zipu nzaghachi

Akwụkwọ / akụrụngwa

Intel Mailbox Client Intel FPGA IP [pdf] Ntuziaka onye ọrụ
Onye ahịa igbe ozi Intel FPGA IP, onye ahịa Intel FPGA IP, Intel FPGA IP, FPGA IP, IP

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