i-intel FPGA SDK ye-OpenCL User Guide

I-FPGA SDK ye-OpenCL
Umhlahlandlela Womsebenzisi

UG-OCL009
2017.05.08
Igcine ukubuyekezwa kwe-Intel® Quartus® Prime Design Suite: 17.0

Bhalisa
Thumela Impendulo

Okuqukethwe fihla

1 I-Intel® FPGA SDK ye-OpenCL™ Intel® Cyclone®V SoC Development Kit Reference Porting Guide Porting

2 Amadokhumenti / Izinsiza

2.1 Izithenjwa

3 Okuthunyelwe Okuhlobene

I-Intel® FPGA SDK ye-OpenCL™ Intel® Cyclone®V SoC Development Kit Reference Porting Guide Porting

I-V SoC Development Kit Reference Porting Guide Porting Guide ichaza i-hardware ne-software ye-Intel Cyclone V SoC Development Kit Reference Platform (c5soc) ukuze isetshenziswe ne-Intel Software Development Kit (SDK) ye-OpenCL I-Intel ® FPGA SDK ye-OpenCL ™ Intel Cyclone. ® . Ngaphambi kokuthi uqale, i-Intel incoma ngokuqinile ukuthi uzijwayeze nokuqukethwe kwamadokhumenti alandelayo:

I-Intel FPGA SDK ye-OpenCIntel Cyclone V SoC Umhlahlandlela Wokuqalisa

I-Intel FPGA SDK ye-OpenCL Custom Platform Toolkit Umhlahlandlela Womsebenzisi
I-Cyclone V Device Handbook, Umqulu 3: I-Hard Processor System Technical Reference Manual Ngaphezu kwalokho, bheka i-Cyclone V SoC Development Kit kanye nekhasi le-SoC Embedded Design Suite le-Altera. website ukuze uthole ulwazi olwengeziwe. 1 2

Qaphela: I-Intel icabanga ukuthi unokuqonda okujulile kwe-Intel FPGA SDK ye-OpenCL Custom Platform Toolkit User Guide. I-Cyclone V SoC Development Kit Reference Porting Guide ayichazi ukusetshenziswa kwe-SDK's Custom Platform Toolkit ukusebenzisa i-Custom Platform ye-Cyclone V SoC Development Kit. Ichaza kuphela umehluko phakathi kosekelo lwe-SDK ku-Cyclone V SoC Development Kit kanye ne-Intel FPGA SDK ejwayelekile ye-OpenCL Custom Platform.

Izixhumanisi Ezihlobene

I-Intel FPGA SDK ye-OpenCL Cyclone V SoC Umhlahlandlela Wokuqalisa
I-Intel FPGA SDK ye-OpenCL Custom Platform Toolkit Umhlahlandlela Womsebenzisi

I-Cyclone V Device Handbook, Umqulu 3: I-Hard Processor System Reference Manual
I-Cyclone V SoC Development Kit kanye nekhasi le-SoC Embedded Design Suite ku-Altera webindawo

I-OpenCL kanye nelogo ye-OpenCL yizimpawu zokuthengisa i-Apple Inc. ezisetshenziswa ngemvume ye-Khronos Group™.
I-Intel FPGA SDK ye-OpenCL isuselwe ku-Khronos Specification eshicilelwe, futhi iphumelele Inqubo Yokuhlola Ukuvumelana kwe-Khronos. Isimo samanje sokuvumelana singatholakala kokuthi www.khronos.org/conformance.

Inkampani ye-Intel Wonke Amalungelo Agodliwe. I-Intel, ilogo ye-Intel, i-Altera, i-Arria, i-Cyclone, i-Enpirion, i-MAX, i-Nios, i-Quartus ne-Stratix amagama namalogo yizimpawu zokuthengisa ze-Intel Corporation noma izinkampani ezingaphansi kwayo e-US kanye/noma kwamanye amazwe. I-Intel iqinisekisa ukusebenza kwe-FPGA yayo kanye nemikhiqizo ye-semiconductor ekucacisweni kwamanje ngokuvumelana newaranti evamile ye-Intel, kodwa igodla ilungelo lokwenza izinguquko kunoma imiphi imikhiqizo namasevisi nganoma yisiphi isikhathi ngaphandle kwesaziso. I-Intel ayithathi mthwalo noma isikweletu esivele ngenxa yesicelo noma ukusetshenziswa kwanoma yiluphi ulwazi, umkhiqizo, noma isevisi echazwe lapha ngaphandle kwalapho okuvunyelwene ngakho ngokubhaliwe yi-Intel. Amakhasimende e-Intel ayelulekwa ukuthi athole inguqulo yakamuva yokucaciswa kwedivayisi ngaphambi kokuthembela kunoma yiluphi ulwazi olushicilelwe nangaphambi kokufaka ama-oda emikhiqizo noma amasevisi.
*Amanye amagama namabhrendi angafunwa njengempahla yabanye.

1.1.1 I-Cyclone V SoC Development Kit Reference Board Okuhlukile
I-Intel FPGA SDK ye-OpenCL Cyclone V SoC Development Kit Reference Platform ihlanganisa okuhlukile kwebhodi.

c5soc ibhodi
Leli bhodi elizenzakalelayo linikeza ukufinyelela kumabhange amabili ememori ye-DDR. I-HPS DDR ifinyelelwa yi-FPGA kanye ne-CPU. I-FPGA DDR itholakala kuphela yi-FPGA.
c5soc_sharedonly board
Lokhu okuhlukile kwebhodi kuqukethe kuphela uxhumano lwe-HPS DDR. I-FPGA DDR ayifinyeleleki. Lokhu okuhlukile kwebhodi kusebenza kahle kakhulu endaweni ngoba ihadiwe elincane liyadingeka ukuze kusekelwe ibhange elilodwa lememori ye-DDR. Ibhodi le-c5soc_sharedonly liphinde libe isiteji esihle sokulinganisa sebhodi lokugcina lokukhiqiza elinebhange elilodwa lememori ye-DDR.
Ukuze uqondise lokhu okuhlukile kwebhodi lapho uhlanganisa i-OpenCL kernel yakho, faka inketho -board c5soc_sharedonly kumyalo wakho we-aoc.
Ukuze uthole ulwazi olwengeziwe ebhodini inketho yomyalo we-aoc, bhekisa ku-Intel FPGA SDK ye-OpenCL Programming Guide.

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Ukuhlanganisa I-Kernel Yebhodi Elicacisiwe le-FPGA (–ibhodi )
1.1.2 Okuqukethwe kwe-Cyclone V SoC Development Kit Reference Platform
I-Cyclone V SoC Development Kit Reference Platform iqukethe lokhu okulandelayo files kanye nezinkomba:

File noma Uhla lwemibhalo	Incazelo
board_env.xml	I-eExtensible Markup Language (XML) file echaza i-c5soc ku-Intel FPGA SDK ye-OpenCL.
linux_sd_card_image.tgz	Isithombe sekhadi le-flash le-SD elicindezelwe file equkethe yonke into umsebenzisi we-SDK ayidingayo ukuze asebenzise Ikhithi Yokuthuthukisa Ye-Cyclone V SoC nge-SDK.
ingalo32	Uhla lwemibhalo oluqukethe okulandelayo:

1.1.3 Izici Ezifanelekile Zekhithi Yokuthuthukiswa Kwe-Cyclone V SoC

Uhlu olulandelayo lugqamisa izingxenye ze-Cyclone V SoC Development Kit nezici ezifanele ku-Intel FPGA SDK ye-OpenCL:

I-Dual-core ARM Cortex-A9 CPU esebenzisa i-32-bit Linux.

Ibhasi le-eXtensible Interface (AXI) elithuthukisiwe phakathi kwe-HPS nendwangu eyinhloko ye-FPGA.
Izilawuli ezimbili zememori eqinile ye-DDR, ngasinye sixhuma ku-1 gigabyte (GB) DDR3 SDRAM.
- Isilawuli esisodwa se-DDR sifinyeleleka kumongo we-FPGA kuphela (okungukuthi, i-FPGA DDR).
- Esinye isilawuli se-DDR sifinyeleleka kuzo zombili i-HPS ne-FPGA (okungukuthi, i-HPS DDR). Lesi silawuli esabiwe sivumela ukwabelana ngenkumbulo kwamahhala phakathi kwe-CPU nomongo we-FPGA.

I-CPU ingaphinda ilungiselele indwangu ewumongo ye-FPGA.

1.1.3.1 I-Cyclone V SoC Development Kit Reference Platform Imigomo Nezinqumo I-Intel isekela ukuqaliswa kwe-Cyclone V SoC Development Kit Reference Platform emigomeni eminingi yokuklama nezinqumo. I-Intel incoma ukuthi ucabangele lezi zinhloso nezinqumo lapho ufaka le Reference Platform ebhodini lakho le-SoC FPGA.
Ngezansi kunezinhloso zokuklama ze-c5soc:

Nikeza ngomkhawulokudonsa omkhulu kakhulu ongakhona phakathi kwezinhlamvu ku-FPGA kanye nesistimu(ama)memori ye-DDR.
Qinisekisa ukuthi ukubala ku-FPGA (okungukuthi, izikhwebu ze-OpenCL) aziphazamisi eminye imisebenzi ye-CPU engase ihlanganise ukusevisa ama-peripherals.

Shiya izinsiza eziningi ze-FPGA ngangokunokwenzeka ukuze uthole izibalo ze-kernel esikhundleni sezingxenye zokusebenzelana.

Ngezansi izinqumo zedizayini ezisezingeni eliphakeme eziyimiphumela eqondile yezinhloso zokuklama ze-Intel:

I-Reference Platform isebenzisa kuphela izilawuli zenkumbulo eziqinile ze-DDR ezinokucushwa okunokwenzeka okubanzi kakhulu (256 bits).
I-FPGA ixhumana nesilawuli senkumbulo ye-HPS DDR ngokuqondile, ngaphandle kokubandakanya ibhasi le-AXI kanye neswishi ye-L3 ngaphakathi kwe-HPS. Ukuxhumana okuqondile kunikeza umkhawulokudonsa ongcono kakhulu ongakhona ku-DDR, futhi kugcina izibalo ze-FPGA zingaphazamisi ukuxhumana phakathi kwe-CPU nendawo yayo.
Ukufinyelela inkumbulo eqondile ye-scatter-gather (SG-DMA) akuyona ingxenye ye-FPGA interface logic. Esikhundleni sokudlulisa inani elikhulu ledatha phakathi kwezinhlelo zememori ye-DDR, gcina idatha ku-HPS DDR eyabelwe. Ukufinyelela okuqondile kumemori ye-CPU nge-FPGA kusebenza kahle kakhulu kune-DMA. Igcina izinsiza zehadiwe (okungukuthi, indawo ye-FPGA) futhi yenza lula umshayeli we-Linux kernel.
Isexwayiso: Ukudlulisa inkumbulo phakathi kwesistimu ye-HPS DDR eyabelwe kanye nesistimu ye-DDR efinyeleleka kuphela ku-FPGA kuhamba kancane kakhulu. Uma ukhetha ukwenza kanjalo
dlulisa inkumbulo ngale ndlela, isebenzise amanani amancane kakhulu wedatha kuphela.
Umsingathi kanye nedivayisi benza ukudluliswa kwedatha okungeyona eye-DMA phakathi komunye nomunye ngebhuloho le-HPS-to-FPGA (H2F), kusetshenziswa imbobo eyodwa kuphela engu-32-bit. Isizathu siwukuthi, ngaphandle kwe-DMA, i-Linux kernel ingakhipha isicelo esisodwa se-32-bit sokufunda noma ukubhala, ngakho-ke akudingekile ukuba nokuxhumana okubanzi.
Umsingathi uthumela amasiginali okulawula kudivayisi ngebhuloho elingasindi H2F (LH2F).
Ngenxa yokuthi amasiginali okulawula ukusuka kumsingathi kuya kudivayisi amasiginali anomkhawulokudonsa ophansi, ibhuloho le-LH2F lilungele umsebenzi.

1.2 Ukuhambisa I-Reference Platform ku-SoC FPGA Board Yakho
Ukufaka iCyclone V SoC Development Kit Reference Platform ebhodini lakho le-SoC FPGA, yenza le misebenzi elandelayo:

Khetha inkumbulo eyodwa ye-DDR noma izinhlobo ezimbili zezinkumbulo ze-DDR ze-c5soc Reference Platform njengendawo yokuqala yomklamo wakho.
Buyekeza izindawo zephinikhodi ku-ALTERAOCLSDKROOT/board/c5soc/ /phezulu.qsf file, lapho i-ALTERAOCLSDKROOT iyindlela eya endaweni ye-Intel FPGA SDK yokufakwa kwe-OpenCL, futhi igama lohla lwemibhalo lokuhluka kwebhodi. Uhlu lwemibhalo lwe-c5soc_sharedonly olwehlukile lwebhodi elinesistimu eyodwa yememori ye-DDR. Uhlu lwemibhalo lwe-c5soc olokuhluka kwebhodi elinezinhlelo ezimbili zememori ye-DDR.
Buyekeza izilungiselelo ze-DDR zamabhulokhi we-HPS kanye/noma we-FPGA SDRAM ku-ALTERAOCLSDKROOT/board/c5soc/ /isistimu.qsys file.
4. Yonke i-Intel FPGA SDK yemiklamo yebhodi ekhethwayo ye-OpenCL kufanele ifinyelele ukuvalwa okuqinisekisiwe kwesikhathi. Ngakho-ke, ukubekwa komklamo kufanele kuhlanzeke isikhathi. Ukufaka i-c5soc board partition (acl_iface_partition.qxp) ebhodini lakho le-SoC FPGA, yenza le misebenzi elandelayo:
Ukuze uthole imiyalelo enemininingwane yokuguqula nokugcina ukwahlukanisa kwebhodi, bheka i-Quartus
I-Prime Incremental Compilation for Hierarchical and Team-based Design isahluko seQuartus Prime Standard Edition Handbook.
a. Susa i-acl_iface_partition.qxp kuhla lwemibhalo ALTERAOCLSDKROOT/board/c5soc/c5soc.
b. Nika amandla isifunda se-acl_iface_region LogicLock™ ngokushintsha umyalo we-Tcl set_global_assignment -name LL_ENABLED OFF -section_id acl_iface_region ukuze usethe_isabelo_somhlaba -igama LL_ENABLED ON -section_id acl_iface_region
c. Hlanganisa i-OpenCL kernel yebhodi lakho.
d. Uma kunesidingo, lungisa usayizi nendawo yesifunda se-LogicLock.
e. Uma wanelisekile ukuthi ukubekwa komklamo wakho kuhlanzekile ngesikhathi, thumela leyo ngxenye njenge-acl_iface_partition.qxp Quartus Prime Exported Partition File.
Njengoba kuchazwe esigabeni Sokusungula Ukugeleza Kwesikhathi Okuqinisekisiwe se-AIntel FPGA SDK ye-OpenCL Custom Platform Toolkit User Guide, ngokungenisa le .qxp file ekwakhiweni kwezinga eliphezulu, ufeza imfuneko yokuhlinzeka ngedizayini yebhodi ngokugeleza kokuvalwa kwesikhathi okuqinisekisiwe.
Kuzinto ezingase zibe nomthelela kwikhwalithi yemiphumela (i-QoR) yengxenye yakho ethunyelwe, bheka Ikhwalithi Ejwayelekile Yokucatshangelwa Kwemiphumela Yesigaba Sengxenye Yebhodi Elithekelisiwe ku-Intel FPGA SDK ye-OpenCL Custom Platform Toolkit User Guide.
f. Khubaza indawo ye-acl_iface_region LogicLock ngokubuyisela umyalo kusinyathelo sesi-2 emuva kokuthi set_global_assignment -name LL_ENABLED OFF section_id acl_iface_region.
Uma ibhodi lakho le-SoC FPGA lisebenzisa izikhonkwane ezihlukene namapheripheri ebhulokhi le-HPS, vuselela isilayishi sangaphambili kanye nomthombo wesihlahla sedivayisi (DTS) file. Uma ushintsha izilungiselelo zesilawuli sememori ye-HPS DDR, vuselela isilayishi sangaphambili.
Dala isithombe sekhadi le-flash le-SD.
Dala i-Custom Platform yakho, ehlanganisa isithombe sekhadi le-SD flash.
Cabangela ukudala inguqulo yemvelo yesikhathi sokusebenza ye-Custom Platform yakho ukuze uyisebenzise ne-Intel FPGA Runtime Environment (RTE) ye-OpenCL. Inguqulo ye-RTE ye-Custom Platform yakho ayifaki izinkomba zehadiwe kanye nesithombe sekhadi le-SD flash. Le Platform Ngokwezifiso ilayisha kuhlelo lwe-SoC FPGA ukuze ivumele izinhlelo zokusebenza ezisingethe ukuthi zisebenze. Ngokuphambene, inguqulo ye-SDK Yenkundla Yangokwezifiso iyadingeka ukuze i-SDK ihlanganise izinhlamvu ze-OpenCL.
Ithiphu: Ungasebenzisa inguqulo ye-SDK Yenkundla Yakho Ngokwezifiso ye-RTE. Zokonga
isikhala, susa isithombe sekhadi le-SD enguqulweni ye-RTE ye-Custom Platform yakho.
Hlola inkundla yakho yangokwezifiso.
Bheka esigabeni Ukuhlola I-Hardware Design ye-Intel FPGA SDK ye-OpenCL Custom Platform Toolkit User Guide ukuze uthole ulwazi olwengeziwe.

Izixhumanisi Ezihlobene

Ihlola i-Hardware Design
I-Quartus Prime Incremental Compilation ye-Hierarchical and Team-based Design

Ukusungula Ukugeleza Kwesikhathi Okuqinisekisiwe
Ikhwalithi Ejwayelekile Yokucatshangelwa Kwemiphumela Yokwahlukaniswa Kwebhodi Elithekelisiwe

1.2.1 Ukubuyekeza I-Ported Reference Platform
Kunguqulo yamanje ye-Cyclone V SoC Development Kit Reference Platform, ibhulokhi ye-HPS ingaphakathi kwesahlukaniso esichaza konke ukucabanga okunengqondo. Nokho, awukwazi ukukhipha i-HPS njengengxenye ye-.qxp file. Ukuze ubuyekeze Inkundla Yangokwezifiso ekhona kakade oyilungisile kusukela kunguqulo yangaphambilini ye-c5soc, sebenzisa ukugeleza kokulondoloza kwe-QXP, buyekeza isithombe sekhadi le-flash le-SD ukuze uthole indawo yakamuva yesikhathi sokusebenza, futhi ubuyekeze i-board_spec.xml file ukuze unike amandla ukufuduka.
I-Altera® SDK yenguqulo ye-OpenCL engu-14.1 nangaphezulu iphenya board_spec.xml file ngolwazi lwebhodi, futhi isebenzise izibuyekezo ezizenzakalelayo. Ngoba ushintsha i-
ukuklama ngokusebenzisa ukugeleza kokulondoloza kwe-QXP, kufanele ubuyekeze i-board_spec.xml file kufomethi yayo enguqulweni yamanje. Ibuyekeza i file ivumela i-SDK ukuthi ihlukanise phakathi Kwezinkundla Zezifiso ezingalondoloziwe kanye Nezinkundla Zezifiso ezisekelwe ku-QXP zamanje. Bheka ku-Custom Platform Automigration for Forward Compatibility ku-Intel FPGA SDK ye-OpenCL Custom Platform Toolkit User Guide ukuze uthole ulwazi olwengeziwe.

Ukuze usebenzise ukugeleza kokulondoloza kwe-QXP kudizayini yezingxenyekazi zekhompuyutha ze-Cyclone V SoC FPGA efakwe kunguqulo yangaphambilini ye-c5soc, yenza izinyathelo ezilandelayo ukuze udale ukwahlukanisa ukuze ukhiphe i-HPS kokuthi .qxp file:
a. Ngaphambi kokudala ukwahlukanisa kumqondo we-nonkernel, dala ukwahlukanisa eduze kwe-HPS kokuthi .qsf Quartus Prime Settings File.
Okwesiboneloample:
# Hlukanisa mathupha isibonelo esimodela i-HPS-dedicated I/O set_instance_assignment -name PARTITION_HIERARCHY borde_18261 -kuya “kusistimu:the_system|system_acl_iface:acl_iface|system_acl_iface_hps_0:hps_0|face_psh_acl_i0 system_acl_iface_hps_0_hps_io_border:border” -section_id “system_acl_iface_hps_0_hps_io_border:border”
# Setha ukwahlukanisa kube uhlobo lwe-HPS_PARTITION okufanele lucutshungulwe kahle yi-Quartus yonke
set_global_assignment -igama PARTITION_TYPE HPS_PARTITION -section_id “system_acl_iface_hps_0_hps_io_border:border”
quartus_cdb phezulu -c phezulu
–incremental_compilation_export=acl_iface_partition.qxp
-incremental_compilation_export_partition_name=acl_iface_partition
-incremental_compilation_export_post_synth=on
-incremental_compilation_export_post_fit=on
-incremental_compilation_export_routing=on
-incremental_compilation_export_flatten=off
Ngemva kokukhipha i-HPS ekuhlukaniseni, ungangenisa i-.qxp file bese uhlanganisa umklamo wakho.
Buyekeza isithombe sekhadi le-flash le-SD ngenguqulo yamanje ye-Intel FPGA RTE ye-OpenCL ngokwenza le misebenzi elandelayo:
a. Khuphuka i- file Ithebula lokwabiwa (fat32) futhi lanwetshwa file ama-partitions wesistimu (ext3) esithombeni esikhona njengamadivayisi we-loop-back. Ukuze uthole imiyalelo enemininingwane, bheka Isinyathelo sesi-2 sokwakha isithombe sekhadi le-SD Flash.
b. Kuluhlu lwemibhalo /home/root/opencl_arm32_rte, susa ifayela le- files kusukela kunguqulo yangaphambilini ye-RTE.
c. Landa futhi ukhiphe i-verison yamanje ye-RTE kuhla lwemibhalo /home/root/opencl_arm32_rte.
d. Kwe /umshayeli/inguqulo.h file ye-Custom Platform, buyekeza umsebenzi ozokwenziwa we-ACL_DRIVER_VERSION ukuze . (ngokwesiboneloample, 16.1.x, lapho i-16.1 iyinguqulo ye-SDK, futhi x inguqulo yomshayeli oyisethile).
e. Akha kabusha umshayeli.
f. Susa i(ama)hardware ifolda ye-Custom Platform yakho. Kopisha i-Custom Platform, kanye nomshayeli obuyekeziwe, kusiqondisi /home/root/opencl_arm_rte/board directory.
g. Kopisha i-Altera.icd file kusuka kuhla lwemibhalo /home/root/opencl_arm32_rte bese ulengeza kuhla lwemibhalo /etc/OpenCL/vendors.
h. Yehlisa futhi uhlole isithombe esisha. Ukuze uthole imiyalelo enemininingwane, bheka Izinyathelo 8 kuya kwezingu-11 Zokwakha Isithombe Sekhadi Le-SD Flash.

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Ukudala isithombe se-SD Flash Card ekhasini 14
Futhi unenketho yokudala isithombe esisha sekhadi le-SD flash.
I-Custom Platform Automigration for Forward Compatibility

1.3 Ukusekelwa Kwesofthiwe Yenkumbulo Eyabiwe
Inkumbulo engokomzimba eyabiwe phakathi kwe-FPGA ne-CPU iyinkumbulo ekhethwayo yama-OpenCL kernels asebenza kuma-SoC FPGAs. Ngenxa yokuthi i-FPGA ifinyelela kumemori ebonakalayo eyabiwe, ngokuphambene nenkumbulo ebonakalayo eyabiwe, ayikwazi ukufinyelela amathebula ekhasi le-CPU abeka amakheli abonakalayo abasebenzisi kumakheli ekhasi lendawo.
Mayelana nehardware, i-OpenCL kernels ifinyelela inkumbulo engokomzimba eyabiwe ngokuxhuma okuqondile kusilawuli sememori eqinile ye-HPS DDR. Ngokuphathelene nesofthiwe, ukusekelwa kwenkumbulo yomzimba okwabelwana ngayo kuhilela ukucatshangelwa okulandelayo:

Ukuqaliswa kwesofthiwe okujwayelekile yokwaba inkumbulo ku-CPU (ngokwesiboneloample, umsebenzi we-malloc()) awukwazi ukwaba indawo yememori i-FPGA engayisebenzisa.
Inkumbulo eyabiwa umsebenzi we-malloc() iyahlangana endaweni yekheli lenkumbulo elibonakalayo, kodwa noma yimaphi amakhasi aphathekayo angaphansi cishe akunakwenzeka ukuthi ahlangane ngokomzimba. Kanjalo, umsingathi kufanele akwazi ukwaba izifunda zenkumbulo ezihambisanayo ngokomzimba. Nokho, leli khono alikho ezinhlelweni zesikhala somsebenzisi ku-Linux. Ngakho-ke, umshayeli we-Linux kernel kufanele enze isabelo.
Umshayeli wekernel we-OpenCL SoC FPGA Linux uhlanganisa umsebenzi we-mmap() wokwaba inkumbulo engokomzimba eyabiwe futhi imephu endaweni yomsebenzisi. Umsebenzi we-mmap() usebenzisa ucingo olujwayelekile lwe-Linux kernel dma_alloc_coherent() ukuze ucele izifunda zenkumbulo ezithintana ngokwenyama zokwabelana nedivayisi.
Ku-Linux kernel ezenzakalelayo, i-dma_alloc_coherent() ayinikezi inkumbulo ehlangene ngokomzimba engaphezu kuka-0.5 megabytes (MB) ngosayizi. Ukuze uvumele i-dma_alloc_coherent() ukuthi yabe inani elikhulu lememori ehlangene ngokomzimba, vumela isici se-memory allocator (CMA) esihlangene se-Linux kernel bese uhlanganisa kabusha i-Linux kernel.
Nge-Cyclone V SoC Development Kit Reference Platform, i-CMA ilawula u-512 MB ku-1 GB yenkumbulo yomzimba. Unganyusa noma wehlise lelivelu, kuye ngenani lememori eyabiwe edingwa uhlelo lokusebenza. Ucingo lwe-dma_alloc_coherent() lungase lungakwazi ukunikeza u-512 MB ogcwele wenkumbulo ehambisanayo ngokomzimba; Nokho, ingakwazi ukuthola inkumbulo elinganiselwa ku-450 MB.

I-CPU ingakwazi ukufaka inqolobane inkumbulo i-dma_alloc_coherent() ikholi eyabiwayo. Ikakhulukazi, imisebenzi yokubhala kusuka kuhlelo lokusebenza lokusingatha ayibonakali kumakernel we-OpenCL. Umsebenzi we-mmap() ku-OpenCL SoC FPGA Linux kernel driver futhi uqukethe amakholi aya ku-pgprot_noncached() noma umsebenzi we-remap_pf_range() ukuze ukhubaze ukugcinwa kwesikhashana kwalesi sifunda sememori ngokucacile.
Ngemva kokuthi umsebenzi we-dma_alloc_coherent() unikeze inkumbulo ehlangene ngokomzimba, umsebenzi we-mmap() ubuyisela ikheli elibonakalayo ekuqaleni kobubanzi, okuyibanga lekheli lememori oyabayo. Uhlelo lokusebenza lomsingathi ludinga leli kheli elibonakalayo ukuze lifinyelele inkumbulo. Ngakolunye uhlangothi, ama-OpenCL kernels adinga amakheli ezindawo. Umshayeli we-Linux kernel ulandela umkhondo wemephu yekheli le-virtual-to-physical. Ungakwazi ukumepha amakheli angempela okuthi mmap() abuyele emakhelini angempela ngokungeza umbuzo kumshayeli.
Ikholi ye-aocl_mmd_shared_mem_alloc() ye-MMD application programming interface (API) ihlanganisa le mibuzo elandelayo:
a. Umsebenzi we-mmap() onikeza inkumbulo futhi ubuyisele ikheli elibonakalayo.
b. Umbuzo owengeziwe obonisa ikheli le-virtual elibuyisiwe ekhelini lendawo.
Ikholi ye-aocl_mmd_shared_mem_alloc() MMD API bese ibuyisela amakheli amabili
—ikheli langempela elibuyisiwe ikheli le-virtual, futhi ikheli lendawo liya kokuthi device_ptr_out.
Qaphela: Umshayeli angakwazi ukwenza imephu yamakheli abonakalayo umsebenzi we-mmap() owabuyisela kumakheli aphathekayo. Uma ucela ikheli lendawo yanoma iyiphi enye i-pointer ebonakalayo, umshayeli ubuyisela inani elingu-NULL.

Isexwayiso: I-Intel FPGA SDK yemitapo yolwazi yesikhathi sokusebenza ye-OpenCL ithatha ngokuthi inkumbulo eyabiwe iyinkumbulo yokuqala esohlwini lwe-board_spec.xml file. Ngamanye amazwi, ikheli lendawo elitholwa umshayeli we-Linux kernel liba yikheli le-Avalon® i-OpenCL kernel elidlulisela ku-HPS SDRAM.
Ngokuphathelene nomtapo wolwazi wesikhathi sokusebenza, sebenzisa ikholi ye-clCreateBuffer() ukuze unikeze inkumbulo eyabiwe njengesilondolozi sedivayisi ngendlela elandelayo:

Kokuhluka kwebhodi le-DDR elinenkumbulo yomibili eyabiwe nengabelwe, i-clCreateBuffer() yabela inkumbulo eyabiwe uma ucacisa ifulegi le-CL_MEM_USE_HOST_PTR. Ukusebenzisa amanye amafulegi kubangela i-clCreateBuffer() ukuthi inikeze isigcinalwazi kumemori engabelwe.
Kokwehluka kwebhodi le-DDR elinenkumbulo eyabiwe kuphela, i-clCreateBuffer() inika inkumbulo eyabiwe kungakhathaliseki ukuthi usho liphi ifulegi.
Okwamanje, usekelo lwe-32-bit Linux ku-ARM CPU lulawula izinga lokusekelwa kwenkumbulo okwabelwana ngayo kumalabhulali wesikhathi sokusebenza se-SDK. Ngamanye amazwi, amalabhulali esikhathi sokusebenza ahlanganiswe kwezinye izindawo (isibample, x86_64 Linux noma 64-bit Windows) azisekeli inkumbulo eyabiwe.
I-C5soc ayizange isebenzise inkumbulo ehlukahlukene ukuze ihlukanise phakathi kwenkumbulo eyabiwe nengabelwe ngenxa yalezi zizathu ezilandelayo:
1. Umlando—Ukusekelwa kwenkumbulo ehlukahlukene bekungatholakali ngenkathi ukusekelwa kwenkumbulo okwabelwana ngakho kwadalwa ekuqaleni.
2. Isixhumi esibonakalayo esifanayo—Ngenxa yokuthi i-OpenCL iyindinganiso evulekile, i-Intel igcina ukuvumelana phakathi kwabathengisi bengxenyekazi yekhompuyutha abahlukahlukene. Ngakho-ke, ukuxhumana okufanayo njengezakhiwo zabanye abathengisi bebhodi kusetshenziselwa ukwaba nokusebenzisa inkumbulo eyabiwe.

1.4 Ukumiswa kabusha kwe-FPGA
Kuma-SoC FPGA, i-CPU ingaphinda ilungiselele indwangu ewumgogodla ye-FPGA ngaphandle kokuphazamisa ukusebenza kwe-CPU. I-FPGA Manager hardware block ehambisana ne-HPS kanye ne-FPGA eyinhloko yenza ukumisa kabusha. I-Linux kernel ihlanganisa umshayeli ovumela ukufinyelela kalula kuMphathi we-FPGA.

Kuya view isimo somongo we-FPGA, cela umyalo wekati /sys/class/fpga/fpga0/.
I-Intel FPGA SDK yensiza yohlelo lwe-OpenCL etholakala ne-Cyclone V SoC Development Kit Reference Platform isebenzisa lesi sikhombimsebenzisi ukuhlela i-FPGA. Lapho uhlela kabusha umnyombo we-FPGA nge-CPU esebenzayo, insiza yohlelo yenza yonke le misebenzi elandelayo:
1. Ngaphambi kokuhlelwa kabusha, vala wonke amabhuloho okuxhumana phakathi kwe-FPGA ne-HPS, womabili amabhuloho e-H2F kanye ne-LH2F.
Nika amandla kabusha lawa mabhuloho ngemva kokuqedwa kokuhlelwa kabusha.
Qaphela: Uhlelo lwe-OpenCL alusebenzisi ibhuloho le-FPGA-to-HPS (F2H). Bheka isigaba se-HPS-FPGA Interfaces ku-Cyclone V Device Handbook, Umqulu 3: I-Hard Processor System Technical Reference Manual ukuze uthole ulwazi olwengeziwe.
2. Qinisekisa ukuthi isixhumanisi phakathi kwe-FPGA nesilawuli se-HPS DDR sikhutshaziwe ngesikhathi sokuhlelwa kabusha.
3. Qinisekisa ukuthi i-FPGA ephazamisayo ku-FPGA ivaliwe ngesikhathi sokuhlelwa kabusha.
Futhi, yazisa umshayeli ukuthi enqabe noma yikuphi ukuphazamiseka okuvela ku-FPGA phakathi nokuhlela kabusha.

Bheka ikhodi yomthombo yensiza yohlelo ukuze uthole imininingwane ngokusetshenziswa kwangempela.

Isexwayiso: Ungashintshi ukucushwa kwesilawuli se-HPS DDR uma i-CPU isebenza.
Ukwenza kanjalo kungase kubangele iphutha lesistimu elibulalayo ngoba ungase uguqule ukucushwa kwesilawuli se-DDR uma kunemisebenzi esele yememori evela ku-CPU. Lokhu kusho ukuthi uma i-CPU isebenza, ngeke ukwazi ukuhlela kabusha umongo we-FPGA ngesithombe esisebenzisa i-HPS DDR ekucushweni okuhlukile.
Khumbula ukuthi uhlelo lwe-OpenCL, kanye nomklamo wereferensi we-Golden Hardware otholakala ne-Intel SoC FPGA Embedded Design Suite (EDS), usetha i-HPS DDR ibe yimodi eyodwa engu-256-bit.
Izingxenye zesistimu ye-CPU ezifana nesibikezelo segatsha noma i-prefetcher yethebula lekhasi ingase ikhiphe imiyalo ye-DDR ngisho nalapho kubonakala sengathi akukho lutho olusebenzayo ku-CPU.
Ngakho-ke, isikhathi sokuqalisa ukuphela kwesikhathi esiphephile sokusetha ukucushwa kwesilawuli se-HPS DDR.
Lokhu futhi kusho ukuthi i-U-boot kumele ibe nebhanari engaphekiwe file (.rbf) isithombe esizolayishwa kumemori. Kungenjalo, ungase unike amandla i-HPS DDR ngezimbobo ezingasetshenzisiwe ku-FPGA bese ushintsha ukulungiselelwa kwembobo ngemva kwalokho. Ngalesi sizathu, umshayeli we-OpenCL Linux kernel akasawufaki umqondo odingekayo ukuze usethe ukucushwa kwesilawuli se-HPS DDR.
I-SW3 dual in-line package (DIP) ishintsha i-Cylone V SoC Development Kit ilawula indlela elindelekile yesithombe se-.rbf (okungukuthi, noma ngabe file kucindezelwe kanye/noma kubethelwe). I-C5soc, kanye ne-Golden Hardware Reference Design etholakala nge-SoC EDS, ihlanganisa izithombe ze-.rbf ezicindezelwe kodwa ezingabetheliwe. Izilungiselelo zokushintshwa kwe-SW3 DIP ezichazwe ku-Intel FPGA SDK ye-OpenCL Cyclone V SoC Umhlahlandlela Wokuqalisa zifana nalesi sithombe se-.rbf.

Izixhumanisi Ezihlobene

I-HPS-FPGA Interfaces
Ilungiselela Ukushintsha kwe-SW3

1.4.1 Imininingwane Yesakhiwo Sesistimu ye-FPGA
Ukusekelwa kwe-Cyclone V SoC Development Kit Reference Platform kusekelwe ku-Stratix® V Reference Platform (s5_ref), etholakala ne-Intel FPGA SDK ye-OpenCL.
Inhlangano iyonke yohlelo lwe-c5soc Qsys kanye nomshayeli we-kernel kufana kakhulu nalezo eziku-s5_ref.
Izingxenye ezibalulekile ezilandelayo ze-FPGA ziyefana kukho kokubili i-c5soc ne-s5_ref:

VERSION_ID vimba
Indlela yokuphumula

Isihlukanisi sebhange lememori
I-Cache snoop interface
Iwashi le-kernel

Lawula amabhulokhi okungena kwirejista (CRA).

1.5 Ukwakha isithombe sekhadi le-SD Flash
Ngenxa yokuthi iCyclone V SoC FPGA iwuhlelo olugcwele ku-chip, unesibopho sokuletha incazelo egcwele yohlelo. I-Intel incoma ukuthi uyilethe isesimweni sesithombe sekhadi le-SD flash. I-Intel FPGA SDK yomsebenzisi we-OpenCL ingavele ibhale isithombe ekhadini elincane le-SD futhi ibhodi le-SoC FPGA selilungele ukusetshenziswa.
Ukulungisa Isithombe Esikhona Sekhadi Le-Flash Lekhadi Le-SD ekhasini 13
I-Intel incoma ukuthi umane uguqule isithombe esitholakalayo nge-Cyclone V SoC Development Kit Reference Platform. Futhi unenketho yokudala isithombe esisha sekhadi le-SD flash.
Ukudala isithombe se-SD Flash Card ekhasini 14
Futhi unenketho yokudala isithombe esisha sekhadi le-SD flash.

1.5.1 Ukulungisa Isithombe Sekhadi Le-SD Esivele Sikhona
I-Intel incoma ukuthi umane uguqule isithombe esitholakalayo ngeCyclone V SoC
I-Development Kit Reference Platform. Futhi unenketho yokudala isithombe esisha sekhadi le-SD flash.
Isithombe se-c5soc linux_sd_card_image.tgz file itholakala kuhla lwemibhalo ALTERAOCLSDKROOT/board/c5soc, lapho i-ALTERAOCLSDKROOT ikhomba indlela ye-Intel FPGA SDK yohla lwemibhalo yokufaka ye-OpenCL.

Qaphela: Ukuze ulungise isithombe sekhadi le-flash le-SD, kufanele ube nezimpande noma amalungelo e-sudo.

Ukuze unciphise i-$ALTERAOCLSDKROOT/board/c5soc/linux_sd_card_image.tgz file, sebenzisa umyalo othi tar xvfzlinux_sd_card_image.tgz.
Hlanganisa i-hello_world OpenCL exampuklame usebenzisa ukwesekwa kwakho kwe-Custom Platform. Qamba kabusha i-.rbf file ukuthi i-Intel FPGA SDK ye-OpenCL Offline Compiler ikukhiqiza njenge-opencl.rbf, bese iyibeka ku-partition ye-fat32 ngaphakathi kwesithombe sekhadi le-SD.
Ungalanda i-hello_world example design evela ku-OpenCL Design Examples ikhasi ku-Altera webindawo.

Beka i-.rbf file engxenyeni ye-fat32 yesithombe se-flash card.
Qaphela: I-fat32 partition kumele iqukathe kokubili i-zImage file kanye ne-.rbf file. Ngaphandle kwe-.rbf file, kuzokwenzeka iphutha eliyingozi uma ufaka umshayeli.
Ngemva kokudala isithombe sekhadi le-SD, sibhalele ekhadini le-SD encane ngokubiza umyalo olandelayo: sudo dd if=/path/to/sdcard/image.bin of=/dev/sdcard
Ukuze uhlole isithombe sekhadi lakho le-SD flash, yenza le misebenzi elandelayo:
a. Faka i-micro SD flash card ebhodini le-SoC FPGA.
b. Khulisa ibhodi.
c. Cela umyalo wokusetshenziswa kokuxilonga i-aocl.

1.5.2 Ukudala isithombe se-SD Flash Card
Futhi unenketho yokudala isithombe esisha sekhadi le-SD flash. Imiyalo ejwayelekile yokwakha isithombe esisha sekhadi le-SD kanye nokwakha kabusha isithombe sekhadi le-SD esikhona kakade iyatholakala ku-GSRD v14.0.2 – ikhasi lekhadi le-SD le-RocketBoards.org webindawo.
Izinyathelo ezingezansi zichaza inqubo yokudala isithombe se-linux_sd_card_image.tgz sisuka kusithombe sekhadi le-SD le-Golden System Reference Design (GSRD):
Qaphela:
Ukuze udale isithombe ngesithombe se-c5soc, yenza yonke imisebenzi esebenzayo ebalulwe kule nqubo.

Landa futhi ukhiphe inguqulo yesithombe sekhadi le-GSRD SD 14.0 ku-Rocketboards.org.
Khuphuka i- file Ithebula lokwabiwa (fat32) futhi lanwetshwa file ama-partitions esistimu (ext3) kulesi sithombe njengamadivayisi we-loop-back. Ukuze ukhweze i-partition, yenza lezi zinyathelo ezilandelayo:
a. Nquma isiqalo se-byte sokuhlukanisa ngaphakathi kwesithombe ngokucela /sbin/fdisk -lu image_file umyalo.
Okwesiboneloample, inombolo yokuhlukanisa 1 yohlobo lwe-W95 FAT ine-offset yebhulokhi engu-2121728. Ngamabhayithi angu-512 ibhulokhi ngayinye, i-byte offset ingamabhayithi angu-512 x 2121728 = 1086324736 bytes.
b. Khomba idivayisi yeluphu yamahhala (isibample, /dev/loop0) ngokuthayipha umyalo we-losetup -f.
c. Uma ucabanga ukuthi /dev/loop0 iyithuluzi lamahhala le-loop, yabela isithombe sakho sekhadi le-flash kudivayisi ye-loop block ngokufaka i-losetup /dev/loop0 image_file -0 1086324736 umyalo.
d. Faka idivayisi ye-loop ngokubiza umyalo wokukhweza /dev/loop0 /media/disk1.
Ngaphakathi kwesithombe file, /media/disk1 manje isiyingxenye ye-fat32 efakwe phezulu.
e. Phinda izinyathelo ukusuka ku-a ukuya ku-d ku-partition ye-ext3.

Landa inguqulo ye-Cyclone V SoC FPGA ye-Intel FPGA Runtime Environment yephakheji ye-OpenCL eSikhungweni Sokulanda ku-Altera webindawo.
a. Chofoza inkinobho ethi Landa eduze kwe-Quartus Prime software edition.
b. Cacisa inguqulo yokukhishwa, isistimu yokusebenza, kanye nendlela yokukhipha.
c. Chofoza ithebhu Yesofthiwe Eyengeziwe, bese ukhetha ukulanda i-Intel FPGA
I-Runtime Environment ye-OpenCL Linux Cyclone V SoC TGZ.
d. Ngemva kokulanda i-aocl-rte- .arm32.tgz file, ayikhiphe ku
uhla lwemibhalo okungelakho.
Beka i-aocl-rte- engapakishiwe .arm32 uhla lwemibhalo ku-/home/root/opencl_arm32_rte kuhla lwemibhalo engxenyeni ye-ext3 yesithombe file.
Susa i(ama)folda yezingxenyekazi zekhompuyutha Yenkundla Yakho Ngokwezifiso, bese ubeka Inkundla Yangokwezifiso ohlwini olungaphansi lwebhodi lwe/home/root/ opencl_arm32_rte.

Dala ifayela le-init_opencl.sh file kumkhombandlela /ikhaya/impande enokuqukethwe okulandelayo: thekelisa ALTERAOCLSDKROOT=/ikhaya/impande/opencl_arm32_rte thekelisa AOCL_BOARD_PACKAGE_ROOT=$ALTERAOCLSDKROOT/ibhodi/ thekelisa INDLELA=$ALTERAOCLSDKROOT/bin:$PATH thekelisa LD_LIBRARY_PATH=$ALTERAOCLSDKROOT/host/arm32/lib:$LD_LIBRARY_PATH insmod $AOCL_BOARD_PACKAGE_ROOT/driver/aclsoc_drv.ko
Umsebenzisi we-SDK usebenzisa umthombo ./init_opencl.sh umyalo wokulayisha okuguquguqukayo kwemvelo kanye nomshayeli we-OpenCL Linux kernel.
Uma udinga ukuvuselela isilayishi sangaphambili, i-DTS files, noma i-Linux kernel, udinga i-arm-linux-gnueabihf-gcc compiler evela ku-SoC EDS. Landela imiyalelo echazwe ku-Intel SoC FPGA Embedded Design Suite User Guide ukuze uthole isofthiwe, uyihlanganise kabusha, futhi ubuyekeze efanele. files ku-partition ye-fat32 efakwe.
Qaphela: Kungenzeka kakhulu ukuthi udinga ukubuyekeza isilayishi sangaphambili uma Inkundla yakho Yangokwezifiso inokusebenzisa okuhlukile kwamaphini kunalawo aku-c5soc.
Khumbula: Uma uphinde uhlanganisa i-Linux kernel, hlanganisa kabusha umshayeli we-Linux kernel ngomthombo ofanayo we-Linux kernel. files. Uma kukhona ukungafani phakathi komshayeli we-Linux kernel kanye ne-Linux kernel, umshayeli ngeke alayishe. Futhi, kufanele uvule i-CMA.
Bheka Ukubuyisela I-Linux Kernel ukuze uthole ulwazi olwengeziwe.
Hlanganisa i-hello_world OpenCL exampuklame usebenzisa ukwesekwa kwakho kwe-Custom Platform. Qamba kabusha i-.rbf file ukuthi i-Intel FPGA SDK ye-OpenCL Offline Compiler ikukhiqiza njenge-opencl.rbf, bese iyibeka ku-partition ye-fat32 ngaphakathi kwesithombe sekhadi le-SD.
Ungalanda i-hello_world example design evela ku-OpenCL Design Examples ikhasi ku-Altera webindawo.
9. Ngemva kokugcina zonke ezidingekayo files esithombeni sekhadi, cela imiyalo elandelayo:
a. vumelanisa
b. yehlisa /media/disk1
c. yehlisa lapho yigama lohla lwemibhalo olisebenzisayo ukukhweza ukwahlukanisa kwe-ext3 ku-3 ekhasini 3 (ngokwesiboneloample, /media/disk2).
d. ukulahlekelwa -d /dev/loop0
e. ukulahlekelwa -d /dev/loop1

Cindezela isithombe sekhadi le-flash le-SD ngokucela umyalo olandelayo: tar cvfz .tgz linux_sd_card_image
Letha i- .tgz file ngaphakathi kohlu lwemibhalo oluyimpande ye-Custom Platform yakho.
Ukuze uhlole isithombe sekhadi lakho le-SD flash, yenza le misebenzi elandelayo:
a. Bhala isithombe esingacindezelwanga esiwumphumela ekhadini le-micro SD.
b. Faka i-micro SD flash card ebhodini le-SoC FPGA.
c. Faka amandla ibhodi.
d. Cela umyalo wokusetshenziswa kokuxilonga i-aocl.

Izixhumanisi Ezihlobene

Intel SoC FPGA Embedded Design Suite User Guide
I-OpenCL Design Examples ikhasi ku-Altera webindawo

Ukuvuselela i-Linux Kernel ekhasini 16
Ukuze unike amandla i-CMA, kufanele uqale uhlanganise i-Linux kernel.
Ukubuza Igama Ledivayisi Yebhodi Lakho Le-FPGA (hlola)

1.6 Ukuhlanganisa i-Linux Kernel yeCyclone V SoC FPGA
Ngaphambi kokusebenzisa izinhlelo ze-OpenCL ebhodini le-Cyclone V SoC FPGA, kufanele uhlanganise umthombo we-Linux kernel, futhi uhlanganise futhi ufake i-OpenCL Linux kernel driver.

Ukuvuselela i-Linux Kernel ekhasini 16
Ukuze unike amandla i-CMA, kufanele uqale uhlanganise i-Linux kernel.
Ukuhlanganisa nokufaka i-OpenCL Linux Kernel Driver ekhasini 17 Hlanganisa i-OpenCL Linux kernel driver ngokumelene nomthombo wekernel ohlanganisiwe.

1.6.1 Ukubuyisela kabusha i-Linux Kernel
Ukuze unike amandla i-CMA, kufanele uqale uhlanganise i-Linux kernel.

Chofoza i-GSRD v14.0 - Isixhumanisi sokuhlanganisa i-Linux ekhasini lezinsiza le-RocketBoards.org webindawo yokufinyelela imiyalo yokulanda kanye nokwakha kabusha ikhodi yomthombo we-kernel ye-Linux.
Ukuze usebenzise i-Intel FPGA SDK ye-OpenCL, cacisa i-socfpga-3.13-rel14.0 njenge .
Qaphela: Inqubo yokwakha idala i-arch/arm/configs/socfpga_defconfig file. Lokhu file icacisa izilungiselelo zokucushwa okuzenzakalelayo kwe-socfpga.
Engeza imigqa elandelayo phansi kwe-arch/arm/configs/socfpga_defconfig file.
CONFIG_MEMORY_ISOLATION=y
CONFIG_CMA=y
CONFIG_DMA_CMA=y
CONFIG_CMA_DEBUG=y
CONFIG_CMA_SIZE_MBYTES=512
CONFIG_CMA_SIZE_SEL_MBYTES=y
CONFIG_CMA_ALIGNMENT=8
CONFIG_CMA_AREAS=7
Inani lokumisa le-CONFIG_CMA_SIZE_MBYTES lisetha umkhawulo ophezulu enanini eliphelele lememori ehambisanayo ebonakalayo etholakalayo. Ungakwazi ukwandisa leli nani uma udinga inkumbulo eyengeziwe.
Qaphela: Isamba senani lememori ebonakalayo elitholakala kuphrosesa ye-ARM ebhodini le-SoC FPGA ngu-1 GB. I-Intel ayikuncomi ukuthi usethe isiphathi se-CMA sisondele ku-1 GB.

Qalisa umyalo othi make mrproper ukuze uhlanze ukucushwa kwamanje.
Qalisa umyalo othi make ARCH=arm socfpga_deconfig.
I-ARCH=ingalo ikhombisa ukuthi ufuna ukumisa i-architecture ye-ARM.
I-socfpga_defconfig ikhombisa ukuthi ufuna ukusebenzisa ukucushwa kwe-socfpga okuzenzakalelayo.
Qalisa umyalo wokuthekelisa CROSS_COMPILE=arm-linux-gnueabihf-- umyalo.
Lo myalo usetha okuguquguqukayo kwemvelo okungu-CROSS_COMPILE ukuze ucacise isiqalo sochungechunge lwamathuluzi olufunekayo.

Qalisa umyalo othi make ARCH=arm zImage. Isithombe esiwumphumela sitholakala ku-arch/arm/boot/zImage file.
Beka iZimage file engxenyeni ye-fat32 yesithombe se-flash card. Ukuze uthole imiyalelo enemininingwane, bheka i-Cyclone V SoC FPGA-specific GSRD User Manual ku-Rocketboards.org.
Qaphela: Ukuze ufake kahle i-OpenCL Linux kernel driver, qala ulayishe i-SDKgenerated.rbf file ku-FPGA.
Ukuze udale i-.rbf file, hlanganisa i-SDK design example nge-Cyclone V SoC Development Kit Reference Platform njengePlathifomu Yokwenza Ngokwezifiso ehlosiwe.
9. Beka i-.rbf file engxenyeni ye-fat32 yesithombe se-flash card.
Qaphela: I-fat32 partition kumele iqukathe kokubili i-zImage file kanye ne-.rbf file. Ngaphandle kwe-.rbf file, kuzokwenzeka iphutha eliyingozi uma ufaka umshayeli.

Faka ikhadi le-Micro SD elihleliwe, eliqukethe isithombe sekhadi le-SD osilungisile noma osidale ngaphambili, ku-Cyclone V SoC Development Kit bese unika amandla ibhodi le-SoC FPGA.
Qinisekisa inguqulo ye-Linux kernel efakiwe ngokusebenzisa umyalo othi uname -r.
Ukuqinisekisa ukuthi unika amandla i-CMA ngempumelelo ku-kernel, ngebhodi le-SoC FPGA elinikwe amandla, sebenzisa umyalo we-grep init_cma /proc/kallsyms.
I-CMA inikwe amandla uma okukhiphayo kungenalutho.

Ukuze usebenzise i-Linux kernel ehlanganisiwe nge-SDK, hlanganisa futhi ufake umshayeli we-Linux kernel.

Izixhumanisi Ezihlobene

I-Golden System Reference Design (GSRD) Imanyuwali Yomsebenzisi

Ukwakha isithombe sekhadi le-SD Flash ekhasini 13
Ngenxa yokuthi iCyclone V SoC FPGA iwuhlelo olugcwele ku-chip, unesibopho sokuletha incazelo egcwele yohlelo.

1.6.2 Ukuhlanganisa nokufaka i-OpenCL Linux Kernel Driver
Hlanganisa i-OpenCL Linux kernel driver ngokumelene nomthombo we-kernel ohlanganisiwe.

Umthombo womshayeli uyatholakala enguqulweni yeCyclone V SoC FPGA ye-Intel FPGA Runtime Environment ye-OpenCL. Ngaphezu kwalokho, qinisekisa ukuthi ulayishe i-Intel FPGA SDK ye-OpenCL-generated .rbf file ku-FPGA ukuvimbela ukufakwa okungalungile kwemojuli ye-Linux kernel.

Landa inguqulo ye-Cyclone V SoC FPGA ye-Intel FPGA Runtime Environment yephakheji ye-OpenCL eSikhungweni Sokulanda ku-Altera webindawo.
a. Chofoza inkinobho ethi Landa eduze kwe-Quartus Prime software edition.
b. Cacisa inguqulo yokukhishwa, isistimu yokusebenza, kanye nendlela yokukhipha.
c. Chofoza ithebhu Yesofthiwe Eyengeziwe, bese ukhetha ukulanda i-Intel FPGA
I-Runtime Environment ye-OpenCL Linux Cyclone V SoC TGZ.
d. Ngemva kokulanda i-aocl-rte- .arm32.tgz file, ayikhiphe ku
uhla lwemibhalo okungelakho.
Umthombo womshayeli uku-aocl-rte- .arm32/board/c5soc/ driver directory.
Ukuze uhlanganise kabusha i-OpenCL Linux kernel driver, setha inani le-KDIR kokuthi Make umshayelifile kuhla lwemibhalo oluqukethe umthombo we-Linux kernel files.
Qalisa umyalo wokuthekelisa CROSS_COMPILE=arm-linux-gnueabihf- ukuze ubonise isiqalo sochungechunge lwakho lwamathuluzi.

Qalisa i-make clean command.
Qalisa ukwenza umyalo ukuze udale i-aclsoc_drv.ko file.
Dlulisela umkhombandlela we-opencl_arm32_rte ebhodini le-Cyclone V SoC FPGA.
Ukusebenzisa i-scp -r impande@i-ipadresi yakho: umyalo ubeka indawo yesikhathi sokusebenza kumkhombandlela/ikhaya/impande.

Qalisa iskripthi se-init_opencl.sh osidalile ngenkathi wakha ikhadi le-SD.
Cela umyalo wokusetshenziswa kokuxilonga i-aocl. Insiza yokuxilonga izobuyisela umphumela odlulayo ngemva kokuthi usebenzise i-init_opencl.sh ngempumelelo.

1.7 Izinkinga Ezaziwa
Njengamanje, kunemikhawulo ethile ekusetshenzisweni kwe-Intel FPGA SDK ye-OpenCL nge-Cyclone V SoC Development Kit Reference Platform.

Awukwazi ukubhala ngaphezulu amagama omthengisi nawebhodi abikwe i-CL_DEVICE_VENDOR ne-CL_DEVICE_NAME yezinhlamvu zekholi ye-clGetDeviceInfo().
Uma umsingathi abela inkumbulo engaguquki ohlelweni lwe-DDR eyabelwe (okungukuthi, i-HPS DDR) futhi ilungisa inkumbulo engaguquki ngemva kokukhishwa kwe-kernel, idatha ekumemori ingase iphelelwe yisikhathi. Le nkinga ivela ngoba i-FPGA core ayikwazi ukucupha imisebenzi ye-CPU-to-HPS DDR.
Ukuze uvimbele ukusetshenziswa kwe-kernel okulandelayo ekufinyeleleni idatha ephelelwe yisikhathi, sebenzisa enye yalezi zindlela ezilandelayo:
• Ungaguquli inkumbulo engaguquki ngemva kokuqaliswa kwayo.
• Uma udinga __amasethi edatha ahlala njalo, dala amabhafa amaningi ememori angashintshi.
• Uma ikhona, nikeza inkumbulo engaguquki ku-FPGA DDR ebhodini le-accelerator yakho.
Insiza ye-SDK ku-ARM isekela kuphela uhlelo nokuxilonga imiyalo yokusetshenziswa.
Imiyalo ye-flash, yokufaka nokukhipha ayisebenzi ku-Cyclone V SoC Development Kit ngenxa yezizathu ezilandelayo:
a. Isisetshenziswa sokufaka kufanele sihlanganise i-aclsoc_drv Linux kernel driver futhi siyinike amandla ku-SoC FPGA. Umshini wokuthuthukisa kufanele wenze ukuhlanganisa; kodwa-ke, isivele iqukethe imithombo ye-Linux kernel ye-SoC FPGA. Imithombo ye-Linux kernel yomshini wokuthuthukisa ihlukile kuleyo ye-SoC FPGA. Indawo yemithombo ye-Linux kernel ye-SoC FPGA cishe ayaziwa kumsebenzisi we-SDK. Ngokufanayo, insiza yokukhipha ayitholakali ku-Cyclone V SoC Development Kit.
Futhi, ukuletha i-aclsoc_drv ebhodini le-SoC kuyinselele ngoba ukusatshalaliswa okuzenzakalelayo kwe-Cyclone V SoC Development Kit akuqukethe i-Linux kernel. files noma i-GNU Compiler Collection (GCC).
b. Insiza ye-flash idinga ukubeka i-.rbf file yedizayini ye-OpenCL engxenyeni ye-FAT32 yekhadi le-micro SD flash. Okwamanje, lesi sahlukaniso asikhwezwanga lapho umsebenzisi we-SDK enika amandla ibhodi. Ngakho-ke, indlela engcono kakhulu yokuvuselela ukwahlukanisa ukusebenzisa isifundi se-flash card kanye nomshini wokuthuthukisa.

Lapho ushintsha phakathi kwe-Intel FPGA SDK ye-OpenCL Offline Compiler esebenzisekayo files (.aocx) ehambisana nokuhluka okuhlukile kwebhodi (okungukuthi, c5soc kanye ne-c5soc_sharedonly), kufanele usebenzise insiza yohlelo lwe-SDK ukuze ulayishe i-.aocx file okwehlukile kwebhodi elisha okokuqala ngqa. Uma uvele uqalise uhlelo lokusebenza usebenzisa ibhodi ehlukile ehlukile kodwa i-FPGA iqukethe isithombe esivela kwenye ibhodi ehlukile, iphutha eliyingozi lingase livele.
I-.qxp file ayibandakanyi izabelo zokuhlukanisa isixhumi esibonakalayo ngenxa yokuthi isofthiwe ye-Quartus Prime ihlangabezana ngokuqhubekayo nezimfuneko zesikhathi zalokhu kuhlukaniswa.
Uma unika amandla ibhodi, ikheli layo le-media access control (MAC) lisethelwa inombolo engahleliwe. Uma inqubomgomo yakho ye-LAN ingakuvumeli lokhu kuziphatha, setha ikheli le-MAC ngokwenza le misebenzi elandelayo:
a. Ngesikhathi sokuqinisa i-U-Boot, cindezela noma yimuphi ukhiye ukuze ufake umyalo we-U-Boot.
b. Thayipha setenv ethaddr 00:07:ed:00:00:03 ngokomyalelo womyalo.
Ungakhetha noma yiliphi ikheli le-MAC.
c. Thayipha umyalo we-saveenv.
d. Qalisa kabusha ibhodi.

1.8 Umlando Wokubuyekezwa Kombhalo
Ithebula 1.
Umlando Wokubuyekezwa Kwedokhumenti we-Intel FPGA SDK ye-OpenCL Cyclone V SoC
I-Development Kit Reference Porting Guide

Usuku	Inguqulo	Izinguquko
Meyi-17	2017.05.08	•Ukukhishwa kwesondlo.
Okthoba 2016	2016.10.31	•I-Altera SDK eqanjwe kabusha ye-OpenCL yaba yi-Intel FPGA SDK ye-OpenCL. •Ihlanganise kabusha i-Altera Offline Compiler yaba yi-Intel FPGA SDK ye-OpenCL Offline Compiler.
Meyi-16	2016.05.02	•Iziqondiso ezilungisiwe zokwakha kanye nokulungisa isithombe sekhadi le-SD flash. •Imiyalo elungisiwe yokubuyisela i-Linux kernel kanye nomshayeli we-OpenCL Linux kernel.
Novemba-15	2015.11.02	•Ukukhishwa kwesondlo, futhi kwashintsha izimo ze-Quartus II zaba yi-Quartus Prime.
Meyi-15	15.0.0	•Ekulungiseni Kabusha kwe-FPGA, kukhishiwe umyalo wokuhlela kabusha umnyombo we-FPGA nge. rbf isithombe ngokubiza ikati fileigama>. rbf > /dev/ fpga0 umyalo ngoba le ndlela ayinconywa.
Disemba-14	14.1.0	•Kuqanjwe kabusha idokhumenti ngokuthi I-Altera Cyclone V SoC Development Kit Reference Porting Platform Guide. •Ubuyekeze insiza ye-reprogram kuhlelo lwe-aoclfileigama>.aocx umyalo wokusetshenziswa. • Kubuyekezwe insiza yokuxilonga ekuxilongweni kwe-aocl kanye nokuxilonga i-aocl umyalo wokusetshenziswa. •Ubuyekeze inqubo ku-Porting the Reference Platform esigabeni Sakho Sebhodi Le-SoC ukuze kufakwe imiyalelo yokuthuthwa nokulungisa i-partition yebhodi ye-c5soc ukuze kudalwe ingxenye ehlanzekile yesikhathi yokugeleza kokuvalwa kwesikhathi okuqinisekisiwe. •Kufakwe isihloko Ukubuyekeza I-Ported Reference Platform ukuveza izinqubo zale misebenzi elandelayo: 1.Ngaphandle kwe-hard processor system (HPS) block ekuhlukaniseni ibhodi 2.Ukubuyekeza isithombe sekhadi le-SD flash •Kubuyekezwe isigaba soKwakha i-SD Flash Card Image. Kunconywe kusetshenziswa inguqulo 14.0 yesithombe se-Golden System Reference Design (GSRD) njengendawo yokuqala esikhundleni sesithombe esitholakala nge-SoC Embedded Design Suite (EDS). •Kubuyekezwe I-Kernel ye-Linux kanye nesigaba se-OpenCL Linux Kernel Driver: 1.Umyalelo owengeziwe wokusetha okuguquguqukayo kwe-CROSS COMPILE. 2.Kushintshwe umyalo owusebenzisayo ukuze kuqinisekiswe ukuthi i-CMA inikwe amandla ngempumelelo.
Julayi-14	14.0.0	•Ukukhishwa Kwasekuqaleni.