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Wogwiritsa Ntchito

UG-OCL009
2017.05.08
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Intel® FPGA SDK ya OpenCL™ Intel® Cyclone®V SoC Development Kit Reference Porting Porting Guide

V SoC Development Kit Reference Platform Porting Guide imafotokoza za hardware ndi mapulogalamu a Intel Cyclone V SoC Development Kit Reference Platform (c5soc) kuti igwiritsidwe ntchito ndi Intel Software Development Kit (SDK) ya OpenCL The Intel ® FPGA SDK ya OpenCL ™ Intel Cyclone. ® . Musanayambe, Intel akukulimbikitsani kuti mudziwe zomwe zili m'malemba otsatirawa:

  1. Intel FPGA SDK ya OpenCIntel Cyclone V SoC Yoyambira
  2. Intel FPGA SDK ya OpenCL Custom Platform Toolkit User Guide
  3. Cyclone V Device Handbook, Volume 3: Hard processor System Technical Reference Manual Kuphatikiza apo, tchulani Cyclone V SoC Development Kit ndi SoC Embedded Design Suite tsamba la Altera. webtsamba kuti mudziwe zambiri. 1 2

Chenjerani: Intel imaganiza kuti mukumvetsetsa mozama za Intel FPGA SDK ya OpenCL Custom Platform Toolkit User Guide. Buku la Cyclone V SoC Development Kit Reference Porting Porting Guide silifotokoza kagwiritsidwe ntchito ka SDK's Custom Platform Toolkit kukhazikitsa Custom Platform ya Cyclone V SoC Development Kit. Imangofotokozera kusiyana pakati pa chithandizo cha SDK pa Cyclone V SoC Development Kit ndi Intel FPGA SDK ya OpenCL Custom Platform.

Maulalo Ogwirizana

  • Intel FPGA SDK ya OpenCL Cyclone V SoC Yoyambira
  • Intel FPGA SDK ya OpenCL Custom Platform Toolkit User Guide
  • Cyclone V Device Handbook, Volume 3: Hard processor System Technical Reference Manual
  • Cyclone V SoC Development Kit ndi SoC Embedded Design Suite tsamba pa Altera webmalo
  1. OpenCL ndi logo ya OpenCL ndi zizindikiro za Apple Inc. zogwiritsidwa ntchito ndi chilolezo cha Khronos Group™.
  2. Intel FPGA SDK ya OpenCL idakhazikitsidwa ndi Khronos Specification, ndipo yadutsa Khronos Conformance Testing Process. Mkhalidwe wamakono ukupezeka pa www.khronos.org/conformance.

Malingaliro a kampani Intel Corporation Maumwini onse ndi otetezedwa. Intel, logo ya Intel, Altera, Arria, Cyclone, Enpirion, MAX, Nios, Quartus ndi Stratix mawu ndi logo ndi zizindikiro za Intel Corporation kapena mabungwe ake ku US ndi/kapena mayiko ena. Intel imatsimikizira kugwira ntchito kwa FPGA yake ndi zida za semiconductor malinga ndi zomwe zili pano malinga ndi chitsimikizo cha Intel, koma ili ndi ufulu wosintha zinthu ndi ntchito zilizonse nthawi iliyonse popanda kuzindikira. Intel sakhala ndi udindo kapena udindo chifukwa cha kugwiritsa ntchito kapena kugwiritsa ntchito zidziwitso zilizonse, malonda, kapena ntchito zomwe zafotokozedwa pano kupatula monga momwe Intel adavomerezera momveka bwino. Makasitomala a Intel amalangizidwa kuti apeze mtundu waposachedwa kwambiri wamakina a chipangizocho asanadalire zidziwitso zilizonse zosindikizidwa komanso asanayike maoda azinthu kapena ntchito.
*Mayina ena ndi mtundu zitha kunenedwa kuti ndi za ena.

1.1.1 Cyclone V SoC Development Kit Reference Platform Zosiyanasiyana
Intel FPGA SDK ya OpenCL Cyclone V SoC Development Kit Reference Platform imaphatikizapo mitundu iwiri ya board.

  • c5soc gulu
    Bolodi losasinthali limapereka mwayi wamabanki awiri a DDR memory. HPS DDR imapezeka ndi FPGA ndi CPU. FPGA DDR imapezeka kokha ndi FPGA.
  • c5soc_sharedonly board
    Kusiyana kwa board uku kumangokhala ndi kulumikizana kwa HPS DDR. FPGA DDR sikupezeka. Kusiyana kwa board uku ndikothandiza kwambiri chifukwa zida zochepa ndizofunikira kuti zithandizire banki imodzi ya DDR memory. Gulu la c5soc_sharedonly ndi nsanja yabwino yopangira bolodi yomaliza yokhala ndi banki imodzi ya DDR memory.
    Kuti muwongolere kusiyana kwa bolodi ili polemba kernel yanu ya OpenCL, phatikizani -board c5soc_sharedonly njira mu lamulo lanu la aoc.
    Kuti mudziwe zambiri pa -boardboard kusankha kwa lamulo la aoc, tchulani Intel FPGA SDK ya OpenCL Programming Guide.

Maulalo Ogwirizana
Kupanga Kernel ya Specific FPGA Board (-board )
1.1.2 Zomwe zili mu Cyclone V SoC Development Kit Reference Platform
Cyclone V SoC Development Kit Reference Platform ili ndi izi files ndi akalozera:

File kapena Directory Kufotokozera
board_env.xml Chilankhulo cha eXtensible Markup (XML) file zomwe zimalongosola c5soc ku Intel FPGA SDK ya OpenCL.
linux_sd_card_image.tgz Wothinikizidwa SD kung'anima khadi chithunzi file yomwe ili ndi zonse zomwe wogwiritsa ntchito wa SDK amafunikira kuti agwiritse ntchito Cyclone V SoC Development Kit ndi SDK.
Mtengo wa 32 Directory yomwe ili ndi izi:

1.1.3 Zofunikira za Cyclone V SoC Development Kit

Mndandanda wotsatirawu ukuwonetsa zigawo za Cyclone V SoC Development Kit ndi zinthu zomwe zili zogwirizana ndi Intel FPGA SDK ya OpenCL:

  • Dual-core ARM Cortex-A9 CPU yomwe ikuyenda ndi 32-bit Linux.
  • Basi ya Advanced eXtensible Interface (AXI) pakati pa HPS ndi FPGA core nsalu.
  • Zowongolera ziwiri zolimba za DDR, iliyonse yolumikizana ndi 1 gigabyte (GB) DDR3 SDRAM.
    - Wowongolera m'modzi wa DDR amapezeka pachimake cha FPGA chokha (ndiko kuti, FPGA DDR).
    - Wowongolera wina wa DDR amapezeka ku HPS ndi FPGA (ndiko kuti, HPS DDR). Wowongolera wogawana uyu amalola kugawana kukumbukira kwaulere pakati pa CPU ndi FPGA pachimake.
  • CPU imatha kukonzanso nsalu yayikulu ya FPGA.

1.1.3.1 Cyclone V SoC Development Kit Reference Platform Design Goals and Decisions Intel ikhazikitsa kukhazikitsidwa kwa Cyclone V SoC Development Kit Reference Platform pa zolinga zingapo zamapangidwe ndi zisankho. Intel ikulimbikitsa kuti muziganizira zolinga ndi zisankho izi mukayika Reference Platform ku board yanu ya SoC FPGA.
Pansipa pali zolinga zamapangidwe a c5soc:

  1. Perekani bandwidth yapamwamba kwambiri pakati pa maso pa FPGA ndi ma memory system a DDR.
  2. Onetsetsani kuti mawerengedwe a FPGA (ndiko kuti, OpenCL kernels) sakusokoneza ntchito zina za CPU zomwe zingaphatikizepo kutumiza zotumphukira.
  3. Siyani zinthu zambiri za FPGA momwe mungathere powerengera kernel m'malo mwa mawonekedwe a mawonekedwe.

Pansipa pali zisankho zapamwamba kwambiri zomwe ndi zotsatira zachindunji za zolinga za Intel:

  1. Reference Platform imangogwiritsa ntchito zowongolera zolimba za DDR zokhala ndi kasinthidwe kokulirapo (256 bits).
  2. FPGA imalumikizana ndi wowongolera kukumbukira wa HPS DDR mwachindunji, osaphatikiza basi ya AXI ndi chosinthira cha L3 mkati mwa HPS. Kuyankhulana kwachindunji kumapereka bandwidth yabwino kwambiri ku DDR, ndikuteteza kuwerengera kwa FPGA kuti zisasokoneze kulumikizana pakati pa CPU ndi zozungulira zake.
  3. Scatter-gather direct memory access (SG-DMA) si mbali ya FPGA mawonekedwe logic. M'malo motumiza zambiri pakati pa DDR kukumbukira machitidwe, sungani deta mu HPS DDR yogawidwa. Kufikira mwachindunji ku kukumbukira kwa CPU ndi FPGA ndikothandiza kwambiri kuposa DMA. Imasunga zida za Hardware (ndiko kuti, dera la FPGA) ndikuthandizira woyendetsa kernel wa Linux.
    Chenjezo: Kusamutsa kukumbukira pakati pa dongosolo la HPS DDR logawidwa ndi DDR dongosolo lomwe limapezeka kokha ku FPGA ndilochedwa kwambiri. Ngati mungasankhe kutero
    kusamutsa kukumbukira motere, gwiritsani ntchito pazambiri zochepa zokha.
  4. Wolandirayo ndi chipangizocho amachita kusamutsa kwa data kosakhala kwa DMA pakati pa wina ndi mnzake kudzera pa mlatho wa HPS-to-FPGA (H2F), pogwiritsa ntchito doko limodzi la 32-bit. Chifukwa chake, popanda DMA, kernel ya Linux imatha kungopereka pempho limodzi lowerengera kapena kulemba la 32-bit, kotero sikofunikira kukhala ndi kulumikizana kwakukulu.
  5. Wolandirayo amatumiza zowongolera ku chipangizocho kudzera pamlatho wopepuka wa H2F (LH2F).
    Chifukwa ma siginecha owongolera kuchokera kwa wolandila kupita ku chipangizocho ndi ma siginecha otsika, mlatho wa LH2F ndiwabwino pantchitoyo.

1.2 Kutumiza Platform Yolozera ku SoC FPGA Board Yanu
Kuyika Cyclone V SoC Development Kit Reference Platform ku board yanu ya SoC FPGA, chitani izi:

  1. Sankhani memory imodzi ya DDR kapena mitundu iwiri ya kukumbukira kwa DDR ya c5soc Reference Platform monga poyambira kupanga kwanu.
  2. Sinthani malo a pini mu ALTERAOCLSDKROOT/board/c5soc/ /pamwamba.qsf file, pomwe ALTERAOCLSDKROOT ndiye njira yopita komwe kuli Intel FPGA SDK yoyika OpenCL, ndi ndilo dzina lachikwatu la gulu losiyana. Chikwatu cha c5soc_sharedonly ndi chamitundu yosiyanasiyana yokhala ndi DDR memory system. Chikwatu cha c5soc ndi chamitundu yosiyanasiyana ya board yokhala ndi makina awiri okumbukira a DDR.
  3.  Sinthani makonda a DDR a ma block a HPS ndi/kapena FPGA SDRAM mu ALTERAOCLSDKROOT/board/c5soc/ /system.qsys file.
    4. Intel FPGA SDK yonse ya OpenCL yokonda ma board iyenera kukwaniritsa kutsekedwa kotsimikizika kwa nthawi. Chifukwa chake, kuyika kamangidwe kuyenera kukhala koyera nthawi. Kuyika gawo la c5soc board (acl_iface_partition.qxp) ku bolodi yanu ya SoC FPGA, chitani izi:
    Kuti mudziwe zambiri zokhudza kusintha ndi kusunga magawo a bolodi, onani Quartus
    Prime Incremental Compilation for Hierarchical and Team-based Design mutu wa Quartus Prime Standard Edition Handbook.
    a. Chotsani acl_iface_partition.qxp kuchokera ku ALTERAOCLSDKROOT/board/c5soc/c5soc directory.
    b. Yambitsani dera la acl_iface_region LogicLock™ posintha lamulo la Tcl set_global_assignment -name LL_ENABLED OFF -section_id acl_iface_region to set_global_assignment -name LL_ENABLED ON -section_id acl_iface_region
    c. Lembani kernel ya OpenCL ya bolodi lanu.
    d. Ngati kuli kofunikira, sinthani kukula ndi malo a dera la LogicLock.
    e. Mukakhutitsidwa kuti kuyika kwanu ndi koyera nthawi yake, tumizani gawolo monga acl_iface_partition.qxp Quartus Prime Exported Partition File.
    Monga tafotokozera mu gawo la Kukhazikitsa Nthawi Yotsimikizika ya Nthawi ya AIntel FPGA SDK ya OpenCL Custom Platform Toolkit User Guide, potengera izi .qxp  file mumapangidwe apamwamba, mumakwaniritsa zofunikira zoperekera mapangidwe a board okhala ndi nthawi yotsimikizika yotseka.
    Pazifukwa zomwe zingakhudze kuchuluka kwa zotsatira (QoR) za gawo lanu lotumizidwa kunja, tchulani za General Quality of Results Zolingalira za gawo la Exported Board Partition mu Intel FPGA SDK ya OpenCL Custom Platform Toolkit User Guide.
    f. Zimitsani dera la acl_iface_region LogicLock pobweza lamulo mu Gawo 2 kubwerera ku set_global_assignment -name LL_ENABLED OFF section_id acl_iface_region.
  4. Ngati bolodi lanu la SoC FPGA likugwiritsa ntchito mapini ndi zotumphukira zosiyanasiyana za block ya HPS, panganinso chojambulira ndi gwero la mtengo wa chipangizo (DTS) file. Mukasintha makonda owongolera kukumbukira a HPS DDR, sinthaninso chojambulira.
  5. Pangani chithunzi cha SD flash khadi.
  6. Pangani Custom Platform yanu, yomwe ili ndi chithunzi cha SD flash card.
  7. Ganizirani kupanga mtundu wa nthawi yoyendetsera malo anu a Custom Platform kuti mugwiritse ntchito ndi Intel FPGA Runtime Environment (RTE) ya OpenCL. Mtundu wa RTE wa Custom Platform yanu simaphatikizirapo maupangiri a hardware ndi chithunzi cha SD flash card. Pulatifomu iyi ya Custom imadzaza pa SoC FPGA system kuti ilole mapulogalamu omwe akukhala nawo azigwira ntchito. Mosiyana ndi izi, mtundu wa SDK wa Custom Platform ndiofunikira kuti SDK ipange ma kernel a OpenCL.
    Langizo: Mutha kugwiritsa ntchito mtundu wa SDK wa Custom Platform yanu pa RTE. Kupulumutsa
    space, chotsani chithunzi cha khadi la SD kuchokera ku mtundu wa RTE wa Custom Platform yanu.
  8. Yesani Custom Platform yanu.
    Onani Kuyesa gawo la Hardware Design la Intel FPGA SDK ya OpenCL Custom Platform Toolkit User Guide kuti mudziwe zambiri.

Maulalo Ogwirizana

  • Kuyesa Mapangidwe a Hardware
  • Quartus Prime Incremental Compilation for Hierarchical and Team-based Design
  • Kukhazikitsa Mayendedwe Otsimikizika a Nthawi
  • Zolinga Zazambiri Zazotsatira za Gawo la Exported Board Partition

1.2.1 Kukonzanso Ported Reference Platform
Mu mtundu waposachedwa wa Cyclone V SoC Development Kit Reference Platform, chipika cha HPS chili mkati mwa magawo omwe amatanthauzira zonse zomveka. Komabe, simungathe kutumiza HPS ngati gawo la .qxp file. Kuti musinthe Custom Platform yomwe ilipo yomwe mudasintha kuchokera ku c5soc yam'mbuyomu, gwiritsani ntchito preservation flow ya QXP, sinthani chithunzi cha SD flash card kuti mupeze malo omwe akuthamanga, ndikusintha board_spec.xml file kuti athe automigration.
Altera® SDK ya OpenCL mtundu 14.1 ndi kupitilira apo imafufuza board_spec.xml file kudziwa zambiri za board, ndikukhazikitsa zosintha zokha. Chifukwa inu kusintha
kupanga pokhazikitsa kayendedwe ka kasungidwe ka QXP, muyenera kusintha board_spec.xml file ku mtundu wake wamakono. Kusintha kwa file imalola SDK kusiyanitsa pakati pa Mapulatifomu Amakonda Osasungidwa ndi Mapulatifomu amakono a QXP-based Custom Platform. Onani ku Custom Platform Automigration for Forward Compatibility mu Intel FPGA SDK ya OpenCL Custom Platform Toolkit User Guide kuti mudziwe zambiri.

  1. Kuti mugwiritse ntchito njira yosungira ya QXP mu kamangidwe ka hardware ka Cyclone V SoC FPGA yomwe imachokera ku c5soc yam'mbuyo, chitani zotsatirazi kuti mupange gawo laling'ono kuti muchotse HPS ku .qxp file:
    a. Musanapange magawo ozungulira nonkrnel logic, pangani magawo mozungulira HPS mu .qsf Quartus Prime Settings File.
    Za exampLe:
    # Gawani pamanja chitsanzo chomwe chili ndi HPS-dedicated I/O set_instance_assignment -name PARTITION_HIERARCHY borde_18261 -to "system: the_system|system_acl_iface:acl_iface|system_acl_iface_hps_0:hps_0|system_psh_acl_iface_psh_0: system_acl_iface_hps_0_hps_io_border:border” -section_id “system_acl_iface_hps_0_hps_io_border:border”
    # Khazikitsani magawo kuti akhale amtundu wa HPS_PARTITION kuti asinthidwe moyenera ndi Quartus ena onse
    set_global_assignment -name PARTITION_TYPE HPS_PARTITION -section_id “system_acl_iface_hps_0_hps_io_border:border”
    quartus_cdb pamwamba -c pamwamba
    -incremental_compilation_export=acl_iface_partition.qxp
    -incremental_compilation_export_partition_name=acl_iface_partition
    -incremental_compilation_export_post_synth=pa
    -incremental_compilation_export_post_fit=pa
    -incremental_compilation_export_routing=pa
    -kuwonjezera_kuphatikiza_export_flatten=kuchoka
    Mukachotsa HPS kugawo, mutha kuitanitsa .qxp file ndi kupanga mapangidwe anu.
  2. Sinthani chithunzi cha SD flash khadi ndi mtundu waposachedwa wa Intel FPGA RTE wa OpenCL pochita izi:
    a. Phiri la file tebulo logawa (fat32) ndikuwonjezera file system (ext3) magawo mu chithunzi chomwe chilipo ngati zida za loop-back. Kuti mudziwe zambiri, onani Gawo 2 pomanga Chithunzi cha SD Flash Card.
    b. Mu /home/root/opencl_arm32_rte chikwatu, chotsani files kuchokera ku mtundu wakale wa RTE.
    c. Tsitsani ndi kumasula zosintha zaposachedwa za RTE mu /home/root/opencl_arm32_rte chikwatu.
    d. Mu /driver/version.h file za Custom Platform, sinthani ACL_DRIVER_VERSION ntchito kuti . (kwa example, 16.1.x, pomwe 16.1 ndi verison ya SDK, ndipo x ndi mtundu wa dalaivala womwe mwakhazikitsa).
    e. Manganinso dalaivala.
    f. Chotsani chikwatu (ma) chikwatu cha Custom Platform yanu. Lembani Custom Platform, pamodzi ndi dalaivala wosinthidwa, ku /home/root/opencl_arm_rte/board directory.
    g. Koperani Altera.icd file kuchokera ku /home/root/opencl_arm32_rte chikwatu ndikuwonjezera ku /etc/OpenCL/vendors directory.
    h. Chotsani ndikuyesa chithunzi chatsopano. Kuti mudziwe zambiri, onani Njira 8 mpaka 11 pomanga Chithunzi cha SD Flash Card.

Maulalo Ogwirizana

  • Kupanga chithunzi cha SD Flash Card patsamba 14
    Mulinso ndi mwayi kulenga latsopano Sd kung'anima khadi fano.
  • Custom Platform Automigration for Forward Compatibility

1.3 Pulogalamu Yothandizira pa Memory Yogawana
Kugawana kukumbukira kwakuthupi pakati pa FPGA ndi CPU ndiye kukumbukira kokondedwa kwa ma OpenCL kernels omwe akuyenda pa SoC FPGAs. Chifukwa FPGA imafikira kukumbukira kwakuthupi, mosiyana ndi kukumbukira komwe kumagawana, ilibe mwayi wopezeka pamasamba amasamba a CPU omwe amajambula maadiresi amtundu wa ma adilesi amasamba.
Pankhani ya Hardware, ma OpenCL ma kernels amagawana zokumbukira zakuthupi kudzera pakulumikizana mwachindunji ndi chowongolera cholimba cha HPS DDR. Pankhani ya pulogalamuyo, kuthandizira kukumbukira kwakuthupi kumaphatikizapo izi:

  1. Kukhazikitsa kwamapulogalamu ofananirako pakugawa kukumbukira pa CPU (mwachitsanzoample, malloc () ntchito) silingathe kugawa dera la kukumbukira lomwe FPGA ingagwiritse ntchito.
    Kukumbukira kuti ntchito ya malloc () imagawika ndi yolumikizana mu adilesi yokumbukira, koma masamba aliwonse omwe ali pansi sangakhale olumikizana mwakuthupi. Momwemonso, wolandirayo ayenera kugawa magawo okhudzana ndi kukumbukira. Komabe, kuthekera uku kulibe m'malo ogwiritsa ntchito pa Linux. Chifukwa chake, woyendetsa kernel wa Linux ayenera kugawa.
  2. Woyendetsa kernel wa OpenCL SoC FPGA Linux akuphatikiza mmap () ntchito kuti agawire kukumbukira kwathupi komwe kumagawana ndikuyika pa malo ogwiritsa ntchito. Ntchito ya mmap() imagwiritsa ntchito makina a Linux kernel call dma_alloc_coherent() kuti apemphe zigawo zokumbukira zomwe zimalumikizana ndi chipangizo.
  3. Mu kernel ya Linux yosasinthika, dma_alloc_coherent() sagawira kukumbukira molumikizana ndi thupi kupitilira 0.5 megabytes (MB) kukula kwake. Kuti mulole dma_alloc_coherent() kugawa makumbukidwe ambiri okhudzana ndi thupi, yambitsani mawonekedwe a contiguous memory allocator (CMA) a Linux kernel ndikubwezeretsanso kernel ya Linux.
    Kwa Cyclone V SoC Development Kit Reference Platform, CMA imayang'anira 512 MB pa 1 GB ya kukumbukira kwakuthupi. Mutha kukulitsa kapena kuchepetsa mtengowu, kutengera kuchuluka kwa kukumbukira komwe kukufunika. Kuyimba kwa dma_alloc_coherent() sikungathe kugawa 512 MB yathunthu ya kukumbukira thupi; komabe, imatha kupeza pafupifupi 450 MB ya kukumbukira.
  4. CPU ikhoza kusunga kukumbukira komwe dma_alloc_coherent() kuyitana kumagawa. Makamaka, kulemba ntchito kuchokera ku pulogalamu yolandila sizikuwoneka ku ma OpenCL kernels. Ntchito ya mmap() mu OpenCL SoC FPGA Linux kernel driver ilinso ndi mafoni opita ku pgprot_noncached() kapena remap_pf_range() ntchito kuti mulepheretse kusungitsa chigawo ichi chokumbukira bwino lomwe.
  5. Pambuyo pa ntchito ya dma_alloc_coherent() ipereka chikumbukiro chogwirizana, mmap() imabwezeretsa adilesi yoyambira kumayambiriro kwa mndandanda, womwe ndi nthawi ya adilesi ya kukumbukira komwe mumagawa. Pulogalamu yolandila imafunikira adilesi iyi kuti ifike pokumbukira. Kumbali inayi, ma kernels a OpenCL amafunikira ma adilesi amthupi. Dalaivala wa Linux kernel amatsata mapu a ma adilesi enieni. Mutha kuyika ma adilesi omwe mmap() amabwerera ku ma adilesi enieni powonjezera funso kwa dalaivala.
    Foni ya aocl_mmd_shared_mem_alloc() MMD application programming interface (API) imakhala ndi mafunso awa:
    a. Ntchito ya mmap () yomwe imagawa kukumbukira ndikubwezeretsa adilesi yeniyeni.
    b. Funso lowonjezera lomwe limayika adilesi yomwe yabwezedwa ku adilesi yapagulu.
    The aocl_mmd_shared_mem_alloc() MMD API kuyimba kenako kubweza maadiresi awiri
    -adilesi yomwe yabwezedwa ndi adilesi yeniyeni, ndipo adilesi yake imapita ku device_ptr_out.
    Zindikirani: Dalaivala atha kungojambula maadiresi omwe mmap() ntchito imabwerera kumaadiresi enieni. Ngati mupempha adilesi yaposachedwa ya pointer ina iliyonse, dalaivala amabweza mtengo wa NULL.

Chenjezo: Intel FPGA SDK yamalaibulale anthawi ya OpenCL amalingalira kuti kukumbukira komwe kugawidwa ndiye kukumbukira koyamba kutchulidwa mu board_spec.xml file. Mwanjira ina, adilesi yomwe woyendetsa kernel wa Linux amapeza imakhala adilesi ya Avalon® yomwe kernel ya OpenCL imadutsa ku HPS SDRAM.
Pankhani ya laibulale yothamanga, gwiritsani ntchito clCreateBuffer() kuyimba kuti mugawire kukumbukira komwe mudagawana ngati chosungira chipangizo motere:

  • Pamitundu iwiri ya bolodi ya DDR yokhala ndi makumbukidwe omwe amagawana komanso osagawana, clCreateBuffer() imagawa zokumbukira zogawana ngati mutchula mbendera ya CL_MEM_USE_HOST_PTR. Kugwiritsa ntchito mbendera zina kumapangitsa clCreateBuffer() kugawa buffer mu kukumbukira kosagawana.
  • Pazosiyana za bolodi la DDR lomwe lili ndi kukumbukira kogawana kokha, clCreateBuffer () imagawa kukumbukira komwe kumagawidwa mosasamala kanthu kuti mwatchula mbendera iti.
    Pakadali pano, chithandizo cha 32-bit Linux pa ARM CPU chimayang'anira kuchuluka kwa chithandizo chogawana kukumbukira mumalaibulale anthawi ya SDK. Mwanjira ina, malaibulale othamanga amaphatikizidwa kumadera ena (mwachitsanzoample, x86_64 Linux kapena 64-bit Windows) sizigwirizana ndi kukumbukira kogawana.
    C5soc sinagwiritse ntchito kukumbukira kosasinthika kuti isiyanitse pakati pa kukumbukira komwe kugawana ndi komwe sikunagawane pazifukwa izi:
    1. Mbiri-Kuthandizira kukumbukira kosasinthika sikunapezeke pamene chithandizo cha kukumbukira chogawana chinapangidwa poyamba.
    2. Uniform mawonekedwe-Chifukwa OpenCL ndi muyezo wotseguka, Intel imasunga kusinthasintha pakati pa ogulitsa nsanja zamakompyuta osiyanasiyana. Chifukwa chake, mawonekedwe omwewo monga mapangidwe ena ogulitsa board amagwiritsidwa ntchito kugawa ndikugwiritsa ntchito kukumbukira komwe kugawana.

1.4 FPGA Kusinthanso
Kwa SoC FPGAs, CPU imatha kukonzanso nsalu yayikulu ya FPGA popanda kusokoneza magwiridwe antchito a CPU. FPGA Manager hardware block yomwe imayendetsa HPS ndi FPGA yayikulu imapanganso kukonzanso. Linux kernel imaphatikizapo dalaivala yemwe amathandizira kupeza mosavuta kwa FPGA Manager.

  • Ku view udindo wa FPGA pachimake, pemphani mphaka /sys/class/fpga/fpga0/ status command.
    Intel FPGA SDK ya pulogalamu ya OpenCL yopezeka ndi Cyclone V SoC Development Kit Reference Platform imagwiritsa ntchito mawonekedwewa kukonza FPGA. Mukakonzanso maziko a FPGA ndi CPU yothamanga, pulogalamuyo imagwira ntchito zonsezi:
    1. Musanakonzenso mapulogalamu, zimitsani milatho yonse yolumikizirana pakati pa FPGA ndi HPS, milatho yonse ya H2F ndi LH2F.
    Yambitsaninso milatho iyi mukamaliza kukonza.
    Chidziwitso: Dongosolo la OpenCL siligwiritsa ntchito mlatho wa FPGA-to-HPS (F2H). Onani gawo la HPS-FPGA Interfaces mu Cyclone V Device Handbook, Volume 3: Hard processor System Technical Reference Manual kuti mumve zambiri.
    2. Onetsetsani kuti ulalo pakati pa FPGA ndi wowongolera wa HPS DDR wazimitsidwa panthawi yokonzanso.
    3. Onetsetsani kuti kusokoneza kwa FPGA pa FPGA kuzimitsa panthawi yokonzanso.
    Komanso, dziwitsani dalaivala kuti akane zosokoneza zilizonse kuchokera ku FPGA panthawi yokonzanso.

Yang'anani kachidindo kazomwe mungagwiritse ntchito pulogalamuyo kuti mumve zambiri za kukhazikitsidwa kwenikweni.

Chenjezo: Osasintha masinthidwe a HPS DDR controller pomwe CPU ikuyenda.
Kuchita izi kungayambitse vuto lakupha chifukwa mutha kusintha kasinthidwe ka DDR pakakhala zochitika zokumbukira kuchokera ku CPU. Izi zikutanthauza kuti CPU ikugwira ntchito, simungakonzenso pakati pa FPGA ndi chithunzi chomwe chimagwiritsa ntchito HPS DDR mukusintha kosiyana.
Kumbukirani kuti kachitidwe ka OpenCL, ndi kalembedwe ka Golden Hardware komwe kakupezeka ndi Intel SoC FPGA Embedded Design Suite (EDS), imayika HPS DDR munjira imodzi ya 256-bit.
Zigawo zamakina a CPU monga cholozera chanthambi kapena prefetcher yatsamba lamasamba imatha kutulutsa malamulo a DDR ngakhale zikuwoneka kuti palibe chomwe chikuyenda pa CPU.
Chifukwa chake, nthawi yoyambira ndiyo nthawi yokhayo yotetezeka kukhazikitsa kasinthidwe kawowongolera a HPS DDR.
Izi zikutanthauzanso kuti U-boot iyenera kukhala ndi binary yaiwisi file (.rbf) chithunzi kuti chilowetse mu kukumbukira. Kupanda kutero, mutha kupangitsa HPS DDR kukhala ndi madoko osagwiritsidwa ntchito pa FPGA ndiyeno mutha kusintha masinthidwe adoko pambuyo pake. Pazifukwa izi, dalaivala wa OpenCL Linux kernel sakuphatikizanso malingaliro ofunikira kuti akhazikitse masinthidwe owongolera a HPS DDR.
The SW3 dual in-line package (DIP) switch pa Cylone V SoC Development Kit imayang'anira mawonekedwe oyembekezeka a chithunzi cha .rbf (ndiko kuti, kaya file imapanikizidwa ndi/kapena kubisidwa). C5soc, ndi Golden Hardware Reference Design yomwe ilipo ndi SoC EDS, ili ndi zithunzi zopanikiza koma zosabisika za .rbf. Zokonda zosinthira za SW3 DIP zofotokozedwa mu Intel FPGA SDK ya OpenCL Cyclone V SoC Getting Guide Guide zimagwirizana ndi masinthidwe azithunzi a .rbf awa.

Maulalo Ogwirizana

  • Mawonekedwe a HPS-FPGA
  • Kupanga Kusintha kwa SW3

1.4.1 Tsatanetsatane wa Zomangamanga za FPGA
Thandizo la Cyclone V SoC Development Kit Reference Platform idakhazikitsidwa pa Stratix® V Reference Platform (s5_ref), yomwe ikupezeka ndi Intel FPGA SDK ya OpenCL.
Gulu lonse la c5soc Qsys system ndi kernel driver ndi ofanana kwambiri ndi omwe ali mu s5_ref.
Zida zotsatirazi za FPGA ndizofanana mu c5soc ndi s5_ref:

  • VERSION_ID block
  • Mpumulo limagwirira
  • Memory bank divider
  • Cache snoop mawonekedwe
  • Wotchi ya Kernel
  • Control registry access (CRA) imatchinga

1.5 Kupanga Chithunzi cha SD Flash Card
Chifukwa Cyclone V SoC FPGA ndi dongosolo lathunthu pa chip, muli ndi udindo wopereka tanthauzo lonse la dongosololi. Intel imalimbikitsa kuti mupereke ngati chithunzi cha SD flash card. Intel FPGA SDK ya wogwiritsa ntchito OpenCL amatha kungolemba chithunzicho ku makhadi ang'onoang'ono a SD ndipo SoC FPGA board yakonzeka kugwiritsidwa ntchito.
Kusintha Chithunzi cha SD Flash Card chomwe chilipo patsamba 13
Intel ikulimbikitsa kuti mungosintha chithunzi chomwe chilipo ndi Cyclone V SoC Development Kit Reference Platform. Mulinso ndi mwayi kulenga latsopano Sd kung'anima khadi fano.
Kupanga chithunzi cha SD Flash Card patsamba 14
Mulinso ndi mwayi kulenga latsopano Sd kung'anima khadi fano.

1.5.1 Kusintha Chithunzi cha SD Flash Card chomwe chilipo
Intel ikulimbikitsa kuti mungosintha chithunzi chomwe chilipo ndi Cyclone V SoC
Development Kit Reference Platform. Mulinso ndi mwayi kulenga latsopano Sd kung'anima khadi fano.
Chithunzi cha c5soc linux_sd_card_image.tgz file ikupezeka m'ndandanda ya ALTERAOCLSDKROOT/board/c5soc, pomwe ALTERAOCLSDKROOT imaloza njira ya Intel FPGA SDK ya zolemba za OpenCL.

Chenjerani: Kuti musinthe chithunzi cha SD flash card, muyenera kukhala ndi mizu kapena sudo mwayi.

  1. Kuti muchepetse $ALTERAOCLSDKROOT/board/c5soc/linux_sd_card_image.tgz file, yendetsani lamulo la tar xvfzlinux_sd_card_image.tgz.
  2. Lembani hello_world OpenCL wakaleampndi kupanga pogwiritsa ntchito Custom Platform thandizo lanu. Tchulani dzina la .rbf file kuti Intel FPGA SDK ya OpenCL Offline Compiler imapanga ngati opencl.rbf, ndikuyiyika pagawo la fat32 mkati mwa chithunzi cha SD flash card.
    Mutha kutsitsa wakale wa hello_worldampndi mapangidwe kuchokera ku OpenCL Design Examples page pa Altera webmalo.
  3. Ikani .rbf file mu gawo la fat32 la chithunzi cha flash card.
    Chenjerani: Gawo la fat32 liyenera kukhala ndi zonse zaZimage file ndi .rbf file. Popanda .rbf file, cholakwika chakupha chidzachitika mukalowetsa dalaivala.
  4. Mukapanga chithunzi cha khadi la SD, lembani ku micro SD khadi potchula lamulo ili: sudo dd if=/path/to/sdcard/image.bin of=/dev/sdcard
  5. Kuti muyese chithunzi cha khadi lanu la SD, chitani izi:
    a. Ikani khadi ya Micro SD mu SoC FPGA board.
    b. Limbikitsani bolodi.
    c. Funsani lamulo la aocl diagnosis utility.

1.5.2 Kupanga Chithunzi cha SD Flash Card
Mulinso ndi mwayi kulenga latsopano Sd kung'anima khadi fano. Malangizo okhazikika pakupanga chithunzi chatsopano cha SD flash card ndikumanganso chithunzi cha SD flash card chomwe chilipo chilipo pa GSRD v14.0.2 - SD Card tsamba la RocketBoards.org webmalo.
Masitepe omwe ali pansipa akufotokoza njira yopangira chithunzi cha linux_sd_card_image.tgz kuchokera pa chithunzi cha khadi la SD la Golden System Reference Design (GSRD):
Zindikirani:
Kuti mupange chithunzi kuchokera pa chithunzi cha c5soc, chitani ntchito zonse zomwe zafotokozedwa munjira iyi.

  1. Tsitsani ndikumasula GSRD SD flash card image version 14.0 kuchokera ku Rocketboards.org.
  2. Phiri la file tebulo logawa (fat32) ndikuwonjezera file system (ext3) magawo pachithunzichi ngati zida za loop-back. Kuti muyike partition, chitani izi:
    a. Tsimikizirani kuyambika kwa magawo mkati mwa chithunzicho poyitanitsa /sbin/fdisk -lu image_file lamula.
    Za example, gawo logawa nambala 1 la mtundu wa W95 FAT lili ndi block offset ya 2121728. Ndi ma byte 512 pa block, ma byte offset ndi 512 byte x 2121728 = 1086324736 byte.
    b. Dziwani chida chaulere cha loop (mwachitsanzoample, /dev/loop0) polemba lamulo lotayika -f.
    c. Pongoganiza kuti /dev/loop0 ndiye chida chaulere cha loop, perekani chithunzi chanu cha flash khadi ku chipangizo chotchinga poyitanira lostup /dev/loop0 image_file -0 1086324736 lamulo.
    d. Kwezani chipangizo cha loop poyitanitsa phiri /dev/loop0 /media/disk1 lamulo.
    Mkati mwa chithunzi file, /media/disk1 tsopano ndi gawo lamafuta32.
    e. Bwerezani masitepe A mpaka d pagawo la ext3.
  3. Tsitsani mtundu wa Cyclone V SoC FPGA wa Intel FPGA Runtime Environment for OpenCL phukusi kuchokera pa Download Center pa Altera. webmalo.
    a. Dinani batani Tsitsani pafupi ndi Quartus Prime software edition.
    b. Tchulani mtundu womasulidwa, makina ogwiritsira ntchito, ndi njira yotsitsa.
    c. Dinani Zowonjezera Mapulogalamu tabu, ndikusankha kutsitsa Intel FPGA
    Runtime Environment ya OpenCL Linux Cyclone V SoC TGZ.
    d. Mukamaliza kutsitsa aocl-rte- .arm32.tgz file, masulani ku
    chikwatu chomwe muli nacho.
  4. Ikani aocl-rte- .arm32 chikwatu mu /home/root/opencl_arm32_rte chikwatu pa ext3 gawo la chithunzi file.
  5. Chotsani chikwatu (ma) cha Hardware Platform yanu, ndiyeno ikani Custom Platform mu board subdirectory ya /home/root/ opencl_arm32_rte.
  6. Pangani fayilo ya init_opencl.sh file mu /nyumba/mizu chikwatu chokhala ndi izi: kutumiza kunja ALTERAOCLSDKROOT=/nyumba/muzu/opencl_arm32_rte kutumiza kunja AOCL_BOARD_PACKAGE_ROOT=$ALTERAOCLSDKROOT/board/ kutumiza PATH=$ALTERAOCLSDKROOT/bin:$PATH kutumiza LD_LIBRARY_PATH=$ALTERAOCLSDKROOT/host/arm32/lib:$LD_LIBRARY_PATH insmod $AOCL_BOARD_PACKAGE_ROOT/driver/aclsoc_drv.ko
    Wogwiritsa ntchito SDK amayendetsa gwero la ./init_opencl.sh kuti atsegule zosintha zachilengedwe ndi dalaivala wa OpenCL Linux kernel.
  7. Ngati mukufuna kusintha preloader, ndi DTS files, kapena Linux kernel, mufunika compiler ya arm-linux-gnueabihf-gcc kuchokera ku SoC EDS. Tsatirani malangizo omwe ali mu Intel SoC FPGA Embedded Design Suite User Guide kuti mutenge pulogalamuyo, muyikonzenso, ndikusintha zoyenera. files pagawo lokwera mafuta32.
    Chenjerani: Ndizotheka kuti mukufunika kusintha chojambuliracho ngati Platform yanu ya Custom ili ndi ma pini osiyanasiyana kuposa omwe ali mu c5soc.
    Kumbukirani: Ngati mubweza kernel ya Linux, phatikizaninso dalaivala wa Linux kernel yemwe ali ndi Linux kernel source. files. Ngati pali kusagwirizana pakati pa dalaivala wa Linux kernel ndi Linux kernel, dalaivala sangakweze. Komanso, muyenera kutsegula CMA.
    Onani Kubwezeretsanso Linux Kernel kuti mumve zambiri.
  8. Lembani hello_world OpenCL wakaleampndi kupanga pogwiritsa ntchito Custom Platform thandizo lanu. Tchulani dzina la .rbf file kuti Intel FPGA SDK ya OpenCL Offline Compiler imapanga ngati opencl.rbf, ndikuyiyika pagawo la fat32 mkati mwa chithunzi cha SD flash card.
    Mutha kutsitsa wakale wa hello_worldampndi mapangidwe kuchokera ku OpenCL Design Examples page pa Altera webmalo.
    9. Mukasunga zonse zofunika files pa chithunzi cha flash card, tchulani malamulo awa:
    a. kulunzanitsa
    b. tsitsani /media/disk1
    c. tsitsa ku ndi dzina lachikwatu lomwe mumagwiritsa ntchito pokweza gawo la ext3 mu 3 patsamba 3 (kwa ext2ample, /media/disk2).
    d. kutaya -d /dev/loop0
    e. kutaya -d /dev/loop1
  9. Limbikitsani chithunzi cha SD flash card potchula lamulo ili: tar cvfz .tgz linux_sd_card_image
  10. Kupereka .tgz file mkati mwa chikwatu cha Custom Platform yanu.
  11. Kuti muyese chithunzi cha khadi lanu la SD, chitani izi:
    a. Lembani chithunzicho chosakanizidwa pa micro SD flash khadi.
    b. Ikani khadi ya Micro SD mu SoC FPGA board.
    c. Limbikitsani bolodi.
    d. Funsani lamulo la aocl diagnosis utility.

Maulalo Ogwirizana

  • Intel SoC FPGA Embedded Design Suite User Guide
  • OpenCL Design Examples page pa Altera webmalo
  • Kubwezeretsanso Linux Kernel patsamba 16
    Kuti mutsegule CMA, muyenera kukonzanso kernel ya Linux.
  • Kufunsa Dzina la Chipangizo cha FPGA Board Yanu (kuzindikira)

1.6 Kupanga Linux Kernel ya Cyclone V SoC FPGA
Musanayambe kugwiritsa ntchito OpenCL pa bolodi la Cyclone V SoC FPGA, muyenera kupanga gwero la Linux kernel, ndikuphatikiza ndikuyika OpenCL Linux kernel driver.

  1. Kubwezeretsanso Linux Kernel patsamba 16
    Kuti mutsegule CMA, muyenera kukonzanso kernel ya Linux.
  2. Kupanga ndi Kuyika OpenCL Linux Kernel Driver patsamba 17 Phatikizani oyendetsa kernel ya OpenCL Linux motsutsana ndi gwero la kernel.

1.6.1 Kubwezeretsanso Linux Kernel
Kuti mutsegule CMA, muyenera kukonzanso kernel ya Linux.

  1. Dinani GSRD v14.0 - Kupanga ulalo wa Linux patsamba la Zothandizira pa RocketBoards.org webtsamba kuti mupeze malangizo otsitsa ndikumanganso kachidindo ka Linux kernel.
    Kuti mugwiritse ntchito ndi Intel FPGA SDK ya OpenCL, tchulani socfpga-3.13-rel14.0 ngati .
  2. Zindikirani: Ntchito yomangayi imapanga arch/arm/configs/socfpga_defconfig file. Izi file imatchula makonda a socfpga default configuration.
    Onjezani mizere yotsatirayi pansi pa arch/arm/configs/socfpga_defconfig file.
    CONFIG_MEMORY_ISOLATION=y
    CONFIG_CMA=y
    CONFIG_DMA_CMA=y
    CONFIG_CMA_DEBUG=y
    CONFIG_CMA_SIZE_MBYTES=512
    CONFIG_CMA_SIZE_SEL_MBYTES=y
    CONFIG_CMA_ALIGNMENT=8
    CONFIG_CMA_AREAS=7
    Mtengo wa kasinthidwe wa CONFIG_CMA_SIZE_MBYTES umakhazikitsa malire apamwamba pa chiwerengero chonse cha makumbukidwe olumikizana omwe alipo. Mutha kuwonjezera mtengo ngati mukufuna kukumbukira zambiri.
  3. Chenjerani: Kuchuluka kwa kukumbukira kwakuthupi komwe kumapezeka kwa purosesa ya ARM pa bolodi la SoC FPGA ndi 1 GB. Intel sichikulangiza kuti muyike woyang'anira CMA pafupi ndi 1 GB.
  4. Thamangani make mrproper command kuti muyeretse kasinthidwe kameneka.
  5. Thamangani make ARCH=arm socfpga_deconfig lamulo.
    ARCH=mkono umasonyeza kuti mukufuna kukonza kamangidwe ka ARM.
    socfpga_defconfig ikuwonetsa kuti mukufuna kugwiritsa ntchito kasinthidwe ka socfpga.
  6. Thamangani CROSS_COMPILE=arm-linux-gnueabihf- lamulo.
    Lamuloli limakhazikitsa CROSS_COMPILE kusinthika kwa chilengedwe kuti iwonetsere chiyambi cha chingwe chomwe mukufuna.
  7. Thamangani make ARCH=arm zImage command. Chithunzi chotsatira chikupezeka mu arch/arm/boot/zImage file.
  8. Ikani zImage file mu gawo la fat32 la chithunzi cha flash card. Kuti mudziwe zambiri, onani buku la Cyclone V SoC FPGA-specific GSRD User Manual pa Rocketboards.org.
  9. Zindikirani: Kuti muyike molondola dalaivala wa OpenCL Linux kernel, choyamba tsegulani SDKgenerated.rbf file ku FPGA.
    Kuti mupange .rbf file, pangani SDK design example ndi Cyclone V SoC Development Kit Reference Platform monga nsanja yomwe imayang'aniridwa.
    9. Ikani .rbf file mu gawo la fat32 la chithunzi cha flash card.
    Chidziwitso: Gawo la fat32 liyenera kukhala ndi zonse zaZimage file ndi .rbf file. Popanda .rbf file, cholakwika chakupha chidzachitika mukalowetsa dalaivala.
  10. Lowetsani khadi ya Micro SD yokonzedwa, yomwe ili ndi chithunzi cha SD khadi yomwe mudasintha kapena kupanga kale, mu Cyclone V SoC Development Kit ndiyeno yambitsani bolodi ya SoC FPGA.
  11. Tsimikizirani mtundu wa Linux kernel yoyikapo pogwiritsa ntchito uname -r command.
  12. Kuti muwonetsetse kuti mumathandizira CMA bwino mu kernel, ndi bolodi ya SoC FPGA yoyendetsedwa, yendetsani lamulo la grep init_cma /proc/kallsyms.
    CMA imayatsidwa ngati zotulutsa zilibe kanthu.
  13. Kuti mugwiritse ntchito kernel ya Linux yopangidwanso ndi SDK, pangani ndikuyika dalaivala wa Linux kernel.

Maulalo Ogwirizana

  • Mabuku Ogwiritsa Ntchito a Golden System Reference Design (GSRD).
  • Kupanga Chithunzi cha SD Flash Card patsamba 13
    Chifukwa Cyclone V SoC FPGA ndi dongosolo lathunthu pa chip, muli ndi udindo wopereka tanthauzo lonse la dongosololi.

1.6.2 Kupanga ndi Kuyika OpenCL Linux Kernel Driver
Lembani dalaivala wa OpenCL Linux kernel motsutsana ndi gwero la kernel.

Gwero la driver likupezeka mu Cyclone V SoC FPGA mtundu wa Intel FPGA Runtime Environment for OpenCL. Kuphatikiza apo, onetsetsani kuti mwakweza Intel FPGA SDK ya OpenCL-generated .rbf file mu FPGA kuti mupewe kuyika kolakwika kwa Linux kernel module.

  1. Tsitsani mtundu wa Cyclone V SoC FPGA wa Intel FPGA Runtime Environment for OpenCL phukusi kuchokera pa Download Center pa Altera. webmalo.
    a. Dinani batani Tsitsani pafupi ndi Quartus Prime software edition.
    b. Tchulani mtundu womasulidwa, makina ogwiritsira ntchito, ndi njira yotsitsa.
    c. Dinani Zowonjezera Mapulogalamu tabu, ndikusankha kutsitsa Intel FPGA
    Runtime Environment ya OpenCL Linux Cyclone V SoC TGZ.
    d. Mukamaliza kutsitsa aocl-rte- .arm32.tgz file, masulani ku
    chikwatu chomwe muli nacho.
    Gwero la driver lili mu aocl-rte- .arm32/board/c5soc/ driver directory.
  2. Kuti mubwezerenso dalaivala wa OpenCL Linux kernel, ikani mtengo wa KDIR mu Pangani dalaivalafile ku chikwatu chomwe chili ndi Linux kernel source files.
  3. Thamangani lamulo la export CROSS_COMPILE=arm-linux-gnueabihf- kuti muwonetse mawu oyambira pachipangizo chanu.
  4. Thamangani make clean command.
  5. Thamangani make command kuti mupange aclsoc_drv.ko file.
  6. Tumizani chikwatu cha opencl_arm32_rte kupita ku bolodi la Cyclone V SoC FPGA.
    Kuthamanga scp -r mizu@paddress yanu: command imayika malo othamanga mu /home/root directory.
  7. Thamangani init_opencl.sh script yomwe mudapanga mukamamanga makhadi a SD.
  8.  Funsani lamulo la aocl diagnosis utility. Ntchito yozindikira ibweretsa zotsatira zodutsa mutayendetsa init_opencl.sh bwino.

1.7 Nkhani Zodziwika
Pakadali pano, pali zoletsa zina pakugwiritsa ntchito Intel FPGA SDK ya OpenCL yokhala ndi Cyclone V SoC Development Kit Reference Platform.

  1. Simungathe kuchotsera mayina ogulitsa ndi ma board omwe adanenedwa ndi CL_DEVICE_VENDOR ndi CL_DEVICE_NAME pa foni ya clGetDeviceInfo().
  2. Ngati wolandirayo agawira kukumbukira kosalekeza mu DDR yogawidwa (ndiko kuti, HPS DDR) ndipo imasintha kukumbukira kosalekeza pambuyo pa kuphedwa kwa kernel, zomwe zili mu kukumbukira zikhoza kukhala zachikale. Nkhaniyi ikubwera chifukwa FPGA core sangathe kuyang'ana pa CPU-to-HPS DDR transaction.
    Kuti mupewe kuphedwa kwa kernel kuti musapeze zomwe zachikale, gwiritsani ntchito imodzi mwa njira zotsatirazi:
    • Osasintha kukumbukira nthawi zonse pambuyo poyambitsa.
    • Ngati mukufuna __ma seti angapo a data, pangani ma buffer angapo osasintha.
    • Ngati zilipo, perekani kukumbukira kosalekeza mu FPGA DDR pa accelerator board yanu.
  3. Chida cha SDK pa ARM chimangothandizira pulogalamuyo ndikuzindikira malamulo ogwiritsira ntchito.
    Kuwala, kukhazikitsa ndi kuchotsa malamulo ogwiritsira ntchito sikugwira ntchito ku Cyclone V SoC Development Kit pazifukwa izi:
    a. Chothandiziracho chiyenera kupanga aclsoc_drv Linux kernel driver ndikuyiyambitsa pa SoC FPGA. makina otukuka ayenera kupanga kuphatikiza; komabe, ili kale ndi Linux kernel magwero a SoC FPGA. Magwero a Linux kernel pamakina achitukuko ndi osiyana ndi a SoC FPGA. Malo omwe magwero a Linux kernel a SoC FPGA mwina sakudziwika kwa wogwiritsa ntchito SDK. Momwemonso, ntchito yochotsa sikupezekanso ku Cyclone V SoC Development Kit.
    Komanso, kupereka aclsoc_drv ku SoC board ndizovuta chifukwa kugawa kosasintha kwa Cyclone V SoC Development Kit kulibe Linux kernel ikuphatikiza. files kapena wolemba GNU Compiler Collection (GCC).
    b. Kugwiritsa ntchito kung'anima kumafuna kuyika .rbf file ya mapangidwe a OpenCL pagawo la FAT32 la micro SD flash card. Pakadali pano, gawo ili silinakhazikitsidwe pomwe wogwiritsa ntchito SDK akweza bolodi. Chifukwa chake, njira yabwino yosinthira magawowa ndikugwiritsa ntchito chowerengera chamakhadi ndi makina achitukuko.
  4. Mukasintha pakati pa Intel FPGA SDK ya OpenCL Offline Compiler yotheka files (.aocx) zomwe zimagwirizana ndi mitundu yosiyanasiyana ya board (ndiyo, c5soc ndi c5soc_sharedonly), muyenera kugwiritsa ntchito pulogalamu ya SDK kuti mutsegule .aocx file kwa mtundu watsopano wa board kwa nthawi yoyamba. Mukangoyendetsa pulogalamu yogwirizira pogwiritsa ntchito gulu latsopano koma FPGA ili ndi chithunzi cha gulu lina, cholakwika chakupha chikhoza kuchitika.
  5. The .qxp file sichimaphatikizapo magawo ogawa chifukwa pulogalamu ya Quartus Prime imakwaniritsa nthawi zonse zofunikira za magawowa.
  6. Mukakweza bolodi, adilesi yake ya media access control (MAC) imayikidwa nambala yachisawawa. Ngati malamulo anu a LAN sakulola izi, ikani adilesi ya MAC pochita izi:
    a. Panthawi yokweza U-Boot, dinani kiyi iliyonse kuti mulowetse mawu a U-Boot.
    b. Lembani setenv ethaddr 00:07:ed:00:00:03 pa nthawi yolamula.
    Mutha kusankha adilesi iliyonse ya MAC.
    c. Lembani lamulo la saveenv.
    d. Yambitsaninso bolodi.

1.8 Mbiri Yokonzanso Zolemba
Table 1.
Mbiri Yokonzanso Zolemba za Intel FPGA SDK ya OpenCL Cyclone V SoC
Development Kit Reference Porting Guide

Tsiku Baibulo Zosintha
Mayi-17 2017.05.08 •Kumasulidwa kokonza.
Octoboer 2016 2016.10.31 •Anasinthidwanso dzina la Altera SDK la OpenCL kukhala Intel FPGA SDK ya OpenCL.
•Anasinthidwanso dzina la Altera Offline Compiler kukhala Intel FPGA SDK ya OpenCL Offline Compiler.
Mayi-16 2016.05.02 •Malangizo osinthidwa omanga ndikusintha chithunzi cha SD flash card.
•Malangizo osinthidwa okhudza kubwezeretsa kernel ya Linux ndi driver wa OpenCL Linux kernel.
Novemba-15 2015.11.02 •Kutulutsidwa kosamalira, ndikusintha zochitika za Quartus II kukhala Quartus Prime.
Mayi-15 15.0.0 Mu FPGA Reconfiguration, adachotsa malangizo kuti akonzenso maziko a FPGA
ndi a. rbf chithunzi pokopa mphaka filedzina>. rbf
> /dev/ fpga0 lamulo chifukwa njirayi siyovomerezeka.
Disembala-14 14.1.0 •Anasinthanso chikalatacho kuti Altera Cyclone V SoC Development Kit Reference Porting Guide Porting.
• Kusintha kwa reprogram utility ku pulogalamu aoclfiledzina>.aocx utility lamulo.
• Kusinthidwa kwazomwe zimagwiritsidwa ntchito pa matenda a aocl ndi matenda a aocl lamulo lothandizira.
•Sintha ndondomeko mu gawo la Porting the Reference Platform ku SoC Board Yanu kuti mukhale ndi malangizo okhudza kusamutsa ndi kusintha magawo a board a c5soc kuti apange gawo losayeretsa nthawi la kutseka kwa nthawi yotsimikizika.
•Mudayika mutuwo Kukonzanso Ported Reference Platform kuti mufotokoze kachitidwe ka ntchito zotsatirazi:
1.Kupatula block processor system (HPS) mu gawo la board
2.Kukonzanso chithunzi cha SD flash card
•Sintha gawo la Kumanga Makhadi a SD Flash Card. Alangizidwa pogwiritsa ntchito mtundu 14.0 wa chithunzi cha Golden System Reference Design (GSRD) ngati poyambira m'malo mwa chithunzi chomwe chili ndi SoC Embedded Design Suite (EDS).
•Sintha gawo la Recompiling the Linux Kernel ndi OpenCL Linux Kernel Driver gawo:
1.Malangizo owonjezera kuti akhazikitse CROSS COMPILE variable.
2.Kusintha lamulo lomwe mumathamanga kuti mutsimikizire kuti CMA yayatsidwa bwino.
July-14 14.0.0 •Kutulutsidwa Koyamba.

Zolemba / Zothandizira

Intel FPGA SDK ya OpenCL [pdf] Buku Logwiritsa Ntchito
FPGA SDK ya OpenCL, FPGA SDK, SDK ya OpenCL, SDK

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