Intel FPGA SDK ye OpenCL User Guide

I-FPGA SDK ye-OpenCL
Isikhokelo somsebenzisi

UG-OCL009
2017.05.08
Okokugqibela uhlaziyo lwe-Intel® Quartus® Prime Design Suite: 17.0

Bhalisa
Ukuzisa impendulo

Imixholo fihla

1 I-Intel® FPGA SDK ye-OpenCL™ i-Intel® Cyclone®V ye-SoC yoPhuhliso lweKhithi yeSikhokelo seSingqinisiso sePlatifomu

2 Amaxwebhu / Izibonelelo

2.1 Iimbekiselo

3 Izithuba eziyeleleneyo

I-Intel® FPGA SDK ye-OpenCL™ i-Intel® Cyclone®V ye-SoC yoPhuhliso lweKhithi yeSikhokelo seSingqinisiso sePlatifomu

I-V SoC Development Kit Reference Porting Guide ichaza i-hardware kunye noyilo lwesoftware ye-Intel Cyclone V SoC Development Kit Reference Platform (c5soc) ukuze isetyenziswe neIntel Software Development Kit (SDK) ye-OpenCL I-Intel ® FPGA SDK ye-OpenCL ™ Intel Cyclone. ® . Ngaphambi kokuba uqale, i-Intel icebisa ngamandla ukuba uziqhelanise nokuqulethwe kula maxwebhu alandelayo:

I-Intel FPGA SDK ye-OpenCIntel Cyclone V SoC yokuQalisa Isikhokelo

I-Intel FPGA SDK ye-OpenCL Custom Platform Toolkit yeSikhokelo soMsebenzisi
I-Cyclone V ye-Device Handbook, uMqulu 3: I-Hard Processor System Reference Manual Ukongeza, bhekisa kwi-Cyclone V SoC Development Kit kunye ne-SoC Embedded Design Suite page ye-Altera. website ngolwazi olungakumbi. 1 2

Ingqalelo: I-Intel ithatha ukuba unokuqonda okunzulu kwe-Intel FPGA SDK ye-OpenCL Custom Platform Toolkit User Guide. ISitshixo se-Cyclone V SoC yoPhuhliso lwe-Kit Reference Porting Guide asichazi ukusetyenziswa kwe-SDK's Custom Platform Toolkit ukuphumeza i-Custom Platform ye-Cyclone V SoC Development Kit. Ichaza kuphela umahluko phakathi kwenkxaso ye-SDK kwiCyclone V SoC Development Kit kunye negeneric Intel FPGA SDK ye-OpenCL Custom Platform.

Unxulumano oluNxulumeneyo

I-Intel FPGA SDK ye-OpenCL Cyclone V SoC yokuQalisa Isikhokelo
I-Intel FPGA SDK ye-OpenCL Custom Platform Toolkit yeSikhokelo soMsebenzisi

I-Cyclone V Device Handbook, uMqulu 3: I-Hard Processor System Reference Manual
I-Cyclone V SoC Development Kit kunye ne-SoC Embedded Design Suite page kwi-Altera webindawo

I-OpenCL kunye nelogo ye-OpenCL ziimpawu zentengiso ze-Apple Inc. ezisetyenziswa ngemvume yeKhronos Group™.
I-Intel FPGA SDK ye-OpenCL isekelwe kwiNkcazo ye-Khronos epapashwe, kwaye iphumelele iNkqubo yoVavanyo lwe-Khronos. Imeko yangoku yokuthotyelwa inokufumaneka apha www.khronos.org/conformance.

Intel Corporation. Onke Amalungelo Agciniwe. I-Intel, i-Intel logo, i-Altera, i-Arria, i-Cyclone, i-Enpirion, i-MAX, i-Nios, i-Quartus kunye ne-Stratix amagama kunye neelogo ziimpawu zorhwebo ze-Intel Corporation okanye ii-subsidiaries zayo e-US kunye / okanye kwamanye amazwe. I-Intel iqinisekisa ukusebenza kweFPGA yayo kunye neemveliso zesemiconductor kwiinkcukacha zangoku ngokuhambelana newaranti esemgangathweni ye-Intel, kodwa inelungelo lokwenza utshintsho kuzo naziphi na iimveliso kunye neenkonzo nangaliphi na ixesha ngaphandle kwesaziso. I-Intel ayithathi xanduva okanye ityala elivela kwisicelo okanye ukusetyenziswa kwalo naluphi na ulwazi, imveliso, okanye inkonzo echazwe apha ngaphandle kokuba kuvunyelwene ngokubhaliweyo yi-Intel. Abathengi be-Intel bayacetyiswa ukuba bafumane inguqulelo yamva nje yeenkcazo zesixhobo ngaphambi kokuba baxhomekeke kulo naluphi na ulwazi olupapashiweyo naphambi kokubeka iiodolo zeemveliso okanye iinkonzo.
*Amanye amagama kunye neempawu zingabangwa njengempahla yabanye.

1.1.1 Ukwahluka kweBhodi yeQonga leSitshixo se-Cyclone V SoC
I-Intel FPGA SDK ye-OpenCL Cyclone V SoC Development Kit Reference Platform ibandakanya iibhodi ezimbini ezahlukeneyo.

ibhodi yec5soc
Le bhodi engagqibekanga inika ufikelelo kwiibhanki ezimbini zememori ye-DDR. I-HPS DDR ifikeleleka kuzo zombini iFPGA kunye neCPU. I-FPGA DDR ifikeleleka kuphela yiFPGA.
c5soc_ibhodi yokwabelana kuphela
Le bhodi eyahlukileyo iqulethe kuphela uqhagamshelwano lwe-HPS DDR. I-FPGA DDR ayifikeleleki. Olu lwahlulo lwebhodi lusebenza ngakumbi kwindawo kuba i-hardware encinci iyimfuneko ukuxhasa ibhanki enye yememori ye-DDR. Ibhodi ye-c5soc_sharedonly ikwayindawo efanelekileyo yokubonisa ibhodi yemveliso yokugqibela enebhanki enye yememori ye-DDR.
Ukujolisa kulo mahluko webhodi xa uqulunqa i-OpenCL kernel yakho, bandakanya i -board c5soc_sharedonly ukhetho kumyalelo wakho we-aoc.
Ngolwazi oluthe kratya kwi -bhodi ukhetho lomyalelo we-aoc, bhekisa kwi-Intel FPGA SDK ye-OpenCL Programming Guide.

Unxulumano oluNxulumeneyo
Ukuqulunqa iKernel yeBhodi yeFPGA eKhethekileyo (–ibhodi )
1.1.2 Umxholo weCyclone V SoC Development Kit Reference Platform
I-Cyclone V SoC Development Kit Reference Platform ibandakanya oku kulandelayo files kunye nabalawuli:

File okanye Uluhlu	Inkcazo
ibhodi_env.xml	Ulwimi oluYandisayo lweMarkup (XML) file echaza i-c5soc kwi-Intel FPGA SDK ye-OpenCL.
linux_sd_card_image.tgz	Umfanekiso wekhadi le-SD elicinezelweyo file equlathe yonke into efunwa ngumsebenzisi we-SDK ukusebenzisa iCyclone V SoC Development Kit nge-SDK.
ingalo32	Uvimba weefayili oqulethe oku kulandelayo:

1.1.3 Iimpawu ezifanelekileyo zeCyclone V SoC Development Kit

Olu luhlu lulandelayo lubalaselisa amacandelo eKhithi yoPhuhliso ye-Cyclone V SoC kunye neempawu ezifanelekileyo kwi-Intel FPGA SDK ye-OpenCL:

I-Dual-core ARM Cortex-A9 CPU eqhuba i-32-bit Linux.

I-Advanced eXtensible Interface (AXI) ibhasi phakathi kwe-HPS kunye nelaphu elingundoqo leFPGA.
Abalawuli ababini bememori ye-DDR enzima, nganye idibanisa kwi-1 gigabyte (GB) DDR3 SDRAM.
- Umlawuli omnye we-DDR ufikeleleka kwi-FPGA engundoqo kuphela (oko kukuthi, i-FPGA DDR).
- Omnye umlawuli we-DDR ufikeleleka kuzo zombini i-HPS kunye ne-FPGA (oko kukuthi, i-HPS DDR). Lo mlawuli ekwabelwanayo uvumela ukwabelana ngememori yamahhala phakathi kwe-CPU kunye ne-FPGA engundoqo.

I-CPU inokuphinda iqwalasele ilaphu elingundoqo leFPGA.

1.1.3.1 ICyclone V SoC Development Kit Reference Platform iiNjongo neZigqibo I-Intel isekela ukuphunyezwa kweCyclone V SoC Reference Kit Reference Platform kwiinjongo zoyilo ezininzi kunye nezigqibo. I-Intel icebisa ukuba uzithathele ingqalelo ezi njongo kunye nezigqibo xa ufaka le Platform yoReferensi kwibhodi yakho ye-SoC FPGA.
Ngezantsi zinjongo zoyilo lwe-c5soc:

Nikezela ngeyona bhanwidth iphezulu enokwenzeka phakathi kweenkozo kwiFPGA kunye nenkqubo yememori yeDDR.
Qinisekisa ukuba ubalo lwe-FPGA (oko kukuthi, i-OpenCL kernels) aluphazamisi eminye imisebenzi ye-CPU enokuquka ukusevisa iiperipherals.

Shiya izixhobo ezininzi zeFPGA kangangoko unakho kubalwa kwekernel endaweni yamalungu ojongano.

Apha ngezantsi kukho izigqibo zoyilo olukwinqanaba eliphezulu eziziziphumo ezithe ngqo zeenjongo zoyilo ze-Intel:

I-Reference Platform isebenzisa kuphela abalawuli bememori ye-DDR enzima kunye noqwalaselo olunokwenzeka ngokubanzi (256 bits).
I-FPGA inxibelelana nomlawuli wememori ye-HPS DDR ngokuthe ngqo, ngaphandle kokubandakanya ibhasi ye-AXI kunye nokutshintsha kwe-L3 ngaphakathi kwe-HPS. Unxibelelwano oluthe ngqo lubonelela ngeyona bandwidth inokwenzeka kwi-DDR, kwaye igcina ukubalwa kwe-FPGA ekuphazamiseni unxibelelwano phakathi kwe-CPU kunye nomda wayo.
Ufikelelo oluthe ngqo lwenkumbulo yokuSasaza (SG-DMA) asiyonxalenye yengqiqo yeFPGA yojongano. Esikhundleni sokudlulisa inani elikhulu ledatha phakathi kweenkqubo zememori ye-DDR, gcina idatha kwi-HPS DDR ekwabelwana ngayo. Ukufikelela ngokuthe ngqo kwimemori ye-CPU yi-FPGA isebenze ngakumbi kune-DMA. Igcina izixhobo zehardware (oko kukuthi, indawo yeFPGA) kwaye yenza lula umqhubi wekernel weLinux.
Isilumkiso: Ukudluliselwa kwememori phakathi kwenkqubo ye-HPS DDR ekwabelwana ngayo kunye nenkqubo ye-DDR efikelelekayo kuphela kwi-FPGA icotha kakhulu. Ukuba ukhetha ukwenza njalo
ugqithiso lwememori ngolu hlobo, lusebenzise kwixabiso elincinci kakhulu ledatha kuphela.
Umamkeli kunye nesixhobo senza ugqithiso lwedatha engeyiyo ye-DMA phakathi komnye nomnye nge-HPS-to-FPGA (H2F) ibhulorho, kusetyenziswa kuphela i-port ye-32-bit enye. Isizathu kukuba, ngaphandle kwe-DMA, i-Linux kernel inokukhupha kuphela isicelo esinye se-32-bit yokufunda okanye yokubhala, ngoko akuyomfuneko ukuba ube noqhagamshelwano olubanzi.
Umamkeli uthumela imiqondiso yolawulo kwisixhobo ngebhulorho ekhaphukhaphu ye-H2F (LH2F).
Ngenxa yokuba iimpawu zokulawula ukusuka kwinginginya ukuya kwisixhobo ziyimiqondiso ephantsi-bandwidth, ibhulorho ye-LH2F ilungele umsebenzi.

1.2 Ukuthumela iNgcaciso yeNgcaciso kwiBhodi ye-FPGA ye-SoC yakho
Ukukhupha iCyclone V SoC Development Kit Reference Platform kwibhodi yakho ye-SoC FPGA, yenza le misebenzi ilandelayo:

Khetha imemori enye ye-DDR okanye iinkumbulo ezimbini ze-DDR ze-c5soc Reference Platform njengendawo yokuqala yoyilo lwakho.
Hlaziya iindawo zepin kwi ALTERAOCLSDKROOT/board/c5soc/ /phezulu.qsf file, apho i-ALTERAOCLSDKROOT yindlela eya kwindawo ye-Intel FPGA SDK yofakelo lwe-OpenCL, kunye ligama lolawulo lomahluko webhodi. Uluhlu lwe-c5soc_sharedonly lolwahlukileyo lwebhodi enenkqubo enye yememori ye-DDR. Uluhlu lwe-c5soc lolokwahluka kwebhodi eneenkqubo ezimbini zememori ye-DDR.
Hlaziya izicwangciso zeDDR zeHPS kunye/okanye iibhloko zeFPGA SDRAM kwi ALTERAOCLSDKROOT/board/c5soc/ /inkqubo.qsys file.
4. Yonke i-Intel FPGA SDK ye-OpenCL yoyilo lwebhodi ekhethwayo kufuneka ifezekise ukuvalwa kwexesha okuqinisekisiweyo. Ngaloo ndlela, ukubekwa koyilo kufuneka kucoceke ixesha. Ukufaka isahlulelo sebhodi ye-c5soc (acl_iface_partition.qxp) kwibhodi yakho ye-SoC FPGA, yenza le misebenzi ilandelayo:
Ukufumana imiyalelo eneenkcukacha yokuguqula nokugcina isahlulelo sebhodi, jonga kwiQuartus
I-Prime Incremental Compilation ye-Hierarchical kunye neQela-based Design isahluko seQuartus Prime Standard Edition Handbook.
a. Susa i-acl_iface_partition.qxp kwi-ALTERAOCLSDKROOT/ibhodi/c5soc/c5soc ulawulo.
b. Yenza ummandla we-acl_iface_region LogicLock™ ngokutshintsha umyalelo we-Tcl set_global_assignment -igama LL_ENABLED OFF -icandelo_id acl_iface_region ukuseta_isabelo_sehlabathi -igama LL_ENABLED ON -section_id acl_iface_region
c. Qokelela i-OpenCL kernel yebhodi yakho.
d. Ukuba kuyimfuneko, lungisa ubungakanani kunye nendawo yommandla weLogicLock.
e. Xa wanelisekile ukuba ukubekwa koyilo lwakho kucocekile kwixesha, thumela ngaphandle eso sahlulelo njenge acl_iface_partition.qxp Quartus Prime Exported Partition File.
Njengoko kuchaziwe kwiCandelo lokuSekwa okuQinisekisiweyo okuHambisa ixesha le-AIntel FPGA SDK ye-OpenCL Custom Platform Toolkit User Guide, ngokungenisa ngaphandle le .qxp file kuyilo lwenqanaba eliphezulu, uzalisekisa imfuno yokubonelela ngoyilo lwebhodi kunye nokuhamba okuqinisekisiweyo kokuvalwa kwexesha.
Ngezinto ezinokuchaphazela umgangatho weziphumo (QoR) zesahlulelo sakho esithunyelwe kumazwe angaphandle, bhekisa kuMgangatho Jikelele weZiphumo zokuQwalasela icandelo leSahlulo seBhodi eThunyelwe ngaphandle kwi-Intel FPGA SDK ye-OpenCL Custom Platform Toolkit User Guide.
f. Khubaza ummandla we-acl_iface_region LogicLock ngokubuyisela umyalelo kwiNyathelo lesi-2 emva kwi-set_global_assignment -igama LL_ENABLED OFF section_id acl_iface_region.
Ukuba ibhodi yakho ye-SoC FPGA isebenzisa izikhonkwane ezahlukeneyo kunye neeperipheries zebhloko ye-HPS, phinda uvelise kwakhona umlayishi kunye nomthombo womthi wesixhobo (DTS) file. Ukuba utshintsha useto lwesilawuli sememori ye-HPS DDR, hlaziya isilayishi sangaphambili.
Yenza umfanekiso wekhadi le-SD.
Yenza iQonga lakho leSiko, elibandakanya umfanekiso wekhadi le-SD.
Cinga ngokwenza uguqulelo lokusingqongileyo lwexesha lokusebenza lwePlatifomu yakho yesiKho ukuze uyisebenzise kunye ne-Intel FPGA yeNdawo yokuSebenza (RTE) ye-OpenCL. Uguqulelo lwe-RTE lwePlatifomu yakho yesiNtu alubandakanyi abalawuli behardware kunye nomfanekiso wekhadi le-SD. Le Platform yesiko ilayisha kwiSoC FPGA inkqubo ukuvumela usetyenziso lwezicelo ukuba luqhube. Ngokwahlukileyo, inguqulo ye-SDK yePlatifomu yesiNtu iyimfuneko kwi-SDK ukuqokelela iikernel ze-OpenCL.
Ingcebiso: Unokusebenzisa inguqulelo ye-SDK yeQonga lakho leSiko le-RTE. Ukugcuna
indawo, susa umfanekiso wekhadi le-SD kwinguqulelo ye-RTE yePlatifomu yesiko lakho.
Vavanya iQonga lakho leSiko.
Jonga kuVavanyo loYilo lweHardware icandelo le-Intel FPGA SDK ye-OpenCL Custom Platform Toolkit User Guide ngolwazi oluthe kratya.

Unxulumano oluNxulumeneyo

Ukuvavanya i-Hardware Design
IQuartus Prime Ulwandiso loKwandiswa kweHierarchical kunye noYilo oluSekwe kwiQela

Ukuseka ukuHamba okuQinisekisiweyo kweXesha
Umgangatho oPhambili weZiphumo zokuqwalaselwa kweSahlulo seBhodi eThunyelwa kumazwe angaphandle

1.2.1 Ukuhlaziya i-Ported Reference Platform
Kwinguqulelo yangoku yeCyclone V SoC Development Kit Reference Platform, ibhloko ye-HPS ingaphakathi kwesahlulelo esichaza yonke ingqiqo yenkkernel. Nangona kunjalo, awukwazi ukuthumela ngaphandle i-HPS njengenxalenye ye-.qxp file. Ukuhlaziya iQonga elisele likhona olilungisileyo kuguqulelo lwangaphambili lwe-c5soc, sebenzisa i-QXP yokugcinwa kokuqukuqela, uhlaziye umfanekiso wekhadi le-SD ukuze ufumane imeko yamva nje yokuqhuba, kwaye uhlaziye ibhodi_spec.xml file ukwenza ukufuduka ngokuzenzekelayo.
I-Altera® SDK yenguqulo ye-OpenCL 14.1 nangaphaya iphanda ibhodi_spec.xml file ngolwazi lwebhodi, kwaye iphumeza uhlaziyo oluzenzekelayo. Ngenxa yokuba uguqula ifayile
uyilo ngokuzalisekisa ukuhamba kogcino lwe-QXP, kufuneka uhlaziye ibhodi_spec.xml file kwifomati yayo kuguqulelo lwangoku. Ukuhlaziya i file ivumela i-SDK ukuba yahlule phakathi kweePlatform zeSiko ezingagcinwanga kunye ne-QXP-based Custom Platforms yangoku. Jonga kwi-Custom Platform Automigration ye-Forward Compatibility kwi-Intel FPGA SDK ye-OpenCL Custom Platform Toolkit User Guide ngolwazi olungakumbi.

Ukuphumeza ukuhamba kokugcinwa kwe-QXP kwi-Cyclone V SoC FPGA ye-hardware yoyilo ekhutshwe kwinguqulo yangaphambili ye-c5soc, yenza la manyathelo alandelayo ukwenza ulwahlulo lokukhupha i-HPS kwi-.qxp file:
a. Phambi kokudala isahlulelo esijikeleze ingqiqo ye nonkernel, yenza ulwahlulo olujikeleze iHPS kwi.qsf Quartus Prime Settings File.
Umzekeloample:
# Ukwahlula ngokwahlula-hlula umzekelo obonisa i-HPS-enikezelweyo ye-I/O set_instance_assignment -igama PARTITION_HIERARCHY borde_18261 -kuya “kwinkqubo:inkqubo_yenkqubo_acl_iface:acl_iface|system_acl_iface_hps_0:hps_0|pso_iface_psh_i0: system_acl_iface_hps_0_hps_io_border:border” -section_id “system_acl_iface_hps_0_hps_io_border:border”
# Cwangcisa ulwahlulo lube luhlobo lwe-HPS_PARTITION oluza kuqhutywa ngokuchanekileyo yi-Quartus yonke
set_global_assignment -igama PARTITION_TYPE HPS_PARTITION -section_id "system_acl_iface_hps_0_hps_io_border:border"
quartus_cdb phezulu -c phezulu
–incremental_compilation_export=acl_iface_partition.qxp
-incremental_compilation_export_partition_name=acl_iface_partition
–incremental_compilation_export_post_synth=on
-i-incremental_compilation_export_post_fit=on
–i-incremental_compilation_export_routing=on
-ukuqokelelwa_kokwanda_kwamanye_ngaphandle_kucatshulwe
Emva kokuba ukhuphele ngaphandle i-HPS kwisahlulelo, ungangenisa ngaphandle i-.qxp file kwaye uqokelele uyilo lwakho.
Hlaziya umfanekiso wekhadi le-SD ngohlelo lwangoku lwe-Intel FPGA RTE ye-OpenCL ngokwenza le misebenzi ilandelayo:
a. Nyuka i file itafile yolwabiwo (fat32) kwaye yandisiwe file inkqubo (ext3) izahlulelo kumfanekiso okhoyo njengezixhobo zokubuyela emva. Ngemiyalelo eneenkcukacha, jonga kwiNyathelo lesi-2 loKwakha uMfanekiso weKhadi loFleshi le-SD.
b. Kwi/home/root/opencl_arm32_rte ulawulo, susa ifayile files ukusuka kuguqulelo lwangaphambili lwe-RTE.
c. Khuphela kwaye ukhuphe i-verison yangoku ye-RTE kwi-/home/root/opencl_arm32_rte directory.
d. Kwi /umqhubi/uguqulelo.h file yeQonga lakho leSiko, hlaziya i-ACL_DRIVER_VERSION isabelo ukuze . (umzekeloample, 16.1.x, apho 16.1 yiverison ye-SDK, kwaye x luguqulelo lomqhubi olusetayo).
e. Yakha kwakhona umqhubi.
f. Cima isiqulathi seefayili zehardware yePlatifomu yesiKhokelo sakho. Khuphela iQonga leSiko, kunye nomqhubi ohlaziyiweyo, ukuya /home/root/opencl_arm_rte/board directory.
g. Khuphela i Altera.icd file ukusuka kwi/home/root/opencl_arm32_rte ulawulo kwaye uyongeze kwi/etc/OpenCL/vendorrs directory.
h. Yehlisa kwaye uvavanye umfanekiso omtsha. Ukufumana imiyalelo eneenkcukacha, jonga kuManyathelo 8 ukuya kwele-11 kuKwakha uMfanekiso weKhadi loFleshi le-SD.

Unxulumano oluNxulumeneyo

Ukwenza umfanekiso wekhadi le-SD elinokukhanya kwiphepha le-14
Ukwanalo nokukhetha ukwenza umfanekiso omtsha wekhadi le-SD.
Ukufuduka kweQonga leSiko lokuQhubela phambili

1.3 Inkxaso yeSoftware yeMemori ekwabelwanayo ngayo
Inkumbulo yomzimba ekwabelwana ngayo phakathi kweFPGA kunye ne-CPU yeyona nkumbulo ikhethwayo yeekernel ze-OpenCL ezisebenza kwi-SoC FPGAs. Kuba iFPGA ifikelela kwinkumbulo yomzimba ekwabelwanayo ngayo, ngokuchaseneyo nememori ebonakalayo ekwabelwana ngayo, ayinafikelelo kwiitafile zamaphepha e-CPU ebonisa iidilesi zenyani zomsebenzisi kwiidilesi zephepha elibonakalayo.
Ngokubhekiselele kwi-hardware, i-OpenCL kernels ifikelela kwimemori yomzimba ekwabelwana ngayo ngoqhagamshelwano oluthe ngqo kwi-HPS DDR yesilawuli sememori enzima. Ngokubhekiselele kwisoftware, inkxaso yenkumbulo yomzimba ekwabelwana ngayo ibandakanya ezi ngqwalasela zilandelayo:

Umiliselo oluqhelekileyo lwesoftware yokwabela inkumbulo kwi-CPU (ngokomzekeloample, i malloc () umsebenzi) ayinakwaba indawo yenkumbulo enokuthi isetyenziswe yi FPGA.
Inkumbulo ukuba malloc () umsebenzi yabelayo iyadibana kwisithuba sedilesi yenkumbulo enenyani, kodwa nawaphi na amaphepha angaphantsi akufane kwenzeke ukuba adibane ngokwasemzimbeni. Ngaloo ndlela, umamkeli kufuneka akwazi ukwaba imimandla yenkumbulo ehambelanayo ngokwasemzimbeni. Nangona kunjalo, obu buchule abukho kwizicelo zesithuba somsebenzisi kwiLinux. Ke ngoko, umqhubi we-Linux kernel kufuneka enze ulwabiwo.
I OpenCL SoC FPGA Linux kernel driver iquka mmap () umsebenzi wokwabela inkumbulo yomzimba ekwabelwanayo ngayo kwaye imephu kwindawo yomsebenzisi. Umsebenzi we mmap () usebenzisa umgangatho weLinux kernel ukufowuna dma_alloc_coherent () ukucela imimandla yenkumbulo edibanayo ngokwasemzimbeni yokwabelana ngesixhobo.
Kwi-Linux kernel engagqibekanga, i-dma_alloc_coherent() ayibeki inkumbulo ehambelanayo ngokwasemzimbeni ngaphezu kwe-0.5 megabytes (MB) ngobukhulu. Ukuvumela i-dma_alloc_coherent() ukunika izixa ezikhulu zenkumbulo edibanayo ngokwasemzimbeni, yenza umsebenzi we-memory allocator (CMA) we-Linux kernel emva koko uhlanganise i-Linux kernel.
Kwi-Cyclone V SoC Development Kit Reference Platform, i-CMA ilawula i-512 MB ngaphandle kwe-1 GB yememori yomzimba. Ungalenyusa okanye unciphise eli xabiso, kuxhomekeke kubungakanani benkumbulo ekwabelwana ngayo efunwa sisicelo. I-dma_alloc_coherent() ifowuni isenokungakwazi ukunika i-512 MB epheleleyo yememori ehambelanayo ngokwasemzimbeni; Nangona kunjalo, inokufumana rhoqo malunga ne-450 MB yememori.

I-CPU ingagcina inkumbulo eyabiwa yi-dma_alloc_coherent (). Ngokukodwa, imisebenzi yokubhala esuka kwinginginya yesicelo ayibonakali kwiikernel ze-OpenCL. mmap () umsebenzi kwiOpenCL SoC FPGA Linux kernel driver ikwaqulathe iminxeba eya kwi pgprot_noncached () okanye remap_pf_range () umsebenzi wokuvala indawo efihlakeleyo kulo mmandla wenkumbulo ngokucacileyo.
Emva kokuba dma_alloc_coherent () umsebenzi wabela inkumbulo edityanisiweyo ngokwasemzimbeni, mmap () umsebenzi ubuyisela idilesi yenyani ekuqaleni koluhlu, elibubude bedilesi yenkumbulo owabelayo. Usetyenziso lwenginginya lufuna le dilesi yenyani ukufikelela kwimemori. Kwelinye icala, ii-OpenCL kernels zifuna iidilesi zendawo. Umqhubi we-Linux kernel ugcina umkhondo we-virtual-to-physical address address mapping. Uyakwazi ukwenza imephu yeedilesi ezibonakalayo mmap () ibuyisela kwiidilesi zokwenyani ngokudibanisa umbuzo kumqhubi.
I-aocl_mmd_shared_mem_alloc() i-MMD application programming interface (API) idibanisa le mibuzo ilandelayo:
a. mmap () umsebenzi owabela inkumbulo kwaye ubuyisela idilesi yenyani.
b. Umbuzo owongezelelweyo obonisa idilesi yenyani ebuyisiweyo kwidilesi yendawo.
I-aocl_mmd_shared_mem_alloc() umnxeba we-MMD API emva koko ubuyisela iidilesi ezimbini
-eyona dilesi ibuyisiweyo yidilesi yenyani, kwaye idilesi yendawo iya kwisixhobo_ptr_out.
Phawula: Umqhubi angenza imephu kuphela iidilesi ezinenyani ezibuyiselwa mmap () umsebenzi kwiidilesi ezibonakalayo. Ukuba ucela idilesi yendawo yaso nasiphi na esinye isikhombisi esinenyani, umqhubi ubuyisela ixabiso eli-NULL.

Isilumkiso: I-Intel FPGA SDK yeelayibrari ze-OpenCL zexesha lokusebenza zicinga ukuba inkumbulo ekwabelwanayo yinkumbulo yokuqala edweliswe kwibhodi_spec.xml file. Ngamanye amazwi, idilesi yendawo efunyanwa ngumqhubi we-Linux kernel iba yidilesi ye-Avalon® egqithiselwa yi-OpenCL kernel kwi-HPS SDRAM.
Ngokuphathelele kwithala leencwadi lexesha lokuqhuba, sebenzisa i clCreateBuffer () ukufowuna ukunika inkumbulo ekwabelwanayo njengesixhobo sokukhusela ngale ndlela ilandelayo:

Kumahluko webhodi ye-DDR enenkumbulo zombini ekwabelwana ngayo nengobelwanga, clCreateBuffer () yabela inkumbulo ekwabelwana ngayo ukuba ukhankanya iflegi ye-CL_MEM_USE_HOST_PTR. Ukusebenzisa ezinye iiflegi kubangela ukuba i-clCreateBuffer () yabele isithinteli kwinkumbulo ekwabelwana ngayo.
Kumahluko webhodi ye-DDR enenkumbulo ekwabelwana ngayo kuphela, i-clCreateBuffer () yabela inkumbulo ekwabelwanayo nokuba yeyiphi iflegi oyikhankanyayo.
Okwangoku, inkxaso ye-32-bit ye-Linux kwi-ARM CPU ilawula ubungakanani benkxaso yememori ekwabelwana ngayo kwiilayibrari zexesha le-SDK. Ngamanye amazwi, iilayibrari zexesha lokusebenza zihlanganiswe kwezinye iimeko (umzekeloample, x86_64 Linux okanye 64-bit Windows) ayixhasi inkumbulo ekwabelwana ngayo.
I-C5soc ayizange iphumeze inkumbulo engafaniyo ukwahlula phakathi kwememori ekwabelwanayo kunye nengekwabelwana ngayo ngezi zizathu zilandelayo:
1. Imbali-Inkxaso yememori engafaniyo ayizange ifumaneke xa inkxaso yememori ekwabelwana ngayo yenziwe ekuqaleni.
2. I-interface efanayo-Ngenxa yokuba i-OpenCL ngumgangatho ovulekileyo, i-Intel igcina ukuhambelana phakathi kwabathengisi beqonga le-computing ye-heterogeneous. Ke ngoko, ujongano olufanayo njengolwakhiwo lwabanye abathengisi bebhodi lusetyenziselwa ukwaba nokusebenzisa imemori ekwabelwanayo ngayo.

1.4 Uhlengahlengiso lweFPGA
Kwii-FPGA ze-SoC, i-CPU inokuphinda iqwalasele ilaphu elingundoqo le-FPGA ngaphandle kokuphazamisa ukusebenza kwe-CPU. I-FPGA yoMphathi we-hardware block ejikeleza i-HPS kunye ne-FPGA engundoqo yenza uhlengahlengiso. I-Linux kernel ibandakanya umqhubi owenza ufikelelo olulula kuMphathi weFPGA.

Ukuya view ubume be-FPGA engundoqo, biza ikati /sys/class/fpga/fpga0/ isimo somyalelo.
I-Intel FPGA SDK yenkqubo eluncedo ye-OpenCL ekhoyo kunye ne-Cyclone V SoC Development Kit Reference Platform isebenzisa olu jongano ukucwangcisa i-FPGA. Xa ucwangcisa kwakhona undoqo weFPGA ngeCPU esebenzayo, inkqubo eluncedo yenza yonke le misebenzi ilandelayo:
1. Ngaphambi kokuhlelwa kwakhona, khubaza zonke iibhuloho zonxibelelwano phakathi kweFPGA kunye ne-HPS, zombini iibhuloho ze-H2F kunye ne-LH2F.
Yenza ezi bhulorho kwakhona emva kokugqiba inkqubo ngokutsha.
Qaphela: Inkqubo ye-OpenCL ayisebenzisi ibhulorho yeFPGA-to-HPS (F2H). Jonga kwi-HPS-FPGA Interfaces icandelo kwi-Cyclone V Device Handbook, uMqulu 3: I-Hard Processor System Reference Manual yolwazi olungakumbi.
2. Qinisekisa ukuba ikhonkco phakathi kweFPGA kunye nomlawuli we-HPS DDR uvaliwe ngexesha lokuhlelwa kwakhona.
3. Qinisekisa ukuba i-FPGA iphazamisa kwi-FPGA ivaliwe ngexesha lokuhlelwa kwakhona.
Kwakhona, yazisa umqhubi ukuba ale naluphi na uphazamiseko olusuka kwiFPGA ngexesha lokucwangcisa ngokutsha.

Qhagamshelana nekhowudi yemvelaphi yenkqubo eluncedo ngeenkcukacha malunga nokuphunyezwa kanye.

Isilumkiso: Musa ukutshintsha uqwalaselo lwesilawuli se-HPS DDR xa i-CPU isebenza.
Ukwenza njalo kunokubangela impazamo yenkqubo ebulalayo kuba unokutshintsha uqwalaselo lwesilawuli se-DDR xa kukho utshintshiselwano lwenkumbulo oluphumayo kwi-CPU. Oku kuthetha ukuba xa i-CPU isebenza, awukwazi ukucwangcisa kwakhona undoqo weFPGA ngomfanekiso osebenzisa i-HPS DDR kuqwalaselo olwahlukileyo.
Khumbula ukuba inkqubo ye-OpenCL, kunye ne-Golden Hardware reference design ekhoyo kunye ne-Intel SoC FPGA Embedded Design Suite (EDS), ibeka i-HPS DDR kwimowudi enye ye-256-bit.
Iinxalenye zesistim ye-CPU ezifana ne-predictor yesebe okanye iprefetcher yetafile yephepha inokukhupha imiyalelo ye-DDR naxa kubonakala ngathi akukho nto isebenzayo kwi-CPU.
Ke ngoko, ixesha lokuqalisa lelona xesha likhuselekileyo lokuseta uqwalaselo lwesilawuli se-HPS DDR.
Oku kwakhona kuthetha ukuba i-U-boot kufuneka ibe nokubini ekrwada file (.rbf) umfanekiso wokulayisha kwinkumbulo. Kungenjalo, ungenza i-HPS DDR ngamazibuko angasetyenziswanga kwiFPGA kwaye ngoku inokuba nokutshintsha uqwalaselo lwezibuko emva koko. Ngesi sizathu, i-OpenCL Linux kernel driver akasayibandakanyi ingqiqo eyimfuneko ukuseta uqwalaselo lomlawuli we-HPS DDR.
Ipakethe ye-SW3 ephindwe kabini emgceni (i-DIP) itshintshela kwi-Cylone V SoC Development Kit ilawula uhlobo olulindelekileyo lomfanekiso .rbf (oko kukuthi, nokuba file icinezelwe kunye/okanye iguqulelwe ngokuntsonkothileyo). I-C5soc, kunye ne-Golden Hardware Reference Design ekhoyo kunye ne-SoC EDS, iquka imifanekiso ecinezelweyo kodwa engabhalwanga .rbf. Iisetingi zokutshintsha ze-SW3 DIP ezichazwe kwi-Intel FPGA SDK ye-OpenCL Cyclone V SoC yokuQalisa iSikhokelo sihambelana nomfanekiso .rbf.

Unxulumano oluNxulumeneyo

HPS-FPGA Interfaces
Ukuqwalasela iiSwitshi ze-SW3

1.4.1 FPGA System Architecture Iinkcukacha
Inkxaso yeCyclone V SoC Development Kit Reference Platform isekelwe kwi-Stratix® V Reference Platform (s5_ref), ekhoyo kunye ne-Intel FPGA SDK ye-OpenCL.
Umbutho jikelele wenkqubo ye-c5soc Qsys kunye nomqhubi we-kernel zifana kakhulu nezo zikwi-s5_ref.
La macandelo alandelayo e-FPGA angundoqo ayafana kuzo zombini i-c5soc kunye ne-s5_ref:

VERSION_ID ibhlokhi
Indlela yokuphumla

Umahluli webhanki yememori
I-Cache snoop interface
iwotshi yeKernel

Iibhloko zokungena kwirejista yokulawula (CRA).

1.5 Ukwakha umfanekiso wekhadi le-SD Flash
Ngenxa yokuba i-Cyclone V SoC FPGA yinkqubo epheleleyo kwi-chip, unoxanduva lokuhambisa inkcazo epheleleyo yenkqubo. I-Intel icebisa ukuba uyihambise ngendlela yomfanekiso wekhadi le-SD. I-Intel FPGA SDK yomsebenzisi we-OpenCL unokubhala ngokulula umfanekiso kwi-micro SD flash card kunye nebhodi ye-SoC FPGA ilungele ukusetyenziswa.
Ukulungisa umfanekiso wekhadi le-SD eliXhonyayo kwiphepha le-13
I-Intel icebisa ukuba uguqule ngokulula umfanekiso okhoyo kunye neSiphepho se-V SoC soPhuhliso lweSingqinisiso sePlatifomu. Ukwanalo nokukhetha ukwenza umfanekiso omtsha wekhadi le-SD.
Ukwenza umfanekiso wekhadi le-SD elinokukhanya kwiphepha le-14
Ukwanalo nokukhetha ukwenza umfanekiso omtsha wekhadi le-SD.

1.5.1 Ukulungisa umfanekiso wekhadi le-SD eliXhonyayo
I-Intel icebisa ukuba uguqule umfanekiso okhoyo kunye neNkanyamba V SoC
IQonga leNgcaciso yeKhiti yoPhuhliso. Ukwanalo nokukhetha ukwenza umfanekiso omtsha wekhadi le-SD.
Umfanekiso wec5soc linux_sd_card_image.tgz file ifumaneka kuluhlu lwe-ALTERAOCLSDKROOT/ibhodi/c5soc, apho i-ALTERAOCLSDKROOT ikhomba indlela ye-Intel FPGA SDK yoluhlu lofakelo lwe-OpenCL.

Ingqalelo: Ukuguqula umfanekiso wekhadi le-SD, kufuneka ube neengcambu okanye amalungelo e-sudo.

Ukuthoba i-$ALTERAOCLSDKROOT/board/c5soc/linux_sd_card_image.tgz file, sebenzisa itar xvfzlinux_sd_card_image.tgz umyalelo.
Qokelela i-hello_world OpenCL example uyilo usebenzisa inkxaso yakho yePlatform yesiko. Phinda unike igama i.rbf file ukuba i-Intel FPGA SDK ye-OpenCL Offline Compiler yenza njenge-opencl.rbf, kwaye uyibeke kwi-fat32 yokwahlula ngaphakathi komfanekiso wekhadi le-SD.
Unokukhuphela i-hello_world example uyilo ukusuka OpenCL Design Examples page kwi Altera webindawo.

Beka i.rbf file kwisahlulelo se-fat32 somfanekiso wekhadi lomfanekiso.
Ingqalelo: Isahlulo se-fat32 kufuneka siqulathe zombini i-zImage file kunye ne.rbf file. Ngaphandle kwe.rbf file, impazamo ebulalayo iyakwenzeka xa ufaka umqhubi.
Emva kokuba udale umfanekiso wekhadi le-SD, libhalele kwikhadi le-SD elincinci ngokubiza lo myalelo ulandelayo: sudo dd ukuba=/indlela/uku/sdcard/image.bin ye=/dev/sdcard
Ukuvavanya umfanekiso wekhadi lakho le-SD, yenza le misebenzi ilandelayo:
a. Faka ikhadi le-SD elincinane kwibhodi ye-SoC FPGA.
b. Phakamisa ibhodi.
c. Biza umyalelo osebenzisekayo wokuxilonga i-aocl.

1.5.2 Ukwenza umfanekiso we-SD Flash Card
Ukwanalo nokukhetha ukwenza umfanekiso omtsha wekhadi le-SD. Imiyalelo kaGeneric ekwakheni umfanekiso omtsha wekhadi elinotshetshe lwe-SD kunye nokwakha kwakhona umfanekiso wekhadi le-SD osele ukho liyafumaneka kwi-GSRD v14.0.2 – iphepha lekhadi le-SD le-RocketBoards.org webindawo.
La manyathelo angezantsi achaza inkqubo yokuyila i-linux_sd_card_image.tgz umfanekiso osuka kwiGolden System Reference Design (GSRD) umfanekiso wekhadi le-SD:
Phawula:
Ukwenza umfanekiso ukusuka kumfanekiso we-c5soc, yenza yonke imisebenzi esebenzayo echazwe kule nkqubo.

Khuphela kwaye ukhuphe i-GSRD SD umfanekiso wekhadi lomfanekiso we-14.0 kwi-Rocketboards.org.
Nyuka i file itafile yolwabiwo (fat32) kwaye yandisiwe file inkqubo (ext3) izahlulo kulo mfanekiso njengezixhobo zokubuyela emva. Ukunyusela isahlulelo, yenza la manyathelo alandelayo:
a. Qinisekisa i-byte yokuqala yesahlulelo ngaphakathi komfanekiso ngokubiza i /sbin/fdisk -lu image_file umyalelo.
Umzekeloample, inombolo yokwahlula-1 yohlobo lwe-W95 FAT ine-bhloko yokunciphisa i-2121728. Nge-512 bytes kwibhloko nganye, i-byte offset yi-512 bytes x 2121728 = 1086324736 bytes.
b. Chonga isixhobo sasimahla seluphu (umzekeloample, /dev/loop0) ngokuchwetheza i-lostup -f umyalelo.
c. Ucinga ukuba / i-dev/loop0 sisixhobo sasimahla se-loop, yabela umfanekiso wakho wekhadi le-loop kwisixhobo sebhlokhi ngokubhengeza ukulahleka /dev/loop0 image_file -0 1086324736 umyalelo.
d. Nyusa isixhobo se-loop ngokufaka i-mount /dev/loop0 /media/disk1 umyalelo.
Ngaphakathi komfanekiso file, /media/disk1 ngoku isahlulelo esinyusiweyo se-fat32.
e. Phinda amanyathelo a ukuya ku-d kwi-ext3 isahlulelo.

Khuphela uguqulelo lweCyclone V SoC FPGA yeIntel FPGA yeXesha lokuSingqongileyo kwiphakheji ye-OpenCL evela kwiZiko lokuKhuphela kwi-Altera. webindawo.
a. Cofa iqhosha lokukhuphela ecaleni kweQuartus Prime software edition.
b. Chaza inguqulelo yokukhululwa, inkqubo yokusebenza, kunye nendlela yokukhuphela.
c. Cofa ithebhu yeSoftware eyoNgezelelweyo, kwaye ukhethe ukukhuphela i-Intel FPGA
Ixesha lokuSebenza kweNdawo ye-OpenCL Linux Cyclone V SoC TGZ.
d. Emva kokuba ukhuphele i-aocl-rte- .ingalo32.tgz file, yikhuphele ku
uvimba weefayili owakhe.
Beka i-aocl-rte- engapakishwanga- .arm32 ulawulo kwi/ikhaya/ingcambu/opencl_arm32_rte ulawulo kwi-ext3 yomfanekiso file.
Cima i(s) iifolda zehardware yePlatifomu yakho yesiKho, kwaye emva koko ubeke iQonga leSiko kwibhodi engaphantsi kwe/home/root/ opencl_arm32_rte.

Yenza i-init_opencl.sh file kwi/ikhaya/iingcambu ulawulo olunomxholo olandelayo: thumela ngaphandle ALTERAOCLSDKROOT=/ikhaya/ingcambu/opencl_arm32_rte thumela ngaphandle AOCL_BOARD_PACKAGE_ROOT=$ALTERAOCLSDKROOT/ibhodi/ ukuthumela ngaphandle UMENDO=$ALTERAOCLSDKROOT/umgqomo:$INDLELA yokuthumela ngaphandle LD_LIBRARY_PATH=$ALTERAOCLSDKROOT/host/arm32/lib:$LD_LIBRARY_PATH insmod $AOCL_BOARD_PACKAGE_ROOT/driver/aclsoc_drv.ko
Umsebenzisi we-SDK uqhuba imvelaphi ./init_opencl.sh umyalelo wokulayisha iimeko eziguquguqukayo kunye ne-OpenCL Linux kernel driver.
Ukuba ufuna ukuhlaziya isilayishi sangaphambili, i-DTS files, okanye i-Linux kernel, udinga i-arm-linux-gnueabihf-gcc compiler evela kwi-SoC EDS. Landela imiyalelo echazwe kwi-Intel SoC FPGA Embedded Design Suite IsiKhokelo soMsebenzisi ukuze ufumane isoftware, uyiqokelele, kwaye uhlaziye okufanelekileyo. files kwisahlulo se-fat32 esinyusiweyo.
Ingqalelo: Kusenokwenzeka ukuba kufuneka uhlaziye isilayishi sangaphambili ukuba iPlatifomu yakho yeSiko linosetyenziso olwahlukileyo lwephini kunelo liku-c5soc.
Khumbula: Ukuba uphinda uqokelele i Linux kernel, phinda uqokelele i Linux kernel driver ngomthombo ofanayo we Linux kernel. files. Ukuba kukho ukungahambelani phakathi komqhubi we-Linux kernel kunye ne-Linux kernel, umqhubi akayi kulayisha. Kwakhona, kufuneka uvule i-CMA.
Jonga ekuBuyiseni kwakhona i-Linux Kernel ngolwazi olungakumbi.
Qokelela i-hello_world OpenCL example uyilo usebenzisa inkxaso yakho yePlatform yesiko. Phinda unike igama i.rbf file ukuba i-Intel FPGA SDK ye-OpenCL Offline Compiler yenza njenge-opencl.rbf, kwaye uyibeke kwi-fat32 yokwahlula ngaphakathi komfanekiso wekhadi le-SD.
Unokukhuphela i-hello_world example uyilo ukusuka OpenCL Design Examples page kwi Altera webindawo.
9. Emva kokuba ugcine zonke eziyimfuneko files kumfanekiso wekhadi elinotsheluza, bizela le miyalelo ilandelayo:
a. ungqamaniso
b. yehlisa /media/disk1
c. hlisa apho ligama lolawulo olisebenzisayo ukunyusa isahlulelo se ext3 ku 3 kwiphepha 3 (for ex.ample, /media/disk2).
d. ulahleko -d /dev/loop0
e. ukulahleka -d /dev/loop1

Cinezela umfanekiso wekhadi le-SD ngokubiza lo myalelo ulandelayo: tar cvfz .tgz linux_sd_card_image
Hambisa i .tgz file ngaphakathi kuluhlu lweengcambu zeQonga lakho leSiko.
Ukuvavanya umfanekiso wekhadi lakho le-SD, yenza le misebenzi ilandelayo:
a. Bhala isiphumo somfanekiso ongaxinzelelwanga kwi-micro SD flash card.
b. Faka ikhadi le-SD elincinane kwibhodi ye-SoC FPGA.
c. Phakamisa ibhodi.
d. Biza umyalelo osebenzisekayo wokuxilonga i-aocl.

Unxulumano oluNxulumeneyo

Intel SoC FPGA Embedded Design Suite Guide User
I-OpenCL Design Examples page kwi Altera webindawo

Ukuhlaziya i-Linux Kernel kwiphepha le-16
Ukwenza i-CMA, kufuneka uqale uqokelele i-Linux kernel.
Ukubuza iGama lesiXhobo seBhodi yakho yeFPGA (uxilongo)

1.6 Ukuqulunqa iLinux Kernel yeCyclone V SoC FPGA
Phambi kokuba usebenzise izicelo ze-OpenCL kwibhodi ye-Cyclone V SoC FPGA, kufuneka uqokelele umthombo wekernel ye-Linux, kwaye uqokelele kwaye ufake i-OpenCL Linux kernel driver.

Ukuhlaziya i-Linux Kernel kwiphepha le-16
Ukwenza i-CMA, kufuneka uqale uqokelele i-Linux kernel.
Ukuqulunqa nokuFaka i-OpenCL Linux Kernel Driver kwiphepha 17 Qokelela i-OpenCL Linux kernel driver ngokuchasene nomthombo wekernel oqokelelweyo.

1.6.1 Ukuhlaziya kwakhona iLinux Kernel
Ukwenza i-CMA, kufuneka uqale uqokelele i-Linux kernel.

Cofa i-GSRD v14.0-Ukuhlanganisa ikhonkco leLinux kwiphepha leZibonelelo zeRocketBoards.org webindawo yokufikelela kwimiyalelo yokukhuphela kunye nokwakha kwakhona ikhowudi yemvelaphi yekernel yeLinux.
Ukusetyenziswa kunye ne-Intel FPGA SDK ye-OpenCL, khankanya i-socfpga-3.13-rel14.0 njenge .
Qaphela: Inkqubo yokwakha idala i-arch/arm/configs/socfpga_defconfig file. Oku file ixela imimiselo yoqwalaselo olungagqibekanga lwe-socfpga.
Yongeza le migca ilandelayo ezantsi kwe-arch/arm/configs/socfpga_defconfig file.
CONFIG_MEMORY_ISOLATION=y
CONFIG_CMA=y
CONFIG_DMA_CMA=y
CONFIG_CMA_DEBUG=y
CONFIG_CMA_SIZE_MBYTES=512
CONFIG_CMA_SIZE_SEL_MBYTES=y
CONFIG_CMA_ULUNGISELELO=8
CONFIG_CMA_AREAS=7
I-CONFIG_CMA_SIZE_MBYTES ixabiso loqwalaselo libeka umda ophezulu kwinani lilonke lememori ehambelanayo ebonakalayo ekhoyo. Ungalenyusa eli xabiso ukuba ufuna inkumbulo eninzi.
Ingqalelo: Isixa esipheleleyo sememori yomzimba ekhoyo kwiprosesa ye-ARM kwibhodi ye-SoC FPGA yi-1 GB. I-Intel ayicebisi ukuba usete umphathi we-CMA kufutshane ne-1 GB.

Yenza umyalelo wokwenza mrproper ukucoca uqwalaselo lwangoku.
Qhuba yenza ARCH=ingalo socfpga_deconfig umyalelo.
ARCH=ingalo ibonisa ukuba ufuna ukumisela ulwakhiwo lwe-ARM.
I-socfpga_defconfig ibonisa ukuba ufuna ukusebenzisa uqwalaselo olungagqibekanga lwe-socfpga.
Qalisa ukuthunyelwa ngaphandle CROSS_COMPILE=arm-linux-gnueabihf- umyalelo.
Lo myalelo ucwangcisa i CROSS_COMPILE ukuguquguquka kwemeko-bume ukucacisa isimaphambili sesixokelelwano esifunekayo setsheyini.

Qhuba yenza ARCH=ingalo zImage umyalelo. Umfanekiso obangelwayo ufumaneka kwi-arch/arm/boot/zImage file.
Beka i-zImage file kwisahlulelo se-fat32 somfanekiso wekhadi lomfanekiso. Ngemiyalelo eneenkcukacha, bhekisa kwiSitshingitshane V SoC FPGA-specific GSRD User Manual on Rocketboards.org.
Qaphela: Ukufakela ngokuchanekileyo i-OpenCL Linux kernel driver, layisha kuqala i-SDKgenerated.rbf file kwiFPGA.
Ukwenza i.rbf file, qulunqa uyilo lwe-SDK example kunye neCyclone V SoC Development Kit Reference Platform njengePlatifomu yesiNtu ekujoliswe kuyo.
9. Beka i.rbf file kwisahlulelo se-fat32 somfanekiso wekhadi lomfanekiso.
Qaphela: Ukwahlula kwe-fat32 kufuneka kuqulathe zombini i-zImage file kunye ne.rbf file. Ngaphandle kwe.rbf file, impazamo ebulalayo iyakwenzeka xa ufaka umqhubi.

Faka ikhadi le-SD elicwangcisiweyo, elinomfanekiso wekhadi le-SD owulungisileyo okanye owenze ngaphambili, kwiNkanyamba ye-V SoC yoPhuhliso lweKit kwaye emva koko unike amandla ibhodi ye-SoC FPGA.
Qinisekisa uguqulelo lwe Linux kernel efakiweyo ngokusebenzisa i uname -r umyalelo.
Ukuqinisekisa ukuba wenza i-CMA ngempumelelo kwi-kernel, kunye nebhodi ye-SoC FPGA inikwe amandla, sebenzisa umyalelo we-grep init_cma /proc/kallsyms.
I-CMA yenziwe ukuba imveliso ayinanto.

Ukusebenzisa i-Linux kernel eqokelelweyo nge-SDK, qokelela kwaye ufake i-Linux kernel driver.

Unxulumano oluNxulumeneyo

I-Golden System Reference Design (GSRD) Iincwadana zoMsebenzisi

Ukwakha umfanekiso wekhadi le-SD elinokukhanya kwiphepha le-13
Ngenxa yokuba i-Cyclone V SoC FPGA yinkqubo epheleleyo kwi-chip, unoxanduva lokuhambisa inkcazo epheleleyo yenkqubo.

1.6.2 Ukuqulunqa kunye nokuFakela i-OpenCL Linux Kernel Driver
Qokelela i-OpenCL Linux kernel driver ngokuchasene nomthombo wekernel oqokelelweyo.

Umthombo womqhubi uyafumaneka kwiCyclone V SoC FPGA inguqulelo yeIntel FPGA Runtime Environment for OpenCL. Ukongeza, qinisekisa ukuba ulayishe i-Intel FPGA SDK ye-OpenCL eyenziwe .rbf file kwi FPGA ukunqanda ufakelo olungachanekanga lwemodyuli yekernel ye Linux.

Khuphela uguqulelo lweCyclone V SoC FPGA yeIntel FPGA yeXesha lokuSingqongileyo kwiphakheji ye-OpenCL evela kwiZiko lokuKhuphela kwi-Altera. webindawo.
a. Cofa iqhosha lokukhuphela ecaleni kweQuartus Prime software edition.
b. Chaza inguqulelo yokukhululwa, inkqubo yokusebenza, kunye nendlela yokukhuphela.
c. Cofa ithebhu yeSoftware eyoNgezelelweyo, kwaye ukhethe ukukhuphela i-Intel FPGA
Ixesha lokuSebenza kweNdawo ye-OpenCL Linux Cyclone V SoC TGZ.
d. Emva kokuba ukhuphele i-aocl-rte- .ingalo32.tgz file, yikhuphele ku
uvimba weefayili owakhe.
Umthombo womqhubi ukwi-aocl-rte- .arm32/ibhodi/c5soc/ ulawulo lomqhubi.
Ukuqokelela kwakhona i-OpenCL Linux kernel driver, seta ixabiso le-KDIR kwi-Yenza yomqhubifile kulawulo oluqulathe imvelaphi ye Linux kernel files.
Qalisa ukuthunyelwa ngaphandle CROSS_COMPILE=arm-linux-gnueabihf- umyalelo ukubonisa isimaphambili sesixokelelwano sakho sesixhobo.

Yenza umyalelo ococekileyo.
Qalisa ukwenza umyalelo ukwenza i aclsoc_drv.ko file.
Dlulisela i-opencl_arm32_rte ulawulo kwibhodi yeCyclone V SoC FPGA.
Ukuqhuba i-scp -r ingcambu @ yakho-idilesi: Umyalelo ubeka imeko-bume yexesha lokusebenza kwi/ikhaya/ingcambu ulawulo.

Qhuba iskripthi se-init_opencl.sh osidale xa usakha i-SD cardimage.
Biza umyalelo osebenzisekayo wokuxilonga i-aocl. Into eluncedo yokuxilonga iyakubuyisela isiphumo esigqithisayo emva kokuba usebenzise init_opencl.sh ngempumelelo.

1.7 Imiba eyaziwayo
Okwangoku, kukho imida ethile ekusetyenzisweni kwe-Intel FPGA SDK ye-OpenCL kunye ne-Cyclone V SoC Development Kit Reference Platform.

Awunako ukubhala ngaphezulu kumthengisi kunye namagama ebhodi axelwe yi-CL_DEVICE_VENDOR kunye ne-CL_DEVICE_NAME imitya ye-clGetDeviceInfo() ifowuni.
Ukuba umamkeli wabela imemori eqhubekayo kwinkqubo ye-DDR ekwabelwanayo ngayo (oko kukuthi, i-HPS DDR) kwaye ilungisa imemori engaguqukiyo emva kokuphunyezwa kwe-kernel, idatha ekwinkumbulo inokuphelelwa lixesha. Lo mba uvela kuba undoqo weFPGA awukwazi ukukroba kwi-CPU-to-HPS DDR transactions.
Ukuthintela ukuphunyezwa kwe-kernel elandelayo ekufikeleleni kwidatha yakudala, sebenzisa enye yezi ndlela zilandelayo:
• Musa ukuguqula imemori engaguqukiyo emva kokuqalisa kwayo.
• Ukuba ufuna ezininzi __iiseti zedatha rhoqo, yenza izithinteli zememori ezininzi.
• Ukuba iyafumaneka, yabela imemori engaguqukiyo kwiFPGA DDR kwibhodi yeaccelerator yakho.
Into eluncedo ye-SDK kwi-ARM ixhasa kuphela inkqubo kunye noxilongo lwemiyalelo eluncedo.
I-flash, ukufaka kunye nokukhupha imiyalelo eluncedo ayisebenzi kwi-Cyclone V SoC Development Kit ngezi zizathu zilandelayo:
a. Into eluncedo yokuhlohla kufuneka iqokelele i-aclsoc_drv Linux kernel driver kwaye iyenze kwi-SoC FPGA. Umatshini wophuhliso kufuneka enze ukuhlanganiswa; nangona kunjalo, sele iqulethe imithombo ye-Linux kernel ye-SoC FPGA. Imithombo yeLinux kernel yomatshini wophuhliso yahlukile kwezo zeSoC FPGA. Indawo yemithombo ye-Linux kernel ye-SoC FPGA kusenokwenzeka ukuba ayaziwa kumsebenzisi we-SDK. Ngokufanayo, into esetyenziswayo yokukhupha ayifumaneki kwiCyclone V SoC Development Kit.
Kwakhona, ukuhambisa aclsoc_drv kwibhodi ye-SoC kulucelomngeni kuba unikezelo olungagqibekanga lweCyclone V SoC Development Kit ayiqulathanga iLinux kernel iquka. files okanye umqokeleli we-GNU Umqokeleli (GCC).
b. Usetyenziso lweflash lufuna ukubeka i.rbf file yoyilo lwe-OpenCL kwisahlulelo se-FAT32 se-micro SD flash card. Okwangoku, esi sahlulelo asixhonywanga xa umsebenzisi we-SDK exhobisa ibhodi. Ngoko ke, indlela efanelekileyo yokuhlaziya isahlulelo kukusebenzisa i-flash card reader kunye nomatshini wokuphuhlisa.

Xa utshintshela phakathi kwe-Intel FPGA SDK ye-OpenCL Offline Compiler ephunyeziweyo files (.aocx) ehambelana nokwahluka kwebhodi eyahlukileyo (oko kukuthi, c5soc kunye ne-c5soc_sharedonly), kufuneka usebenzise inkqubo eluncedo ye-SDK ukulayisha i.aocx file yomahluko webhodi entsha okokuqala. Ukuba usebenzisa ngokulula isicelo senginginya usebenzisa umahluko webhodi entsha kodwa iFPGA iqulathe umfanekiso osuka kwenye umahluko webhodi, impazamo ebulalayo inokwenzeka.
I.qxp file ayibandakanyi izabelo zojongano lwezahlulelo kuba iQuartus Prime isoftwe rhoqo ihlangabezana neemfuno zexesha zesi sahlulelo.
Xa unika amandla ibhodi, idilesi yayo yokufikelela kumajelo eendaba (MAC) imiselwe kwinani elingacwangciswanga. Ukuba umgaqo-nkqubo wakho we-LAN awukuvumeli oku kuziphatha, cwangcisa idilesi ye-MAC ngokwenza le misebenzi ilandelayo:
a. Ngexesha lokuvula amandla e-U-Boot, cofa naliphi na iqhosha ukufaka i-U-Boot yomyalelo wokukhawuleza.
b. Uhlobo setenv ethaddr 00:07:ed:00:00:03 kwi-prompt yomyalelo.
Unokukhetha nayiphi na idilesi ye-MAC.
c. Chwetheza umyalelo we-saveenv.
d. Qalisa kwakhona ibhodi.

1.8 Imbali yoHlaziyo lwaMaxwebhu
Uluhlu loku-1.
Imbali yoHlaziyo yoXwebhu ye-Intel FPGA SDK ye-OpenCL Cyclone V SoC
Isikhokelo sokuPhathwa kweQonga loPhuhliso lweKit

Umhla	Inguqulelo	Iinguqu
Meyi-17	2017.05.08	•Ukukhululwa kwesondlo.
Octoboer 2016	2016.10.31	•Rebranded Altera SDK for OpenCL to Intel FPGA SDK for OpenCL. •Iguqulelwe ngokutsha iAltera Offline Compiler yaba yiIntel FPGA SDK yeOpenCL Offline Compiler.
Meyi-16	2016.05.02	•Imiyalelo elungisiweyo yokwakha kunye nokuguqula umfanekiso wekhadi le-SD. •Imiyalelo elungisiweyo yokubuyisela kwakhona i-Linux kernel kunye ne-OpenCL Linux kernel driver.
NgoNovemba-15	2015.11.02	• Ukukhutshwa kwesondlo, kunye neemeko ezitshintshileyo zeQuartus II ukuya kwiQuartus Prime.
Meyi-15	15.0.0	•Kuhlenga-hlengiso lwe-FPGA, umyalelo osusiweyo wokucwangcisa ngokutsha undoqo weFPGA kunye ne. umfanekiso we-rbf ngokubiza ikati fileigama>. rbf > /dev/ fpga0 umyalelo kuba le ndlela ayikhuthazwa.
Disemba-14	14.1.0	•Uthiywe ngokutsha uxwebhu njenge-Altera Cyclone V SoC Development Kit Reference Porting Guide. •Uhlaziyo oluluncedo lweprogram ye-aoclfileigama>.aocx usetyenziso lomyalelo. •Uhlaziyo oluluncedo lokuxilonga kuxilongo lwe-aocl kunye noxilongo lwe-aocl umyalelo oluncedo. •Uhlaziyo lwenkqubo kwi-Porting the Reference Platform kwicandelo leBhodi ye-SoC yakho ukuze liquke imiyalelo yokufaka kunye nokuguqula isahlulelo sebhodi ye-c5soc ukudala ulwahlulo olucocekileyo lwexesha lokuqukuqela okuqinisekisiweyo kokuvalwa kwexesha. •Kufakwe isihloko Uhlaziyo lwePorted Reference Platform ukuchaza iinkqubo zale misebenzi ilandelayo: 1.Ngaphandle kwenkqubo yeprosesa enzima (HPS) ibhloko kwisahlulo sebhodi 2.Ukuhlaziya umfanekiso wekhadi le-SD •Uhlaziyo lwecandelo loMfanekiso weKhadi le-SD elinokukhanya. Kucetyiswa kusetyenziswa uguqulelo 14.0 lomfanekiso weGolden System Reference Design (GSRD) njengendawo yokuqala endaweni yomfanekiso okhoyo ngeSoC Embedded Design Suite (EDS). •Uhlaziywa kwakhona i-Linux Kernel kunye ne-OpenCL Linux Kernel Driver icandelo: 1.Umyalelo owongeziweyo ukuseta i-CROSS COMPILE variable. 2.Utshintshe umyalelo owubalekayo ukuqinisekisa ukuba i-CMA yenziwe yasebenza ngempumelelo.
Julayi-14	14.0.0	•Ukukhutshwa kokuqala.