MICROCHIP DDR Werengani IP
Zofotokozera
- Dzina lazogulitsa: DDR Werengani IP v2.0
- Yogwirizana ndi Video Arbiter IP
- Amagwiritsidwa ntchito powerenga kuchuluka kwa data kuchokera ku DDR kukumbukira
- Amagwiritsidwa ntchito pamapulogalamu amakanema kuti awerenge mzere uliwonse wopingasa wa kanema wosungidwa mu kukumbukira kwa DDR
DDR Read IP ilinso ndi madoko olowera ndi otuluka mu Arbiter
Interface bus ndi AXI4 Stream Interface, zalembedwa mu bukhu la ogwiritsa ntchito.
FAQ
- Kodi cholinga cha DDR Read IP ndi chiyani?
- Kodi kugwirizana kofunikira pa DDR Read IP ndi chiyani?
- Ndi mapulogalamu ati omwe DDR Read IP amagwiritsidwa ntchito?
Mawu Oyamba
DDR Read IP imawerengera kuchuluka kwa data kuchokera pamtima wa DDR. DDR Read IP iyenera kugwiritsidwa ntchito ndi Video Arbiter IP yomwe imasintha zopempha zowerengedwa kukhala zochitika za AXI4. DDR Read IP imagwiritsidwa ntchito pamakanema kuti awerenge mzere uliwonse wopingasa wa kanema wosungidwa mu kukumbukira kwa DDR.
Chithunzi 1. SmartDesign Arbiter Interface
Zofunika Kwambiri
- Amagwiritsidwa ntchito powerenga Mizere Yazithunzi Zamavidiyo
- Imathandizira Kutulutsa Kwamavidiyo a Pixel Width ya 8, 16, ndi 32 bits
- Imathandizira Video Arbiter Interface ya 128, 256, ndi 512 bits
- Imathandizira AXI4 Stream Interface
Kukhazikitsa kwa Hardware
IP imapanga zowongolera ku Video arbiter IP kutengera zomwe ogwiritsa ntchito adilesi yoyambira yoyambira. Mphepete mwa kukwera kwa read_en_i imayambitsa kuwerengera. Zambiri kuchokera kwa woyimbira mavidiyo amasungidwa mu CDC FIFO yomwe imasintha deta kuchokera ku DDR clock domain kupita ku domain wotchi ya pixel. Zomwe zimawerengedwa kuchokera ku FIFO m'mphepete mwa read_en_i ndikutsukidwa kuti apange data ya pixel. The read_en_i ikuyenera kukhala yokwera kwa nthawi yokwanira kuti amalize kuwerengera kwa DDR ndipo nthawi yoyenera ndi ya mawotchi angapo ofanana ndi kusinthasintha kopingasa. Mzere woyamba umawerengedwa kuchokera ku adilesi yomwe imatanthauzidwa ndi frame_start_addr_i, ndipo mutatha kuwerengera kulikonse, adilesi imakulitsidwa ndi line_gap_i. Adilesi yowerengedwa imakhazikitsidwanso ku frame_start_addr_i pamtundu uliwonse_end_i chizindikiro. Zomwe zimatuluka ndizokwera chifukwa cha mawotchi opingasa.
Kufotokozera Kwapangidwe
- Chithunzi chotsatira chikuwonetsa chithunzi chapamwamba cha DDR Read.
Zolowetsa ndi Zotulutsa
Gome lotsatirali limatchula madoko olowera ndi otuluka a DDR Read IP mu Native Interface.
Gulu 1-1. Zolowetsa ndi Zotulutsa za DDR Read in Native Interface.
| Dzina la Port | Mtundu | M'lifupi | Kufotokozera |
| sinthani_i | Zolowetsa | — | Active Low asynchronous reset sign to design |
| pixel_clk_i | Zolowetsa | — | Pixel wotchi |
| ddr_clk_i | Zolowetsa | — | DDR wotchi kuchokera ku chowongolera kukumbukira |
| chimango_mapeto_i | Zolowetsa | — | Kutha kwa chizindikiro cha chimango |
| werengani_en_i | Zolowetsa | — | Werengani yambitsani chizindikiro kuti muwerenge |
| mzere_gap_i | Zolowetsa | 16 biti | Kusiyana kwa mzere pakati pa mizere iwiri |
| horz_resl_i | Zolowetsa | 16 biti | Kukhazikika kopingasa |
| Dzina la Port | Mtundu | M'lifupi | Kufotokozera |
| h_pan_i | Zolowetsa | 12 biti | Chopingasa chopingasa pamzere uliwonse wamakanema wowongoka |
| v_pani | Zolowetsa | 12 biti | Kuyimitsa koyima kuchokera ku adilesi yoyambira yoyang'ana moyima |
| werengani_ackn_i | Zolowetsa | — | Chivomerezo cha pempho lowerengedwa kuchokera kwa wotsutsa mavidiyo |
| werengani_wachita_i | Zolowetsa | — | Werengani mawu omaliza kuchokera pakanema wotsutsa |
| ddr_data_valid_i | Zolowetsa | — | Werengani deta yovomerezeka kuchokera ku Arbiter |
| frame_start_addr | Zolowetsa | 8 biti | Kanema chimango chiyambi adilesi |
| wdata_i | Zolowetsa | Lowetsani Data Width | Werengani zambiri kuchokera ku Arbiter |
| werengani_req_o | Zotulutsa | — | Werengani pempho kwa arbiter |
| werengani_yamba_addr_o | Zotulutsa | 32 biti | Adilesi ya DDR pomwe ikuyenera kuyambika |
| burst_size_o | Zotulutsa | 8 biti | Werengani kukula kophulika |
| data_valid_o | Zotulutsa | — | Deta Yovomerezeka |
| deta_o | Zotulutsa | Kutulutsa kwa Data Width | Data kwa Video Pipelining |
Gome lotsatirali likulemba madoko olowera ndi otuluka a DDR Read IP mu basi ya Arbiter Interface.
Gulu 1-2. Zolowetsa ndi Zotulutsa za DDR Read in Arbiter Interface Bus.
| Dzina la Port | Mtundu | M'lifupi | Kufotokozera |
| RDATA_I | Zolowetsa | Lowetsani Data Width | Werengani zambiri kuchokera ku Arbiter |
| RVALID_I | Zolowetsa | — | Werengani deta yovomerezeka kuchokera ku Arbiter |
| ARREADY_INE | Zolowetsa | — | Kuvomereza kwa Arbiter kuchokera ku pempho lowerenga |
| BUSER_I | Zolowetsa | — | Werengani kumaliza |
| ARADDR_O | Zotulutsa | 32 biti | Adilesi ya DDR pomwe ikuyenera kuyambika |
| ARVALID_O | Zotulutsa | — | Werengani pempho kwa arbiter |
| ARSIZE_O | Zotulutsa | 8 biti | Werengani kukula kophulika |
Gome lotsatirali limatchula zolowetsa ndi zotuluka za DDR Read IP mu AXI4 Stream Interface.
Gulu 1-3. Zolowetsa ndi Zotulutsa za DDR Werengani mu AXI4 Stream Interface.
| Dzina la Port | Mtundu | M'lifupi | Kufotokozera |
| CLOCK_I | Zolowetsa | — | Pixel wotchi |
| RESET_n_I | Zolowetsa | — | Active Low asynchronous reset sign to design |
| TDATA_O | Zotulutsa | Kutulutsa kwa Data Width | Zotulutsa Kanema Data |
| TSTRB_O | Zotulutsa | [Kutulutsa Kwa data m'lifupi/8 – 1: 0] | Linanena bungwe Video Data strobe |
| TKEEP_O | Zotulutsa | [Kutulutsa Kwa data m'lifupi/8 – 1: 0] | Linanena bungwe Video Data Sungani |
| TVALID_O | Zotulutsa | — | Zotulutsa Kanema zowona |
| TUSER_O | Zotulutsa | 4 biti | Zotulutsa za ogwiritsa ntchito 0bit= VSYNC
3bit = Mapeto a chimango |
| Dzina la Port | Mtundu | M'lifupi | Kufotokozera |
| TLAST_O | Zotulutsa | — | Zotulutsa Kanema Mapeto a Frame |
Zosintha Zosintha
Gome lotsatirali likulemba magawo osinthika omwe amagwiritsidwa ntchito mu DDR Read IP hardware kukhazikitsa. Izi ndizomwe zimapangidwira ndipo zimatha kusiyanasiyana kutengera zomwe mukufuna.
Gulu 1-4. Zosintha Zosintha
| Dzina la Parameter | Kufotokozera |
| Kukhazikika Kwam'mbali | Imatanthauzira kusamvana kopingasa |
| Lowetsani Data Width | Imatanthawuza kukula kwa deta (128, 256, ndi 512 bits) |
| Kutulutsa kwa Data Width | Imatanthawuza kukula kwa data (8, 16, 24, 32, ndi 64 bits) |
| Mawonekedwe a Arbiter | Zosankha kusankha Arbiter Interface kuchokera pazotsitsa ngati Native kapena Bus Interface |
| Data Interface | Zosankha kusankha Chiyankhulo cha Data kuchokera pamenyu yotsika ngati Native ndi AXI4 Stream Interface |
Kugwiritsa Ntchito Zida
Gome lotsatirali likutchula za kagwiritsidwe ntchito ka DDR Read IP mu Native Interface yokhala ndi makulidwe a data = 256 ndi makulidwe a data = 8.
DDR Read block ikugwiritsidwa ntchito pa chipangizo cha PolarFire FPGA, phukusi la MPF300TS_ES-1FCG1152E.
Gulu 1-5. DDR Werengani IP mu Native Interface
| Zothandizira | Kugwiritsa ntchito |
| DFFs | 502 |
| 4 alowetsa LUTs | 513 |
| Chithunzi cha MACC | 0 |
| Mtengo wa LSRAM 18K | 14 |
| SRAM | 0 |
Gome lotsatirali likutchula za kagwiritsidwe ntchito ka DDR Read IP mu Bus Interface ndi AXI4 stream yokhala ndi m'lifupi mwake = 256 ndi makulidwe a deta = 8.
Gulu 1-6. DDR Werengani IP mu Bus Interface ndi AXI4 Stream
| Zothandizira | Kugwiritsa ntchito |
| DFFs | 512 |
| 4 alowetsa LUTs | 514 |
| Chithunzi cha MACC | 0 |
| Mtengo wa LSRAM 18K | 14 |
| SRAM | 0 |
Mbiri Yobwereza
Mbiri yokonzanso ikufotokoza zosintha zomwe zidakhazikitsidwa muzolemba. Zosinthazo zandandalikidwa ndi kubwereza, kuyambira ndi zofalitsa zamakono.
| Kubwereza | Tsiku | Kufotokozera |
| 1.0 | 03/2022 | Kubwereza Koyamba. |
Thandizo la Microchip FPGA
Gulu lazinthu za Microchip FPGA limathandizira zogulitsa zake ndi ntchito zosiyanasiyana zothandizira, kuphatikiza Makasitomala, Customer Technical Support Center, a webmalo, ndi maofesi ogulitsa padziko lonse lapansi. Makasitomala akulangizidwa kuti ayendere zothandizira pa intaneti za Microchip asanakumane ndi chithandizo chifukwa ndizotheka kuti mafunso awo ayankhidwa kale.
Lumikizanani ndi Technical Support Center kudzera pa website pa www.microchip.com/support. Tchulani nambala ya Gawo la Chipangizo cha FPGA, sankhani gulu loyenera, ndikuyika mapangidwe files popanga chithandizo chaukadaulo. Lumikizanani ndi Makasitomala kuti muthandizidwe ndi zinthu zomwe si zaukadaulo, monga mitengo yazinthu, kukweza kwazinthu, zambiri zosintha, mawonekedwe oyitanitsa, ndi chilolezo.
- Kuchokera ku North America, imbani 800.262.1060
- Kuchokera kudziko lonse lapansi, imbani 650.318.4460
- Fax, kuchokera kulikonse padziko lapansi, 650.318.8044
The Microchip Webmalo
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Thandizo la Makasitomala
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Chidziwitso chazamalamulo
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Zizindikiro
Dzina la Microchip ndi logo, logo ya Microchip, Adaptec, AnyRate, AVR, logo ya AVR, AVR Freaks, BesTime, BitCloud, CryptoMemory, CryptoRF, dsPIC, flexPWR, HELDO, IGLOO, JukeBlox, KeeLoq, Kleer, LANCheck, LinkMD, max maXTouch, MediaLB, megaAVR, Microsemi, Microsemi logo, MOST, MOST logo, MPLAB, OptoLyzer, PIC, picoPower, PICSTART, PIC32 logo, PolarFire, Prochip Designer, QTouch, SAM-BA, SenGenuity, SpyNIC, SST, SST Logo, SuperFlash , Symmetricom, SyncServer, Tachyon, TimeSource, tinyAVR, UNI/O, Vectron, ndi XMEGA ndi zizindikiro zolembetsedwa za Microchip Technology Incorporated ku USA ndi mayiko ena. AgileSwitch, APT, ClockWorks, The Embedded Control Solutions Company, EtherSynch, Flashtec, Hyper Speed Control, HyperLight Load, IntelliMOS, Libero, motor bench, mTouch, Powermite 3, Precision Edge, ProASIC, ProASIC Plus, ProASIC Plus logo, Quiet- Wire , SmartFusion, SyncWorld, Temux, TimeCesium, TimeHub, TimePictra, TimeProvider, TrueTime, WinPath, ndi ZL ndi zizindikiro zolembetsedwa za Microchip Technology Incorporated ku USA.
Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, AnyCapacitor, AnyIn, AnyOut, Augmented Switching, BlueSky, BodyCom, CodeGuard, CryptoAuthentication, CryptoAutomotive, CryptoCompanion, CryptoController, dsPICDEM, dsPICDEM.net, Matching, Dynamic DAM. , ECAN, Espresso T1S, EtherGREEN, GridTime, IdealBridge, In-Circuit Serial Programming, ICSP, INICnet, Intelligent Paralleling, Inter-Chip Connectivity, JitterBlocker, Knob-on-Display, maxCrypto, maxView, membrane, Mindi, MiWi, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach, NVM Express, NVMe, Omniscient Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, PowerSmart, PureSilicon, QMatrix, ICE , Ripple Blocker, RTAX, RTG4, SAMICE, seri Quad I/O, mapu osavuta, SimpliPHY, SmartBuffer, SmartHLS, SMART-IS, storClad, SQI, SuperSwitcher, SuperSwitcher II, Switchtec, SynchroPHY, Total Endurance, TSHARC, USBCheck, VariSense , VectorBlox, VeriPHY,
- ViewSpan, WiperLock, XpressConnect, ndi ZENA ndi zizindikiro za Microchip Technology Incorporated ku USA ndi mayiko ena.
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- Zizindikiro zina zonse zomwe zatchulidwa pano ndi zamakampani awo.
- © 2022, Microchip Technology Incorporated ndi mabungwe ake. Maumwini onse ndi otetezedwa. ISBN: 978-1-6683-0015-2
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Kuti mudziwe zambiri za Microchip's Quality Management Systems, chonde pitani www.microchip.com/quality.
CONTACT
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| Ofesi Yakampani
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Zolemba / Zothandizira
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MICROCHIP DDR Werengani IP [pdf] Buku Logwiritsa Ntchito DDR Werengani IP, DDR, Werengani IP, IP |
