AN 987: Static Update Partial
Reconfiguration Tutorial

Static Update Partial Reconfiguration Tutorial yeIntel® ™ Agilex F-Series FPGA Development Board

Ichi chinyorwa chekushandisa chinoratidza static update partial reconfiguration (SUPR) paIntel® F-Series FPGA Development Board. Chikamu chekugadzirisazve (PR) chinokutendera kuti ugadzirise zvakare chikamu cheIntel FPGA zvine simba, nepo FPGA yasara ichiramba ichishanda. PR inoshandisa vanhu vakawanda mune imwe dunhu mudhizaini yako, pasina kukanganisa kushanda munzvimbo dziri kunze kwedunhu rino. Iyi nzira inopa advan inoteveratages mune masisitimu ayo akawanda mabasa nguva-anogovera zvakafanana FPGA zviwanikwa:

• Inobvumira kumhanya-nguva reconfiguration
• Inowedzera dhizaini scalability
• Inoderedza system down-time
• Inotsigira dynamic time-multiplexing mabasa mukugadzira
• Inoderedza mutengo uye kushandiswa kwesimba nekushandisa zvakanaka nzvimbo yebhodhi

Chii chinonzi Static Update Partial Reconfiguration?

Mune yechinyakare PR, chero shanduko kunharaunda yakamira inoda kudzokororwa kwemunhu wese. Nekudaro, neSUPR unogona kutsanangura dunhu rakasarudzika rinobvumira shanduko, pasina kuda kudzoreredzwa kwevanhu. Iyi tekinoroji inobatsira kune chikamu chedhizaini yaungangoda kushandura yekuderedza njodzi, asi izvo hazvidi kuti nguva yekumhanya igadziriswe.

1.1. Zvinodiwa Pakudzidzisa
Ichi chidzidzo chinoda zvinotevera:

• Yakanyanya kujairana neIntel Quartus® Prime Pro Edition FPGA yekumisikidza kuyerera uye chirongwa files.
•  Kuiswa kweIntel Quartus Prime Pro Edition vhezheni 22.3, ine Intel Agilex mudziyo tsigiro.
• Nekuita kweFPGA, JTAG kubatana neIntel Agilex F-Series FPGA yekuvandudza bhodhi pabhenji.
• Dhaunirodha Reference Design Files. Related Information
• Partial Reconfiguration User Guide
• Partial Reconfiguration Tutorials
• Chikamu Reconfiguration Online Kudzidziswa

Intel Corporation. Kodzero dzese dzakachengetwa. Intel, iyo Intel logo, uye mamwe maIntel mamaki zviratidzo zveIntel Corporation kana vatsigiri vayo. Intel inobvumidza kuita kwayo FPGA uye semiconductor zvigadzirwa kune zvazvino zvirevo zvinoenderana neIntel's standard waranti, asi inochengetera kodzero yekuita shanduko kune chero zvigadzirwa nemasevhisi chero nguva pasina chiziviso. Intel haitore mutoro kana mutoro unobva mukushandisa kana kushandiswa kwechero ruzivo, chigadzirwa, kana sevhisi inotsanangurwa pano kunze kwekunge yakabvumiranwa nekunyora neIntel. Vatengi veIntel vanorairwa kuti vawane yazvino vhezheni yezvakatemwa zvemudziyo vasati vavimba nechero ruzivo rwakaburitswa uye vasati vaisa maodha ezvigadzirwa kana masevhisi. *Mamwe mazita nemhando zvinogona kunzi ndezvevamwe.
ISO 9001:2015 Yakanyoreswa
1.2. Reference Dhizaini Pamusoroview
Iyi referensi dhizaini ine imwe, 32-bit counter. Padanho rebhodhi, dhizaini inobatanidza wachi kune 50MHz sosi, yobva yabatanidza zvinobuda kune mana maLED pabhodhi. Kusarudza zvinobuda kubva kumabheti ekupikisa, mune imwe nhevedzano, inoita kuti ma LED abwaire pane imwe frequency. Iyo yepamusoro_counter module inzvimbo yeSUPR.
Mufananidzo 1. Flat Reference Design

1.3. Static Update Region Overview
Iyi inotevera nhamba inoratidza dhizaini yedhizaini yePR dhizaini inosanganisira SUPR dunhu. Block A ndiyo yepamusoro static dunhu. Block B inzvimbo yeSUPR. Block C ndiyo PR chikamu.
Mufananidzo 2. PR Dhizaini neSUPR Dunhu

• Iyo Yepamusoro Static Dunhu-ine dhizaini pfungwa isingachinji. Kuchinja dunhu rino kunoda kudzokororwa kwevose vanobatanidzwa. Iyo static nzvimbo inosanganisira chikamu chekugadzira icho chisingachinji kune chero munhu. Iyi nharaunda inogona kusanganisira periphery uye core mudziyo zviwanikwa. Iwe unofanirwa kunyoresa kutaurirana kwese pakati peSUPR uye PR zvikamu munzvimbo inomira. Ichi chinodiwa chinobatsira kuve nechokwadi chekuvharwa kwenguva kune chero vanhu, maererano neiyo static dunhu.
• B SUPR Dunhu-ine-musimboti-chete logic inogona kuchinjika yekuderedza njodzi, asi haimbodi nguva yekumhanyisa kugadziridzwa. Dunhu reSUPR rine zvakafanana zvinodiwa uye zvirambidzo sechikamu chePR. Iyo SUPR partition inogona kunge iine chete epakati zviwanikwa. Naizvozvo, chikamu cheSUPR chinofanira kunge chiri chikamu chemwana chepamusoro-chikamu midzi yekuparadzanisa iyo ine dhizaini yedhizaini newachi. Kuchinja dunhu reSUPR kunoburitsa SRAM Object File (.sof) inoenderana nezvose zviripo zvakaunganidzwa Raw Binary File (.rbf) files yePR partition C.
• C PR Partition-ine inopokana pfungwa iyo iwe yaunogona kudzokorora panguva yekumhanya nechero dhizaini dhizaini inokodzera uye inowana kuvharwa kwenguva panguva yekuunganidza.

1.4. Dhaunirodha Reference Design Files
Iyo partial reconfiguration tutorial inowanikwa munzvimbo inotevera: https://github.com/intel/fpga-partial-reconfig
Kurodha pasi tutori:

1. Dzvanya Clone kana dhawunirodha.
2. Dzvanya Dhawunirodha ZIP. Unzip iyo fpga-partial-reconfig-master.zip file.
3. Enda kune tutorials/agilex_pcie_devkit_blinking_led_supr subfolder kuti uwane iyo referensi dhizaini.
   Iyo flat folder ine zvinotevera files:
   Tafura 1. Reference Design Files

File Zita	Tsanangudzo
pamusoro. sv	Top-level file ine flat kuitiswa kwedhizaini. Iyi module inosimbisa blinking_led sub-partition uye yepamusoro_counter module.
t op_counter . sv	Yepamusoro-chikamu 32-bit counter inodzora LED [1] zvakananga. Iyo yakanyoreswa kubuda kwekaunda inodzora LED [0], uye zvakare inopa simba LED [2] uye LED [3] kuburikidza ne blinking_led module.
blinking_led. sdc	Inotsanangura zvipingaidzo zvenguva yeprojekiti.
blinking_led. sv	Muchidzidzo ichi, unoshandura iyi module kuita mubereki PR partition. Iyo module inogamuchira yakanyoreswa kubuda kwetop_counter module, inodzora LED [2] uye LED [3].
blinking_led.qpf	Intel Quartus Prime chirongwa file ine runyorwa rwezvese zvakadzokororwa mupurojekiti.
blinking_led . qs f	Intel Quartus Prime marongero file ine mabasa uye marongero epurojekiti.

Cherechedza: Iyo supr folda ine yakazara seti ye files iwe unogadzira uchishandisa iyi application note. Tarisa izvi files chero nguva panguva yekufamba.
1.5. Reference Design Walkthrough
Matanho anotevera anotsanangura kuitwa kweSUPR ine flat dhizaini:

• Danho 1: Kutanga
• Danho 2: Gadzira Zvikamu Zvikamu
• Nhanho 3: Govera Nzvimbo uye Matunhu eNzira
• Danho 4: Tsanangura Vanhu
• Danho 5: Gadzira Zvidzoreso
• Nhanho yechitanhatu: Gadzira iyo Base Revision
• Danho rechinomwe: Seta PR Implementation Revisions
• Nhanho 8: Shandura iyo SUPR Logic
• Danho 9: Ronga Bhodhi

Mufananidzo 3. SUPR Compilation Flow

1.5.1. Danho 1: Kutanga
Kukopa referensi dhizaini files kunzvimbo yako yekushanda uye gadzira iyo blinking_led flat dhizaini:

1. Usati watanga, Dhawunirodha Reference Dhizaini Files papeji 5.
2. Gadzira iyo agilex_pcie_devkit_blinking_led_supr dhairekitori munzvimbo yako yekushanda.
3. Kopa zvidzidzo zvakatorwa/agilex_pcie_devkit_blinking_led/flat sub-folder kune agilex_pcie_devkit_blinking_led_supr dhairekitori.
4. MuIntel Quartus Prime Pro Edition software, tinya File ➤ Vhura Project uye vhura /flat/blinking_led.qpf.
5. Kubatanidza dhizaini yepasi, tinya Kugadzirisa ➤ Tanga Kuunganidza. Iyo Timing Analyzer inoshuma inovhura otomatiki kana kuunganidzwa kwapera. Unogona kuvhara iyo Timing Analyzer ikozvino.

1.5.2. Danho 2: Gadzira Zvikamu Zvikamu
Gadzira dhizaini zvikamu zvedunhu rega rega raunoda kugadzirisa zvishoma. Iwe unogona kugadzira chero nhamba yezvakazvimirira zvikamu kana PR matunhu mupurojekiti yako. Tevedza nhanho idzi kugadzira zvikamu zvekugadzira zveiyo u_blinking_led muenzaniso sePR partition, uye u_top_counter muenzaniso sedunhu reSUPR:

1. Tinya-kurudyi iyo u_blinking_led muenzaniso muProjekti Navigator uye tinya Dhizaini Chikamu
   ➤ Reconfigurable. Iyo dhizaini yekuparadzanisa icon inoonekwa padivi peimwe neimwe muenzaniso iyo yakaiswa sechikamu.
   Mufananidzo 4. Kugadzira Zvikamu Zvikamu
2. Dzokorora nhanho yekutanga kugadzira chikamu cheiyo u_top_counter muenzaniso.
3. Dzvanya Basa ➤ Dhizaini yeZvikamu Zvikamu. Iwindo rinoratidza zvikamu zvose zvekugadzira mupurojekiti.
   Mufananidzo 5. Dhizaini Partitions Window
   
4. Tinya kaviri blinking_led Partition Name cell kuti uipe zita rekuti pr_partition. Saizvozvo, rename iyo top_counter partition kuti supr_partition.
   Neimwe nzira, kuwedzera mitsara inotevera blinking_led.qsf inogadzira zvikamu izvi:
   set_instance_assignment -zita PARTITION pr_partition \ -ku_ku_blinking_led -entity pamusoro
   set_instance_assignment -zita PARTIAL_RECONFIGURATION_PARTITION ON \ -ku_ku_blinking_led -entity pamusoro
   set_instance_assignment -zita PARTITION supr_partition \ -kusvika u_top_counter -entity pamusoro
   set_instance_assignment -zita PARTIAL_RECONFIGURATION_PARTITION ON \ -kusvika u_top_counter -entity pamusoro

1.5.3. Nhanho 3: Govera Nzvimbo uye Matunhu eNzira
Kune yega yega yega yekudzokorora yaunogadzira, iyo Compiler inoshandisa iyo PR chikamu chedunhu kugoverwa kuisa inoenderana persona musimboti mudunhu rakachengetwa. Tevedza nhanho idzi kutsvaga uye kugovera PR dunhu mune mudziyo floorplan kune yako base revision:

1. MuProjekti Navigator Hierarchy tab, tinya-kurudyi u_blinking_led muenzaniso, wobva wadzvanya Logic Lock Dunhu ➤ Gadzira New Logic Lock Dunhu. Nharaunda inoonekwa muLogic Lock Regions hwindo.
2. Rondedzera dunhu Upamhi hwe5 uye Hurefu hwe5.
3. Rondedzera nzvimbo yekuisa makongisheni eu_blinking_led muOrigin column. Mabviro anoenderana nechepazasi-kuruboshwe kona yedunhu. Taura Mabviro se X166_Y199. Iyo Compiler inoverengera (X170 Y203) seyepamusoro-kurudyi kurongeka.
4. Gonesa iyo Yakachengetwa uye Core-chete sarudzo dzedunhu.
5. Tinya kaviri sarudzo yeRouting Region. Iyo Logic Lock Routing Region Settings dialog box inooneka.
6. Kune Rudzi rweRouting, sarudza Yakagadziriswa nekuwedzera. Iyi sarudzo inopa otomatiki Hurefu hweKuwedzera imwe.
7. Dzokorora matanho apfuura kugovera zvinotevera zviwanikwa zveu_top_counter partition:
   • Urefu—5
   • Kufara—5
   • Kwakabva—X173_Y199
   • Nzvimbo Yekufambisa- Yakagadziriswa nekuwedzera neKuwedzera kureba kweimwe.
   • Reserved-On
   • Core-Chete—Pari
   Mufananidzo 6. Logic Lock Matunhu Window
   Cherechedza: Nzvimbo yekufambisa inofanira kunge yakakura kudarika nzvimbo yekuiswa, kuti ipe imwe shanduko kune iyo Compiler's routing s.tage, apo Compiler inofambisa vanhu vakasiyana.
8. Nzvimbo yako yekuisa inofanirwa kuvharira iyo blinking_led logic. Kusarudza nzvimbo yekuisa nekutsvaga node muChip Planner, tinya-kurudyi zita redunhu u_blinking_led muLogic Lock Regions hwindo, wobva wadzvanya Tsvaga Node ➤ Tsvaga muChip Planner.
9.  Pasi peChikamu Mishumo, tinya kaviri Report Design Partitions. Iyo Chip Planner inoratidzira uye mavara makodhi dunhu.

Mufananidzo 7. Chip Planner Node Nzvimbo ye blinking_led
Neimwe nzira, kuwedzera mitsara inotevera blinking_led.qsf inogadzira matunhu aya:
set_instance_assignment -zita PARTITION pr_partition -ku \ u_blinking_led -entity pamusoro
set_instance_assignment -zita PARTIAL_RECONFIGURATION_PARTITION ON \ -ku_ku_blinking_led -entity pamusoro
set_instance_assignment -zita PARTITION supr_partition -to u_top_counter \ -entity pamusoro
set_instance_assignment -zita PARTIAL_RECONFIGURATION_PARTITION ON -ku \ u_top_counter -entity pamusoro
set_instance_assignment -zita PLACE_REGION "X166 Y199 X170 Y203" -ku \ u_blinking_led
set_instance_assignment -zita RESERVE_PLACE_REGION ON -kuti u_blinking_led
set_instance_assignment -zita CORE_ONLY_PLACE_REGION ON -kuti u_blinking_led
set_instance_assignment -zita REGION_NAME pr_partition -to u_blinking_led
set_instance_assignment -zita ROUTE_REGION "X165 Y198 X171 Y204" -ku \ u_blinking_led
set_instance_assignment -zita RESERVE_ROUTE_REGION OFF -kuti u_blinking_led
set_instance_assignment -zita PLACE_REGION "X173 Y199 X177 Y203" -ku \ u_top_counter
set_instance_assignment -zita RESERVE_PLACE_REGION ON -kusvika u_top_counter
set_instance_assignment -zita CORE_ONLY_PLACE_REGION ON -kusvika u_top_counter
set_instance_assignment -zita REGION_NAME supr_partition -to u_top_counter
set_instance_assignment -zita ROUTE_REGION "X172 Y198 X178 Y204" -ku \ u_top_counter
set_instance_assignment -zita RESERVE_ROUTE_REGION OFF -kusvika u_top_counter
1.5.4. Danho 4: Tsanangura Vanhu

Iyi referensi dhizaini inotsanangura vanhu vatatu vakapatsanurwa kune imwechete PR chikamu, uye imwe SUPR persona yedunhu reSUPR. Tevedza nhanho idzi kutsanangura uye kusanganisira vanhu ava muprojekiti yako. Kana uchishandisa Intel Quartus Prime Text Mharidzo, dzima Wedzera file
kune yazvino purojekiti paunenge uchichengetedza iyo files.

1. Gadzira blinking_led_slow.sv itsva, blinking_led_empty.sv, uye top_counter_fast.sv SystemVerilog files mubhuku rako rekushanda. Simbisa kuti blinking_led.sv yatovepo mudhairekitori rekushanda.
2.  Pinda zvinotevera zvirimo zveSystemVerilog files:
   Tafura 2. Reference Design Personas SystemVerilog
   

   File Zita	Tsanangudzo	Code
   blinking_led_slow. sv	Ma LED anopenya zvishoma nezvishoma	timecale 1 ps / 1 ps 'default_nettype hapana module blinking_led_slow // wachi waya yekupinza, yekuisa waya reset, waya yekupinda [31:01 counter, // Kudzora masaini eiyo LEDs inobuda waya led_two_on, kubuda waya led_three_on localparam COUNTER_TAP = 27; reg led_two_on_r; gumbo led_three_on_r; assign led_two_on = led_two_on_r; assign led_three_on = led_three_on_r; always_ff @(posedge wachi) tanga led_two_on_r <= counter[COUNTER_TAP]; led_three_on_r <= counter[COUNTER_TAP]; endmodule
   blinking_led_isina. sv	Ma LED anogara akabatidza	timecale 1 ps / 1 ps 'default_nettype hapana module blinking_led_empty (// wachi yekupinda waya wachi, yekuisa waya reset, yekupinza waya [31:01 counter, // Kudzora masiginecha eLEC- yakabuda waya inotungamira_two_on, yakabuda waya inotungamira_three_on
   akaenderera…

   File Zita	Tsanangudzo	Code
   		// LED iri kushanda yakaderera assign led_two_on = l'IDO; govera led_three_on = 11b0; endmodule
   top_counter_fast.sv	Chechipiri SUPR	'timescale 1 ps / 1 ps
   	persona	Thdefault_nettype hapana module top_counter_fast
   		// Kudzora masaini eiyo LEDs inobuda waya led_one_on, yakabuda waya [31:0] kuverenga, // wachi yekuisa waya wachi
   		); localparam COUNTER TAP = 23; reg [31:0] count_d; assign count = count_d; govera led_one_on = ount_d[COUNTER_TAP]; always_ff @(posedge wachi) tanga count_d <= count_d + 2; end
   		.:module

3.  Dzvanya File ➤ Sevha Se uye chengetedza .sv files mune yazvino dhairekitori reprojekiti.

1.5.5. Danho 5: Gadzira Zvidzoreso
Iyo PR dhizaini inoyerera inoshandisa iyo purojekiti yekudzokorora chimiro muIntel Quartus Prime software. Yako yekutanga dhizaini ndiyo dhizaini yekudzokorora, kwaunotsanangura iyo static dunhu miganhu uye matunhu anogadziriswa paFPGA. Kubva pakudzokororwa kwekutanga, iwe unogadzira mamwe madzokororo. Aya ongororo ane akasiyana mashandisirwo ematunhu ePR. Nekudaro, ese maPR magadzirirwo ekuita anoshandisa yakafanana yepamusoro-level yekuisa uye nzira yekumisikidza kubva kune base revision. Kugadzira dhizaini yePR, iwe unogadzira PR yekumisikidza kudzokorora kune yega yega munhu. Pamusoro pezvo, iwe unofanirwa kugovera ingave iyo Chikamu Reconfiguration - Base kana Partial Reconfiguration - Persona Implementation revision mhando kune yega yega yekudzokorora. Tafura inotevera inonyora zita rekudzokorora uye rudzi rwekudzokorora kune imwe neimwe yedzokororo. The impl_blinking_led_supr_new.qsf revision ndiyo SUPR persona implementation.
Tafura 3. Kudzokorora Mazita uye Mhando

Zita rekudzokorora	Revision Type
blinking_led	Chikamu Reconfiguration - Base
blinking_led_default	Partial Reconfiguration - Persona Implementation
blinking_led_slow	Partial Reconfiguration - Persona Implementation
blinking_led_isina	Partial Reconfiguration - Persona Implementation
impl_blinking_led_supr_new	Partial Reconfiguration - Persona Implementation

1.5.5.1. Kuisa iyo Base Revision
Tevedza nhanho idzi kuti uise blinking_led seyaniso vhezheni:

1. Dzvanya Chirongwa ➤ Ongororo.
2. Kune Revision Type, sarudza Chikamu Reconfiguration - Base.

Danho iri rinowedzera zvinotevera kune blinking_led.qsf:
##blinking_led.qsf set_global_assignment -zita REVISION_TYPE PR_BASE
1.5.5.2. Kugadzira Implementation Revisions
Tevedza nhanho idzi kuti ugadzire kudzokorora kwekuita:

1. MuRevisions dialog box, tinya kaviri < >.
2. Muzita rekudzokorora, tsanangura blinking_led_default uye sarudza blinking_led yeKubva pakudzokorora.
3. Kune iyo Revision mhando, sarudza Partial Reconfiguration - Persona Implementation.
4. Dzima iyo Seti seyazvino yekudzokorora sarudzo.
5. Dzokorora nhanho 2 kusvika 5 kuseta Rudzi rwekudzokorodza kune mamwe magadzirirwo ekuita:

Zita rekudzokorora	Revision Type	Kubva paRevision
blinking_led_slow	Partial Reconfiguration - Persona Implementation	blinking_led
blinking_led_isina	Partial Reconfiguration - Persona Implementation	blinking_led
impl_blinking_led_supr_new	Partial Reconfiguration - Persona Implementation	blinking_led

Mufananidzo 8. Kugadzira Implementation Revisions

Imwe neimwe .qsf file ikozvino ine basa rinotevera:
set_global_assignment -zita REVISION_TYPE PR_IMPL
set_instance_assignment -zita ENTITY_REBINDING nzvimbo_mubati -ku_top_counter
set_instance_assignment -zita ENTITY_REBINDING nzvimbo_mubati -ku_ku_blinking_led
1.5.6. Nhanho yechitanhatu: Gadzira iyo Base Revision
Tevedza nhanho idzi kuunganidza iyo base revision uye kutumira kunze kwenyika iyo static uye SUPR matunhu kuti azoshandiswa gare gare mukuita kudzokorora kwevatsva PR personas:

1. Seta blinking_led seYazvino Revision kana isati yatosetwa.
2. Mudhizaini yeZvikamu Window, tinya iyo (…) padhuze nekona yekurudyi uye gonesa iyo Post Final Export. File column. Iwe unogona zvakare kudzima kana kushandura kurongeka kwemakoramu.
3. Kuendesa otomatiki mufananidzo wekupedzisira wePR dhizaini dhizaini mushure memubatanidzwa wega wega, tsanangura zvinotevera zvePost Final Export. File sarudzo dzemudzi uye SUPR zvikamu. The .qdb files kutumira kune dhairekitori reprojekiti nekusarudzika.
   • root_partition—blinking_led_static.qdb
   • supr_partition—blinking_led_supr_partition_final.qdb
   Mufananidzo 9. Auto Export in Design Partitions WindowNerumwewo, zvinotevera .qsf assignments inotumira mapartitions otomatiki mushure memuunganidzwa wega wega:
   set_instance_assignment -name EXPORT_PARTITION_SNAPSHOT_FINAL \ blinking_led_static.qdb -to | -entity pamusoro
   set_instance_assignment -zita EXPORT_PARTITION_SNAPSHOT_FINAL \ blinking_led_supr_partition_final.qdb -to u_top_counter \ -entity top
4. Kuunganidza blinking_led base revision, tinya Kugadzirisa ➤ Tanga
   Compilation. Neimwe nzira, unogona kushandisa unotevera kuraira kuunganidza iyi ongororo:
   quartus_sh -flow compile blinking_led -c blinking_led Mushure mekubudirira kuunganidza, zvinotevera files inooneka mudhairekitori reprojekiti:
   • blinking_led.sof
   • blinking_led.pr_partition.rbf
   • blinking_led.supr_partition.rbf
   • blinking_led_static.qdb
   • blinking_led_supr_partition_final.qdb

1.5.7. Nhanho yechinomwe: Gadzira PR Implementation Revisions
Iwe unofanirwa kugadzirira iyo PR yekumisikidza gadziriso usati wagadzira iyo PR bitstream yekuronga mudziyo. Iyi setup inosanganisira kuwedzera iyo static region .qdb file sekwakabva file pakudzokorora kwega kwega kwekuita. Mukuwedzera, unofanira kutsanangura
iyo inoenderana neiyo PR dunhu. Tevedza nhanho idzi kumisikidza iyo PR kuita kudzokorora:

1.  Kuseta kudzokorora kwazvino, tinya Project ➤ Revisions, sarudza blinking_led_default sezita reRevision, wobva wadzvanya Set Current. Neimwe nzira, unogona kusarudza iyo yazvino gadziriso pane huru Intel Quartus Prime toolbar.
2. Kuti uone kunobva kwairi kwekudzokorora kwekuita uku, tinya Chirongwa ➤ Wedzera/Bvisa Files muProjekti. Simbisa kuti blinking_led.sv file inooneka mu file list.
3. Kuti ndione kuti kwakabva kupi file kuitira kuvandudzwa kwekuita, tinya Chirongwa ➤ Wedzera/Bvisa files muProjekti, uye wedzera inotevera sosi files yedzokorodzo dzekuita. Kana iripo, bvisa blinking_led.sv kubva pane chirongwa chechirongwa files.
   

   Implementation Revision Zita	Source File
   blinking_led_isina	blinking_led_empty.sv
   blinking_led_slow	blinking_led_slow.sv

4. Seta blinking_led_default seYazvino Revision.
5. Kutsanangura .qdb file sesosi yemidzi_yekuganhura, tinya Mabasa ➤ Dhizaini yeZvikamu Zvikamu. Tinya kaviri iyo Partition Database File sero uye tsanangura blinking_led_static.qdb file.
6. Saizvozvo, tsanangura blinking_led_supr_partition_final.qdb seyo Partition Database File for supr_partition.

   Mufananidzo 10.Neimwe nzira, shandisa zvinotevera .qsf assignments kudoma iyo .qdb:
   set_instance_assignment -zita QDB_FILE_PARTITION \ blinking_led_static.qdb -to |
   set_instance_assignment -zita QDB_FILE_PARTITION \ blinking_led_supr_partition_final.qdb -kusvika u_top_counter
7. MuDhizaini yeZvikamu Zvikamu, tinya iyo (…) padhuze nekona yekurudyi uye gonesa iyo Entity Re-binding column.

8.  MuSero Re-binding Sero, tsanangura zita idzva rechikamu chePR chauri kushandura mukudzokorora kwazvino. Kune iyo blinking_led_default yekumisikidza kudzokorora, zita remubatanidzwa riri blinking_led. Mune ino kesi, uri kupeta iyo u_blinking_led muenzaniso kubva kubhesi revision inounganidzwa neiyo nyowani blinking_led. Kuti uwane mamwe magadzirirwo ekuita, tarisa kune inotevera tafura:

   Kudzokorora	Entity Re-binding Value
   blinking_led_slow	blinking_led_slow
   blinking_led_isina	blinking_led_isina

   Mufananidzo 11. Entity RebindingNeimwe nzira, unogona kushandisa mitsetse inotevera mune yega yega revision's .qsf kuseta mabasa:
   ##blinking_led_default.qsf
   set_instance_assignment -zita ENTITY_REBINDING blinking_led \ -ku_ku_blinking_led
   ##blinking_led_slow.qsf
   set_instance_assignment -zita ENTITY_REBINDING blinking_led_slow \ -ku_ku_blinking_led
   ##blinking_led_empty.qsf
   set_instance_assignment -zita ENTITY_REBINDING blinking_led_isina \ -ku_ku_blinking_led

9. Delete the place_holder text kubva muEntity Re-binding cell for supr_partition.
10. Kubatanidza dhizaini, tinya Kugadzirisa ➤ Tanga Kuunganidza. Neimwe nzira, shandisa murairo unotevera kuunganidza chirongwa ichi: quartus_sh -flow compile blinking_led -c blinking_led_default
11. Dzokorora nhanho 4 kusvika 11 kugadzirira uye kuunganidza blinking_led_slow uye blinking_led_empty kuita kudzokorora.

1.5.8. Nhanho 8: Shandura iyo SUPR Logic
Kuti uchinje mashandiro eiyo logic mukati meiyo SUPR partition, unofanirwa kushandura iyo SUPR yekugovera sosi. Pedzisa matanho anotevera kutsiva u_top_counter muenzaniso muSUPR chikamu nepamusoro_counter_fast entity.

1. Kuseta iyo SUPR yekumisikidza ongororo seyazvino, tinya Project ➤ Revisions uye isa impl_blinking_led_supr_new seyazvino kudzokorora, kana sarudza iyo
   kudzokorora paIntel Quartus Prime main toolbar.
2. Kuti ndione kuti kwakabva kupi file kuti udzokorore kuita, tinya Chirongwa ➤
   Wedzera/Bvisa files muProjekti, uye ona kuti top_counter_fast.sv ndiko kunobva iyo impl_blinking_led_supr_new gadziriso yekudzokorora. Kana iripo, bvisa top_counter.sv kubva pachirongwa chechirongwa files.
3. Kutsanangura .qdb file zvinechekuita nechikamu chemidzi, tinya Mabasa ➤ Dhizaini Yezvikamu Window, wobva wadzvanya kaviri iyo Partition Database. File sero kutsanangura blinking_led_static.qdb.
   Neimwe nzira, shandisa murairo unotevera kupa izvi file: set_instance_assignment -zita QDB_FILE_PARTITION \ blinking_led_static.qdb -to |
4. Mune Entity Re-binding cell ye pr_partition, tsanangura rakakodzera zita rechinhu. Zve example, tsanangura blinking_led_empty entity. Muchiitiko ichi, uri kudzoreredza iyo u_blinking_led muenzaniso kubva kune base revision inounganidzwa neiyo nyowani linking_led_empty. Mutsetse unotevera wavepo mu .qsf:
   ##impl_blinking_led_supr_new.qsf set_instance_assignment -zita ENTITY_REBINDING kubwaira_kutungamirira_isina \ -kuti u_kubwaira_kutungamirira
5. Mune Entity Re-binding cell ye supr_partition, tsanangura iyo top_counter_fast entity. top_counter_fast izita reiyo static entity inotsiva u_top_counter kana wapedza SUPR.##impl_blinking_led_supr_new.qsf set_instance_assignment -zita ENTITY_REBINDING top_counter_fast \ -to u_top_counter
6. Kubatanidza dhizaini, tinya Kugadzirisa ➤ Tanga Kuunganidza. Neimwe nzira, shandisa unotevera kuraira kuunganidza iyi purojekiti yekudzokorora: quartus_sh -flow compile blinking_led -c \ impl_blinking_led_supr_new

1.5.9. Danho 9: Ronga Bhodhi
Tevedza nhanho idzi kubatanidza uye kuronga iyo Intel Agilex F-Series FPGA yekuvandudza bhodhi.

1. Batanidza simba rekupa kune Intel Agilex F-Series FPGA yekuvandudza bhodhi.
2. Batanidza tambo ye USB pakati pePC yako USB port uye USB programming hardware pabhodhi rekuvandudza.
3. Vhura iyo Intel Quartus Prime software, wobva wadzvanya Zvishandiso ➤ Programmer. Tarisa kune Programming a Development Board.
4. MuPurogiramu, tinya Hardware Setup, uye wosarudza USB-Blaster.
5. Dzvanya Auto Detect, wobva wasarudza AGFB014R24B mudziyo.
6.  Dzvanya OK. Iyo Intel Quartus Prime software inoona uye inogadziridza iyo Programmer nemidziyo mitatu yeFPGA pabhodhi.
7.  Sarudza iyo AGFB014R24B mudziyo, tinya Shandura File, uye takura blinking_led_default.sof file.
8. Vhura Chirongwa/Gadzirisa blinking_led_default.sof file.
9. Dzvanya Tanga uye mirira kuti bhari yekufambira mberi isvike 100%.
10.  Tarisa maLED ari pabhodhi achibwaira.
11. Kuronga nharaunda yePR chete, tinya kurudyi blinking_led_default.sof file muPurogiramu uye tinya Wedzera PR Chirongwa File. Sarudza blinking_led_slow.pr_partition.rbf file.
12. Dzima Chirongwa/Gadzirisa blinking_led_default.sof file.
13.  Vhura Chirongwa/Gadzirisa blinking_led_slow.pr_partition.rbf file, wobva wadzvanya Start. Pabhodhi, tarisa LED[0] uye LED[1] ichiramba ichibwaira. Kana bhara rekufambira mberi rasvika 100%, LED[2] uye LED[3] inopenya zvishoma.
14. Kuronga zvakare nharaunda yePR, tinya-kurudyi pakanzi .rbf file muPurogiramu, wobva wadzvanya Shandura PR Kuronga File.
15.  Sarudza iyo .rbf files kune vamwe vanhu vaviri kuti vaone maitiro ari pabhodhi. Kurodha blinking_led_default.pr_partition.rbf file inoita kuti maLED abwaire panguva yekutanga, uye kurodha blinking_led_empty.pr_partition.rbf file inoita kuti ma LED arambe akabatidza. 17. Kuti uchinje pfungwa yeSUPR, dzokorora nhanho yechinomwe pamusoro kuti usarudze impl_blinking_led_supr_new.sof. Mushure mekuchinja izvi file, led [0:1] ikozvino inobwaira nekukasira kupfuura kare. The other PR .rbf files zvakare inopindirana neiyo itsva .sof.
    Cherechedza: Iyo Assembler inogadzira .rbf file kunharaunda yeSUPR. Zvisinei, haufaniri kushandisa izvi file kurongazve iyo FPGA panguva yekumhanya nekuti iyo SUPR chikamu haitsigire bhiriji rechando, PR dunhu controller, uye imwe pfungwa muhurongwa hwese. Paunoita shanduko kuSUPR partition logic, unofanira kudzokorora .sof yakazara file kubva kuSUPR yekumisikidza kudzokorora kuunganidzwa.

Mufananidzo 12. Kuronga Bhodhi Rekuvandudza
1.5.9.1. Troubleshooting PR Programming Zvikanganiso
Kuve nechokwadi chekuseta kwakaringana kweIntel Quartus Prime Programmer uye yakabatana hardware inobatsira kudzivirira chero zvikanganiso panguva yePR programming.
Kana iwe ukatarisana nechero PR hurongwa zvikanganiso, tarisa ku "Kugadzirisa PR Kuronga Zvikanganiso" muIntel Quartus Prime Pro Edition Mushandisi Wekushandisa: Chikamu Reconfiguration yenhanho-ne-nhanho matipi ekugadzirisa matambudziko.
Related Information

Troubleshooting PR Programming Zvikanganiso

1.5.10. Kugadzirisa iyo SUPR Partition
Iwe unogona kugadzirisa iripo SUPR chikamu. Mushure mekugadzirisa chikamu cheSUPR, unofanira kuigadzira, kugadzira iyo .sof file, uye kuronga bhodhi, pasina kubatanidza vamwe vanhu. For example, tevera matanho aya kushandura top_counter_fast.sv module kuti iverenge nekukurumidza:

1. Seta impl_blinking_led_supr_new seshanduro yazvino.
2.  In the top_counter_fast.sv file, tsiva iyo count_d + 2 statement ne count_d + 4.
3.  Mhanya zvinotevera mirairo kuti zvakare synthesize SUPR chivharo uye kugadzira itsva .sof file: quartus_sh -kuyerera kuunganidza blinking_led \ -c impl_blinking_led_supr_new
   The zvinoguma .sof ikozvino ine itsva SUPR nharaunda, uye anoshandisa blinking_led nokuda default (simba-pa) persona.

1.6. Document Revision Nhoroondo yeAN 987: Static Update Partial Reconfiguration Tutorial Revision History

Document Version	Intel Quartus Prime Version	Kuchinja
2022.10.24	22.	Kutanga kuburitswa kwegwaro.

Yakagadziridzwa Intel® Quartus®Prime Dhizaini Suite: 22.3

Mhinduro kuMabvunzi epamusoro:

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Q Chii chinonzi static update partial reconfiguration

A Static Update Partial Reconfiguration pane peji 3

Q Chii chandinoda pachidzidzo ichi?

Zvinodiwa Pakudzidzisa papeji 3

Q Ndingawane kupi dhizaini yereferensi?

A Dhawunirodha Reference Dhizaini Files papeji 5

Q Ndinogadzira sei dhizaini yeSUPR?

A Reference Design Walkthrough papeji 6

Q Chii chinonzi PR persona?

Tsanangura Vanhu vari papeji 10

Q Ndinoshandura sei SUPR logic? A Shandura iyo SUPR Logic pane peji 16

A Shandura iyo SUPR Logic pane peji 16

Q Ndinoronga sei bhodhi?

Purogiramu yeBhodi iri papeji 18

Q Ndedzipi PR dzinozivikanwa nyaya nemiganhu?

A Intel FPGA Support Forums: PR

Online Version
Send Feedback

ID: 749443
AN-987
Shanduro: 2022.10.24

Zvinyorwa / Zvishandiso

Intel Agilex F-Series FPGA Development Board [pdf] Bhuku reMushandisi Agilex F-Series, Agilex F-Series FPGA Development Board, FPGA Development Board, Development Board, Board

References

• User Manual