intel Acceleration Stack no Xeon CPU me FPGAs 1.0 Errata
ʻIke Huahana
| Puka | wehewehe | Hoʻoponopono | Kūlana |
|---|---|---|---|
| ʻAʻole ʻike ʻo Flash Fallback i ka manawa o ka PCIe | Hiki i ka mea hoʻokipa ke kau a hōʻike paha i kahi hemahema PCIe ma hope o ka uila ua hiki mai ka hewa. Hiki ke ʻike ʻia kēia pilikia i ka wā e kiʻi ai ka mea hoʻohana in flash ua ino a hoʻouka ka subsystem hoʻonohonoho i ka kiʻi hale hana i loko o ka FPGA. |
E hahai i nā ʻōlelo aʻoaʻo ma ka Update Flash me FPGA Kiʻi Interface Manager (FIM) me ka hoʻohana ʻana iā Intel Quartus Prime Programmer ʻāpana i ka Intel Acceleration Stack Quick Start Guide no Intel Kāleka hoʻokē ʻai polokalamu me Intel Arria 10 GX FPGA. Ina ka ke hoʻomau nei ka pilikia, e hoʻokaʻaʻike i kāu luna mākaʻikaʻi kūloko. |
Pili: Intel Acceleration Stack 1.0 Production Kūlana: ʻAʻohe hoʻoponopono i hoʻolālā ʻia |
| Kākoʻo ʻole ʻia nā ʻano pākeʻe pāʻoihana | ʻAʻole ka Acceleration Stack FPGA Interface Manager (FIM). kākoʻo ʻo PCIe* Laka heluhelu hoʻomanaʻo, ʻano heluhelu hoʻonohonoho ʻano 1, a Configuration Kākau i ka ʻano 1 transaction layer packets (TLPs). Ina ka Loaʻa i ka polokalamu kahi ʻeke PCIe o kēia ʻano, ʻaʻole ia e pane me kahi ʻeke Hoʻopau e like me ka mea i manaʻo ʻia. |
ʻAʻohe mea hoʻoponopono i loaʻa. | Pili: Intel Acceleration Stack 1.0 Production Kūlana: ʻAʻohe hoʻoponopono i hoʻolālā ʻia |
| JTAG Hiki ke hōʻike ʻia nā hewa o ka manawa ma ka FPGA Interface Lunahooponopono |
E hōʻike paha ka Intel Quartus Prime Pro Edition Timing Analyzer hoʻopaʻa ʻole ʻia ʻo JTAG Nā ala I/O i ka FIM. |
Hiki ke mālama ʻole ʻia kēia mau ala paʻa ʻole no ka mea JTAG ʻAʻole hoʻohana ʻia nā ala I/O i ka FIM. |
Pili: Intel Acceleration Stack 1.0 Production Kūlana: Hoʻoponopono i hoʻolālā ʻia ma Intel Acceleration Stack 1.1 |
Nā ʻōlelo hoʻohana huahana
No ka hoʻoholo i nā pilikia i ʻōlelo ʻia ma luna, e ʻoluʻolu e hahai i nā ʻōlelo i hāʻawi ʻia ma lalo nei:
ʻAʻole ʻike ʻo Flash Fallback i ka manawa o ka PCIe
Inā ʻike ʻoe i kahi hang a i ʻole PCIe ʻole ma hope o ka pau ʻana o ka uila, ma muli paha ia i kahi kiʻi mea hoʻohana ʻino i ka uila. No ka hoʻoponopono ʻana i kēia pilikia, e hana i kēia:
- E nānā i ka Intel Acceleration Stack Quick Start Guide no Intel Programmable Acceleration Card me Intel Arria 10 GX FPGA.
- E hahai i nā ʻōlelo aʻoaʻo ma ka ʻāpana "Hoʻohou i ka Flash me FPGA Interface Manager (FIM) Image me ka hoʻohana ʻana iā Intel Quartus Prime Programmer".
- Inā mau ka pilikia, e hoʻokaʻaʻike i kāu luna mākaʻikaʻi kūloko no ke kōkua hou aku.
Kākoʻo ʻole ʻia nā ʻano pākeʻe pāʻoihana
Inā ʻoe e ʻike nei i nā pilikia me nā ʻano packet layer layer i kākoʻo ʻole ʻia, e like me ka PCIe Memory Read Lock, Configuration Read Type 1, a me Configuration Write Type 1, e hahai i kēia mau ʻanuʻu:
- ʻAʻohe mea hoʻoponopono i loaʻa no kēia pilikia. E ʻoluʻolu, ʻaʻole kākoʻo ka Acceleration Stack FPGA Interface Manager (FIM) i kēia mau ʻano packet.
JTAG Hiki ke hōʻike ʻia nā hewa o ka manawa ma ka FPGA Interface Manager
Inā ʻoe e ʻike iā JTAG hōʻike ʻia nā hemahema o ka manawa ma ka FPGA Interface Manager, e hahai i kēia mau ʻanuʻu:
- Hiki iā ʻoe ke haʻalele i ka JTAG ʻO nā ala I/O i hōʻike ʻia e ka Intel Quartus Prime Pro Edition Timing Analyzer i ka FIM.
- ʻAʻole hoʻohana ʻia kēia mau ala i ka FIM a ʻaʻole pono e pili i kāna hana.
Intel® Acceleration Stack no Intel® Xeon® CPU me FPGAs 1.0 Errata
Hāʻawi kēia palapala i ka ʻike e pili ana i ka hewa e pili ana i ka Intel® Acceleration Stack no Intel Xeon® CPU me nā FPGA.
| Puka | Hoʻopili ʻia | Hoʻoponopono Hoʻolālā |
| ʻAʻole hālāwai ʻo Flash Fallback iā PCIe Manawa hoʻomaha ma ka aoao 4 | Hoʻokumu ʻia ʻo Acceleration Stack 1.0 | ʻAʻohe Hoʻoponopono Hoʻolālā |
| Kākoʻo ʻole ʻia ka ʻeke Layer Transaction Nā ʻano ma ka aoao 5 | Hoʻokumu ʻia ʻo Acceleration Stack 1.0 | ʻAʻohe Hoʻoponopono Hoʻolālā |
| JTAG Hiki ke hōʻike ʻia nā hemahema o ka manawa i ka FPGA Interface Manager ma ka aoao 6 | Hoʻokumu ʻia ʻo Acceleration Stack 1.0 | Hoʻopaʻa wikiwiki 1.1 |
| ʻAʻole hala ka mea hana fpgabist Hexadecimal Bus Numbers Pono ma ka aoao 7 | Hoʻokumu ʻia ʻo Acceleration Stack 1.0 | Hoʻopaʻa wikiwiki 1.1 |
| Loaʻa ka haʻahaʻa dma_afu Bandwidth i ka hana memcpy ma ka aoao 8 | Hoʻopaʻa wikiwiki 1.0 Beta a me ka hana | Hoʻopaʻa wikiwiki 1.1 |
| regress.sh -r ʻAʻole hana ke koho Me dma_afu ma ka aoao 9 | Hoʻokumu ʻia ʻo Acceleration Stack 1.0 | ʻAʻohe hoʻoponopono i hoʻolālā ʻia |
Hiki ke hoʻohana ʻia ka papa ma lalo i mea kuhikuhi e ʻike ai i ka FPGA Interface Manager (FIM), Open Programmable Acceleration Engine (OPAE) a me ka mana Intel Quartus® Prime Pro Edition e pili ana i kāu hoʻokuʻu ʻana i kāu polokalamu.
Papa 1. Intel Acceleration Stack 1.0 Reference Table
| ʻO Intel Acceleration Pūʻulu Pūʻulu | Nā papa | Manaʻo FIM (PR Interface ID) | Manao OPAE | ʻO Intel Quartus Prime Pro Edition |
| 1.0 hana (1) | Intel PAC me Intel Arria® 10 GX FPGA | ce489693-98f0-5f33-946d-560708
be108a |
0.13.1 | 17.0.0 |
Intel Acceleration Stack for Intel Xeon CPU with FPGAs Release Notes E nānā i nā memo hoʻokuʻu no ka ʻike hou aku e pili ana i nā pilikia i ʻike ʻia a me nā mea hoʻonui no Intel Acceleration Stack 1.0
(1) Aia i loko o ka ʻāpana hana o ka flash configuration ka mana Acceleration Stack 1.0 Alpha. Ke hiki ʻole ke hoʻouka ʻia ke kiʻi i loko o ka ʻāpana mea hoʻohana, hiki mai kahi flash failover a hoʻouka ʻia ke kiʻi hale hana. Ma hope o ka loaʻa ʻana o kahi flash failover, heluhelu ʻia ka PR ID e like me d4a76277-07da-528d-b623-8b9301feaffe.
ʻAʻole ʻike ʻo Flash Fallback i ka manawa o ka PCIe
wehewehe
Hiki i ka mea hoʻokipa ke kau a hōʻike paha i kahi hemahema PCIe ma hope o ka loaʻa ʻana o kahi flash failover. Hiki ke ʻike ʻia kēia pilikia ke hoʻopōʻino ʻia ke kiʻi mea hoʻohana i ka uila a hoʻouka ka subsystem hoʻonohonoho i ke kiʻi hale hana i ka FPGA.
Hoʻoponopono
E hahai i nā ʻōlelo kuhikuhi ma ka ʻāpana "Hoʻohou Flash me FPGA Interface Manager (FIM) Image me ka hoʻohana ʻana i ka Intel Quartus Prime Programmer" ʻāpana i ka Intel Acceleration Stack Quick Start Guide no Intel Programmable Acceleration Card me Intel Arria 10 GX FPGA. Inā hoʻomau ka pilikia, e hoʻokaʻaʻike i kāu luna mākaʻikaʻi kūloko.
Kūlana
- Pili: Intel Acceleration Stack 1.0 Production
- Kūlana: ʻAʻohe hoʻoponopono i hoʻolālā ʻia
ʻIke pili
Ke alakaʻi hoʻomaka wikiwiki ʻo Intel Acceleration Stack no ka Intel Programmable Acceleration Card me Intel Arria 10 GX FPGA
Kākoʻo ʻole ʻia nā ʻano pākeʻe pāʻoihana
wehewehe
ʻAʻole kākoʻo ka Acceleration Stack FPGA Interface Manager (FIM) i ka PCIe* Memory Read Lock, Configuration Read Type 1, a me Configuration Write Type 1 transaction layer packets (TLPs). Inā loaʻa i ka hāmeʻa kahi ʻeke PCIe o kēia ʻano, ʻaʻole ia e pane me kahi ʻeke Completion e like me ka mea i manaʻo ʻia.
Hoʻoponopono
ʻAʻohe mea hoʻoponopono i loaʻa.
Kūlana
- Pili: Intel Acceleration Stack 1.0 Production
- Kūlana: ʻAʻohe hoʻoponopono i hoʻolālā ʻia
JTAG Hiki ke hōʻike ʻia nā hewa o ka manawa ma ka FPGA Interface Manager
wehewehe
Hiki i ka Intel Quartus Prime Pro Edition Timing Analyzer ke hōʻike i ka JTAG Nā ala I/O i ka FIM.
Hoʻoponopono
Hiki ke mālama ʻole ʻia kēia mau ala paʻa ʻole no ka mea ʻo JTAG ʻAʻole hoʻohana ʻia nā ala I/O i ka FIM.
Kūlana
- Pili: Intel Acceleration Stack 1.0 Production
- Kūlana: Hoʻoponopono i hoʻolālā ʻia ma Intel Acceleration Stack 1.1
ʻAʻole hele pono ka mea hana fpgabist i nā Hexadecimal Bus Numbers
wehewehe
ʻAʻole hāʻawi ka mea hana fpgabist Open Programmable Acceleration Engine (OPAE) i nā helu kaʻa kūpono inā ʻo ka helu kaʻaahi PCIe kekahi ʻano ma luna o F. Inā hoʻokomo ʻia kekahi o kēia mau huaʻōlelo, hiki iā ʻoe ke hālāwai me kēia memo hewa:
Hoʻoponopono
Hoʻololi /usr/bin/bist_common.py laina 83 mai 
i 
Kūlana
Hoʻopilikia: Intel Acceleration Stack 1.0 Production Status: Hoʻoponopono i hoʻolālā ʻia ma Intel Acceleration Stack 1.1
Hiki i ka haʻahaʻa dma_afu Bandwidth Ma muli o ka hana memcpy
wehewehe
Hiki i ka fpgabist ke hōʻike i ka bandwidth haʻahaʻa no ka dma_afu akā ʻaʻole ka loopback 3 maoli (NLB3) ma muli o ka hoʻohana ʻana i ka hana memcpy i ka mea hoʻokele dma_afu.
Hoʻoponopono
Hiki iā ʻoe ke hoʻoponopono i kēia erratum ma ka wehe ʻana i ka memcpy mai ka code driver dma_afu a me ka hoʻohui ʻana i ke code e ʻae i nā buffers mai ka mea hoʻohana i hoʻopaʻa mua ʻia. No ka hoʻohana ʻana me OpenCL*, ʻaʻohe mea hana i kēia manawa.
Kūlana
- Pili: Intel Acceleration Stack 1.0 Beta a me Production
- Kūlana: Hoʻoponopono i hoʻolālā ʻia ma Intel Acceleration Stack 1.1
regress.sh -r ʻAʻole hana ke koho me dma_afu
wehewehe
Ke hoʻohana nei i ka koho -r me regress.sh, ʻaʻole hana ka palapala me ka dma_afu example. ʻO ka hoʻohana ʻana i ke koho -r ka hopena i kahi hewa gcc make.
Hoʻoponopono
Mai hoʻohana i ke koho -r i ka wā e holo ana i ka palapala regress.sh. ʻO ka holo ʻana i ka palapala me ka ʻole o ka koho -r e waiho i ka simulation output ma $ OPAE_LOC/ase/rtl_sim ma kahi o kahi papa kuhikuhi i kuhikuhi ʻia e ka mea hoʻohana.
Kūlana
- Pili: Intel Acceleration Stack 1.0 Production
- Kūlana: ʻAʻohe hoʻoponopono i hoʻolālā ʻia
Intel Acceleration Stack no Intel Xeon CPU me FPGAs 1.0 Errata Revision History
| Lā | Manaʻo Intel Acceleration Stack | Nā hoʻololi |
| 2018.06.22 | 1.0 Production (kūpono me Intel Quartus Prime Pro Edition
17.0.0) |
Hoʻohou i ke ala o ka bist_common.py file i ka mea hana fpgabist ʻAʻole i hala i nā helu kaʻa hexadecimal pono erratum. |
| 2018.04.11 | 1.0 Production (kūpono me Intel Quartus Prime Pro Edition
17.0.0) |
Hoʻokuʻu mua. |
Huina Intel. Ua mālama ʻia nā kuleana āpau. ʻO Intel, ka Intel logo, a me nā hōʻailona Intel ʻē aʻe he mau hōʻailona o Intel Corporation a i ʻole kāna mau lālā. Mālama ʻo Intel i ka hana o kāna mau huahana FPGA a me semiconductor i nā kikoʻī o kēia manawa e like me ka palapala hōʻoia maʻamau o Intel, akā aia ke kuleana e hoʻololi i nā huahana a me nā lawelawe i kēlā me kēia manawa me ka ʻole o ka hoʻolaha. ʻAʻole ʻo Intel i kuleana a i ʻole kuleana e puka mai ana mai ka noi a i ʻole ka hoʻohana ʻana i kekahi ʻike, huahana, a i ʻole lawelawe i wehewehe ʻia ma ʻaneʻi koe wale nō i ʻae ʻia ma ke kākau ʻana e Intel. Manaʻo ʻia nā mea kūʻai aku Intel e loaʻa i ka mana hou o nā kikoʻī o nā hāmeʻa ma mua o ka hilinaʻi ʻana i kekahi ʻike i paʻi ʻia a ma mua o ke kau ʻana i nā kauoha no nā huahana a i ʻole nā lawelawe.
* Hiki ke koi ʻia nā inoa a me nā hōʻailona ʻē aʻe ma ke ʻano he waiwai o nā poʻe ʻē aʻe.
Palapala / Punawai
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intel Acceleration Stack no Xeon CPU me FPGAs 1.0 Errata [pdf] Palapala Hoʻohana Hoʻopaʻa wikiwiki no Xeon CPU me FPGAs 1.0 Errata, Xeon CPU me FPGAs 1.0 Errata, Acceleration Stack, Stack |
