Intel Acceleration Stack don Xeon CPU tare da FPGAs 1.0 Errata

Bayanin samfur

Batu	Bayani	Aiki	Matsayi
Fallback Flash Ba Ya Haɗu da Lokacin Lokaci na PCIe	Mai watsa shiri na iya rataya ko bayar da rahoton gazawar PCIe bayan walƙiya gazawar ta faru. Ana iya ganin wannan batu lokacin da hoton mai amfani a cikin walƙiya ya lalace kuma tsarin tsarin tsarin yana ɗaukar nauyin Hoton masana'anta a cikin FPGA.	Bi umarnin a cikin Ana ɗaukaka Flash tare da FPGA Hoton Manajan Interface (FIM) ta amfani da Intel Quartus Prime Programmer sashe a cikin Intel Acceleration Stack Quick Start Guide don Intel Katin Haɗawa mai shirye-shirye tare da Intel Arria 10 GX FPGA. Idan da Matsalar ta ci gaba, tuntuɓi wakilin filin ku na gida.	Yana shafar: Intel Acceleration Stack 1.0 Production Matsayi: Babu gyara da aka shirya
Nau'in Fakitin Ma'amala mara tallafi	Manajan Interface FPGA Acceleration Stack (FIM) baya yi goyan bayan PCIe* Kulle karanta ƙwaƙwalwar ajiya, Nau'in Karatu na Kanfigareshan, da Kanfigareshan Rubuta nau'in fakiti na ma'amala na 1 (TLPs). Idan da na'urar tana karɓar fakitin PCIe irin wannan, baya amsawa tare da fakitin Kammala kamar yadda aka zata.	Babu mafita akwai.	Yana shafar: Intel Acceleration Stack 1.0 Production Matsayi: Babu gyara da aka shirya
JTAG Za a iya ba da rahoton gazawar lokaci a cikin Interface na FPGA Manager	Intel Quartus Prime Pro Edition Analyzer na iya ba da rahoto ba takura JTAG Hanyoyin I/O a cikin FIM.	Ana iya yin watsi da waɗannan hanyoyin da ba a takura ba saboda JTAG Ba a amfani da hanyoyin I/O a cikin FIM.	Yana shafar: Intel Acceleration Stack 1.0 Production Matsayi: Gyaran da aka tsara a cikin Intel Acceleration Stack 1.1

Umarnin Amfani da samfur

Don warware matsalolin da aka ambata a sama, da fatan za a bi umarnin da aka bayar a ƙasa:

Fallback Flash Ba Ya Haɗu da Lokacin Lokaci na PCIe

Idan kun ci karo da rataya ko gazawar PCIe bayan gazawar filasha, yana iya kasancewa saboda gurɓataccen hoton mai amfani a cikin filasha. Don warware wannan matsalar, da fatan za a yi abubuwa masu zuwa:

1. Koma zuwa Jagoran Farawa Mai sauri na Intel Acceleration Stack don Katin Haɗawa Mai Shirye-shiryen Intel tare da Intel Arria 10 GX FPGA.
2. Bi umarnin a cikin sashin "Mai sabunta Flash tare da FPGA Interface Manager (FIM) Hoton ta amfani da Intel Quartus Prime Programmer".
3. Idan batun ya ci gaba, tuntuɓi wakilin filin ku don ƙarin taimako.

Nau'in Fakitin Ma'amala mara tallafi

Idan kuna fuskantar al'amura tare da nau'ikan fakitin ma'amala mara tallafi, kamar PCIe Memory Read Lock, Kanfigareshan Karanta Nau'in 1, da Rubutun Kanfigareshan 1, bi waɗannan matakan:

1. Babu mafita don wannan batun. Lura cewa Manajan Interface FPGA Acceleration Stack (FIM) baya goyan bayan waɗannan fakitin.

JTAG Ana iya ba da rahoton gazawar lokaci a cikin Manajan Interface na FPGA

Idan kun haɗu da JTAG gazawar lokaci da aka ruwaito a cikin FPGA Interface Manager, bi waɗannan matakan:

1. Kuna iya yin watsi da rashin takurawa JTAG Hanyoyin I/O da Intel Quartus Prime Pro Edition Analyzer ya ruwaito a cikin FIM.
2. Ba a amfani da waɗannan hanyoyin a cikin FIM kuma bai kamata su yi tasiri a ayyukanta ba.

Intel® Acceleration Stack don Intel® Xeon® CPU tare da FPGAs 1.0 Errata

Wannan takaddun yana ba da bayani game da errata da ke shafar Intel® Acceleration Stack don Intel Xeon® CPU tare da FPGAs.

Batu	Sigar da abin ya shafa	Gyaran Gyara
Flash Fallback baya Haɗu da PCIe Lokaci ya ƙare shafi na 4	Hanzarta Tari 1.0 Samfura	Babu Gyaran da Aka Shirya
Fakitin Layer Ma'amala mara tallafi Nau'ukan shafi na 5	Hanzarta Tari 1.0 Samfura	Babu Gyaran da Aka Shirya
JTAG Za a iya ba da rahoton gazawar lokaci a cikin FPGA Interface Manager shafi na 6	Hanzarta Tari 1.0 Samfura	Tarin Hanzarta 1.1
Kayan aikin fpgabist Baya Wucewa Lambobin Bus Hexadecimal Daidai shafi na 7	Hanzarta Tari 1.0 Samfura	Tarin Hanzarta 1.1
Mai yuwuwa Ƙananan dma_afu Bandwidth to memcpy Aiki shafi na 8	Hanzarta Tari 1.0 Beta da Samfura	Tarin Hanzarta 1.1
regress.sh -r Zabin baya Aiki Tare da dma_afu shafi na 9	Hanzarta Tari 1.0 Samfura	Babu gyara da aka shirya

Za'a iya amfani da teburin da ke ƙasa azaman tunani don gano Manajan Interface Manager na FPGA (FIM), Buɗaɗɗen Injin Haɓaka Matsala (OPAE) da sigar Intel Quartus® Prime Pro wanda ya dace da tarin tarin software naku.

Tebur 1. Teburin Haɗawa na Intel 1.0 Teburin Magana

Intel Acceleration Sigar Tari	Alloli	Sigar FIM (ID Interface ID)	Sigar OPAE	Intel Quartus Prime Pro Edition
1.0 Samfura (1)	Intel PAC tare da Intel Arria® 10 GX FPGA	ce489693-98f0-5f33-946d-560708 ku 108a	0.13.1	17.0.0

Bayanai masu alaƙa

Intel Acceleration Stack don Intel Xeon CPU tare da Bayanan Sakin FPGAs Koma bayanin bayanin saki don ƙarin bayani game da sanannun batutuwa da haɓakawa don Intel Acceleration Stack 1.0

(1) Bangaren masana'anta na filasha sanyi yana ƙunshe da sigar Acceleration Stack 1.0 Alpha. Lokacin da hoton da ke cikin ɓangaren mai amfani ba zai iya lodawa ba, toshewar walƙiya yana faruwa kuma ana loda hoton masana'anta maimakon haka. Bayan gazawar walƙiya ta faru, PR ID yana karantawa azaman d4a76277-07da-528d-b623-8b9301feaffe.

Fallback Flash Ba Ya Haɗu da Lokacin Lokaci na PCIe

Bayani

Mai watsa shiri na iya rataya ko bayar da rahoton gazawar PCIe bayan gazawar filasha ta faru. Ana iya ganin wannan batu lokacin da hoton mai amfani a cikin walƙiya ya lalace kuma tsarin tsarin tsarin yana loda hoton masana'anta zuwa FPGA.

Aiki
Bi umarnin a cikin "Ƙaƙwalwar Flash tare da FPGA Interface Manager (FIM) Hoton ta amfani da Intel Quartus Prime Programmer" a cikin Intel Acceleration Stack Quick Start Guide for Intel Programmable Acceleration Card with Intel Arria 10 GX FPGA. Idan batun ya ci gaba, tuntuɓi wakilin filin ku.

Matsayi

• Yana shafar: Intel Acceleration Stack 1.0 Production
• Matsayi: Babu gyara da aka shirya

Bayanai masu alaƙa
Intel Acceleration Stack Quick Start Guide for Intel Programmable Acceleration Card with Intel Arria 10 GX FPGA

Nau'in Fakitin Ma'amala mara tallafi

Bayani
Acceleration Stack FPGA Interface Manager (FIM) baya goyan bayan PCIe* Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwaƙwalwa ta Ƙaddamarwa ta Rubuto Nau'in 1 1 ) Idan na'urar ta karɓi fakitin PCIe irin wannan, ba ta amsa da fakitin Kammala kamar yadda aka zata.

Aiki
Babu mafita akwai.

Matsayi

• Yana shafar: Intel Acceleration Stack 1.0 Production
• Matsayi: Babu gyara da aka shirya

JTAG Ana iya ba da rahoton gazawar lokaci a cikin Manajan Interface na FPGA

Bayani
Intel Quartus Prime Pro Edition Analyzer na iya ba da rahoton rashin ƙarfi na JTAG Hanyoyin I/O a cikin FIM.

Aiki
Ana iya yin watsi da waɗannan hanyoyin marasa takura saboda JTAG Ba a amfani da hanyoyin I/O a cikin FIM.

Matsayi

• Yana shafar: Intel Acceleration Stack 1.0 Production
• Matsayi: Gyaran da aka tsara a cikin Intel Acceleration Stack 1.1

Kayan aikin fpgabist Baya Wucewa Lambobin Bus Hexadecimal Daidai

Bayani
Kayan aikin fpgabist na Buɗe Programmable Acceleration Engine (OPAE) baya wuce ingantattun lambobin bas idan lambar bas ɗin PCIe kowane hali ne sama da F. Idan ɗayan waɗannan haruffan aka haɗa, zaku iya fuskantar saƙon kuskure mai zuwa:

Aiki
Canza /usr/bin/bist_common.py layi na 83 daga

ku

Matsayi
Yana shafar: Intel Acceleration Stack 1.0 Matsayin Samar da: Gyaran da aka tsara a cikin Intel Acceleration Stack 1.1

Ƙarƙashin bandwidth dma_afu mai yuwuwa saboda aikin memcpy

Bayani
fpgabist na iya ba da rahoton ƙananan bandwidth don dma_afu amma ba na asali na loopback 3 (NLB3) ba saboda amfani da aikin memcpy a cikin direban dma_afu.

Aiki
Kuna iya daidaita wannan erratum ta hanyar cire memcpy daga lambar direban dma_afu da ƙara lamba don karɓar buffers daga mai amfani waɗanda aka riga aka haɗa su. Don amfani tare da OpenCL*, babu wata hanyar da za a iya amfani da ita a halin yanzu.

Matsayi

• Yana shafar: Intel Acceleration Stack 1.0 Beta da Production
• Matsayi: Gyaran da aka tsara a cikin Intel Acceleration Stack 1.1

regress.sh -r Zabin baya aiki da dma_afu

Bayani
Lokacin amfani da zaɓin -r tare da regress.sh, rubutun baya aiki tare da dma_afu example. Amfani da zaɓin -r yana haifar da kuskuren gcc mai kisa.

Aiki
Kar a yi amfani da zaɓin -r lokacin gudanar da rubutun regress.sh. Gudanar da rubutun ba tare da zaɓin -r yana sanya simulation na fitarwa a cikin $ OPAE_LOC/ase/rtl_sim maimakon adireshin ƙayyadaddun mai amfani.

Matsayi

• Yana shafar: Intel Acceleration Stack 1.0 Production
• Matsayi: Babu gyara da aka shirya

Tarin Haɗawar Intel don Intel Xeon CPU tare da FPGAs 1.0 Errata Tarihin Bita

Kwanan wata	Intel Acceleration Stack Version	Canje-canje
2018.06.22	1.0 Production (mai jituwa tare da Intel Quartus Prime Pro Edition 17.0.0)	An sabunta hanyar bist_common.py file a cikin fpgabist Tool Ba Ya Wucewa Lambobin Bus Hexadecimal Daidai erratum.
2018.04.11	1.0 Production (mai jituwa tare da Intel Quartus Prime Pro Edition 17.0.0)	Sakin farko.

Kamfanin Intel. An kiyaye duk haƙƙoƙi. Intel, tambarin Intel, da sauran alamun Intel alamun kasuwanci ne na Kamfanin Intel Corporation ko rassan sa. Intel yana ba da garantin aiwatar da samfuran FPGA da semiconductor zuwa ƙayyadaddun bayanai na yanzu daidai da daidaitaccen garanti na Intel, amma yana da haƙƙin yin canje-canje ga kowane samfuri da sabis a kowane lokaci ba tare da sanarwa ba. Intel ba ya ɗaukar wani nauyi ko alhaki da ya taso daga aikace-aikacen ko amfani da kowane bayani, samfur, ko sabis da aka kwatanta a nan sai dai kamar yadda Intel ya yarda da shi a rubuce. An shawarci abokan cinikin Intel su sami sabon sigar ƙayyadaddun na'urar kafin su dogara ga kowane bayanan da aka buga kuma kafin sanya oda don samfur ko ayyuka.
*Wasu sunaye da tambura ana iya da'awarsu azaman mallakar wasu.

Takardu / Albarkatu

Intel Acceleration Stack don Xeon CPU tare da FPGAs 1.0 Errata [pdf] Manual mai amfani Acceleration Stack don Xeon CPU tare da FPGAs 1.0 Errata, Xeon CPU tare da FPGAs 1.0 Errata, Tarin Haɗawa, Tari

Magana

• Manual mai amfani