intel UG-20093 ModelSim FPGA Edition Simulation

ModelSim* – Intel® FPGA Edition Simulation Mai Saurin Fara Intel® Quartus® Prime Pro Edition

Wannan takaddar tana nuna yadda ake kwaikwayi ƙirar Intel® Quartus® Prime Pro a cikin ModelSim* - Intel FPGA Edition na'urar kwaikwayo. Simulation na ƙira yana tabbatar da ƙirar ku kafin shirye-shiryen na'urar. Intel Quartus Prime software yana haifar da simulation files don goyan bayan EDA na'urar kwaikwayo yayin haɗar ƙira.
Hoto 1. ModelSim – Intel FPGA Edition

Ƙirar ƙira ta ƙunshi ƙirƙira kwaikwayo files, haɗa samfuran simulation, gudanar da simulation, da viewsakamakon sakamakon. Matakai masu zuwa suna bayyana wannan kwarara:

1. Bude Example Zane a shafi na 4
2. Ƙayyade Saitunan Kayan aikin EDA a shafi na 4
3. Ƙirƙirar Samfuran Saitin Rubutun Simulator a shafi na 5
4. Gyara Rubutun Saitin Simulator a shafi na 6
5. Haɗa da Kwaikwaya Zane a shafi na 8
6. View Sigina Waveforms a shafi na 9
7. Ƙara sigina zuwa kwaikwayo a shafi na 11
8. Sake kunna Simulation a shafi na 12
9. Canja wurin Gwajin Simulator a shafi na 12

Bude Exampda Design

PLL_RAM misaliample zane ya haɗa da Intel FPGA IP cores don nuna ainihin kwararar simintin. Zazzage tsohonampda zane files kuma buɗe aikin a cikin Intel Quartus Prime software.
Lura: Wannan Saurin-Fara yana buƙatar fahimtar ainihin ma'anar harshe na bayanin kayan masarufi da kwararar ƙirar Intel Quartus Prime, kamar yadda Intel Quartus Prime Pro Edition Foundation Training Online ya bayyana.

1. Zazzage kuma cire zip ɗin ƙirar Quartus_Pro_PLL_RAM.zip example.
2. Kaddamar da Intel Quartus Prime Pro Edition software version 19.4 ko kuma daga baya.
3. Don buɗe example zane aikin, danna File ➤ Buɗe Project, zaɓi aikin pll_ram.qpf file, sa'an nan kuma danna Ok.

Hoto 2. pll_ram Project a cikin Intel Quartus Prime Pro Edition

Ƙayyade Saitunan Kayan Aikin EDA

Ƙayyade saitunan kayan aikin EDA don samar da kwaikwayo files don goyan bayan na'urar kwaikwayo.

1. A cikin Intel Quartus Prime software, danna Assignments ➤ Saituna ➤ EDA Tool Settings.
2. A ƙarƙashin Simulation, zaɓi ModelSim-Intel FPGA azaman sunan kayan aiki. Riƙe saitunan tsoho don Tsara don jerin abubuwan fitarwa da kundin adireshi.

Ƙirƙirar Samfuran Saitin Rubutun Simulator

Rubutun saitin na'urar kwaikwayo yana taimaka muku kwaikwayi nau'ikan nau'ikan IP a cikin ƙirar ku. Bi waɗannan matakan don samar da takamaiman samfurin saitin rubutun na'urar kwaikwayo ta musamman mai siyarwa don samfuran IP a cikin tsohonampda zane. Sannan zaku iya keɓance wannan samfuri don takamaiman manufofin simintin ku.

1. Don haɗa ƙirar, danna Sarrafa ➤ Fara Tari. Tagan Saƙonni yana nuna lokacin da aka gama haɗawa.
2. Danna Kayan aiki ➤ Ƙirƙirar Rubutun Saita na Simulator don IP. Riƙe tsohon littafin fitarwa kuma Yi amfani da hanyoyin dangi a duk lokacin da zai yiwu saitin rubutun saitin file. Samfurin rubutun saitin yana haifarwa a cikin kundin adireshi da ka ƙayyade.

Hoto 3. Ƙirƙirar Rubutun Saita na'urar kwaikwayo IP Akwatin Magana

Gyara Rubutun Saitin Simulator

Gyara rubutun saitin na'urar kwaikwayo da aka ƙirƙira don ba da damar takamaiman umarni waɗanda ke kwaikwayi abubuwan haɗin IP a cikin aikin.

1. A cikin editan rubutu, buɗe /PLL_RAM/mentor/msim_setup.tcl file.
2. Ƙirƙiri sabon rubutu file tare da sunan mentor_example.do kuma ajiye shi a cikin /PLL_RAM/mantor/ directory.
3. A cikin msim_setup.tcl file, kwafi sashin lambar da ke kunshe a cikin TOP-LEVEL TEMPLATE - BEGIN da TOP-LEVEL TEMPLATE - KARSHEN sharhi, sannan liƙa wannan lambar a cikin sabon mentor_example.do file.
4. A cikin mentor_example.do file, share haruffan fam guda (#) da ke gaba da waɗannan layukan da aka yi haske don ba da damar haɗa umarni:

Hoto 4. Umarnin kwaikwaiyo da aka Hakkake Rashin Magana a cikin Rubutun

1. Sauya layukan masu zuwa a cikin mentor_example.do rubutun:

Tebur 1. Ƙayyade Ƙimar a cikin mentor_example.do Rubutun

Sauya wannan Layin	Da wannan Layi
saita QSYS_SIMDIR	../
vlog files>	vlog -vlog01compat -aiki aiki ../PLL_RAM.v vlog -vlog01compat -aikin aiki ../UP_COUNTER_IP/UP_COUNTER_IP.v vlog -vlog01compat -aikin aiki vlog -vlog01compat -aikin aiki ../RAMhub/RAMhub.v vlog -vlog01compat -aiki aiki ../testbench_1.v
saita TOP_LEVEL_NAME	saita TOP_LEVEL_NAME tb
run-a	ƙara kalaman * view tsari view sigina gudu - duk

1. Ajiye /PLL_RAM/mantor/mentor_example.do file. Hoto mai zuwa yana nuna mentor_example.do file bayan an kammala bita:

Hoto 5. Cikakkun Rubutun Saita Kwaikwayo na Babban Matsayin IP

Haɗa da Kwaikwaya Zane

Gudanar da babban matakin mentor_example.do rubutun a cikin ModelSim – Intel FPGA Edition software don haɗawa da kwaikwaya ƙirar ku.

1. Kaddamar da ModelSim – Intel FPGA Edition software. ModelSim - Intel FPGA Edition GUI yana tsara abubuwan simintin ku zuwa windows da shafuka daban.
2. Daga kundin tsarin aikin PLL_RAM, buɗe testbench_1.v file. Hakazalika, buɗe mai ba da shawara/mantor_example.do file.
3. Don nuna taga Rubutun, danna View ➤ Kwafi. Kuna iya shigar da umarni don ModelSim - FPGA Edition na Intel kai tsaye a cikin taga Kwafi.
4. Buga umarni mai zuwa a cikin taga Rubutun sannan danna Shigar: yi mentor_example.do

Ƙirar tana tattarawa da simulators, gwargwadon ƙayyadaddun ku a cikin mentor_example.no rubutun. Hoto mai zuwa yana nuna ModelSim - Intel FPGA Edition na'urar kwaikwayo:

Hoto 6. ModelSim - Intel FPGA Edition GUI

View Sigina Waveforms

Bi waɗannan matakan zuwa view sigina a cikin testbench_1.v simulation waveform:

1. Danna taga Wave. Simulation waveform yana ƙare a 11030 ns, kamar yadda testbench ya ƙayyade. Tagar Wave ta lissafa alamun CLOCK, WE, OFFSET, RESET_N, da RD_DATA.

Hoto 7. ModelSim – Intel FPGA Edition Wave Window

1. Zuwa view sigina a saman matakin pll_ram.v zane, danna Sim tab. Tagar Sim tana aiki tare da taga abubuwan.

Hoto 8. ModelSim – Intel FPGA Edition Sim da Windows Objects

1. Zuwa view sigina na babban matakin, faɗaɗa babban fayil ɗin tb a cikin Objects tab. Hakazalika, faɗaɗa babban fayil ɗin Test1. Tagar abubuwan abubuwan suna nuna alamun UP_module, DOWN_module, PLL_module, da siginar RAM_module.
2. A cikin taga Sim, danna maballin ƙarƙashin Test1 don nuna siginar ƙirar a cikin taga Abubuwan.
3. View ɗakin karatu na kwaikwayo files a cikin Library taga.

Hoto 9. ModelSim – Intel FPGA Edition Library Window

Ƙara sigina zuwa kwaikwayo

Sigina na CLOCK, WE, OFFSET, RESET_N, da RD_DATA suna fitowa kai tsaye a cikin taga Wave saboda babban matakin ƙira ya bayyana waɗannan I/O. Bugu da kari, zaku iya ƙara siginar ciki da zaɓin simulation.

1. A cikin tagar Abubuwan, gano UP_module, DOWN_module, PLL_module, da RAM_module.
2. A cikin taga abubuwan, zaɓi RAM_module. Abubuwan shigar da kayan aikin module ɗin su ne
3. nuni.

Hoto 10. Ƙara Sigina zuwa Tagar Kaɗa

1. Don ƙara sigina na ciki tsakanin ƙananan-counter da dual-port RAM module, danna-dama rdaddress sannan danna Ƙara Wave.
2. Don ƙara sigina na ciki tsakanin na'urar sama-counter da dual-port RAM module, danna-dama wraddress sannan danna Ƙara Wave. A madadin, zaku iya ja da sauke waɗannan sigina daga taga Abubuwan zuwa taga Wave.
3. Don samar da siginar sabbin sigina da kuka ƙara, danna Simulate ➤ Gudu ➤ Ci gaba.

Sake kunna Simulation

Dole ne ku sake kunna simulation idan kun yi canje-canje ga saitin simulation, kamar ƙara sigina zuwa taga Wave, ko gyara testbench_1.v file. Bi waɗannan matakan don sake kunna simulation:

1. A cikin ModelSim – Intel FPGA Edition na'urar kwaikwayo, danna Simulate ➤ Sake kunnawa. Riƙe tsoffin zaɓuɓɓuka kuma danna Ok. Waɗannan zaɓuɓɓukan suna share siginar igiyoyin ruwa kuma su sake kunna lokacin simintin, yayin da suke riƙe da mahimman sigina da saituna.
   Lura: A madadin, zaku iya sake kunna /PLL_RAM/mantor/mentor_example.do rubutun don sake kunna simulation a layin umarni.
2. Danna Simulate ➤ Run ➤ Run -all. Wurin gwaji_1.v file simulates bisa ga ƙayyadaddun gwajin bench. Don ci gaba da kwaikwayo, danna Simulate ➤ Gudu ➤ Ci gaba. Wannan umarnin yana ci gaba da simulation har sai kun danna maɓallin Tsaya.

Gyara Ma'aunin Gwajin Simulator

Testbench_1.v exampLe testbench yana gwada takamaiman takamaiman yanayi da shari'o'in gwaji. Kuna iya shirya testbench_1.v file a cikin ModelSim – Intel FPGA Edition na'urar kwaikwayo don gwada wasu lokuta da yanayi:

1. Bude testbench_1.v file a cikin ModelSim – Intel FPGA Edition na'urar kwaikwayo.
2. Danna dama a cikin testbench_1.v file don tabbatar da cewa file ba a saita zuwa Karanta Kawai.
3. Shigar kuma ajiye kowane ƙarin sigogin gwajin gwaji a cikin testbench_1.v file.
4. Don samar da tsarin igiyoyin igiyar ruwa don benci wanda kuka gyara, danna Simulate ➤ Sake kunnawa.
5. Danna Simulate ➤ Run ➤ Run -all.

ModelSim – Intel FPGA Edition Simulation Mai Saurin Farko Tarihin Bita

Sigar Takardu	Intel Quartus Prime Version	Canje-canje
2019.12.30	19.4	• Sabunta matakai da hotunan kariyar kwamfuta don Intel Quartus Prime Pro Edition 19.4. • Sabunta ƙira example file mahada da abun ciki.
2018.09.25	18.0	Kurakurai da aka gyara a cikin mentor_example.do Rubutun.
2018.05.07	18.0	An cire matakin da ba dole ba daga Gudun Simulation a Layin Dokar hanya.
2017.07.15	17.1	Sakin farko.

Kamfanin Intel. An kiyaye duk haƙƙoƙi. Intel, tambarin Intel, da sauran alamun Intel alamun kasuwanci ne na Kamfanin Intel Corporation ko rassan sa. Intel yana ba da garantin aiwatar da samfuran FPGA da semiconductor zuwa ƙayyadaddun bayanai na yanzu daidai da daidaitaccen garanti na Intel, amma yana da haƙƙin yin canje-canje ga kowane samfuri da sabis a kowane lokaci ba tare da sanarwa ba. Intel ba ya ɗaukar wani nauyi ko alhaki da ya taso daga aikace-aikacen ko amfani da kowane bayani, samfur, ko sabis da aka kwatanta a nan sai dai kamar yadda Intel ya yarda da shi a rubuce. An shawarci abokan cinikin Intel su sami sabon sigar ƙayyadaddun na'urar kafin su dogara ga kowane bayanan da aka buga kuma kafin sanya oda don samfur ko ayyuka.

• Ana iya da'awar wasu sunaye da alamun a matsayin mallakin wasu.

Takardu / Albarkatu

intel UG-20093 ModelSim FPGA Edition Simulation [pdf] Jagorar mai amfani UG-20093 ModelSim FPGA Edition na'urar kwaikwayo, UG-20093, ModelSim FPGA Simulations, FPGA Edition Simulation, Edition Simulations

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