intel UG-20093 ModelSim FPGA Edition Simulation

ModelSim* – Intel® FPGA Edition Simulation Quick-Bẹrẹ Intel® Quartus® Prime Pro Edition

Iwe yii ṣe afihan bi o ṣe le ṣe afarawe Intel® Quartus® Prime Pro Edition apẹrẹ ni ModelSim* – Simulator Edition Intel FPGA. Simulation oniru jẹri apẹrẹ rẹ ṣaaju siseto ẹrọ. Sọfitiwia Intel Quartus Prime n ṣe agbekalẹ kikopa files fun atilẹyin awọn simulators EDA lakoko akojọpọ apẹrẹ.
olusin 1. ModelSim - Intel FPGA Edition

Simulation oniru je ti o npese kikopa files, iṣakojọpọ awọn awoṣe kikopa, ṣiṣe kikopa, ati viewawọn abajade. Awọn igbesẹ wọnyi ṣe apejuwe sisan yii:

1. Ṣii Example Apẹrẹ loju iwe 4
2. Pato Awọn Eto Irinṣẹ EDA ni oju-iwe 4
3. Ṣe agbekalẹ Awoṣe Afọwọkọ Iṣeto Simulator kan ni oju-iwe 5
4. Ṣatunṣe Iwe afọwọkọ Iṣeto Simulator ni oju-iwe 6
5. Ṣe akojọpọ ki o ṣe Apẹrẹ ni oju-iwe 8
6. View Awọn fọọmu ifihan agbara loju iwe 9
7. Ṣafikun Awọn ifihan agbara si Simulation ni oju-iwe 11
8. Atunse Simulation loju iwe 12
9. Ṣe atunṣe Simulator Testbench ni oju-iwe 12

Ṣii Example Apẹrẹ

PLL_RAM exampApẹrẹ le pẹlu awọn ohun kohun Intel FPGA IP lati ṣafihan ṣiṣan kikopa ipilẹ. Gba awọn example apẹrẹ files ati ṣii iṣẹ akanṣe ni sọfitiwia Intel Quartus Prime.
Akiyesi: Ibẹrẹ-iyara yii nilo oye ipilẹ ti sintasi ede apejuwe hardware ati ṣiṣan apẹrẹ Intel Quartus Prime, gẹgẹbi Intel Quartus Prime Pro Edition Foundation Online Training ṣapejuwe.

1. Ṣe igbasilẹ ati ṣii Quartus_Pro_PLL_RAM.zip apẹrẹ example.
2. Lọlẹ Intel Quartus Prime Pro Edition sọfitiwia ẹya 19.4 tabi nigbamii.
3. Lati ṣii example oniru ise agbese, tẹ File ➤ Ṣii Project, yan iṣẹ akanṣe pll_ram.qpf file, ati ki o si tẹ O dara.

olusin 2. pll_ram Project ni Intel kuotisi NOMBA Pro Edition

Pato Awọn Eto Irinṣẹ EDA

Pato awọn eto irinṣẹ EDA lati ṣe ina kikopa files fun atilẹyin simulators.

1. Ninu sọfitiwia Intel Quartus Prime, tẹ Awọn iṣẹ iyansilẹ ➤ Eto ➤ Awọn Eto Irinṣẹ EDA.
2. Labẹ Simulation, yan ModelSim-Intel FPGA bi orukọ Irinṣẹ. Ṣe idaduro awọn eto aiyipada fun Ọna kika fun akojọ nẹtiwọọki ti o wujade ati itọsọna Ijade.

Ṣe ina Simulator Setup Script Template

Awọn iwe afọwọkọ iṣeto Simulator ṣe iranlọwọ fun ọ lati ṣe adaṣe awọn ohun kohun IP ninu apẹrẹ rẹ. Tẹle awọn igbesẹ wọnyi lati ṣe agbekalẹ awoṣe iwe afọwọkọ afọwọṣe simulator kan pato fun awọn modulu IP ni iṣaajuample apẹrẹ. Lẹhinna o le ṣe akanṣe awoṣe yii fun awọn ibi-afẹde kikopa rẹ pato.

1. Lati ṣajọ apẹrẹ, tẹ Ṣiṣe-ṣiṣe ➤ Bẹrẹ Iṣakojọpọ. Ferese Awọn ifiranṣẹ tọkasi nigbati akopọ ba ti pari.
2. Tẹ Awọn Irinṣẹ ➤ Ṣẹda Afọwọkọ Iṣeto Simulator fun IP. Daduro iwe ilana Ijade aiyipada ati Lo awọn ọna ojulumo nigbakugba ti o ṣee ṣe eto fun iwe afọwọkọ iṣeto file. Awoṣe iwe afọwọkọ iṣeto ni ipilẹṣẹ ninu itọsọna ti o pato.

olusin 3. Ṣe ina Simulator Setup Scripts IP Dialog Box

Ṣatunṣe Iwe afọwọkọ Iṣeto Simulator

Ṣatunṣe iwe afọwọkọ iṣeto simulator ti ipilẹṣẹ lati jẹ ki awọn aṣẹ kan pato ti o ṣe adaṣe awọn ohun kohun IP ninu iṣẹ akanṣe naa.

1. Ninu olootu ọrọ, ṣii /PLL_RAM/mentor/msim_setup.tcl file.
2. Ṣẹda ọrọ tuntun file Pẹlu orukọ mentor_example.do ki o fipamọ sinu / PLL_RAM / olutojueni / liana.
3. Ninu msim_setup.tcl file, daakọ apakan koodu ti o wa laarin TOP-LEVEL TEMPLATE – BEGIN ati TOP-LEVEL TEMPLATE – OPIN comments, ati ki o si lẹẹmọ koodu yi sinu titun mentor_example.ṣe file.
4. Ninu mentor_example.ṣe file, pa ẹyọ ọ̀rọ̀ iwon ẹyọ kan (#) rẹ́ tó ṣáájú àwọn ìlà àfikún tẹ̀ lé e láti jẹ́ kí àwọn àṣẹ àkójọpọ̀ ṣiṣẹ́:

Ṣe nọmba 4. Awọn pipaṣẹ Simulation Itọkasi Afihan ninu Iwe afọwọkọ

1. Rọpo awọn ila wọnyi ni mentor_example.do akosile:

Table 1. Pato Awọn iye ninu mentor_example.do Akosile

Rọpo Laini yii	Pẹlu Laini yii
ṣeto QSYS_SIMDIR	../
vlog files>	vlog -vlog01compat -iṣẹ iṣẹ ../PLL_RAM.v vlog -vlog01compat -iṣẹ iṣẹ ../UP_COUNTER_IP/UP_COUNTER_IP.v vlog -vlog01compat -iṣẹ iṣẹ. vlog -vlog01compat -iṣẹ iṣẹ ../RAMhub/RAMhub.v vlog -vlog01compat -iṣẹ iṣẹ ../testbench_1.v
ṣeto TOP_LEVEL_NAME	ṣeto TOP_LEVEL_NAME tb
run -a	fi igbi kun * view igbekale view awọn ifihan agbara ṣiṣe -gbogbo

1. Fipamọ / PLL_RAM/ olutojueni / mentor_example.ṣe file. Nọmba atẹle yii fihan mentor_example.ṣe file Lẹhin ti awọn atunṣe ti pari:

olusin 5. Ti pari Ipele-Ipele IP Simulation Setup Script

Ṣe akopọ ati ki o ṣe adaṣe apẹrẹ naa

Ṣiṣe mentor_ex ipele okeample.do iwe afọwọkọ ni ModelSim – Intel FPGA Edition sọfitiwia lati ṣajọ ati ṣe adaṣe apẹrẹ rẹ.

1. Lọlẹ ModelSim – Intel FPGA Edition software. ModelSim – Intel FPGA Edition GUI ṣeto awọn eroja ti kikopa rẹ sinu awọn window lọtọ ati awọn taabu.
2. Lati iwe ilana iṣẹ akanṣe PLL_RAM, ṣii testbench_1.v file. Bakanna, ṣii mentor/mentor_example.ṣe file.
3. Lati ṣe afihan window Tiransikiripiti, tẹ View ➤ Tiransikiripiti. O le tẹ awọn aṣẹ sii fun ModelSim – Intel FPGA Edition taara ni window Tiransikiripiti.
4. Tẹ aṣẹ atẹle ni window Tiransikiripiti lẹhinna tẹ Tẹ: ṣe mentor_example.ṣe

Apẹrẹ ṣe akopọ ati ṣe adaṣe, ni ibamu si awọn pato rẹ ninu mentor_example.ko si akosile. Nọmba ti o tẹle fihan ModelSim – Intel FPGA Edition simulator:

olusin 6. ModelSim - Intel FPGA Edition GUI

View Ifihan agbara Waveforms

Tẹle awọn igbesẹ wọnyi si view awọn ifihan agbara ni testbench_1.v simulation waveform:

1. Tẹ window Wave. Fọọmu kikopa dopin ni 11030 ns, bi testbench ṣe pato. Ferese Wave ṣe atokọ titobi, WE, OFFSET, RESET_N, ati awọn ifihan agbara RD_DATA.

olusin 7. ModelSim - Intel FPGA Edition igbi Window

1. Si view awọn ifihan agbara ni oke-ipele pll_ram.v design, tẹ Sim taabu. Ferese Sim ṣiṣẹpọ pẹlu ferese Awọn ohun.

olusin 8. ModelSim - Intel FPGA Edition Sim ati ohun Windows

1. Si view awọn ifihan agbara module oke-ipele, faagun folda tb ni taabu Awọn nkan. Bakanna, faagun folda Test1. Ferese Awọn nkan ṣe afihan UP_module, DOWN_module, PLL_module, ati awọn ifihan agbara RAM_module.
2. Ni awọn Sim window, tẹ a module labẹ Test1 lati han module ká awọn ifihan agbara ninu awọn Nkan window.
3. View ìkàwé kikopa files ninu awọn Library window.

olusin 9. ModelSim - Intel FPGA Edition Library Window

Fi awọn ifihan agbara si Simulation

Awọn ifihan agbara CLOCK, WE, OFFSET, RESET_N, ati RD_DATA yoo han laifọwọyi ninu ferese Wave nitori apẹrẹ ipele-oke n ṣalaye I/O wọnyi. Ni afikun, o le ni yiyan ṣafikun awọn ifihan agbara inu si simulation.

1. Ninu ferese Awọn nkan, wa UP_module, DOWN_module, PLL_module, ati awọn modulu RAM_module.
2. Ninu ferese Awọn nkan, yan RAM_module. Awọn igbewọle ati awọn igbejade module ni
3. ifihan.

olusin 10. Fi awọn ifihan agbara To Wave Window

1. Lati ṣafikun awọn ifihan agbara inu laarin isalẹ-counter ati module Ramu-meji-ibudo, tẹ-ọtun rdaddress ati lẹhinna tẹ Fikun Wave.
2. Lati ṣafikun awọn ifihan agbara inu laarin oke-counter ati module Ramu-ibudo meji, tẹ-ọtun wraddress ati lẹhinna tẹ Fikun Wave. Ni omiiran, o le fa ati ju silẹ awọn ifihan agbara wọnyi lati window Awọn nkan si ferese Wave.
3. Lati ṣe ina awọn fọọmu igbi fun awọn ifihan agbara titun ti o ṣafikun, tẹ Simulate ➤ Ṣiṣe ➤ Tẹsiwaju.

Atunse Simulation

O gbọdọ tun kikopa naa ṣiṣẹ ti o ba ṣe awọn ayipada si iṣeto iṣeṣiro, gẹgẹbi fifi awọn ifihan agbara kun si ferese Wave, tabi ṣatunṣe testbench_1.v file. Tẹle awọn igbesẹ wọnyi lati tun ṣe simulation:

1. Ninu ModelSim – Intel FPGA Edition simulator, tẹ Simulate ➤ Tun bẹrẹ. Ṣe idaduro awọn aṣayan aiyipada ki o tẹ O DARA. Awọn aṣayan wọnyi ko awọn fọọmu igbi kuro ki o tun bẹrẹ akoko kikopa, lakoko ti o ṣe idaduro awọn ifihan agbara pataki ati eto.
   Akiyesi: Ni omiiran, o le tun ṣiṣẹ / PLL_RAM/ mentor/mentor_example.do akosile lati tun-ṣiṣe kikopa ni awọn pipaṣẹ ila.
2. Tẹ Simulate ➤ Ṣiṣe ➤ Ṣiṣe -gbogbo. Awọn testbench_1.v file simulates ni ibamu si awọn testbench ni pato. Lati tẹsiwaju simulation, tẹ Simulate ➤ Ṣiṣe ➤ Tẹsiwaju. Aṣẹ yii tẹsiwaju simulation naa titi ti o fi tẹ bọtini Duro.

Ṣatunṣe Testbench Simulation

Awọn testbench_1.v example testbench ṣe idanwo awọn ipo kan pato ati awọn ọran idanwo. O le pẹlu ọwọ ṣatunkọ testbench_1.v file ninu ModelSim – Intel FPGA Edition simulator lati ṣe idanwo awọn ọran ati awọn ipo miiran:

1. Ṣii testbench_1.v file ni ModelSim – Intel FPGA Edition labeabo.
2. Titẹ-ọtun ni testbench_1.v file lati jẹrisi pe awọn file ko ṣeto si Ka Nikan.
3. Tẹ ati fi eyikeyi afikun testbench paramita sinu testbench_1.v file.
4. Lati ṣe ina awọn fọọmu igbi fun testbench ti o yipada, tẹ Simulate ➤ Tun bẹrẹ.
5. Tẹ Simulate ➤ Ṣiṣe ➤ Ṣiṣe -gbogbo.

ModelSim – Intel FPGA Edition Simulation Quick-Bẹrẹ Itan Atunyẹwo

Ẹya Iwe aṣẹ	Intel Quartus NOMBA Version	Awọn iyipada
2019.12.30	19.4	• Awọn igbesẹ imudojuiwọn ati awọn sikirinisoti fun Intel Quartus Prime Pro Edition 19.4. • Apẹrẹ imudojuiwọn example file asopọ ati akoonu.
2018.09.25	18.0	Awọn aṣiṣe sintasi ti a ṣe atunṣe ni mentor_example.do Akosile.
2018.05.07	18.0	Yọ igbesẹ ti ko wulo lati Ṣiṣe Simulation ni Laini aṣẹ ilana.
2017.07.15	17.1	Itusilẹ akọkọ.

Intel Corporation. Gbogbo awọn ẹtọ wa ni ipamọ. Intel, aami Intel, ati awọn aami Intel miiran jẹ aami-išowo ti Intel Corporation tabi awọn oniranlọwọ rẹ. Intel ṣe atilẹyin iṣẹ ṣiṣe ti FPGA rẹ ati awọn ọja semikondokito si awọn pato lọwọlọwọ ni ibamu pẹlu atilẹyin ọja boṣewa Intel, ṣugbọn ni ẹtọ lati ṣe awọn ayipada si eyikeyi awọn ọja ati iṣẹ nigbakugba laisi akiyesi. Intel ko gba ojuse tabi layabiliti ti o dide lati inu ohun elo tabi lilo eyikeyi alaye, ọja, tabi iṣẹ ti a ṣalaye ninu rẹ ayafi bi a ti gba ni kikun si kikọ nipasẹ Intel. A gba awọn alabara Intel nimọran lati gba ẹya tuntun ti awọn pato ẹrọ ṣaaju gbigbekele eyikeyi alaye ti a tẹjade ati ṣaaju gbigbe awọn aṣẹ fun awọn ọja tabi awọn iṣẹ.

• Awọn orukọ miiran ati awọn ami iyasọtọ le jẹ ẹtọ bi ohun-ini ti awọn miiran.

Awọn iwe aṣẹ / Awọn orisun

intel UG-20093 ModelSim FPGA Edition Simulation [pdf] Itọsọna olumulo UG-20093 ModelSim FPGA Edition Simulation, UG-20093, ModelSim FPGA Edition Simulation, FPGA Edition Simulation, Edition Simulation

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