Intel BCH IP Core

Mabapi le BCH IP Core

Lintlha Tse Amanang

• BCH IP Core Document Archive leqepheng la 24
  • E fana ka lethathamo la litataiso tsa basebelisi bakeng sa liphetolelo tse fetileng tsa BCH IP Core.
• Kenyelletso ea Intel FPGA IP Cores
  • E fana ka tlhaiso-leseling e akaretsang mabapi le li-cores tsohle tsa Intel FPGA IP, ho kenyelletsa le parameterizing, ho hlahisa, ho ntlafatsa, le ho etsisa li-cores tsa IP.
• Ho theha Phetolelo e Ikemetseng ea IP le Qsys Simulation Scripts
  • Etsa mongolo oa papiso o sa hlokeng lintlafatso tsa software kapa lintlafatso tsa mofuta oa IP.
• Mekhoa e Metle ea Tsamaiso ea Morero
  • Litaelo tsa taolo e nepahetseng le ho nkeha habonolo ha projeke ea hau le IP files.

 Intel® DSP IP Core Features

• Likhokahano tsa Avalon® Streaming (Avalon-ST).
• DSP Builder bakeng sa Intel® FPGAs e loketse
• Testbenches ho netefatsa IP core
• Mefuta ea papiso e sebetsang ea IP bakeng sa tšebeliso ea li-simulator tsa VHDL tse tšehetsoeng ke Intel le Verilog HDL

BCH IP Core Features

• Encoder kapa decoder e sebetsang hantle ka botlalo bakeng sa ho lemoha le ho lokisa liphoso:
• Palo ea matshwao ka codeword
• Palo ea matšoao a cheke ho latela codeword
• Palo ea likotoana tsa ho kenya tse bapileng

Intel Corporation. Litokelo tsohle li sirelelitsoe. Intel, logo ea Intel, le matšoao a mang a Intel ke matšoao a khoebo a Intel Corporation kapa lithuso tsa eona. Intel e tiisa ts'ebetso ea FPGA ea eona le lihlahisoa tsa semiconductor ho latela litlhaloso tsa hajoale ho latela waranti e tloaelehileng ea Intel empa e na le tokelo ea ho etsa liphetoho ho lihlahisoa le lits'ebeletso life kapa life ka nako efe kapa efe ntle le tsebiso. Intel ha e nke boikarabello kapa boikarabello bo hlahang ka lebaka la kopo kapa ts'ebeliso ea tlhahisoleseling efe kapa efe, sehlahisoa, kapa ts'ebeletso e hlalositsoeng mona ntle le ha ho lumellane ka ho hlaka ka lengolo ke Intel. Bareki ba Intel ba eletsoa ho fumana mofuta oa morao-rao oa litlhaloso tsa sesebelisoa pele ba itšetleha ka tlhahisoleseling efe kapa efe e phatlalalitsoeng le pele ba kenya liodara tsa lihlahisoa kapa lits'ebeletso.

• Mabitso a mang le mabitso a mang a ka nkoa e le thepa ea ba bang.

Tšehetso ea Lelapa ea DSP IP Core

Intel e fana ka maemo a latelang a ts'ehetso ea lisebelisoa bakeng sa Intel FPGA IP cores:

• Tšehetso e tsoetseng pele-IP core e teng bakeng sa papiso le ho bokelloa bakeng sa lelapa la sesebelisoa sena. Lenaneo la FPGA file (.pof) tšehetso ha e fumanehe bakeng sa software ea Beta ea Quartus Prime Pro Stratix 10 Edition 'me kahoo ho koala nako ea IP ho ke ke ha tiisetsoa. Mehlala ea nako e kenyelletsa likhakanyo tsa pele tsa boenjiniere tsa tieho e ipapisitseng le litaba tsa morao-rao tsa moralo. Mefuta ea nako e ka fetoha ha tlhahlobo ea silicon e ntlafatsa khokahano lipakeng tsa silicon ea 'nete le mefuta ea nako. U ka sebelisa setsi sena sa IP bakeng sa meralo ea sistimi le lithuto tsa tšebeliso ea lisebelisoa, papiso, pinout, tlhahlobo ea morao-rao ea sistimi, litekolo tsa nako ea mantlha (tekanyetso ea liphaephe), le leano la phetisetso ea I/O (bophara ba tsela ea data, botebo ba ho phatloha, maemo a I/O ).
• Tšehetso ea pele-Intel e netefatsa IP core ka mefuta ea pele ea nako bakeng sa lelapa lena la sesebelisoa. IP core e fihlela litlhoko tsohle tsa ts'ebetso, empa e kanna ea ba e ntse e hlahlojoa nako bakeng sa lelapa la sesebelisoa. U ka e sebelisa meralong ea tlhahiso ka hloko.
• Tšehetso ea ho qetela-Intel e netefatsa IP core ka mefuta ea ho qetela ea nako bakeng sa lelapa la sesebelisoa sena. IP core e kopana le litlhoko tsohle tse sebetsang le tsa nako bakeng sa lelapa la sesebelisoa. U ka e sebelisa meralong ea tlhahiso.

Letlapa la 1. DSP IP Core Sesebelisoa Tšehetso ea Lelapa

Lelapa la Sesebelisoa	Tšehetso
Arria® II GX	Qetellong
Arria II GZ	Qetellong
Arria V	Qetellong
Intel Arria 10	Qetellong
Cyclone® IV	Qetellong
Leholiotsoana V	Qetellong
Intel Cyclone 10	Qetellong
Intel MAX® 10 FPGA	Qetellong
Stratix® IV GT	Qetellong
Stratix IV GX/E	Qetellong
Stratix V	Qetellong
Intel Stratix 10	Tsoela pele
Malapa a lisebelisoa tse ling	Ha ho tšehetso

 Lintlha tsa Phallo ea BCH IP Core

Sebelisa lintlha tsa tokollo ha u fana ka laesense ea mantlha ea IP.

Lethathamo la 2.Tlhaloso ea Phatlalatso

Ntho	Tlhaloso
Phetolelo	17.1
Letsatsi la ho nšoa	November 2017
Khoutu ea ho Odara	IP-BCH (IPR-BCH)

Intel e netefatsa hore mofuta oa hajoale oa software ea Quartus Prime e bokella mofuta o fetileng oa motheo o mong le o mong oa IP. Intel ha e netefatse hore software ea Quartus Prime e kopanya mefuta ea IP ea khale ho feta mofuta o fetileng. Lintlha tsa Release IP tsa Intel FPGA li thathamisa mekhelo efe kapa efe.
Lintlha Tse Amanang

• Lintlha tsa Phallo ea Intel FPGA IP
• Errata bakeng sa BCH IP core ho Tsebo Base

Netefatso ea DSP IP Core

• Pele e lokolla mofuta oa IP core, Intel e etsa liteko tse felletseng tsa ho khutlela morao ho netefatsa boleng ba eona le ho nepahala. Intel e hlahisa mefuta e fapaneng ea mantlha ea mantlha ea IP ho sebelisa likhetho tse fapaneng tsa parametha le ho etsisa ka botlalo mefuta ea papiso e nang le liphetho tse netefalitsoeng khahlano le mefuta ea papiso e kholo.

BCH IP Core Performance le Tšebeliso ea Lisebelisoa

• Ka tloaelo ts'ebetso e lebelletsoeng bakeng sa BCH IP Core e sebelisa software ea Quartus Prime e nang le lisebelisoa tsa Arria V (5AGXFB3H4F35C5), Cyclone V (5CGXFC7C7F23C8), le Stratix V (5SGXEA7H3F35C3). Moo m ke palo ea likotoana ka letšoao; n ke bolelele ba mantsoe a khoutu; d ke bophara bo tšoanang ba ho kenya data; t ke bokhoni ba ho lokisa liphoso.

Letlapa la 3. Ts'ebetso ea Decoder le Tšebeliso ea Mehloli

Sesebelisoa	Mekhahlelo				Mohopolo		ALM	Ngoliso		boholo (MHz)
	m	n	d	t	M10K	M20K		Ea mantlha	Ea bobeli y
Arria V	8	255	10	42	7	—	18,376	40,557	3,441	196
Leholiotsoana V	8	255	10	42	7	—	18,264	40,709	3,266	150
Stratix V	8	255	10	42	—	7	19,027	44,134	4,315	308
Arria V	8	255	12	42	9	—	22,293	49,602	4,053	186
Leholiotsoana V	8	255	12	42	9	—	22,243	49,243	4,511	149
Stratix V	8	255	12	42	—	8	23,187	53,800	5,207	310
Arria V	8	255	2	42	4	—	5,539	13,238	788	207
Leholiotsoana V	8	255	2	42	4	—	5,527	13,174	857	174
Stratix V	8	255	2	42	—	4	6,088	14,399	850	369
Arria V	8	255	5	42	5	—	10,231	23,321	1,554	206
Leholiotsoana V	8	255	5	42	5	—	10,234	23,391	1,551	164
e tsoela pele…

Sesebelisoa	Mekhahlelo				Mohopolo		ALM	Ngoliso		boholo (MHz)
	m	n	d	t	M10K	M20K		Ea mantlha	Ea bobeli y
Stratix V	8	255	5	42	—	5	10,820	24,868	2,612	335
Stratix V	14	8784	10	20	—	18	7,358	15,082	761	346
Stratix V	14	8784	10	40	—	18	14,331	28,743	1,630	316
Stratix V	14	8784	10	80	—	18	28,383	56,292	3,165	281
Stratix V	14	8784	20	20	—	18	10,103	19,833	933	323
Stratix V	14	8784	20	40	—	18	20,012	37,413	1,747	304
Stratix V	14	8784	20	80	—	18	39,225	72,151	3,673	282
Stratix V	14	8784	30	20	—	17	11,784	23,924	844	329
Stratix V	14	8784	30	40	—	19	23,061	44,313	1,836	289
Stratix V	14	8784	30	80	—	19	43,949	85,476	3,398	263
Stratix V	14	8784	40	20	—	19	13,801	28,032	743	307
Stratix V	14	8784	40	40	—	19	26,107	51,680	1,472	291
Stratix V	14	8784	40	80	—	21	50,303	98,545	3,351	248
Stratix V	14	8784	50	20	—	20	16,407	33,020	967	307
Stratix V	14	8784	50	40	—	20	31,095	60,503	1,991	288
Stratix V	14	8784	50	80	—	22	58,690	116,232	3,222	249
Stratix V	14	8784	60	20	—	20	18,290	37,106	914	297
Stratix V	14	8784	60	40	—	20	35,041	67,183	2,324	292
Stratix V	14	8784	60	80	—	37	80,961	160,458	7,358	233
Stratix V	14	8784	70	20	—	20	20,494	41,471	545	286
Stratix V	14	8784	70	40	—	20	38,294	74,727	1,778	280
Stratix V	14	8784	70	80	—	38	88,040	173,311	7,769	232
Stratix V	14	8784	80	20	—	22	22,437	45,334	691	276
Stratix V	14	8784	80	40	—	22	42,256	82,173	1,363	285
Stratix V	14	8784	80	80	—	40	95,913	186,869	7,317	229

Letlapa la 4. Ts'ebetso ea Encoder le Tšebeliso ea Lisebelisoa

Sesebelisoa	Mekhahlelo				Mohopolo		ALM	Ngoliso		boholo (MHz)
	m	n	d	t	M10K	M20K		Ea mantlha	Ea bobeli y
Arria V	8	255	10	42	2	—	337	592	0	243
Leholiotsoana V	8	255	10	42	2	—	339	592	0	166
Stratix V	8	255	10	42	—	1	353	601	3	400
Arria V	8	255	12	42	2	—	386	602	0	257
Leholiotsoana V	8	255	12	42	2	—	395	602	0	174
e tsoela pele…

Sesebelisoa	Mekhahlelo				Mohopolo		ALM	Ngoliso		boholo (MHz)
	m	n	d	t	M10K	M20K		Ea mantlha	Ea bobeli y
Stratix V	8	255	12	42	—	1	391	614	0	400
Arria V	8	255	2	42	2	—	219	547	12	275
Leholiotsoana V	8	255	2	42	2	—	219	556	3	197
Stratix V	8	255	2	42	—	2	220	542	17	464
Arria V	8	255	5	42	2	—	237	563	3	276
Leholiotsoana V	8	255	5	42	2	—	237	565	1	193
Stratix V	8	255	5	42	—	1	260	573	0	400
Stratix V	14	8784	10	20	—	3	400	785	4	387
Stratix V	14	8784	10	40	—	3	613	1,348	1	380
Stratix V	14	8784	10	80	—	3	1,009	2,451	4	309
Stratix V	14	8784	20	20	—	3	775	849	1	373
Stratix V	14	8784	20	40	—	3	1,340	1,410	0	312
Stratix V	14	8784	20	80	—	3	2,222	2,515	1	242
Stratix V	14	8784	30	20	—	3	1,161	919	1	324.
Stratix V	14	8784	30	40	—	3	2,074	1,480	0	253
Stratix V	14	8784	30	80	—	3	3,583	2,580	2	224
Stratix V	14	8784	40	20	—	3	1,522	977	4	307
Stratix V	14	8784	40	40	—	3	2,789	1,541	0	249
Stratix V	14	8784	40	80	—	3	4,909	2,647	0	191
Stratix V	14	8784	50	20	—	4	1,926	1,042	9	295
Stratix V	14	8784	50	40	—	4	3,467	1,610	1	234
Stratix V	14	8784	50	80	—	4	6,297	2,714	3	182
Stratix V	14	8784	60	20	—	4	2,356	1,121	0	266
Stratix V	14	8784	60	40	—	4	3,824	1,680	1	229
Stratix V	14	8784	60	80	—	4	7,548	2,783	0	167
Stratix V	14	8784	70	20	—	4	2,595	1,184	2	273
Stratix V	14	8784	70	40	—	4	4,372	1,746	0	221
Stratix V	14	8784	70	80	—	4	8,321	2,850	2	169
Stratix V	14	8784	80	20	—	5	2,885	1,251	1	293
Stratix V	14	8784	80	40	—	5	5,163	1,812	0	220
Stratix V	14	8784	80	80	—	5	8,867	2,918	0	169

BCH IP Core Ho qala

Ho kenya le ho fana ka laesense ea Intel FPGA IP Cores

Sesebelisoa sa Intel Quartus® Prime software se kenyelletsa laeborari ea Intel FPGA IP. Laeborari ena e fana ka li-cores tse ngata tsa bohlokoa tsa IP bakeng sa tšebeliso ea hau ea tlhahiso ntle le tlhoko ea laesense e eketsehileng. Li-cores tse ling tsa Intel FPGA IP li hloka ho rekoa laesense e arohaneng bakeng sa ts'ebeliso ea tlhahiso. Intel FPGA IP Evaluation Mode e u lumella ho lekola li-cores tsena tse ngolisitsoeng ka molao tsa Intel FPGA ka papiso le hardware, pele u etsa qeto ea ho reka laesense e felletseng ea tlhahiso ea IP. U hloka feela ho reka laesense e felletseng ea tlhahiso bakeng sa li-cores tsa Intel IP tse ngolisitsoeng ka molao ka mor'a hore u qete tlhahlobo ea hardware 'me u se u loketse ho sebelisa IP tlhahiso. Software ea Intel Quartus Prime e kenya li-cores tsa IP libakeng tse latelang ka boiketsetso:
Setšoantšo sa 1. IP Core Installation Path

Letlapa la 5. Libaka tsa ho kenya IP Core

Sebaka	Software	Sethala
:\intelFPGA_pro\quartus\ip\altera	Khatiso ea Intel Quartus Prime Pro	Lifensetere *
:\intelFPGA\quartus\ip\altera	Intel Quartus Prime Standard Edition	Windows
:/intelFPGA_pro/Quartus/IP/Altera	Khatiso ea Intel Quartus Prime Pro	Linux *
:/inter FPGA/Quartus/IP/Altera	Intel Quartus Prime Standard Edition	Linux

Intel FPGA IP Evaluation Mode

Mokhoa oa mahala oa Intel FPGA IP Evaluation Mode o u lumella ho lekola li-cores tsa Intel FPGA IP tse ngolisitsoeng ka molao ka papiso le lisebelisoa pele u reka. Intel FPGA IP Evaluation Mode e ts'ehetsa litlhahlobo tse latelang ntle le laesense e eketsehileng:

• Etsisa boitšoaro ba Intel FPGA IP core e nang le lengolo la tumello tsamaisong ea hau.
• Netefatsa tšebetso, boholo, le lebelo la mantlha la IP kapele le ha bonolo.
• Hlahisa mananeo a sesebelisoa a nang le nako e lekanyelitsoeng files bakeng sa meralo e kenyelletsang li-cores tsa IP.
• Rulahanya sesebelisoa ka IP core ea hau 'me u netefatse moralo oa hau ho hardware.

Intel Corporation. Litokelo tsohle li sirelelitsoe. Intel, logo ea Intel, le matšoao a mang a Intel ke matšoao a khoebo a Intel Corporation kapa lithuso tsa eona. Intel e tiisa ts'ebetso ea FPGA ea eona le lihlahisoa tsa semiconductor ho latela litlhaloso tsa hajoale ho latela waranti e tloaelehileng ea Intel, empa e na le tokelo ea ho etsa liphetoho ho lihlahisoa le lits'ebeletso life kapa life ka nako efe kapa efe ntle le tsebiso. Intel ha e nke boikarabello kapa boikarabello bo hlahang ka lebaka la kopo kapa ts'ebeliso ea tlhahisoleseling efe kapa efe, sehlahisoa, kapa ts'ebeletso e hlalositsoeng mona ntle le ha ho lumellane ka ho hlaka ka lengolo ke Intel. Bareki ba Intel ba eletsoa ho fumana mofuta oa morao-rao oa litlhaloso tsa sesebelisoa pele ba itšetleha ka tlhahisoleseling efe kapa efe e phatlalalitsoeng le pele ba kenya liodara tsa lihlahisoa kapa lits'ebeletso.

• Mabitso a mang le mabitso a mang a ka nkoa e le thepa ea ba bang.

Intel FPGA IP Evaluation Mode e tšehetsa mekhoa e latelang ea ts'ebetso:

• E hokahantsoe—E lumella ho tsamaisa moralo o nang le laesense ea Intel FPGA IP ka ho sa feleng ka khokahano lipakeng tsa boto ea hau le komporo e amohelang. Mokhoa o kopantsoeng o hloka sehlopha sa liteko tse kopaneng tsa liteko (JTAG) cable e hokahantsoeng lipakeng tsa JTAG boto ea hau le komporo e amohelang, e sebelisang Intel Quartus Prime Programmer nakong ea tlhahlobo ea lisebelisoa. Lenaneo le hloka feela ts'ebetso e fokolang ea software ea Intel Quartus Prime, 'me ha e hloke laesense ea Intel Quartus Prime. K'homphieutha e amohelang e laola nako ea tlhahlobo ka ho romela lets'oao la nako le nako ho sesebelisoa ka mochini oa JTAG boemakepe. Haeba li-cores tsohle tsa IP tse nang le laesense li le molemong oa ts'ehetso ea moralo, nako ea tlhahlobo e tsoela pele ho fihlela tlhahlobo efe kapa efe ea IP e fela. Haeba li-cores tsohle tsa IP li tšehetsa nako ea tlhahlobo e sa lekanyetsoang, sesebelisoa ha se felloe ke nako.
• Ha e koaletsoe-E lumella ho tsamaisa moralo o nang le IP e nang le lengolo la nakoana. IP core e khutlela mokhoeng o sa thijoang haeba sesebelisoa se ikarola ho komporo e amohelang e sebelisang software ea Intel Quartus Prime. IP core e boetse e khutlela mokhoeng o sa tsitsang haeba leha e le efe e 'ngoe e nang le laesense ea IP ea mantlha moralong e sa tšehetse mokhoa oa tethered.

Ha nako ea tlhahlobo e fela bakeng sa Intel FPGA IP efe kapa efe e ngolisitsoeng ka molao moralong, moralo o emisa ho sebetsa. Li-cores tsohle tsa IP tse sebelisang Intel FPGA IP Evaluation Mode li tsoa ka nako e le 'ngoe ha motheo ofe kapa ofe oa IP nakong ea moralo o felile. Ha nako ea tlhahlobo e felile, o tlameha ho hlophisa sesebelisoa sa FPGA bocha pele o tsoela pele ho netefatsa hardware. Ho holisa tšebeliso ea mantlha ea IP bakeng sa tlhahiso, reka laesense e felletseng ea tlhahiso ea mantlha ea IP.
O tlameha ho reka laesense mme o hlahise senotlolo se felletseng sa laesense pele o ka hlahisa lenaneo le sa thibetsoeng la sesebelisoa file. Nakong ea Intel FPGA IP Evaluation Mode, Compiler e hlahisa feela lenaneo le lekanyelitsoeng la sesebelisoa file ( _time_limited.sof) e felloang ke nako ka nako e lekantsoeng.

Setšoantšo sa 2. Intel FPGA IP Evaluation Mode Flow

Hlokomela:

Sheba tataiso ea mantlha ea IP bakeng sa mehato ea parameterization le lintlha tsa ts'ebetsong.
Intel e fana ka li-cores tsa IP ka setulo se le seng, kamehla. Tefiso ea laesense e kenyelletsa tlhokomelo le tšehetso ea selemo sa pele. U tlameha ho nchafatsa konteraka ea tlhokomelo ho fumana lintlafatso, litšitiso, le tšehetso ea tekheniki ho feta selemo sa pele. O tlameha ho reka laesense e felletseng ea tlhahiso ea Intel FPGA IP cores e hlokang laesense ea tlhahiso, pele o hlahisa mananeo files eo u ka e sebelisang ka nako e se nang moeli. Nakong ea Intel FPGA IP Evaluation Mode, Compiler e hlahisa feela lenaneo le lekanyelitsoeng la sesebelisoa file ( _time_limited.sof) e felloang ke nako ka nako e lekantsoeng. Ho fumana linotlolo tsa laesense ea hau ea tlhahiso, etela Setsi sa Lilaesense tsa Boipheliso kapa ikopanye le moemeli oa hau oa sebakeng sa Intel FPGA.
Litumellano tsa License tsa Software tsa Intel FPGA li laola ho kengoa le ho sebelisoa ha li-cores tse nang le laesense tsa IP, software ea moralo oa Intel Quartus Prime, le li-cores tsohle tse se nang laesense tsa IP.

Lintlha Tse Amanang

• Intel Quartus Prime Licensing Site
• Kenyelletso ea Software ea Intel FPGA le License

BCH IP Core Intel FPGA IP Evaluation Mode Timeout Behaviour

Li-cores tsohle tsa IP ka har'a sesebelisoa li fela ka nako e le 'ngoe ha nako ea tlhahlobo e thibelang haholo e fihletsoe. Haeba moralo o na le IP-core e fetang e le 'ngoe, boits'oaro ba nako ea li-cores tse ling tsa IP bo ka pata boits'oaro ba nako ea mantlha ea IP. Bakeng sa li-cores tsa IP, nako e sa koaloang ke hora e le 'ngoe; boleng ba nako e koetsoeng ha bo fele. Moralo oa hau o emisa ho sebetsa ka mor'a hore nako ea tlhahlobo ea hardware e felile. Software ea Quartus Prime e sebelisa Intel FPGA IP Evaluation Mode Files (.ocp) bukeng ea hau ea morero ho tsebahatsa tšebeliso ea hau ea lenaneo la tlhahlobo la Intel FPGA IP Evaluation Mode. Ka mor'a hore u kenye letsoho, u se ke ua hlakola tsena files.Ha nako ea tlhahlobo e felile, data e hlahisoang ke data_out e ea tlase
Lintlha Tse Amanang
AN 320: Tlhahlobo ea OpenCore Plus ea Megafunctions

Catalog le Parameter Editor

IP Catalog e bonts'a li-cores tsa IP tse fumanehang bakeng sa projeke ea hau. Sebelisa lintlha tse latelang tsa IP Catalogue ho fumana le ho etsa motheo oa IP:

• Sefa Catalog ea IP ho Bontša IP bakeng sa lelapa la lisebelisoa tse sebetsang kapa Bontša IP bakeng sa malapa ohle a lisebelisoa. Haeba ha u na projeke e butsoeng, khetha Lelapa la Sesebelisoa ho IP Catalog.
• Ngola sebakeng sa Batla ho fumana lebitso lefe kapa lefe le felletseng kapa le sa fellang la IP ho IP Catalog.
• Tobetsa ka ho le letona lebitso la mantlha la IP ho IP Catalog ho bonts'a lintlha tse mabapi le lisebelisoa tse tšehetsoeng, ho bula foldara ea ho kenya ea mantlha ea IP, le lihokelo tsa litokomane tsa IP.
• Tobetsa Batla IP ea molekane ho fihlella tlhahisoleseling ea molekane oa IP ho web.
• Mohlophisi oa paramethara o u khothaletsa hore u hlalose lebitso la phapano ea IP, likou tsa boikhethelo, le tlhahiso file likhetho tsa moloko. Mohlophisi oa paramethara o hlahisa Intel Quartus Prime IP ea boemo bo holimo file (.ip) bakeng sa phapano ea IP mererong ea Intel Quartus Prime Pro Edition.
• Mohlophisi oa parameter o hlahisa Quartus IP ea boemo bo holimo file (.qip) bakeng sa phapano ea IP ho merero ea Intel Quartus Prime Standard Edition. Tsena files emela phapang ea IP morerong le ho boloka tlhahisoleseling ea parameterization.

Setšoantšo sa 3. IP Parameter Editor (Intel Quartus Prime Pro Edition)

Setšoantšo sa 4. IP Parameter Editor (Intel Quartus Prime Standard Edition)

Ho hlahisa IP Cores (Intel Quartus Prime Pro Edition)

Ka potlako lokisa li-cores tsa Intel FPGA IP ho Intel Quartus Prime parameter editor. Tobetsa habeli karolo efe kapa efe ho IP Catalog ho qala mohlophisi oa paramethara. Mohlophisi oa parameter o u lumella ho hlalosa phapang ea tloaelo ea mantlha ea IP. Mohlophisi oa paramethara o hlahisa IP e fapaneng ea synthesis le boikhethelo ba papiso files le

eketsa
the .ip file e emelang ho fapana ho morero oa hau ka bo eona.
Setšoantšo sa 5. IP Parameter Editor (Intel Quartus Prime Pro Edition)

Latela mehato ena ho fumana, ho tiisa, le ho iketsetsa motheo oa IP ho mohlophisi oa paramethara:

1. Theha kapa bula morero oa Intel Quartus Prime (.qpf) ho kenya phapano ea IP e kentsoeng.
2. Ho IP Catalog (Lisebelisoa ➤ IP Catalogue), fumana le ho penya habeli lebitso la mantlha la IP ho ikhethela. Ho fumana karolo e itseng, thaepa mabitso a mang kapa kaofela a karolo lebokoseng la ho batla la Khathaloke ea IP. Ho hlaha fensetere e ncha ea IP Variation.
3. Hlalosa lebitso la boemo bo holimo bakeng sa IP ea hau ea tloaelo. Se kenyeletse libaka mabitsong kapa litselaneng tse fapaneng tsa IP. Mohlophisi oa paramethara o boloka litlhophiso tsa phapang ea IP ho a file bitsetsoe .ip. Tobetsa OK. Mohlophisi oa parameter oa hlaha.
4. Beha litekanyetso tsa paramente ho mohlophisi oa paramethara le view setšoantšo sa boloko bakeng sa karolo. Taba ea Melaetsa ea Parameterization ka tlase e bonts'a liphoso life kapa life ho li-parameter tsa IP:

• Ka boikhethelo, khetha litekanyetso tse behiloeng esale pele haeba li fanoe molemong oa IP ea hau. Li-presets li totobatsa boleng ba paramethara bakeng sa lits'ebetso tse ikhethileng.
• Hlalosa litlhophiso tse hlalosang ts'ebetso ea mantlha ea IP, tlhophiso ea boema-kepe, le likarolo tse ikhethileng tsa sesebelisoa.
• Hlalosa likhetho tsa ho sebetsana le IP core files lisebelisoa tse ling tsa EDA.
• Hlokomela: Sheba tataiso ea hau ea mosebelisi ea IP bakeng sa tlhaiso-leseling e mabapi le liparamente tse itseng tsa mantlha tsa IP.

1. Tobetsa Hlahisa HDL. Lebokose la puisano la Moloko lea hlaha.
2. Hlalosa tlhahiso file ho hlahisa likhetho, ebe o tobetsa Hlahisa. The synthesis le ketsiso files hlahisa ho latela litlhaloso tsa hau.
3. Ho hlahisa testbench ea ketsiso, tobetsa Hlahisa ➤ Hlahisa Testbench System. Hlalosa likhetho tsa tlhahiso ea testbench, ebe o tobetsa Hlahisa.
4. Ho hlahisa template ea instantiation ea HDL eo u ka e kopitsang le ho e beha ka har'a sengoloa sa hau, tobetsa Hlahisa ➤ Bontša Sebopeho sa Instantiation.
5. Tobetsa Qetella. Tobetsa E haeba u khothalletsoa ho eketsa files e emelang phapano ea IP ho projeke ea hau.
6. Kamora ho hlahisa le ho kenya ts'ebetso ea IP ea hau, etsa likabelo tse nepahetseng tsa phini ho hokahanya likou.

Hlokomela: Li-cores tse ling tsa IP li hlahisa lits'ebetso tse fapaneng tsa HDL ho latela li-parameter tsa mantlha tsa IP. RTL e ka tlase ea li-cores tsena tsa IP e na le khoutu e ikhethang ea hash e thibelang likhohlano tsa mabitso a module lipakeng tsa mefuta e fapaneng ea IP core. Khoutu ena e ikhethang e lula e tsitsitse, ha e fuoa litlhophiso tse tšoanang tsa IP le mofuta oa software nakong ea tlhahiso ea IP. Khoutu ena e ikhethang e ka fetoha haeba u hlophisa liparamente tsa IP core kapa u ntlafatsa mofuta oa IP core. Ho qoba ho its'etleha ka likhoutu tsena tse ikhethileng tikolohong ea hau ea papiso, sheba ho Hlahisa Sengoloa se Kopantsoeng sa Simulator.

IP Core Generation Output (Intel Quartus Prime Pro Edition)

Software ea Intel Quartus Prime e hlahisa tlhahiso e latelang file sebopeho sa li-cores tsa IP tseo e seng karolo ea sistimi ea Moqapi oa Platform.

Setšoantšo sa 6. Motho ka mong IP Core Generation Output (Intel Quartus Prime Pro Edition)

• Haeba e ts'ehelitsoe ebile e nolofalitsoe bakeng sa phapano ea mantlha ea IP ea hau.

Lethathamo la 6. Sephetho Files ea Intel FPGA IP Generation

File Lebitso	Tlhaloso
<hao_ip>.ip	Phapang ea maemo a holimo a IP file e nang le parameterization ea mantlha ea IP morerong oa hau. Haeba phapang ea IP e le karolo ea sistimi ea Moqapi oa Platform, paramethara e boetse e hlahisa .qsys file.
<hao_ip>.cmp	Phatlalatso ea Karolo ea VHDL (.cmp) file ke mongolo file e nang le litlhaloso tsa lehae tsa generic le port tseo o li sebelisang moetsong oa VHDL files.
<hao_ip>_moloko.rpt	Lenane la tlhahiso ea IP kapa Platform Designer file. E bonts'a kakaretso ea melaetsa nakong ea tlhahiso ea IP.
e tsoela pele…

File Lebitso	Tlhaloso
<hao_ip>.qgsimc (Mesebetsi ea Moqapi oa Platform feela)	Ketsiso caching file seo se bapisa .qsys le .ip files ka parameterization ea hajoale ea Sistimi ea Moqapi oa Platform le IP core. Papiso ena e etsa qeto ea hore na Moqapi oa Platform a ka tlola ho nchafatsoa ha HDL.
<hao_ip>.qgsynth (Mesebetsi ea Moqapi oa Platform feela)	Synthesis caching file seo se bapisa .qsys le .ip files ka parameterization ea hajoale ea Sistimi ea Moqapi oa Platform le IP core. Papiso ena e etsa qeto ea hore na Moqapi oa Platform a ka tlola ho nchafatsoa ha HDL.
<hao_ip>.qip	E na le lintlha tsohle tsa ho kopanya le ho bokella karolo ea IP.
<hao_ip>.csv	E na le leseli mabapi le boemo ba ntlafatso ea karolo ea IP.
.bsf	Setšoantšo sa tšoantšetso sa phapang ea IP bakeng sa tšebeliso ea Block Diagram Files (.bdf).
<hao_ip>.spd	Kenyeletso file hore ip-make-simscript e hloka ho hlahisa mongolo oa papiso. The .spd file e na le lenane la files o hlahisa bakeng sa papiso, mmoho le tlhahisoleseling mabapi le mehopolo eo u e qalang.
<hao_ip>.ppf	The Pin Planner File (.ppf) e boloka likabelo tsa kou le li-node bakeng sa likarolo tsa IP tseo u li etsang hore li sebelisoe le Pin Planner.
<hao_ip>_bb.v	Sebelisa Verilog BlackBox (_bb. v) file joalo ka phatlalatso ea mojule e se nang letho bakeng sa ho sebelisoa joalo ka lebokose le letšo.
<hao_ip>_inst.v kapa _inst.vhd	HDL mohlalaample instantiation template. Kopitsa le ho manamisa litaba tsa sena file ho HDL ea hau file ho kenya letsoho ho feto-fetoha ha IP.
<hao_ip>.regmap	Haeba IP e na le tlhahisoleseling, Intel Quartus Prime software e hlahisa .regmap file. The .regmap file e hlalosa tlhaiso-leseling ea 'mapa oa master le makhoba interfaces. Sena file tlatsetso the .sopcinfo file ka ho fana ka tlhaiso-leseling e batsi mabapi le sistimi. Sena file e nolofalletsa ponts'o ea ngoliso views le lipalo-palo tse ikamahanyang le basebelisi ho System Console.
<hao_ip>.svd	E lumella lisebelisoa tsa HPS System Debug ho view limmapa tsa ngoliso ea li-peripheral tse hokelang ho HPS ka har'a sistimi ea Moqapi oa Platform. Nakong ea ho kopanya, software ea Intel Quartus Prime e boloka .svd files bakeng sa segokanyimmediamentsi sa sebolokigolo se bonahalang ho beng ba System Console ho .sof file nakong ea ho lokisa bothata. The system Console e bala karolo ena, eo Moetsi oa Platform a e botsang bakeng sa tlhaiso-leseling ea 'mapa. Bakeng sa makhoba a tsamaiso, Moqapi oa Platform o fumana li-registas ka mabitso.
<hao_ip>.vhao_ip>.vhd	HDL files tse tiisang submodule e 'ngoe le e 'ngoe kapa konokono ea IP ea bana bakeng sa ho kopanya kapa ho etsisa.
moeletsi/	E na le msim_setup.TCL script ho seta le ho tsamaisa papiso ea ModelSim.
aldec/	E na le Riviera* -PRO script rivierapro_setup. TCL ho seta le ho tsamaisa papiso.
/synopsy/vcs /synopsys/vcsmx	E na le shell script vcs_setup.sh ho seta le ho tsamaisa papiso ea VCS*. E na le mongolo oa khetla vcsmx_setup.sh le synopsys_sim.setup file ho theha le ho tsamaisa papiso ea VCS MX*.
/cadence	E na le mongolo oa khetla ncsim_setup.sh le litlhophiso tse ling files ho theha le ho tsamaisa ketsiso ea NCSIM.
/submodule	E na le HDL files bakeng sa submodule ea mantlha ea IP.
<IP submodule>/	Moqapi oa Platform o hlahisa / synth le / sim sub-directory bakeng sa bukana e 'ngoe le e' ngoe ea submodule ea IP eo Moqapi oa Platform a e hlahisang.

Ho etsisa Intel FPGA IP Cores

Software ea Intel Quartus Prime e ts'ehetsa IP core RTL simulation ho li-simulator tse khethehileng tsa EDA. Moloko oa IP o etsa papiso files, ho kenyelletsa le mohlala o sebetsang oa ketsiso, testbench efe kapa efe (kapa example design), le lingoliloeng tse ikhethileng tsa morekisi bakeng sa motheo o mong le o mong oa IP. Sebelisa mohlala o sebetsang oa ketsiso le testbench efe kapa efe kapa example moralo bakeng sa ketsiso. Tlhahiso ea tlhahiso ea IP e kanna ea kenyelletsa mangolo a ho bokella le ho tsamaisa testbench efe kapa efe. Lingoliloeng li thathamisa mefuta eohle kapa lilaebrari tseo u li hlokang ho etsisa IP ea hau ea mantlha.
Intel Quartus Prime software e fana ka kopanyo le li-simulator tse ngata 'me e ts'ehetsa phallo e mengata ea ketsiso, ho kenyeletsoa phallo ea hau e ngotsoeng le e tloaelehileng ea papiso. Ho sa tsotellehe hore na u khetha phallo efe, ketsiso ea mantlha ea IP e kenyelletsa mehato e latelang:

1. Hlahisa mohlala oa ketsiso, testbench (kapa example design), le sengoloa sa ho seta sa simulator files.
2. Iketsetse tikoloho ea hau ea simulator le mongolo ofe kapa ofe oa papiso.
3. Kopanya lilaebrari tsa mohlala oa papiso.
4. Sebelisa simulator ea hau.

DSP Builder bakeng sa Intel FPGAs Design Phallo

DSP Builder bakeng sa Intel FPGAs e khutsufatsa potoloho ea meralo ea ts'ebetso ea matshwao a dijithale (DSP) ka ho o thusa ho theha sebopeho sa hardware sa moralo oa DSP tikolohong ea nts'etsopele e bonolo ea algorithm.
Moko-taba ona oa IP o tšehetsa Sehahi sa DSP bakeng sa Intel FPGAs. Sebelisa Sehahi sa DSP bakeng sa phallo ea Intel FPGAs haeba u batla ho theha Sehahi sa DSP bakeng sa mohlala oa Intel FPGAs o kenyelletsang phapang ea mantlha ea IP; sebelisa IP Catalog haeba u batla ho theha IP core phapano eo u ka e tiisang ka letsoho moahong oa hau.
Lintlha Tse Amanang
Ho sebelisa MegaCore Functions khaolo ea DSP Builder bakeng sa Intel FPGAs Handbook.

BCH IP Core Tlhaloso ea Mosebetsi

Sehlooho sena se hlalosa meralo ea mantlha ea IP, likhokahano le matšoao.
U ka etsa parameter ea BCH IP core joalo ka encoder kapa decoder. Encoder e amohela lipakete tsa data mme e hlahisa matšoao a cheke; sekoudara se lemoha le ho lokisa diphoso.

BCH IP Core Encoder

Encoder ea BCH e na le meralo e ts'oanang e nang le tlhahiso le tlhahiso ea d data bits. Ha encoder e amohela matšoao a data, e hlahisa matšoao a cheke bakeng sa codeword e fanoeng ebe e romela codeword e kentsoeng ka matšoao a cheke ho sebopeho sa tlhahiso. Encoder e sebelisa "backpressure" karolong e holimo ha e hlahisa matšoao a cheke.
Setšoantšo sa 7. Nako ea Encoder

Letšoao le seng le ntse le le teng le bontša hore mochine oa khokahanyo o ka amohela molaetsa o kenang. Boemong bo holimo ba clk, haeba lets'oao le itokisitseng la encoder le le holimo, romella molaetsa oa data o kentsoeng ka data_in port mme o phahamise mojaro o phahameng ho bonts'a data e kentsoeng e nepahetseng. Nka hore lentsoe le felletseng la molaetsa le hloka matšoao a oache ea X. Ha ts'ebetso ena ea ho kenya e fihla lipotolohong tsa oache ea X-1, lets'oao le itokisitseng la encoder le ea tlase. Boemong bo latelang ba clk, encoder e amohela tlhahiso e tsoang ho data_in port, 'me encoder e fumana lentsoe le felletseng la molaetsa. Pele lets'oao le itokiselitseng le khutlela holimo hape, encoder ha e amohele data e ncha e kentsoeng. Ha lets'oao la valid_outt le tiisitsoe holimo, lentsoe la khouto le tla sebetsa sebakeng sa data_out. Potolohong ea oache ea pele moo data e hlahisoang e sebetsang, sop_out e tiisitsoe holimo bakeng sa potoloho e le 'ngoe feela, e bontšang ho qala ha pakete. IP ea mantlha e na le khatello ea pele le ea morao, eo u ka e laolang ka lets'oao le itokisitseng le sink_ready. Kenya matshwao a sop_in le eop_in ka nepo saekeleng, ke hore, saekele ya watjhe ya pele le ya ho qetela ya mantswe a kentsweng.

Mantsoe a khutsufalitsoeng a Codewords
The BCH IP core e tšehetsa mantsoe a khutsufalitsoeng. Codeword e khutsufalitsoeng e na le matšoao a fokolang ho feta boleng bo ka holimo ho N, e leng 2M -1, moo N e leng kakaretso ea palo ea matšoao ka codeword 'me M ke palo ea likotoana ka letšoao. Codeword e khutsufalitsoeng ka lipalo e lekana le khoutu ea bolelele bo holimo e nang le matšoao a eketsehileng a data qalong ea codeword e behiloeng ho 0. For ex.ample, (220,136) ke lentsoe le khutsufalitsoeng la (255,171). Mantsoe ana ka bobeli a sebelisa palo e lekanang ea matšoao a cheke, 11. Ho sebelisa mantsoe a khutsufalitsoeng ka "decoder", sebelisa parameter editor ho beha bolelele ba codeword ho boleng bo nepahetseng.

BCH IP Core decoder

Ha decoder e amohela codeword e kentsoeng, e sebelisa matšoao a cheke ho bona liphoso le ho li lokisa. Codeword e amohetsoeng e ka fapana le ea mantlha ka lebaka la lerata la kanale. Decoder e lemoha liphoso ka ho sebelisa li-polynomials tse 'maloa ho fumana sebaka sa phoso le boleng ba phoso. Ha decoder e fumana sebaka sa phoso le boleng, decoder e lokisa liphoso ka har'a codeword ebe e romela codeword ho tlhahiso. Haeba e<= t, IP core e ka lokisa liphoso; haeba e > t, u bona liphetho tse sa lebelloang.
Setšoantšo sa 8. Nako ea Decoder

Codeword e qala ha o tiisa lets'oao la mojaro le lets'oao la sop_in. Decoder e amohela data ho data_in joalo ka data e nepahetseng. Codeword e fela ha o tiisa lets'oao la eop_in. Bakeng sa khoutu ea kanale e le 1, tiisa matshwao a sop_in le a eop_in bakeng sa wache e le 'ngoe. Ha decoder e hlakola lets'oao le seng le itokisitse, decoder e ke ke ea sebetsana le data efe kapa efe ho fihlela e fana ka lets'oao le itokisitseng hape. Ka tlhahiso, ts'ebetso e ts'oana. Ha dekhouda e fana ka lets'oao le nepahetseng la_out le lets'oao la sop_out, decoder e fana ka data e nepahetseng mabapi le data_out. Decoder e fana ka lets'oao la sop_out le lets'oao la eop_out ho supa qalo le pheletso ea codeword. Decoder e iponela le ho lokisa liphoso ka har'a codeword ebe e tiisa lets'oao la nomoro_of_errors ha e kopana le codeword e sa lokisoeng. Decoder e hlahisa codeword e felletseng ho kenyelletsa le matšoao a cheke, ao u lokelang ho a tlosa. Letšoao le itokiselitseng le bontša hore decoder e ka amohela molapo o kenang. Ha clk e ntse e phahama, haeba lets'oao le itokisitseng la encoder le le holimo, romella molaetsa oa data o kentsoeng ka data_in 'me u behe mojaro holimo ho bontša lintlha tse kentsoeng tse nepahetseng. Ha valid_out e boleloa e le holimo, lentsoe le hlakotsoeng le sebetsa boema-kepeng ba data_out. Number_of_errors e bontša palo ea liphoso tseo IP core e li fumanang. Potolohong ea oache ea pele moo data e hlahisoang e sebetsang, sop_out e tiisitsoe holimo bakeng sa potoloho e le 'ngoe feela, e bonts'ang qalo ea pakete ea tlhahiso. IP ea mantlha e na le khatello ea pele le ea morao, eo u e laolang ka lets'oao le itokisitseng le sink_ready sign. Kenya matshwao a sop_in le eop_in ka nepo saekeleng, ke hore, saekele ya watjhe ya pele le ya ho qetela ya mantswe a kentsweng.

CH IP Core Parameters

Letlapa la 7. Mekhahlelo

Paramethara	Melao-motheo ea Molao	Boleng ba kamehla	Tlhaloso
Setšoantšo sa BCH	Encoder kapa Decoder	Encoder	Hlalosa encoder kapa decoder.
Nomoro ea likotoana ka letšoao (m)	3 ho isa ho 14 (encoder kapa 6 ho isa ho 14 (decoder)	14	Hlalosa palo ea li-bits ka letšoao.
Codeword bolelele (n)	parity_bits+1 : 2m-1	8,784	Hlalosa bolelele ba codeword. Decoder e amohela lets'oao le lecha potolohong e 'ngoe le e 'ngoe ea oache haeba 6.5R < N. Haeba N>>=6.5R +1, decoder e bonts'a boitšoaro bo tsoelang pele.
Boemo ba ho lokisa phoso (t)	Range e nkiloeng ho m. Bakeng sa dekhoutara, wizate e koalla sebaka se pakeng tsa 8 le 127.	40	Hlalosa palo ea li-bits tse lokelang ho lokisoa.
Likotoana tsa bonngoe	–	560	E bonts'a palo ea li-parity bits ho codeword. Wizate e fumana parameter ena ho tsoa ho t.
Bolelele ba molaetsa (k)	–	8,224	E bonts'a palo ea likotoana tsa melaetsa ho codeword. Wizard e fumana parameter ena ho tloha ho t le n.
Polynomial ea khale	–	17,475	E bonts'a polynomial ea khale. e nkiloeng ho khetho ea m.
Bophara ba data e bapileng	Khouto: 1 ho isa ho min(parity_bits, k-1). Sekoahelo: • d < mokatong(n*3/14) • d < floor(n/ floor[2*log2(2*t)])	20	Palo ea li-bits ho kenya potoloho e 'ngoe le e 'ngoe ea oache.

BCH IP Core Interfaces le Lipontšo

Letlapa la 8. Oache le Reset Lipontšo

Lebitso	Mofuta oa Avalon-ST	Tataiso	Tlhaloso
CLK	CLK	Kenyeletso	Oache ea tsamaiso ea mantlha. Mokotla oohle oa IP o sebetsa moeling o ntseng o phahama oa CLK.
tsosolosa	reset_n	Kenyeletso	Lets'oao le tlase le sebetsang le setang sistimi kaofela ha e tiisetsoa. O ka fana ka lets'oao lena ka mokhoa o ts'oanang. Leha ho le joalo, u tlameha ho e dessert ka mokhoa o lumellanang le lets'oao la clk_clk. Ha IP core e hlaphoheloa ho tloha ho reset, etsa bonnete ba hore data eo e e fumanang ke pakete e feletseng.

Letlapa la 9. Lipontšo tsa Input le Output Interface tsa Avalon-ST

Lebitso	Mofuta oa Avalon-ST	Tataiso	Tlhaloso
lokile	lokile	Sephetho	Letšoao le itokiselitseng ho fetisa data ho bontša hore sinki e se e loketse ho amohela data. Sebopeho sa sink se tsamaisa letšoao le itokiselitseng ho laola phallo ea data ho pholletsa le sebopeho. Sebopeho sa sink se tšoara lipontšo tsa segokanyimmediamentsi sa sebolokigolo ho clk ea hajoale e ntseng e phahama.
data_in[]	data	Kenyeletso	Kenyelletso ea data bakeng sa khoutu ka 'ngoe, letšoao ka letšoao. E sebetsa hafeela o tiisa lets'oao le_le sa sebetseng.
data_out	data	Sephetho	E na le tlhahiso e hlakotsoeng ha IP core e fana ka lets'oao la out_valid. Matshwao a lokisitsweng a ka tatellano e tshwanang le eo a kentsweng ka yona.
eop_in	eop	Kenyeletso	Qetellong ea lets'oao la pakete (codeword).
eop_out	eop	Sephetho	Qetellong ea lets'oao la pakete (codeword). Letšoao lena le bontša meeli ea lipakete ho bese ea data_in[]. Ha IP core e khanna letšoao lena holimo, e bontša hore pheletso ea pakete e teng beseng ea data_in[]. IP core e fana ka letšoao lena phetisong ea ho qetela ea pakete e 'ngoe le e' ngoe.
ka_phoso	phoso	Kenyeletso	Letšoao la phoso. E hlakisa hore na letshwao la data e kentsweng ke phoso le hore na sedekhouta se ka se nka e le phumula. Li-decoder tse tšehetsang li-erasures feela.
morwalo	e nepahetseng	Kenyeletso	Letšoao le nepahetseng la data ho bonts'a bonnete ba matšoao a data. Ha o fana ka lets'oao le_le nepahetseng, matshwao a sebopeho sa data sa Avalon-ST a nepahetse. Ha o tlosa lets'oao le_le nepahetseng, matshwao a segokanyimmediamentsi sa Avalon-ST ha a sebetse mme a tlameha ho hlokomolohuoa. O ka fana ka lets'oao le sa sebetseng neng kapa neng ha data e fumaneha. Leha ho le joalo, sink e nka feela data ho tsoa mohloling ha IP core e tiisa in_ready signal.
palo_ea_phoso kapa tse	phoso	Sephetho	E bontša palo ea liphoso (decoder feela). E sebetsa ha IP core e bolela hore eop_out .
sop_in	sop	Kenyeletso	Ho qala ha pakete (codeword) lets'oao.
sop_out	sop	Sephetho	Ho qala ha pakete (codeword) lets'oao. Letšoao lena le bontša meeli ea codeword beseng ea data_in[]. Ha IP core e khanna letšoao lena holimo, e bontša hore qalo ea pakete e teng beseng ea data_in[]. IP core e fana ka letšoao lena phetisong ea pele ea codeword e 'ngoe le e 'ngoe.
sink_ready	lokile	Kenyeletso	Letšoao le itokiselitseng ho fetisa data ho bonts'a hore mojule o tlase o se o loketse ho amohela data. Mohloli o fana ka lintlha tse ncha (haeba li le teng) ha u tiisa lets'oao la sink_ready mme o emisa ho fana ka data e ncha ha o hlakola lets'oao la sink_ready. Haeba mohloli o sa khone ho fana ka data e ncha, e hlakola valid_out bakeng sa nako e le 'ngoe kapa ho feta oache ho fihlela e ikemiselitse ho khanna matshwao a sebetsang a segokanyimmediamentsi sa data.
valid_out	e nepahetseng	Sephetho	Letšoao le nepahetseng la data. IP core e tiisa hore lets'oao la valid_out le phahame, neng kapa neng ha tlhahiso e nepahetseng e le data_out; IP core desserts lets'oao ha ho se na tlhahiso e nepahetseng ho data_out.

Bakeng sa li-cores tsa IP tse hlahisitsoeng ka har'a Qsys, matšoao ohle a sebopeho sa Avalon-ST. Bakeng sa li-encoders:

• Kenyo: ho[0 ho isa ho bophara ba data_in]
• Sephetho: tsoa[0 ho data bophara ba data_out].

Bakeng sa li-decoder:

• Kenyo: ho[0 ho isa ho bophara ba data_in]
• Sehlahisoa: tsoa [0 ho ea ho bophara ba data + palo_liphoso | data_out]

Li-interface tsa Avalon-ST ho DSP IP Cores

Avalon-ST interfaces e hlalosa protocol e tloaelehileng, e feto-fetohang le e tloaelehileng bakeng sa phetisetso ea data ho tloha mohloling oa mohloli ho ea ho sink interface.
Sebopeho sa ho kenya letsoho ke teba ea Avalon-ST mme sebopeho sa tlhahiso ke mohloli oa Avalon-ST. Sehokelo sa Avalon-ST se ts'ehetsa phetisetso ea lipakete ka lipakete tse kenelletseng liteisheneng tse ngata.
Lipontšo tsa Avalon-ST li ka hlalosa mekhoa e tloaelehileng ea ho phallela e tšehetsang data e le 'ngoe ntle le tsebo ea liteishene kapa meeli ea lipakete. Likhokahano tse joalo hangata li na le lintlha, tse itokisitseng, le matšoao a nepahetseng. Li-interface tsa Avalon-ST li ka boela tsa tšehetsa liprothokholo tse rarahaneng haholoanyane bakeng sa ho phatloha le ho fetisoa ha lipakete ka lipakete tse hokahaneng ho pholletsa le liteishene tse ngata. Sehokelo sa Avalon-ST ka tlhaho se hokahanya meralo ea li-multichannel, e u lumellang ho fihlela ts'ebetsong e sebetsang hantle, e nang le nako e ngata ntle le ho kenya ts'ebetsong mohopolo o rarahaneng oa taolo.
Li-interfaces tsa Avalon-ST li tšehetsa khatello ea morao-rao, e leng mokhoa oa ho laola phallo moo sink e ka bontšang mohloli ho emisa ho romela data. Sink hangata e sebelisa khatello ea morao-rao ho emisa phallo ea data ha li-buffers tsa FIFO li tletse kapa ha e na le tšubuhlellano ho tlhahiso ea eona.
Lintlha Tse Amanang
Litlhaloso tsa Avalon Interface

Nalane ea Phetoho ea Litokomane

Nalane ea ntlafatso ea BCH IP Core User Guide.

Letsatsi	Phetolelo	Liphetoho
2017.11.06	17.1	• Tšehetso e ekelitsoeng bakeng sa lisebelisoa tsa Intel Cyclone 10 • Mabitso a matshwao a nepahetseng a ditlhaloso tsa encoder le decoder.
2017.02.14	16.1	• ID ea sehlahisoa e tlositsoe le ID ea morekisi. • E lokisitsoe Bokhoni ba ho lokisa phoso (t) boleng bo holimo ho 127
2015.10.01	15.1	ID ea sehlahisoa e kentsoe le khoutu ea ho odara.
2015.05.01	15.0	Tokollo ea pele

Intel Corporation. Litokelo tsohle li sirelelitsoe. Intel, logo ea Intel, le matšoao a mang a Intel ke matšoao a khoebo a Intel Corporation kapa lithuso tsa eona. Intel e tiisa ts'ebetso ea FPGA ea eona le lihlahisoa tsa semiconductor ho latela litlhaloso tsa hajoale ho latela waranti e tloaelehileng ea Intel, empa e na le tokelo ea ho etsa liphetoho ho lihlahisoa le lits'ebeletso life kapa life ka nako efe kapa efe ntle le tsebiso. Intel ha e nke boikarabello kapa boikarabello bo hlahang ka lebaka la kopo kapa ts'ebeliso ea tlhahisoleseling efe kapa efe, sehlahisoa, kapa ts'ebeletso e hlalositsoeng mona ntle le ha ho lumellane ka ho hlaka ka lengolo ke Intel. Bareki ba Intel ba eletsoa ho fumana mofuta oa morao-rao oa litlhaloso tsa sesebelisoa pele ba itšetleha ka tlhahisoleseling efe kapa efe e phatlalalitsoeng le pele ba kenya liodara tsa lihlahisoa kapa lits'ebeletso.

• Mabitso a mang le mabitso a mang a ka nkoa e le thepa ea ba bang.

A. BCH IP Core Document Archive

Haeba tafole e sa thathamisa mofuta oa IP core, tataiso ea mosebelisi bakeng sa mofuta o fetileng oa IP oa sebetsa.

IP Core Version	Bukana ea Mosebelisi
16.1	BCH IP Core User Guide
15.1	BCH IP Core User Guide

Litokomane / Lisebelisoa

Intel BCH IP Core [pdf] Bukana ea Mosebelisi BCH IP Core, BCH IP, Core

Litšupiso

• Bukana ea Mosebelisi