Polokalama Siosiomaga Fa'ata'ita'i Vaega Fa'atino
Fa'aoga Taiala
E uiga i lenei Pepa
O lenei pepa o loʻo faʻamatalaina pe faʻafefea ona faʻatusa e pei oample Accelerator Functional Unit (AFU) faʻaaogaina le Intel
Si'osi'omaga Fa'ata'ita'i (ASE) si'osi'omaga a le Accelerator Functional Unit (AFU). Va'ai ile Intel Accelerator Functional Unit (AFU) Simulation Environment (ASE) Ta'iala mo le Fa'aaogāga mo fa'amatalaga au'ili'ili ile gafatia ole ASE ma le fa'afale totonu.
O le Intel Accelerator Functional Unit (AFU) Simulation Environment (ASE) o se masini ma polokalama faʻataʻitaʻiga siosiomaga mo soʻo se Intel FPGA Programmable® Acceleration Card (Intel FPGA PAC). O lenei si'osi'omaga fa'atusa fa'akomepiuta o lo'o lagolagoina nei Intel FPGA PACs: 10 GX FPGA
- Intel FPGA Programmable Acceleration Card D5005
- Intel Programmable Acceleration Card ma Intel Arria®
O le ASE o loʻo tuʻuina atu se faʻataʻitaʻiga fefaʻatauaʻiga mo le Core Cache Interface (CCI-P) protocol ma se faʻataʻitaʻiga faʻataʻitaʻiga mo le FPGA-faʻapipiʻi i le lotoifale manatua.
E fa'amaonia foi e le ASE le tausisia o le Accelerator Functional Unit (AFU) i ta'iala nei ma API: - O le faʻamatalaga o le CCI-P protocol
- Le Avalon
Fa'afanua Fa'amanatu (Avalon-MM) Fa'amatalaga Fa'amatalaga - O le Open Programmable Acceleration Engine (OPAE)®
Laulau 1. Fa'aputuga Fa'avave mo Intel Xeon® PPU ma FPGAs Glossary
| Vaitaimi | Faapuupuuga | Fa'amatalaga |
| Intel Acceleration Stack mo Intel Xeon® PPU ma FPGA | Fa'aputuga Fa'avave | O se fa'aputuga o polokalama fa'akomepiuta, firmware ma meafaigaluega e maua ai feso'ota'iga sili ona lelei i le va o le Intel FPGA ma le Intel Xeon processor. |
| Intel FPGA Programmable Acceleration Card (Intel FPGA PAC) | Intel FPGA PAC | PCIe* FPGA kata fa'avavevave. O lo'o iai le FPGA Interface Manager (FIM) e fa'atasi ma le Intel Xeon processor i luga ole pasi PCIe. |
| Intel Xeon Scalable Platform with Integrated FPGA | Tu'ufa'atasi FPGA Platform | Intel Xeon fa'atasi ai ma le FPGA fa'atasi ma le Intel Xeon ma le FPGA i totonu o se afifi e tasi ma fa'asoa se fa'aoga fa'amautu o manatua e ala i le Ultra Path Interconnect (UPI). |
Fa'amatalaga Fa'atatau
Intel Accelerator Functional Unit (AFU) Simulation Environment (ASE) Taiala mo Tagata Fa'aoga
Intel Corporation. Ua taofia aia tatau uma. Intel, le Intel logo, ma isi fa'ailoga Intel o fa'ailoga fa'ailoga a le Intel Corporation po'o ona lala. E fa'amaonia e Intel le fa'atinoina o ana oloa FPGA ma semiconductor i fa'amatalaga o lo'o iai nei e tusa ai ma le fa'atonuga masani a Intel ae fa'asaoina le aia tatau e fai ai suiga i so'o se oloa ma auaunaga i so'o se taimi e aunoa ma se fa'aaliga. E leai se tiute po'o se noataga e afua mai i le talosaga po'o le fa'aogaina o so'o se fa'amatalaga, oloa, po'o se auaunaga o lo'o fa'amatalaina i i'i se'i vagana ua malilie i ai i se faiga tusitusia e Intel. Ua fautuaina tagata fa'atau Intel ina ia maua le fa'amatalaga lata mai o fa'amatalaga masini a'o le'i fa'alagolago i so'o se fa'amatalaga fa'asalalau ma a'o le'i tu'uina atu oka mo oloa po'o tautua.
*O isi igoa ma fa'ailoga e mafai ona ta'ua o se meatotino a isi.
ISO 9001:2015 Resitala
System Manaoga
O mea nei e mana'omia mo le Intel Accelerator Functional Unit (AFU) Simulation Environment (ASE)::
- O le 64-bit Linux operating system. O lenei faʻasalalauga na faʻamaonia ai faiga faʻaogaina nei:
- Mo Intel FPGA PAC D5005: - RHEL 7.6 ma Kernel 3.10.0-957
- Mo Intel PAC ma Intel Arria 10 GX FPGA: - RHEL 7.6 ma Kernel 3.10.0-957
- Ubuntu 18.04 ma Kernel 4.15
- O se tasi o simulators nei:
— 64-bit Synopsys* VCS-MX-2016.06-SP2-1 RTL Simulator
— 64-bit Mentor Graphics* Modelsim SE Simulator (Version 10.5c)
— 64-bit Mentor Graphics QuestaSim Simulator (Version 10.5c) - C tu'ufa'atasi: GCC 4.7.0 po'o luga
- CMake: version 2.8.12 poʻo luga
- GNU C Library: version 2.17 poʻo luga
- Python: lomiga 2.7
- Intel Quartus® Prime Pro Edition software version 19.2 (1)
Fa'atulagaina le Siosiomaga
E tatau ona e setiina lau siosiomaga faʻataʻitaʻiga ma faʻapipiʻi le polokalama OPAE aʻo leʻi faʻaogaina le ASE.
- Seti suiga ole siosiomaga nei mo lau polokalama fa'ata'ita'i:
• Mo VCS:
$ auina atu i fafo VCS_HOME=
$ auina atu i fafo PATH=$VCS_HOME/bin:$PATH
O le fa'atulagaina o le fa'atonuga o le VCS e fa'apea:
Ia mautinoa o loʻo i ai i lau masini se laisene VCS aoga.
• Mo Modelsim SE/QuestaSim:
$ auina atu i fafo MTI_HOME=
$ auina atu i fafo PATH=$MTI_HOME/linux_x86_64/:$MTI_HOME/bin/:$PATH
O le faʻatulagaina o faʻatonuga faʻapipiʻi Modelsim / Questa e faʻapea:
Ia mautinoa o loʻo i ai i lau polokalama se laisene faʻamaonia Modelsim SE/QuestaSim.
• Mo Intel Quartus Prime Pro Edition:
$ auina atu i fafo QUARTUS_HOME=
O le fausaga faʻapipiʻi faʻapipiʻi Intel Quartus Prime e faʻapea:
Faʻaopoopo le fesuiaiga o le siosiomaga e siaki ai le laisene Modelsim:
$ auina atu i fafo MGLS_LICENSE_FILE= - auina atu i fafo:
$ auina atu i fafo LM_LICENSE_FILE= - Ave'ese le fa'amaumauga o taimi ta'avale file, ma fa'apipi'i faletusi OPAE, binaries, aofia ai files, ma faletusi ASE e pei ona faamatalaina i le vaega: Fa'apipi'i le OPAE Software Package i le Intel Acceleration Stack Quick Start User Guide mo lau Intel FPGA PAC.
E tatau ona fa'atulaga sa'o lou si'osi'omaga e fa'atulaga ma fau se AFU. Aemaise lava, e tatau ona e fa'apipi'i lelei le OPAE Software Development Kit (SDK). O tusitusiga OPAE SDK e tatau ona i luga ole PATH ma aofia ai files ma faletusi e tatau ona avanoa i le C compiler. E le gata i lea, e tatau ona e mautinoa ua seti le suiga ole siosiomaga OPAE_PLATFORM_ROOT. Va'ai ile Fa'apipi'iina ole OPAE Software Package mo nisi fa'amatalaga.
Ina ia mautinoa o loʻo faʻapipiʻi lelei le OPAE SDK ma le ASE, i totonu o se atigi, faʻamaonia o lau PATH e aofia ai le afu_sim_setup. Ole afu_sim_setup e tatau ona iai ile /usr/bin directory po'o totonu pe afai na e fausia le OPAE mai le puna files.
Fa'amatalaga Fa'atatau
- Intel Accelerator Functional Unit (AFU) Simulation Environment (ASE) Taiala mo Tagata Fa'aoga
- Fa'apipi'i le OPAE Software Package
Mo Intel PAC ma Intel Arria 10 GX FPGA. - Fa'apipi'i le OPAE Software Package Mo Intel FPGA PAC D5005.
Fa'ata'ita'i hello_afu ile Client-Server Mode
Le hello_afu example o se faʻataʻitaʻiga faigofie AFU o loʻo faʻaalia ai le faʻaoga muamua CCI-P. O le RTL e fa'amalieina mana'oga aupito maualalo o se AFU, e tali atu i le fa'afanua I/O e fa'amanatu e fa'afo'i ai le fa'auluuluga o le masini ma le UUID a le AFU.
Ata 1. hello_afu Directory Tree
Fa'aaliga:
E fa'aaogaina e lenei pepaample> e faasino i se example mamanu faʻasologa, pei o hello_afu i le ata o loʻo i luga.
O lo'o fa'aalia e le polokalame le mana'oga maualalo e fa'apipi'i i se FPGA e fa'aaoga ai le OPAE. O lo'o fa'aalia e le RTL le mana'oga maualalo e fa'amalieina ai le aveta'avale OPAE ma le hello_afu example polokalama.
filelist.txt o loʻo faʻamaonia ai le files mo RTL faʻataʻitaʻiga ma faʻasologa.
Ina ia fa'atulaga lelei ma fausia le AFU samples, e tatau ona sa'o le fa'atulagaina o lou si'osi'omaga, e pei ona fa'amatala i le Set Up the Environment.
Fa'amatalaga Fa'atatau
- Intel Accelerator Functional Unit (AFU) Simulation Environment (ASE) Taiala mo Tagata Fa'aoga
- Seti le Siosiomaga i le itulau e 5
Atiina AFU ma le OPAE SDK
I le Accelerator Functional Unit (AFU) Guide's Developer's Guide
4.1. Fa'ata'ita'iga ile Client-Server Mode
O le example tafe faʻafeiloaʻi faʻamaumauga autu ASE. E mafai ona e fa'atusa uma examples ma le ASE, vagana eth_e2e_e10 ma eth_e2e_e40.
O le faʻataʻitaʻiga e manaʻomia ai ni faiga faʻapipiʻi se lua: tasi le faʻagasologa mo le faʻataʻitaʻiga o le RTL ma le faʻasologa lona lua e faʻatautaia ai le polokalama fesoʻotaʻi. Ina ia fausia se siosiomaga faʻataʻitaʻiga RTL, faʻataʻitaʻi mea nei ile $OPAE_PLATFORM_ROOT/hw/samples/hello_afu:
$ afu_sim_setup –source hw/rtl/filelist.txt build_sim
O lenei poloaiga e fausia ai se siosiomaga ASE i le build_sim subdirectory.
Le fausiaina ma faʻatautaia le simulator:
$ cd build_sim
$ fai
$ fai sim
E lolomi e le simulator se feʻau ua sauni mo faʻataʻitaʻiga. E lolomi fo'i se fe'au e fa'aosoina oe e seti le suiga ole siosiomaga ASE_WORKDIR.
Tatala se isi atigi mo faʻataʻitaʻiga polokalama. E tatau ona e mautinoa e seti le suiga ole siosiomaga OPAE_PLATFORM_ROOT.
Ina ia fausia ma faʻatautaia le polokalama i le atigi fou:
$ cd $OPAE_PLATFORM_ROOT
$ auina atu i fafo ASE_WORKDIR=$OPAE_PLATFORM_ROOT/hw/samples/hello_afu/build_sim/work
$ cd $OPAE_PLATFORM_ROOT/hw/samples/hello_afu/sw
$ fa'amama
$ fai USE_ASE=1
$ ./hello_afu
Fa'aaliga:
Ole igoa ole igoa ole ASE_WORKDIR e ono eseese. Fa'aaoga le igoa ole ala na saunia e le fa'ata'ita'iga o le simulator.
O le polokalama ma le simulator e tamoe, faʻamaufaʻailoga fefaʻatauaiga, ma alu ese.
4.1.1. Fa'ailoga Fa'atusa Files
O le faʻasologa o galuega faʻataʻitaʻiga e teu ai le galu, fefaʻatauaiga CCI-P, ma faʻamaumauga faʻataʻitaʻiga files.
Fa'auma laasaga nei e view o le fa'amaumauga o le galu:
- Suia le fa'atonuga na e fa'atinoina ai le fa'atonuga fai sim.
- Ituaiga:
$ fai galu
O le fa'atonuga o le faia o le galu e fa'ailoa ai le fa'afefete viewer.
4.1.2. Ta'utinoga Fuafuaga
O mea nei file ma fa'asinomaga fa'amatala le fa'ata'ita'iga AFU:
- $OPAE_PLATFORM_ROOT/hw/samples/ample>/hw/rtl/filelist.txt o loʻo faʻamaoti ai punaoa RTL.
- <AFU example> o le example directory e pei ona faaalia i le hello_afu Directory Tree ata.
- filelist.txt lisi SystemVerilog, VHDL, ma le AFU JavaScript Object Notation (.json) file.
- O le AFU .json o loʻo faʻamatalaina fesoʻotaʻiga e manaʻomia e le AFU. E aofia ai foi ma se UUID e iloa ai le AFU pe a uma ona sii mai i se FPGA.
- hw/rtl/hello_afu.json fa'amatalaina ccip_std_afu o le fa'aoga pito i luga e ala i le setiina o le afu-top-interface ile ccip_std_afu. ccip_std_afu o le faavae CCI-P interface e aofia ai uati, toe setiina, ma CCI-P TX ma RX fausaga. Sili atu tulaga muamuaample fa'amalamalamaina isi filifiliga fa'aoga.
- O le .json file ta'utino le AFU UUID. O se tusitusiga OPAE e gaosia ai le UUID. E utaina e le RTL le UUID mai le afu_json_info.vh.
- sw/Faiafile fa'atupu afu_json_info.h. E utaina e le polokalame le UUID mai le afu_json_info.h.
4.1.3. Fa'afitauli Fa'ata'ita'iga a le Client-Server
Afai e le manuia le afu_sim_setup poloaiga, faʻamaonia e:
- afu_sim_setup o loʻo i luga o lau PATH. afu_sim_setup e tatau ona i totonu /usr/bin poʻo totonu pe afai na e fausia le OPAE mai le puna files.
- E iai lau Python version 2.7 poʻo le maualuga faʻapipiʻi.
Afai e le mafai ona e fausia ma faʻatino le simulator, e foliga mai e te leʻi faʻapipiʻi lelei lau meafaigaluega faʻataʻitaʻiga RTL.
A e taumafai e fausia ma faʻatautaia le polokalama, afai e te vaʻai i se "Error enumerating AFCs" feʻau, na e le faʻatulagaina USE_ASE = 1 i luga o le laina faʻatonuga. O lo'o su'e e le polokalame se masini FPGA fa'aletino. Ina ia toe faʻaleleia, toe fai laasaga mai le faʻatonuga mama.
AFU Examples
Laulau 2.
AFU Examples
O AFU umaampe aofia ai se README auiliili file, tuʻuina atu se faʻamatalaga faʻatinoga ma faʻamatalaga i le auala e faʻatusa ai le mamanu. Mo se malamalama atoatoa i le faiga faʻataʻitaʻiga, toeview le README file i AFU ta'itasiample.
| AFU | Fa'amatalaga | |
| Hello_mem_afu | hello_mem_afu fa'aalia se AFU o lo'o fausia ai se masini fa'atekonolosi faigofie e maua ai le manatua. O le masini a le setete e mafai ona faʻaogaina ni faʻaoga faʻaoga i mafaufauga faʻapitonuʻu faʻapipiʻi saʻo i pine FPGA, pei o DDR4 DIMMs. O lenei manatua e ese mai le manatuaga talimalo na maua ile CCI-P. E pulea e le tagata talimalo le hello_mem_afu controller state machine e faʻaaoga ai talosaga I/O (MMIO) manatua-faafanua e pulea ma resitala tulaga (CSRs). | |
| Hello_intr_afu | hello_intr_afu o loʻo faʻaalia le faʻaogaina o le faʻalavelave i le ASE. | |
| DMA ma le f1.1 (2) _ | dma_afu fa'aalia le DMA Basic Building Block mo le talimalo i le FPGA, FPGA e talimalo, ma le FPGA i le FPGA fa'aliliuga manatua. Pe a faʻataʻitaʻiina lenei AFU, o le tele o le paʻu o loʻo faʻaaogaina mo le DMA fesiitaiga e laʻititi e faʻatumauina le taimi faʻataʻitaʻi talafeagai. Mo nisi fa'amatalaga, tagai ile DMA Accelerator Functional Unit (AFU) User Guide. | |
| nlb_mode_O | nlb_mode_O o se CCI-P system e faʻaalia ai le suʻega kopi manatua. $0PAE_PLATFORM_ROOT/ sw/opae—cre/ease numera>/sample/hello_fpga . c aofia ai le nlb_mode_0. | |
| $sh regress.sh -a -r rtl_sim -s <vcslmodelsimlquesta > [-i ) -e |
||
| streaming_dma | streaming_dma fa'aalia pe fa'afefea ona fesiita'i fa'amatalaga i le va o le fa'amanatuga o le talimalo ma le FPGA fa'afefe uafu. Mo nisi fa'amatalaga, tagai ile Streaming DMA Accelerator Functional Unit (AFU) User Guide. | |
| talofa_afu | hel lo_a fu o se AFU faigofie o loʻo faʻaalia ai le atinaʻe CCI-P muamua. O le RTL e fa'amalieina le mana'oga maualalo o se AFU, tali atu i le MMIO faitau e toe fa'afo'i le fa'auluuluga o le masini ma le UUID a le AFU. | |
Fa'amatalaga Fa'atatau
- DMA Accelerator Functional Unit (AFU) User Guide
Mo faʻamatalaga ile faʻapipiʻiina ma faʻatino le dma_afu i lau Intel PAC ma Intel Arria 10 GX FPGA. - Fa'asalalauina le DMA Accelerator Functional Unit (AFU) User Guide
Mo faʻamatalaga ile faʻapipiʻiina ma faʻatino le streaming_dma_afu i lau Intel PAC ma Intel Arria 10 GX FPGA. - DMA Accelerator Unit Fa'atino Taiala mo Tagata: Intel FPGA Programmable Acceleration Card D5005
Mo faʻamatalaga ile faʻapipiʻiina ma faʻatino le dma_afu i lau Intel FPGA PAC D5005. - Fa'asalalauina le DMA Accelerator Unit Fa'atino Ta'iala mo Tagata Fa'aoga: Intel FPGA Programmable Acceleration Card D5005
Mo faʻamatalaga ile faʻapipiʻiina ma faʻatino le dma_afu i lau Intel FPGA PAC D5005.
Fa'afitauli
Afai e aliali mai le mea sese i le taimi o le faʻataʻitaʻiga, faʻasaʻo e ala i le mulimuli i laasaga o loʻo i lalo.
Feau Sese
# [SIM] O lo'o fa'aauau pea le fa'ata'ita'iga a le ASE i le lisi o lo'o iai nei!
# [SIM] Siaki mo le PID 28816
# [SIM] O le a alu ese le faʻataʻitaʻiga ... e mafai ona e faʻaogaina se SIGKILL e faʻaumatia ai le faiga faʻataʻitaʻiga.
# [SIM] Siaki foi pe .ase_ready.pid file ua aveese ae lei faagasolo. Fofo
- Fa'aigoa kill ase_simv e tape ai faiga fa'atusa zombie ma aveese so'o se taimi le tumau files tuua i tua e le manuia faiga simulation po o loka ups.
- Aveese le .ase_ready.pid file, maua i le $ASE_WORKDIR directory.
ASE Quick Start User Guide Archives
| Intel Acceleration Stack Version | Fa'aoga Taiala |
| 2.0 | Intel Accelerator Functional Unit (AFU) Simulation Environment (ASE) Quick Start User Guide |
| 1. | Intel Accelerator Functional Unit (AFU) Simulation Environment (ASE) Quick Start User Guide |
| 1. | Intel Accelerator Functional Unit (AFU) Simulation Environment (ASE) Quick Start User Guide |
| 1.0 | Intel Accelerator Functional Unit (AFU) Simulation Environment (ASE) Quick Start User Guide |
Tala'aga Toe Iloiloga o Pepa mo le ASE Quick Start User Guide
| Fa'amatalaga Fa'amaumauga | Intel Acceleration Stack Version | Suiga |
| 2020.03.06 | 1.2.1 ma le 2.0.1 | Fa'afouina mea nei: • Faiga Fa'atonu |
| 2019.08.05 | 2.0 | • Fa'afouina le Intel Quartus Prime Pro Edition version i System Requirements. • Faaopoopo le hello_afu i le AFU Examples. • Aveesea faʻamatalaga e uiga i le faʻataʻitaʻiina i le faiga faʻasolosolo. • Faaopoopo se vaega fou: ASE Quick Start User Guide Archives. |
| 2018.12.04 | 1. | Faʻaopoopo le lagolago a le Ubuntu. |
| 2018.08.06 | 1. | Fa'afou mana'oga fa'aoga, fa'asologa o fa'atonuga, ma fa'atatau fileigoa. |
| 2018.04.10 | 1.0 | Fa'asalalauga muamua. |
683200 | 2020.03.06
Lauina Manatu
Pepa / Punaoa
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intel Accelerator Functional Unit Simulation Environment Software [pdf] Taiala mo Tagata Fa'aoga Vaega Fa'atino Fa'avavevave, Polokalama Si'osi'omaga Fa'ata'ita'i, Vaega Fa'avavevave Fa'ata'ita'iga Si'osi'omaga, Polokalama, Polokalama Fa'ata'ita'i Vaega Fa'agaoioi o le Si'osi'omaga |
