Functional Unit Simulation Ib puag ncig Software
Cov neeg siv phau ntawv qhia

Hais txog Cov Ntaub Ntawv no

Daim ntawv no piav qhia yuav ua li cas simulate liample Accelerator Functional Unit (AFU) siv Intel
Accelerator Functional Unit (AFU) Simulation Ib puag ncig (ASE) ib puag ncig. Xa mus rau Intel Accelerator Functional Unit (AFU) Simulation Ib puag ncig (ASE) Cov Neeg Siv Khoom Qhia kom paub meej txog ASE peev xwm thiab kev tsim vaj tsev sab hauv.
Intel Accelerator Functional Unit (AFU) Simulation Ib puag ncig (ASE) yog qhov chaw kho vajtse thiab software co-simulation ib puag ncig rau ib qho Intel FPGA Programmable® Acceleration Card (Intel FPGA PAC). Qhov software co-simulation ib puag ncig tam sim no txhawb nqa Intel FPGA PACs hauv qab no: 10 GX FPGA

• Intel FPGA Programmable Acceleration Card D5005
• Intel Programmable Acceleration Card nrog Intel Arria®
  ASE muab cov qauv kev hloov pauv rau Core Cache Interface (CCI-P) raws tu qauv thiab lub cim xeeb qauv rau FPGA-txuas nrog lub cim xeeb hauv zos.
  ASE kuj lees paub qhov ua tau raws li Accelerator Functional Unit (AFU) raws li cov txheej txheem hauv qab no thiab APIs:
• CCI-P raws tu qauv specification
• Lub Avalon
  Memory Mapped (Avalon-MM) Interface Specification
• Qhib Programmable Acceleration Engine (OPAE)®

Table 1. Acceleration Stack rau Intel Xeon® CPU nrog FPGAs Glossary

Lub sij hawm	Cov ntawv luv	Kev piav qhia
Intel Acceleration Stack rau Intel Xeon® CPU nrog FPGAs	Acceleration Stack	Ib qho kev sau ntawm software, firmware thiab cov cuab yeej uas muab kev sib txuas ua haujlwm zoo ntawm Intel FPGA thiab Intel Xeon processor.
Intel FPGA Programmable Acceleration Card (Intel FPGA PAC)	Intel FPGA PAC Cov	PCIe * FPGA accelerator daim npav. Muaj FPGA Interface Manager (FIM) uas ua ke nrog Intel Xeon processor hla lub npav PCIe.
Intel Xeon Scalable Platform nrog Integrated FPGA	Integrated FPGA Platform	Intel Xeon ntxiv rau FPGA platform nrog Intel Xeon thiab FPGA hauv ib pob thiab sib koom ua ke ntawm lub cim xeeb ntawm Ultra Path Interconnect (UPI).

Cov ntaub ntawv ntsig txog
Intel Accelerator Functional Unit (AFU) Simulation Ib puag ncig (ASE) Tus Neeg Siv Qhia

Intel Corporation. Txhua txoj cai. Intel, Intel logo, thiab lwm yam Intel cov cim yog cov cim lag luam ntawm Intel Corporation lossis nws cov koom haum. Intel lav qhov kev ua tau zoo ntawm nws cov FPGA thiab cov khoom siv semiconductor rau cov kev qhia tshwj xeeb tam sim no raws li Intel tus qauv warranty tab sis muaj txoj cai los hloov cov khoom thiab cov kev pabcuam txhua lub sijhawm yam tsis muaj ntawv ceeb toom. Intel xav tias tsis muaj lub luag haujlwm lossis kev lav phib xaub uas tshwm sim los ntawm daim ntawv thov lossis siv cov ntaub ntawv, cov khoom lag luam, lossis cov kev pabcuam uas tau piav qhia hauv no tshwj tsis yog raws li tau pom zoo hauv kev sau ntawv los ntawm Intel. Intel cov neeg siv khoom tau qhia kom tau txais qhov tseeb version ntawm cov cuab yeej tshwj xeeb ua ntej tso siab rau cov ntaub ntawv tshaj tawm thiab ua ntej muab xaj rau cov khoom lossis cov kev pabcuam.
* Lwm lub npe thiab hom yuav raug lees paub raws li cov cuab yeej ntawm lwm tus.
Daim ntawv pov thawj ISO 9001: 2015

Cov Kev Xav Tau

Nov yog cov txheej txheem yuav tsum tau ua rau Intel Accelerator Functional Unit (AFU) Simulation Ib puag ncig (ASE)::

• Ib tug 64-ntsis Linux operating system. Qhov kev tso tawm no tau lees paub cov haujlwm hauv qab no:
  - Rau Intel FPGA PAC D5005:
• RHEL 7.6 nrog Kernel 3.10.0-957
  - Rau Intel PAC nrog Intel Arria 10 GX FPGA:
• RHEL 7.6 nrog Kernel 3.10.0-957
• Ubuntu 18.04 nrog Kernel 4.15
• Ib tug ntawm cov nram qab no simulators:
  - 64-ntsis Synopsys* VCS-MX-2016.06-SP2-1 RTL Simulator
  - 64-ntsis Mentor Graphics* Modelsim SE Simulator (Version 10.5c)
  - 64-ntsis Mentor Graphics QuestaSim Simulator (Version 10.5c)
• C compiler: GCC 4.7.0 lossis siab dua
• CMake: version 2.8.12 lossis siab dua
• GNU C Library: version 2.17 lossis siab dua
• Python: version 2.7
• Intel Quartus® Prime Pro Edition software version 19.2 (1)

Kev teeb tsa ib puag ncig

Koj yuav tsum teeb tsa koj qhov chaw simulation thiab nruab OPAE software ua ntej khiav ASE.

1. Teem cov kev hloov pauv ib puag ncig hauv qab no rau koj cov software simulation:
   • Rau VCS:
   $ export VCS_HOME=
   $ export PATH=$VCS_HOME/bin:$PATH
   VCS installation directory qauv yog raws li nram no:
   Xyuas kom tseeb tias koj lub kaw lus muaj daim ntawv tso cai VCS siv tau.
   • Rau Modelsim SE/QuestaSim:
   $ export MTI_HOME =
   $ export PATH=$MTI_HOME/linux_x86_64/:$MTI_HOME/bin/:$PATH
   Modelsim/Questa installation directory qauv yog raws li nram no:
   Xyuas kom tseeb tias koj lub cev muaj daim ntawv tso cai Modelsim SE/QuestaSim.
   • Rau Intel Quartus Prime Pro Edition:
   $ export QUARTUS_HOME=
   Intel Quartus Prime installation directory qauv yog raws li nram no:
   Ntxiv cov kev hloov pauv ib puag ncig los xyuas cov ntawv tso cai Modelsim:
   $ export MGLS_LICENSE_FILE=
2. Export:
   $ export LM_LICENSE_FILE=
3.  Extract lub runtime archive file, thiab nruab OPAE cov tsev qiv ntawv, binaries, suav nrog files, thiab ASE cov tsev qiv ntawv raws li tau piav qhia hauv ntu: Txhim kho OPAE Software Pob hauv qhov tsim nyog Intel Acceleration Stack Quick Start User Guide rau koj Intel FPGA PAC.

Koj ib puag ncig yuav tsum tau teeb tsa kom raug los teeb tsa thiab tsim AFU. Tshwj xeeb, koj yuav tsum nruab OPAE Software Development Kit (SDK) kom raug. OPAE SDK cov ntawv sau yuav tsum nyob ntawm PATH thiab suav nrog files thiab cov tsev qiv ntawv uas yuav tsum muaj rau C compiler. Ntxiv rau, koj yuav tsum xyuas kom meej tias OPAE_PLATFORM_ROOT ib puag ncig hloov pauv tau teeb tsa. Xa mus rau Kev Txhim Kho OPAE Software Pob kom paub ntau ntxiv.
Txhawm rau kom ntseeg tau tias OPAE SDK thiab ASE raug teeb tsa kom raug, hauv lub plhaub, paub meej tias koj PATH suav nrog afu_sim_setup. Lub afu_sim_setup yuav tsum nyob rau hauv /usr/bin directory lossis hauv yog tias koj tsim OPAE los ntawm qhov chaw files.

Cov ntaub ntawv ntsig txog

• Intel Accelerator Functional Unit (AFU) Simulation Ib puag ncig (ASE) Tus Neeg Siv Qhia
• Txhim kho OPAE Software Pob
  Rau Intel PAC nrog Intel Arria 10 GX FPGA.
• Txhim kho OPAE Software Pob Rau Intel FPGA PAC D5005.

Simulating hello_afu hauv Client-Server Mode

Hlo_afu example yog ib qho yooj yim AFU template uas qhia tau hais tias thawj CCI-P interface. RTL txaus siab rau qhov tsawg kawg nkaus yuav tsum tau ntawm AFU, teb rau lub cim xeeb-mapped I / O nyeem kom rov qab cov cuab yeej feature header thiab AFU's UUID.
Daim duab 1. hello_afu Directory tsob ntoo

Nco tseg:
Cov ntaub ntawv no sivample> refer to example tsim directory, xws li hello_afu nyob rau hauv daim duab saum toj no.
Lub software qhia txog yam tsawg kawg nkaus uas yuav tsum tau xa mus rau FPGA siv OPAE. RTL qhia txog yam tsawg kawg nkaus kom txaus siab rau OPAE tus tsav tsheb thiab hello_afu example software.
filelist.txt qhia cov files rau RTL simulation thiab synthesis.
Kom ua tiav kev teeb tsa thiab tsim AFU samples, koj qhov chaw ib puag ncig yuav tsum tau teeb tsa kom raug, raws li tau piav qhia hauv Kev Tsim Kho Ib puag ncig.

Cov ntaub ntawv ntsig txog

• Intel Accelerator Functional Unit (AFU) Simulation Ib puag ncig (ASE) Tus Neeg Siv Qhia
• Kev teeb tsa ib puag ncig ntawm nplooj 5

Tsim AFUs nrog OPAE SDK
Nyob rau hauv Accelerator Functional Unit (AFU) Developer's Guide

4.1. Simulation hauv Client-Server Hom

Cov nram qab no example flow qhia txog ASE scripts. Koj tuaj yeem simulate tag nrho cov examples nrog ASE, tsuas yog eth_e2e_e10 thiab eth_e2e_e40.
Lub simulation yuav tsum muaj ob txheej txheem software: ib txheej txheem rau RTL simulation thiab txheej txheem thib ob los khiav cov software txuas nrog. Txhawm rau tsim RTL simulation ib puag ncig, khiav cov hauv qab no hauv $ OPAE_PLATFORM_ROOT/hw/samples/hello_afu:
$ afu_sim_setup –source hw/rtl/filelist.txt build_sim
Cov lus txib no tsim ib puag ncig ASE hauv build_sim subdirectory.
Tsim thiab khiav lub simulator:
$ cd build_sim
$ ua
$ ua sim
Lub simulator luam tawm cov lus hais tias nws yog npaj txhij rau simulation. Nws kuj luam tawm cov lus qhia kom koj teeb tsa ASE_WORKDIR ib puag ncig hloov pauv.
Qhib lwm lub plhaub rau software simulation. Koj yuav tsum xyuas kom teeb tsa OPAE_PLATFORM_ROOT ib puag ncig hloov pauv.
Txhawm rau tsim thiab khiav cov software hauv lub plhaub tshiab:
$ cd $OPAE_PLATFORM_ROOT
$ export ASE_WORKDIR=$OPAE_PLATFORM_ROOT/hw/samples/hello_afu/build_sim/work
$ cd $OPAE_PLATFORM_ROOT/hw/samples/hello_afu/sw
$ ua kom huv
$ ua USE_ASE=1
$ ./hlo_af

Nco tseg:
Cov npe tshwj xeeb rau ASE_WORKDIR yuav txawv. Siv lub npe pathname muab los ntawm simulator tam sim.
Lub software thiab simulator khiav, kaw kev lag luam, thiab tawm.

4.1.1. Simulation Log Files
Lub simulation ua hauj lwm directory khaws cov waveform, CCI-P muas, thiab simulation cav files.
Ua kom tiav cov kauj ruam hauv qab no rau view waveform database:

1. Hloov mus rau cov npe uas koj tau ua tiav cov lus txib ua sim.
2. Hom:
   $ ua yoj
   Cov lus txib ua yoj invokes lub waveform viewua.

4.1.2. Daim Ntawv Tshaj Tawm
Hauv qab no file thiab cov ntawv qhia txhais lub AFU simulation:

• $OPAE_PLATFORM_ROOT/hw/samples/ample>/hw/rtl/filelist.txt qhia RTL qhov chaw.
• <AFU example> example directory raws li qhia hauv hello_afu Directory Tree daim duab.
• filelist.txt teev SystemVerilog, VHDL, thiab AFU JavaScript Object Notation (.json) file.
• Lub AFU .json piav qhia txog cov kev cuam tshuam uas AFU xav tau. Nws kuj suav nrog UUID txhawm rau txheeb xyuas AFU ib zaug rub tawm rau FPGA.
• hw/rtl/hello_afu.json txhais ccip_std_afu ua cov theem sab saum toj interface los ntawm kev teeb tsa afu-top-interface rau ccip_std_afu. ccip_std_afu yog lub hauv paus CCI-P interface suav nrog cov moos, rov pib dua, thiab CCI-P TX thiab RX cov qauv. Mas Advanced examples txhais lwm yam kev xaiv interface.
• .json file tshaj tawm AFU UUID. Ib tsab ntawv OPAE tsim cov UUID. RTL rub tawm UUID los ntawm afu_json_info.vh.
• sw/uafile tsim afu_json_info.h. Lub software loads UUID los ntawm afu_json_info.h.

4.1.3. Troubleshooting Client-Server Simulation
Yog tias afu_sim_setup hais kom ua tsis tiav, paub meej tias:

• afu_sim_setup yog ntawm koj qhov PATH. afu_sim_setup yuav tsum nyob hauv /usr/bin lossis hauv yog tias koj tsim OPAE los ntawm qhov chaw files.
• Koj muaj Python version 2.7 lossis siab dua nruab.

Yog tias koj tsis tuaj yeem tsim thiab ua tiav lub simulator, nws zoo li koj tsis tau nruab koj lub cuab yeej RTL simulation kom zoo.
Thaum koj sim tsim thiab khiav lub software, yog tias koj pom "Yuam kev sau npe AFCs" cov lus, koj tshem tawm qhov teeb tsa USE_ASE=1 ntawm kab hais kom ua. Lub software tab tom nrhiav rau lub cev FPGA ntaus ntawv. Txhawm rau rov qab, rov ua cov kauj ruam los ntawm kev ua kom huv si.

UA Examples

Table 2.
UA Examples
Txhua AFU example suav nrog cov ncauj lus kom ntxaws README file, muab cov lus piav qhia txog kev ua haujlwm thiab sau ntawv yuav ua li cas simulate tus tsim. Rau kev nkag siab tag nrho ntawm cov txheej txheem simulation, review lub README file hauv txhua AFU example.

AFU	Kev piav qhia
hlo_mem_af	hello_mem_afu ua qauv qhia AFU uas tsim lub xeev lub tshuab yooj yim kom nkag mus rau lub cim xeeb. Lub xeev lub tshuab muaj peev xwm ntawm ntau tus qauv nkag mus rau hauv lub cim xeeb ncaj qha txuas nrog FPGA pins, xws li DDR4 DIMMs. Lub cim xeeb no txawv ntawm tus tswv lub cim xeeb nkag mus dhau CCI-P. Tus tswv tsev tswj hwm hello_mem_afu maub los lub xeev lub tshuab siv lub cim xeeb-mapped I/O (MMIO) thov kom tswj thiab cov xwm txheej sau npe (CSRs).
nyob zoo_intr_afu	nyob zoo_intr_afu qhia txog daim ntawv thov cuam tshuam hauv ASE.
DMA rau f1.1 (2) _	dma_afu ua qauv qhia DMA Basic Building Block rau tus tswv rau FPGA, FPGA los tuav, thiab FPGA rau FPGA nco hloov chaw. Thaum simulating AFU no, qhov tsis loj siv rau DMA hloov pauv me me kom lub sijhawm simulation tsim nyog. Yog xav paub ntxiv, saib mus rau DMA Accelerator Functional Unit (AFU) User Guide.
nlb_mode_O	nlb_mode_O yog CCI-P system ua qauv qhia lub cim xeeb daim ntawv xeem. $0PAE_PLATFORM_ROOT/ sw/opae—cre/ease number>/sample/hello_fpga . c suav nrog nlb_mode_0.
	$ sh regress.sh -a -r rtl_sim -s <vcslmodelsimlquesta > [-i ) -b
streaming_dma ua	streaming_dma qhia yuav ua li cas hloov cov ntaub ntawv ntawm tus tswv nco thiab FPGA streaming chaw nres nkoj. Yog xav paub ntxiv, xa mus rau Streaming DMA Accelerator Functional Unit (AFU) Phau Ntawv Qhia.
hlo_af	hel lo_a fu yog ib qho yooj yim AFU uas qhia txog thawj CCI-P interface. RTL txaus siab qhov tsawg kawg nkaus qhov yuav tsum tau muaj ntawm AFU, teb rau MMIO nyeem kom rov qab cov cuab yeej feature header thiab AFU's UUID.

Cov ntaub ntawv ntsig txog

• DMA Accelerator Functional Unit (AFU) Phau Ntawv Qhia
  Yog xav paub ntxiv txog yuav ua li cas sau thiab ua tiav dma_afu ntawm koj Intel PAC nrog Intel Arria 10 GX FPGA.
• Streaming DMA Accelerator Functional Unit (AFU) Daim Ntawv Qhia Tus Neeg Siv
  Yog xav paub ntxiv txog yuav ua li cas sau thiab ua tiav streaming_dma_afu ntawm koj Intel PAC nrog Intel Arria 10 GX FPGA.
• DMA Accelerator Functional Unit User Guide: Intel FPGA Programmable Acceleration Card D5005
  Yog xav paub ntxiv txog yuav ua li cas sau thiab ua tiav dma_afu ntawm koj Intel FPGA PAC D5005.
• Streaming DMA Accelerator Functional Unit Tus Neeg Siv Qhia: Intel FPGA Programmable Acceleration Card D5005
  Yog xav paub ntxiv txog yuav ua li cas sau thiab ua tiav dma_afu ntawm koj Intel FPGA PAC D5005.

Kev daws teeb meem

Yog hais tias qhov yuam kev hauv qab no tshwm sim thaum simulation, kho nws los ntawm kev ua raws li cov kauj ruam hauv qab no.
Lus yuam kev
# [SIM] Ib qho piv txwv ASE yog tej zaum tseem khiav hauv cov npe tam sim no!
# [SIM] Kos rau PID 28816
# [SIM] Simulation yuav tawm… koj tuaj yeem siv SIGKILL tua cov txheej txheem simulation.
# [SIM] Kuj xyuas seb .ase_ready.pid file raug tshem tawm ua ntej yuav mus. Kev daws

1. Hom tua ase_simv tua zombie simulation txheej txheem thiab tshem tawm ib ntus files tshuav tom qab los ntawm kev ua tsis tau tejyam simulation lossis kev kaw haujlwm.
2. Rho tawm .ase_ready.pid file, pom hauv $ASE_WORKDIR directory.

ASE Quick Start User Guide Archives

Intel Acceleration Stack Version	Cov neeg siv phau ntawv qhia
2.0	Intel Accelerator Functional Unit (AFU) Simulation Ib puag ncig (ASE) Phau Ntawv Qhia Ceev Cov Neeg Siv
1.	Intel Accelerator Functional Unit (AFU) Simulation Ib puag ncig (ASE) Phau Ntawv Qhia Ceev Cov Neeg Siv
1.	Intel Accelerator Functional Unit (AFU) Simulation Ib puag ncig (ASE) Phau Ntawv Qhia Ceev Cov Neeg Siv
1.0	Intel Accelerator Functional Unit (AFU) Simulation Ib puag ncig (ASE) Phau Ntawv Qhia Ceev Cov Neeg Siv

Cov ntaub ntawv kho dua tshiab rau ASE Quick Start User Guide

Cov ntaub ntawv Version	Intel Acceleration Stack Version	Hloov
2020.03.06	1.2.1 thiab 2.0.1	Hloov kho cov hauv qab no: • Cov Kev Xav Tau
2019.08.05	2.0	• Hloov kho Intel Quartus Prime Pro Edition version hauv System Requirements. • Ntxiv qhov hello_afu hauv AFU Examples. • Tshem tawm cov ntaub ntawv hais txog kev simulating hauv hom regression. • Ntxiv ib ntu tshiab: ASE Quick Start User Guide Archives.
2018.12.04	1.	Ntxiv Ubuntu kev txhawb nqa.
2018.08.06	1.	Hloov kho cov kev xav tau ntawm lub cev, cov qauv kev qhia, thiab sib xws filenpe.
2018.04.10	1.0	Kev tso tawm thawj zaug.

683200 Nws 2020.03.06 ib
Xa lus tawm tswv yim

Cov ntaub ntawv / Cov ntaub ntawv

Intel Accelerator Functional Unit Simulation Ib puag ncig Software [ua pdf] Cov neeg siv phau ntawv qhia Accelerator Functional Unit, Simulation Ib puag ncig Software, Accelerator Functional Unit Simulation Ib puag ncig, Software, Accelerator Functional Unit Simulation Ib puag ncig Software

Cov ntaub ntawv

• Cov neeg siv phau ntawv