Pūnaehana Kaiapuni Simulation Unit Functional
Ke alakaʻi hoʻohana
No keia Palapala
Hōʻike kēia palapala pehea e hoʻohālikelike aiample Accelerator Functional Unit (AFU) me ka hoʻohana ʻana i ka Intel
Kaiapuni ʻĀpana Hoʻohālikelike (ASE) ʻo Accelerator Functional Unit (AFU). E nānā i ka Intel Accelerator Functional Unit (AFU) Simulation Environment (ASE) alakaʻi hoʻohana no nā kikoʻī kikoʻī e pili ana i nā mana ASE a me ka hoʻolālā kūloko.
ʻO ka Intel Accelerator Functional Unit (AFU) Simulation Environment (ASE) he lako polokalamu a me ka lako polokalamu hoʻohālikelike ʻia no kekahi Intel FPGA Programmable® Acceleration Card (Intel FPGA PAC). Ke kākoʻo nei kēia polokalamu co-simulation environment i kēia mau Intel FPGA PACs: 10 GX FPGA
- Intel FPGA Programmable Acceleration Card D5005
- Kāleka hoʻokē ʻai polokalamu Intel me Intel Arria®
Hāʻawi ka ASE i kahi kumu hoʻohālike no ka Core Cache Interface (CCI-P) protocol a me kahi kumu hoʻomanaʻo no ka hoʻomanaʻo kūloko i hoʻopili ʻia e FPGA.
Hoʻopaʻa pū ka ASE i ka hoʻokō ʻana o Accelerator Functional Unit (AFU) i nā protocol a me nā API: - ʻO ka ʻōlelo kikoʻī o ka protocol CCI-P
- ʻO ka Avalon
Hoʻokaʻaʻike ʻia o ka hoʻomanaʻo ʻana (Avalon-MM). - ʻO ka Open Programmable Acceleration Engine (OPAE)®
Papa 1. Hoʻopaʻa wikiwiki no Intel Xeon® CPU me FPGAs Glossary
| Kau | Pōʻokoʻa | wehewehe |
| ʻO Intel Acceleration Stack no Intel Xeon® CPU me nā FPGA | Hoʻopaʻa wikiwiki | ʻO kahi hōʻiliʻili o nā lako polokalamu, firmware a me nā mea hana e hāʻawi ana i ka hoʻohui ʻana i ka hana-optimized ma waena o kahi Intel FPGA a me kahi kaʻina Intel Xeon. |
| Kāleka hoʻokē ʻai polokalamu ʻo Intel FPGA (Intel FPGA PAC) | Intel FPGA PAC | PCIe* FPGA kāleka hoʻolele. Loaʻa i kahi FPGA Interface Manager (FIM) e hui pū me kahi kaʻina hana Intel Xeon ma luna o kahi pahi PCIe. |
| ʻO Intel Xeon Scalable Platform me ka FPGA Hoʻohui | Hoʻohui ʻia ʻo FPGA Platform | ʻO Intel Xeon me FPGA kahua me ka Intel Xeon a me kahi FPGA i loko o kahi pūʻolo hoʻokahi a kaʻana like i kahi huna huna o ka hoʻomanaʻo ma o Ultra Path Interconnect (UPI). |
ʻIke pili
ʻO Intel Accelerator Functional Unit (AFU) Simulation Environment (ASE) alakaʻi hoʻohana
Huina Intel. Ua mālama ʻia nā kuleana āpau. ʻO Intel, ka Intel logo, a me nā hōʻailona Intel ʻē aʻe he mau hōʻailona o Intel Corporation a i ʻole kāna mau lālā. Mālama ʻo Intel i ka hana o kāna mau huahana FPGA a me semiconductor i nā kikoʻī o kēia manawa e like me ka palapala hōʻoia maʻamau o Intel akā aia ke kuleana e hoʻololi i nā huahana a me nā lawelawe i kēlā me kēia manawa me ka ʻole o ka ʻike. ʻAʻole ʻo Intel i kuleana a i ʻole kuleana e puka mai ana mai ka noi a i ʻole ka hoʻohana ʻana i kekahi ʻike, huahana, a i ʻole lawelawe i wehewehe ʻia ma ʻaneʻi koe wale nō i ʻae ʻia ma ke kākau ʻana e Intel. Manaʻo ʻia nā mea kūʻai aku ʻo Intel e loaʻa i ka mana hou o nā kikoʻī hāmeʻa ma mua o ka hilinaʻi ʻana i kekahi ʻike i paʻi ʻia a ma mua o ke kau ʻana i nā kauoha no nā huahana a i ʻole nā lawelawe.
* Hiki ke koi ʻia nā inoa a me nā hōʻailona ʻē aʻe ma ke ʻano he waiwai o nā poʻe ʻē aʻe.
ISO 9001:2015 Kakau
Nā Koina Pūnaewele
Eia nā koi ʻōnaehana no ka Intel Accelerator Functional Unit (AFU) Simulation Environment (ASE)::
- He ʻōnaehana hana Linux 64-bit. Ua hōʻoia kēia hoʻokuʻu i nā ʻōnaehana hana penei:
— No Intel FPGA PAC D5005: - RHEL 7.6 me Kernel 3.10.0-957
— No Intel PAC me Intel Arria 10 GX FPGA: - RHEL 7.6 me Kernel 3.10.0-957
- ʻO Ubuntu 18.04 me Kernel 4.15
- ʻO kekahi o kēia mau simulators:
— 64-bit Synopsys* VCS-MX-2016.06-SP2-1 RTL Simulator
— 64-bit Mentor Graphics* Modelsim SE Simulator (Version 10.5c)
— 64-bit Mentor Graphics QuestaSim Simulator (Version 10.5c) - C compiler: GCC 4.7.0 a i ʻole
- CMake: mana 2.8.12 a i ʻole
- GNU C Library: version 2.17 a i ʻole
- Python: mana 2.7
- Manao polokalamu polokalamu Intel Quartus® Prime Pro Edition 19.2 (1)
Hoʻonohonoho i ke Kaiapuni
Pono ʻoe e hoʻonohonoho i kāu kaiapuni simulation a hoʻokomo i ka polokalamu OPAE ma mua o ka holo ʻana i ka ASE.
- E hoʻonoho i kēia mau ʻano hoʻololi kaiapuni no kāu polokalamu hoʻohālikelike:
• No VCS:
$ export VCS_HOME=
$ export PATH=$VCS_HOME/bin:$PATH
ʻO ka ʻōnaehana papa kuhikuhi VCS penei:
E hōʻoia i kāu polokalamu he laikini VCS kūpono.
• No Modelsim SE/QuestaSim:
$ export MTI_HOME=
$ export PATH=$MTI_HOME/linux_x86_64/:$MTI_HOME/bin/:$PATH
ʻO ka hoʻonohonoho papa kuhikuhi hoʻonohonoho Modelsim/Questa penei:
E hōʻoia i kāu polokalamu he laikini Modelsim SE/QuestaSim kūpono.
• No Intel Quartus Prime Pro Edition:
$ export QUARTUS_HOME=
ʻO ka papa kuhikuhi papa kuhikuhi Intel Quartus Prime penei:
E hoʻohui i ka mea hoʻololi kaiapuni e nānā i ka laikini Modelsim:
$ lawe aku iā MGLS_LICENSE_FILE= - Hoʻokuʻu aku:
$ export LM_LICENSE_FILE= - Wehe i ka waihona manawa holo file, a hoʻokomo i nā hale waihona puke OPAE, nā binaries, me files, a me nā hale waihona puke ASE e like me ia i wehewehe ʻia ma ka ʻāpana: Ke hoʻokomo ʻana i ka Pūʻulu Pūnaehana OPAE i ka Intel Acceleration Stack Quick Start User Guide no kāu Intel FPGA PAC.
Pono e hoʻonohonoho pono ʻia kou wahi e hoʻonohonoho a kūkulu i kahi AFU. Pono ʻoe e hoʻokomo pono i ka OPAE Software Development Kit (SDK). Pono nā palapala OPAE SDK ma PATH a komo pū files a me nā hale waihona puke pono e loaʻa i ka C compiler. Eia hou, pono ʻoe e hōʻoia ua hoʻonohonoho ʻia ka ʻano hoʻololi kaiapuni OPAE_PLATFORM_ROOT. E nānā i ka hoʻokomo ʻana i ka pūʻolo lako polokalamu OPAE no ka ʻike hou aku.
E hōʻoia i ka hoʻokomo pono ʻana o OPAE SDK a me ASE, i loko o kahi pūpū, e hōʻoia i kāu PATH me afu_sim_setup. Pono ka afu_sim_setup ma ka papa kuhikuhi /usr/bin a i ʻole inā ʻoe i kūkulu i ka OPAE mai ke kumu files.
ʻIke pili
- ʻO Intel Accelerator Functional Unit (AFU) Simulation Environment (ASE) alakaʻi hoʻohana
- Ke hoʻokomo nei i ka pūʻolo lako polokalamu OPAE
No Intel PAC me Intel Arria 10 GX FPGA. - Ke hoʻokomo nei i ka pūʻolo lako polokalamu OPAE No Intel FPGA PAC D5005.
Hoʻohālike i ka hello_afu ma ke ʻano Client-Server Mode
ʻO hello_afu example he la'ana AFU ma'alahi e hō'ike ana i ke kikowaena CCI-P mua. Hoʻopiha ka RTL i nā koi liʻiliʻi o kahi AFU, e pane ana i ka heluhelu I/O i hoʻomanaʻo ʻia e hoʻihoʻi i ke poʻomanaʻo hiʻohiʻona a me ka UUID o ka AFU.
Kiʻi 1. hello_afu Directory Tree
Nānā:
Ke hoʻohana nei kēia palapalaample> e kuhikuhi i kahi exampka papa kuhikuhi hoʻolālā, e like me hello_afu ma ke kiʻi ma luna.
Hōʻike ka polokalamu i nā koi liʻiliʻi e hoʻopili i kahi FPGA me ka hoʻohana ʻana i ka OPAE. Hōʻike ka RTL i nā koi liʻiliʻi e hoʻokō i ka mea hoʻokele OPAE a me ka hello_afu example lako polokalamu.
filehōʻike ʻo list.txt i ka files no ka hoʻohālikelike RTL a me ka synthesis.
No ka hoʻonohonoho pono a kūkulu ʻana i nā s AFUamppono, e ho'onohonoho pono 'ia kou kaiapuni, e like me ka mea i wehewehe 'ia ma ka Setting Up the Environment.
ʻIke pili
- ʻO Intel Accelerator Functional Unit (AFU) Simulation Environment (ASE) alakaʻi hoʻohana
- Hoʻonohonoho i ka Environment ma ka ʻaoʻao 5
Ke kūkulu nei i nā AFU me ka OPAE SDK
Ma ka Accelerator Functional Unit (AFU) Developer's Guide
4.1. ʻO ka hoʻohālikelike ma ke ʻano Client-Server Mode
ʻO ka example flow hoʻolauna i nā palapala ASE kumu. Hiki iā ʻoe ke hoʻohālike i nā examples me ka ASE, koe wale eth_e2e_e10 a me eth_e2e_e40.
Pono ka simulation i ʻelua kaʻina polokalamu: hoʻokahi kaʻina no ka simulation RTL a me kahi kaʻina lua e holo i ka polokalamu pili. No ke kūkulu ʻana i kahi kaiapuni simulation RTL, e holo i kēia ma $OPAE_PLATFORM_ROOT/hw/samples/hello_afu:
$ afu_sim_setup –kumu hw/rtl/filelist.txt build_sim
Hoʻokumu kēia kauoha i kahi kaiapuni ASE ma ka subdirectory build_sim.
No ke kūkulu ʻana a holo i ka simulator:
$ cd build_sim
$ hana
$ hana sim
Paʻi ka simulator i kahi leka ua mākaukau no ka hoʻohālikelike. Paʻi pū ʻo ia i kahi memo e koi ana iā ʻoe e hoʻonohonoho i ka hoʻololi kaiapuni ASE_WORKDIR.
E wehe i kekahi pūpū no ka hoʻohālikelike polokalamu. Pono ʻoe e hōʻoia i ka hoʻonohonoho ʻana i ka loli kaiapuni OPAE_PLATFORM_ROOT.
No ke kūkulu ʻana a hoʻokele i ka polokalamu ma ka pūpū hou:
$ cd $OPAE_PLATFORM_ROOT
$ export ASE_WORKDIR=$OPAE_PLATFORM_ROOT/hw/samples/hello_afu/build_sim/work
$ cd $OPAE_PLATFORM_ROOT/hw/samples/hello_afu/sw
$ hoomaemae
$ hana USE_ASE=1
$ ./hello_afu
Nānā:
He ʻokoʻa paha ka inoa ala kikoʻī no ASE_WORKDIR. E hoʻohana i ka inoa ala i hāʻawi ʻia e ka ʻōkuhi simulator.
Holo ka polokalamu a me ka simulator, hoʻopaʻa inoa i nā kālepa, a puka i waho.
4.1.1. Moʻolelo hoʻohālikelike Files
Mālama ka papa kuhikuhi hana simulation i ka nalu, nā hana CCI-P, a me ka log simulation files.
E hoʻopau i nā ʻanuʻu aʻe e view ka ʻikepili puka nalu:
- E hoʻololi i ka papa kuhikuhi āu i hoʻokō ai i ke kauoha make sim.
- ʻAno:
$ hana nalu
Hoʻopuka ke kauoha make wave i ke ʻano nalu viewē.
4.1.2. Hoʻolaha Hoʻolālā
ʻO kēia mau mea file a me nā papa kuhikuhi e wehewehe i ka AFU simulation:
- $OPAE_PLATFORM_ROOT/hw/samples/ample>/hw/rtl/filehōʻike ʻo list.txt i nā kumu RTL.
- <AFU example> ka example papa kuhikuhi e like me ka mea i hōʻike ʻia ma ke kiʻi hello_afu Directory Tree.
- filepapa inoa list.txt SystemVerilog, VHDL, a me ka AFU JavaScript Object Notation (.json) file.
- Hōʻike ka AFU .json i nā pilina e pono ai ka AFU. Aia pū kekahi UUID e ʻike i ka AFU i hoʻoiho ʻia i kahi FPGA.
- Ua wehewehe ʻo hw/rtl/hello_afu.json i ka ccip_std_afu ma ke ʻano he kikowaena kiʻekiʻe ma o ka hoʻonohonoho ʻana i ka afu-top-interface i ccip_std_afu. ʻO ccip_std_afu ka waihona CCI-P kumu me nā uaki, hoʻonohonoho hou, a me nā hale CCI-P TX a me RX. ʻOi aʻe examples e wehewehe i nā koho interface ʻē aʻe.
- ʻO ka .json file hai aku i ka AFU UUID. Hoʻokumu ka palapala OPAE i ka UUID. Hoʻouka ka RTL i ka UUID mai afu_json_info.vh.
- sw/Makefile hana afu_json_info.h. Hoʻouka ka polokalamu i ka UUID mai afu_json_info.h.
4.1.3. Hoʻoponopono pilikia i ka hoʻohālikelike ʻana i nā mea kūʻai aku
Inā hāʻule ke kauoha afu_sim_setup, e hōʻoia i kēia:
- Aia ʻo afu_sim_setup ma kāu PATH. Pono ʻo afu_sim_setup ma /usr/bin a i ʻole inā ʻoe i kūkulu i ka OPAE mai ke kumu files.
- Loaʻa iā ʻoe ka Python version 2.7 a i ʻole i hoʻokomo ʻia.
Inā ʻaʻole hiki iā ʻoe ke kūkulu a hoʻokō i ka simulator, ʻaʻole paha ʻoe i hoʻokomo pono i kāu hāmeʻa simulation RTL.
Ke ho'āʻo nei ʻoe e kūkulu a holo i ka polokalamu, inā ʻike ʻoe i kahi memo "Error enumerating AFCs", ua haʻalele ʻoe i ka hoʻonohonoho ʻana USE_ASE=1 ma ka laina kauoha make. Ke ʻimi nei ka polokalamu i kahi mea FPGA kino. No ka ho'ōla hou, e hana hou i nā ʻanuʻu mai ke kauoha make clean.
AFU Examples
Papa 2.
AFU Examples
ʻO kēlā me kēia AFU exampAia kekahi README kiko'ī file, hāʻawi i kahi wehewehe hana a me nā memo e pili ana i ka hoʻohālikelike ʻana i ka hoʻolālā. No ka hoʻomaopopo piha ʻana i ke kaʻina hana simulation, review ka README file i kēlā me kēia AFU example.
| AFU | wehewehe | |
| aloha_mem_afu | hello_mem_afu hōʻike i kahi AFU e kūkulu ana i kahi mīkini mokuʻāina maʻalahi e komo i ka hoʻomanaʻo. Hiki i ka mīkini moku'āina ke komo i kekahi mau hiʻohiʻona i ka hoʻomanaʻo kūloko i pili pono i nā pine FPGA, e like me DDR4 DIMMs. He ʻokoʻa kēia hoʻomanaʻo mai ka hoʻomanaʻo hoʻokipa i loaʻa ma luna o CCI-P. Hoʻokele ka mea hoʻokipa i ka mīkini mokuʻāina hello_mem_afu me ka hoʻohana ʻana i nā noi I/O (MMIO) i hoʻomanaʻo ʻia e hoʻomalu a me nā papa inoa kūlana (CSRs). | |
| aloha_intr_afu | hello_intr_afu e hōʻike ana i ka hiʻohiʻona keʻakeʻa noi ma ka ASE. | |
| DMA a f1.1 (2) _ | hōʻike ʻo dma_afu i kahi DMA Basic Building Block no ka mea hoʻokipa iā FPGA, FPGA i hoʻokipa, a me FPGA i FPGA hoʻololi hoʻomanaʻo. I ka hoʻohālikelike ʻana i kēia AFU, liʻiliʻi ka nui buffer i hoʻohana ʻia no ka hoʻoili DMA e mālama pono i ka manawa simulation. No ka 'ike hou aku, e nānā i ka DMA Accelerator Functional Unit (AFU) User Guide. | |
| nlb_mode_O | ʻO nlb_mode_O kahi ʻōnaehana CCI-P e hōʻike ana i ka hoʻāʻo kope hoʻomanaʻo. $0PAE_PLATFORM_ROOT/ sw/opae—cre/ease helu>/sample/hello_fpga . c komo pū me nlb_mode_0. | |
| $ sh regress.sh -a -r rtl_sim -s < vcslmodelsimlquesta > [-i ) -b |
||
| streaming_dma | hōʻike ʻo streaming_dma i ka hoʻoili ʻana i ka ʻikepili ma waena o ka hoʻomanaʻo hoʻokipa a me kahi awa streaming FPGA. No ka ʻike hou aku, e nānā i ka Streaming DMA Accelerator Functional Unit (AFU) User Guide. | |
| aloha_afu | Hel lo_a fu he AFU maʻalahi e hōʻike ana i ke kikowaena CCI-P mua. Hoʻopiha ka RTL i nā koi liʻiliʻi loa o kahi AFU, e pane ana i ka MMIO heluhelu e hoʻihoʻi i ke poʻomanaʻo hiʻohiʻona a me ka UUID o ka AFU. | |
ʻIke pili
- DMA Accelerator Functional Unit (AFU) alakaʻi hoʻohana
No ka ʻike e pili ana i ka hoʻohui ʻana a me ka hoʻokō ʻana i ka dma_afu ma kāu Intel PAC me Intel Arria 10 GX FPGA. - Kahea ana i ka DMA Accelerator Functional Unit (AFU).
No ka ʻike e pili ana i ka hoʻohui ʻana a me ka hoʻokō ʻana i ka streaming_dma_afu ma kāu Intel PAC me Intel Arria 10 GX FPGA. - DMA Accelerator Functional Unit Guide Guide: Intel FPGA Programmable Acceleration Card D5005
No ka ʻike e pili ana i ka hoʻohui ʻana a me ka hoʻokō ʻana i ka dma_afu ma kāu Intel FPGA PAC D5005. - Ke hoʻoheheʻe nei i ka DMA Accelerator Functional Unit Guide Guide: Intel FPGA Programmable Acceleration Card D5005
No ka ʻike e pili ana i ka hoʻohui ʻana a me ka hoʻokō ʻana i ka dma_afu ma kāu Intel FPGA PAC D5005.
Hoʻoponopono pilikia
Inā ʻike ʻia kēia hewa i ka wā o ka simulation, e hoʻoponopono iā ia ma ka hahai ʻana i nā ʻanuʻu ma lalo.
Memo Hapa
# [SIM] Ke holo nei paha kahi hihia ASE i ka papa kuhikuhi o kēia manawa!
# [SIM] Nānā no PID 28816
# [SIM] E puka ana ka simulation… hiki iā ʻoe ke hoʻohana i kahi SIGKILL e pepehi i ke kaʻina hana simulation.
# [SIM] E nānā pū inā .ase_ready.pid file wehe ʻia ma mua o ka hana ʻana. Hoʻoholo
- Kākau pepehi ase_simv e pepehi i nā kaʻina hana simulation zombie a wehe i kekahi manawa files haʻalele ʻia e nā kaʻina hana simulation hāʻule ʻole a i ʻole nā laka.
- Holoi i ka .ase_ready.pid file, loaʻa ma ka papa kuhikuhi $ASE_WORKDIR.
Nā waihona alakaʻi alakaʻi o ASE
| Manaʻo Intel Acceleration Stack | Ke alakaʻi hoʻohana |
| 2.0 | ʻO Intel Accelerator Functional Unit (AFU) Simulation Environment (ASE) alakaʻi hoʻohana wikiwiki |
| 1. | ʻO Intel Accelerator Functional Unit (AFU) Simulation Environment (ASE) alakaʻi hoʻohana wikiwiki |
| 1. | ʻO Intel Accelerator Functional Unit (AFU) Simulation Environment (ASE) alakaʻi hoʻohana wikiwiki |
| 1.0 | ʻO Intel Accelerator Functional Unit (AFU) Simulation Environment (ASE) alakaʻi hoʻohana wikiwiki |
Moʻolelo Hoʻoponopono Hou no ASE Hoʻomaka Hoʻomaka Mea Hoʻohana
| Palapala Palapala | Manaʻo Intel Acceleration Stack | Nā hoʻololi |
| 2020.03.06 | 1.2.1 a me 2.0.1 | Ua hōʻano hou ʻia kēia mau mea: • Pono Pūnaewele |
| 2019.08.05 | 2.0 | • Hoʻohou i ka mana Intel Quartus Prime Pro Edition ma nā Koina Pūnaewele. • Hoʻohui i ka hello_afu ma AFU Examples. • Wehe ʻia ka ʻike e pili ana i ka hoʻohālikelike ʻana i ke ʻano regression. • Hoʻohui i kahi ʻāpana hou: ASE Quick Start User Guide Archives. |
| 2018.12.04 | 1. | Hoʻohui ʻia ke kākoʻo ʻo Ubuntu. |
| 2018.08.06 | 1. | Hoʻohou i nā koi ʻōnaehana, ka hoʻonohonoho papa kuhikuhi, a me nā mea pili fileinoa. |
| 2018.04.10 | 1.0 | Hoʻokuʻu mua. |
683200 | 2020.03.06
Hoʻouna Manaʻo
Palapala / Punawai
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intel Accelerator Functional Unit Simulation Environment Software [pdf] Ke alakaʻi hoʻohana ʻĀpana Hana ʻĀpana, Pūnaehana Kaiapuni Simulation, Pūnaehana Hana ʻĀpana ʻĀpana Hoʻohālikelike, Pūnaehana, Pūnaehana Pūnaewele Hoʻohālikelike |
