DIGILENT Anvyl FPGA

Bayanin samfur

Hukumar AnvylTM FPGA babban kwamiti ne na dabaru wanda aka inganta don amfani tare da Spartan-6 LX45 FPGA. Yana ba da fasali daban-daban ciki har da yanka 6,822, 2.1Mbits na RAM mai sauri, fale-falen agogo tare da DCMs da PLLs, yankan DSP, da saurin agogo na 500MHz+. Hakanan hukumar ta zo tare da cikakkiyar tarin tallafin IP da ƙirar ƙira, da kuma babban tarin allunan ƙarawa da ake samu akan Digilent. website.

Siffofin Hukumar AnvylTM FPGA sun haɗa da zaɓuɓɓukan daidaitawa na FPGA, buƙatun samar da wutar lantarki, da dacewa da Tsarin Adept don sauƙaƙe shirye-shirye.

Tsarin FPGA:
Kwamitin Anvyl yana da madaidaicin yanayin kan jirgin (JP2) wanda ke ba ka damar zaɓar tsakanin JTAG/ Kebul da ROM tsarin shirye-shirye. Idan JP2 ba a loda shi ba, FPGA za ta daidaita kanta ta atomatik daga ROM. Idan an ɗora JP2, FPGA zai kasance mara amfani bayan kunnawa har sai an saita shi daga J.TAG ko Serial Programming port (USB memory stick).

Dukansu Digilent da Xilinx suna ba da software don tsara FPGA da SPI ROM. Shirye-shirye files ana adana su a cikin FPGA a cikin ƙwayoyin ƙwaƙwalwar ajiyar tushen SRAM. Wannan bayanan yana ayyana ayyukan tunani na FPGA da haɗin da'ira kuma yana ci gaba da aiki har sai an goge shi ta hanyar cire wuta, tabbatar da shigarwar PROG_B, ko sabon saitin an sake rubuta shi. file.

Hakanan za'a iya tsara FPGA daga tsarin ƙwaƙwalwar FAT wanda aka tsara zuwa tashar USB-HID HOST (J14) idan sandar ta ƙunshi saitin .bit guda ɗaya. file a cikin tushen directory, JP2 an ɗora Kwatancen, kuma ana yin hawan keke. FPGA za ta yi watsi da kowane .bit ta atomatik files waɗanda ba a gina su don FPGA mai dacewa ba.

Kayayyakin Wutar Lantarki:
Kwamitin Anvyl yana buƙatar 5V na waje, 4A ko mafi girma tushen wutar lantarki tare da tabbataccen cibiyar, filogin coax diamita na 2.1mm na ciki. Ana samar da wutar lantarki mai dacewa a matsayin wani ɓangare na kayan aikin Anvyl. Voltage da'irori mai sarrafawa daga na'urorin Analog suna ƙirƙirar abubuwan da ake buƙata na 3.3V, 1.8V, da 1.2V daga babban wadatar 5V. LED mai kyau mai ƙarfi (LD19) yana nuna cewa duk kayayyaki suna aiki akai-akai.

Hanyoyin wutar lantarki daban-daban a kan jirgi suna ba da wutar lantarki zuwa sassa daban-daban kamar masu haɗin USB-HID, TFT mai kula da fuska, HDMI, mai haɗawa na fadadawa, SRAM, Ethernet PHY I / O, masu kula da USB-HID, FPGA I / O, oscillators, SPI Flash , Audio Codec, TFT nuni, OLED nuni, GPIO, da Pmods.

Tsarin yarda:
Adept tsarin software ne wanda ke ba da sauƙi mai sauƙi don tsara allon Anvyl. Don tsara allon Anvyl ta amfani da Adept, kuna buƙatar saita allon kuma fara software.

Umarnin Amfani da samfur

1. Tabbatar cewa an kashe allon Anvyl.
2. Idan kana son saita FPGA daga ROM, tabbatar da cewa ba a ɗora nauyin jumper na kan-board (JP2). Idan kuna son saita FPGA daga JTAG ko USB, load JP2.
3. Idan kana so ka tsara FPGA daga ma'adanin ƙwaƙwalwar ajiya, tabbatar cewa an tsara shi FAT kuma ya ƙunshi tsarin .bit guda ɗaya. filea cikin tushen directory.
4. Haɗa wutar lantarki ta waje tare da tabbataccen cibiyar, 2.1mminternal diamita coax plug don samar da 5V, 4A ko mafi girma tushen wutar lantarki.
5. Da zarar an haɗa wutar lantarki, LED mai kyau mai ƙarfi (LD19) yakamata ya nuna cewa duk kayayyaki suna aiki akai-akai.
6. Idan kuna amfani da tsarin Adept don shirye-shirye, saita allon Anvyl kuma fara software bisa ga takaddun Adept.
7. Bi takamaiman umarnin shirye-shirye da Digilent ko Xilinx suka bayar don tsara FPGA ta amfani da JTAG, USB, ko hanyoyin ROM.
8. Koma zuwa ƙarin takardu da albarkatun da ke akwai akan Digilent webshafin don ƙarin bayani kan amfani da fasalin hukumar da dacewa tare da allunan ƙarawa.

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Dandali na ci gaban Anvyl FPGA cikakke ne, shirye-shiryen dandali na ci gaban da'ira na dijital wanda ya dogara da matakin saurin -3 Xilinx Spartan-6 LX45 FPGA. Babban FPGA, tare da 100-mbps Ethernet, HDMI Video, 128MB DDR2 ƙwaƙwalwar ajiya, 4.3 ″ LED backlit LCD touchscreen, 128 × 32 pixel OLED nuni, 630 taye-point breadboard, mahara USB HID masu kula, da kuma I2S audio codec, sa Anvyl kyakkyawan dandali don tashar koyo na FPGA mai iya tallafawa ƙirar ƙirar ƙirar ƙira dangane da Xilinx's MicroBlaze. Anvyl ya dace da duk kayan aikin Xilinx CAD, gami da ChipScope, EDK, da ISE kyauta. WebPACK™, don haka ana iya kammala ƙira ba tare da ƙarin farashi ba. Girman allon shine 27.5cm x 21cm.

An inganta Spartan-6 LX45 don ingantaccen dabaru da tayi:

• Yankuna 6,822, kowanne yana ɗauke da shigar LUTs guda huɗu da flip-flops guda takwas
• 2.1Mbits na saurin toshe RAM
• tayal agogo hudu (DCM takwas & PLLs hudu)
• 58 DSP guda
• Gudun agogo 500MHz+

Cikakken tarin tallafin allo na IP da ƙirar ƙira, da babban tarin allunan ƙarawa suna samuwa akan Digilent website. Duba shafin Anvyl a www.digilentinc.com don ƙarin bayani.

Siffofin sun haɗa da:

• Spartan6-LX45 FPGA：XC6SLX45-CSG484-3
• 128MB DDR2 SDRAM
• 2MB SRAM
• 16MB QSPI FLASH don daidaitawa da adana bayanai
• 10/100 Ethernet PHY
• HDMI Video Fitar
• 12-bit VGA tashar jiragen ruwa
• 4.3 ″ fadi-tsayi m launi LED backlit LCD allon
• 128×32 pixel 0.9" WiseChip/Univision UG-23832HSWEG04 OLED nunin nunin hoto
• nunin LED mai lamba biyu Segment Segment
• I2S Audio codec tare da layi-in, layi-fita, mic, da lasifikan kai
• 100 MHz Crystal Oscillator
• tashoshin USB2 na kan jirgi don shirye-shirye da na'urorin USB-HID (na linzamin kwamfuta/keyboard)
• USB-JTAG kewayawa tare da aikin USB-UART
• faifan maɓalli mai maɓallai masu lamba 16 (0-F)
• GPIO: 14 LEDs (10 ja, 2 rawaya, 2 kore), 8 slides switches, 8 DIP masu sauyawa a cikin ƙungiyoyi 2 da maɓallan turawa 4
• allon burodi tare da 10 Digital I/O's
• 32 I/O's sun kori zuwa mai haɗin haɓaka mai 40 (ana raba I/O tare da tashoshin Pmod)
• bakwai 12-pin Pmod tashar jiragen ruwa tare da 56 I/O's duka
• jiragen ruwa tare da wutar lantarki 20W da kebul na USB

Kanfigareshan FPGA

Bayan an kunna, FPGA a kan allon Anvyl dole ne a daidaita shi (ko tsara shi) kafin ya iya yin kowane aiki. Ana iya saita FPGA ta hanyoyi uku: PC na iya amfani da Digilent USB-JTAG circuitry (tashar jiragen ruwa J12, mai lakabin "PROG") don tsara FPGA kowane lokacin da aka kunna, daidaitawa. file Ajiye a cikin SPI Flash ROM na kan jirgin ana iya canjawa wuri ta atomatik zuwa FPGA a kunna wuta, ko shirye-shirye file za a iya canjawa wuri daga ƙwaƙwalwar ajiyar USB zuwa tashar USB HID mai lakabin "Mai watsa shiri" (J14).
Yanayin kan jirgi (JP2) yana zaɓar tsakanin JTAG/ Kebul da ROM tsarin shirye-shirye. Idan JP2 ba a loda shi ba, FPGA za ta daidaita kanta ta atomatik daga ROM. Idan an ɗora JP2, FPGA zai kasance mara amfani bayan kunnawa har sai an saita shi daga J.TAG ko Serial Programming port (USB memory stick).
Dukansu Digilent da Xilinx suna rarraba software kyauta waɗanda za a iya amfani da su don tsara FPGA da SPI ROM. Shirye-shirye files ana adana su a cikin FPGA a cikin ƙwayoyin ƙwaƙwalwar ajiyar tushen SRAM. Wannan bayanan yana bayyana ayyukan tunani da haɗin gwiwar FPGA, kuma yana ci gaba da aiki har sai an goge shi ta hanyar cire wuta, tabbatar da shigarwar PROG_B, ko har sai an sake rubuta shi da sabon tsari. file.
Tsarin FPGA filean canza shi ta hanyar JTAG tashar jiragen ruwa kuma daga sandar USB yi amfani da .bit file nau'in, da kuma shirye-shiryen SPI files amfani da .mcs file nau'in. Xilinx's ISE WebKunshin da software na EDK na iya ƙirƙirar .bit files daga VHDL, Verilog, ko tushen tushen tsari files (Ana amfani da EDK don ƙirar ƙirar ƙira ta MicroBlaze™). Sau ɗaya a .bit file An ƙirƙira, ana iya tsara FPGA na Anvyl tare da shi akan USB-JTAG circuitry (tashar jiragen ruwa J12) ta amfani da software na Adept na Digilent ko software na iMPACT na Xilinx. Don samar da .mcs file daga a .bit file, yi amfani da PROM File Kayan aikin janareta a cikin software na Xilinx's iMPACT. .mcs file Ana iya tsara shi zuwa SPI Flash ta amfani da iMPACT.

Hakanan za'a iya tsara FPGA daga tsarin ƙwaƙwalwar FAT wanda aka tsara zuwa tashar USB-HID HOST (J14) idan sandar ta ƙunshi saitin .bit guda ɗaya. file a cikin tushen directory, JP2 an ɗora Kwatancen, kuma ana yin hawan keke. FPGA za ta yi watsi da kowane .bit ta atomatik files waɗanda ba a gina su don FPGA mai dacewa ba.

Kayayyakin Wutar Lantarki

Kwamitin Anvyl yana buƙatar 5V na waje, 4A ko mafi girma tushen wutar lantarki tare da tabbataccen cibiyar, 2.1mm diamita na coax filogi (ana samar da wadatar da ta dace azaman ɓangaren kayan Anvyl). Voltage da'irori mai sarrafawa daga na'urorin Analog suna ƙirƙirar abubuwan da ake buƙata na 3.3V, 1.8V da 1.2V daga babban wadatar 5V. LED mai kyau mai ƙarfi (LD19), wanda aka yi amfani da shi ta hanyar waya KO na duk abubuwan da aka samar da wutar lantarki akan kayayyaki, yana nuna cewa duk kayayyaki suna aiki akai-akai. Na'urori masu zuwa suna nan akan kowane dogo:

• 5V: masu haɗin USB-HID, TFT mai kula da allon taɓawa, HDMI, da mai haɗa haɓakawa
• 3.3V: SRAM, Ethernet PHY I/O, USB-HID masu kula, FPGA I/O, oscillators, SPI Flash, Audio Codec, TFT nuni, OLED nuni, GPIO, Pmods, da kuma fadada haši.
• 1.8V: DDR2, USB-JTAG/USB-UART mai sarrafawa, FPGA I/O, da GPIO
• 1.2V: FPGA core da Ethernet PHY core

Tsarin Adept
Adept yana da ƙayyadaddun yanayin daidaitawa. Don tsara allon Anvyl ta amfani da Adept, fara saita allon kuma fara software:

• toshe kuma haɗa wutar lantarki
• toshe kebul na USB zuwa PC kuma zuwa tashar USB PROG akan allo
• fara software na Adept
• kunna wutar lantarki ta Anvyl
• jira FPGA da za a gane

Yi amfani da aikin bincike don haɗa .bit da ake so file tare da FPGA, kuma danna maɓallin Shirin. Tsarin tsari file za a aika zuwa FPGA, kuma akwatin maganganu zai nuna ko shirye-shiryen ya yi nasara. Tsarin “anyi” LED zai haskaka bayan an daidaita FPGA cikin nasara. Kafin fara jerin shirye-shirye, Adept yana tabbatar da cewa kowane tsarin da aka zaɓa files sun ƙunshi daidai lambar ID na FPGA - wannan yana hana kuskure .bit files daga aika zuwa FPGA. Baya ga mashigin kewayawa da lilo da maɓallan shirye-shirye, ƙayyadaddun ƙayyadaddun ƙayyadaddun ƙayyadaddun ƙayyadaddun ƙayyadaddun ƙayyadaddun tsarin ke ba da maɓallin Fara Sarkar, taga na'ura wasan bidiyo, da sandar matsayi. Maɓallin Sarkar farawa yana da amfani idan an katse sadarwar USB tare da allo. Tagan na'ura wasan bidiyo yana nuna halin yanzu, kuma ma'aunin matsayi yana nuna ci gaba na ainihin lokacin lokacin zazzage tsari file.

DDR2 Ƙwaƙwalwar ajiya
Ana fitar da guntu ƙwaƙwalwar ajiya na 1Gbit DDR2 daga toshe mai sarrafa ƙwaƙwalwar ajiya a cikin Spartan-6 FGPA. Na'urar DDR2, MT47H64M16HR-25E ko makamancin haka, tana ba da bas mai-bit 16 da wurare 64M. An gwada hukumar Anvyl don aikin DDR2 akan adadin bayanai na 800MHz. Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwaƙwalwa na Xilinx (MIG) ya yi. Mai dubawa yana goyan bayan siginar SSTL2, kuma duk adireshi, bayanai, agogo, da sigina na sarrafawa sun dace da jinkiri kuma ana sarrafa impedance. An samar da nau'ikan siginar agogon agogon DDR18 guda biyu masu dacewa don haka za'a iya fitar da DDR tare da ƙananan agogon skew daga FPGA.

Flash Memory
Kwamitin Anvyl yana amfani da na'urar ƙwaƙwalwar ajiya mai lamba 128Mbit Numonyx N25Q128 Serial flash memory (wanda aka tsara shi azaman 16Mbit ta 8) don ajiyar FPGA mara ƙarfi. files. Ana iya tsara SPI Flash tare da .mcs file amfani da iMPACT software. Tsarin FPGA file yana buƙatar ƙasa da 12Mbits, barin 116Mbits akwai don bayanan mai amfani. Ana iya canja wurin bayanai zuwa kuma daga PC zuwa/daga na'urar filasha ta aikace-aikacen mai amfani, ko ta wuraren da aka gina a cikin iMPACT PROM file software tsara. Ƙirar mai amfani da aka tsara a cikin FPGA kuma na iya canja wurin bayanai zuwa kuma daga filasha.
Ana ɗora nauyin gwajin allo/tsarin nuni a cikin SPI Flash yayin ƙira.

Ethernet PHY
Kwamitin Anvyl ya ƙunshi SMSC 10/100 mbps PHY (LAN8720A-CP-TR) wanda aka haɗa tare da mai haɗin Halo HFJ11-2450E RJ-45. An haɗa PHY zuwa FPGA ta amfani da saitin RMII. An saita shi don yin booting cikin yanayin "Duk Mai Iyawa, tare da Canjin Tattaunawa ta atomatik" akan kunnawa. Takardar bayanan SMSC PHY yana samuwa daga SMSC website.

HDMI fitarwa
Allon Anvyl yana ƙunshe da tashar fitarwa ta HDMI guda ɗaya wacce ba a bugu ba. Tashar jiragen ruwa mara buffer tana amfani da mai haɗa nau'in HDMI. Tunda tsarin HDMI da DVI suna amfani da daidaitattun siginar TMDS iri ɗaya, ana iya amfani da adaftar mai sauƙi (samuwa a yawancin shagunan lantarki) don fitar da mai haɗin DVI daga tashar fitarwa ta HDMI. Mai haɗin HDMI bai haɗa da sigina na VGA ba, don haka nunin analog ba zai iya tuƙi ba.
Masu haɗin haɗin HDMI 19-pin sun haɗa da tashoshi na bayanai daban-daban guda huɗu, haɗin GND guda biyar, bas ɗin masu amfani da wutar lantarki mai waya ɗaya (CEC), bas ɗin bas ɗin Nuni na Waya mai waya biyu (DDC) wanda shine ainihin bas ɗin I2C, Gano mai zafi mai zafi. Sigina (HPD), siginar 5V mai iya isar da har zuwa 50mA, da kuma fil ɗin da aka tanada (RES). Daga cikin waɗannan, tashoshin bayanai na banbanta, bas na I2C, da CEC ana haɗa su zuwa FPGA.

VGA
Anvyl yana ba da 12bit VGA dubawa wanda ke ba da damar har zuwa launuka 4096 da aka nuna akan daidaitaccen VGA Monitor. Madaidaitan siginar VGA guda biyar Red, Green, Blue, Horizontal Sync (HS), da Vertical Sync (VS) ana tura su kai tsaye daga FPGA zuwa mai haɗin VGA. Akwai sigina guda huɗu da aka ƙaddamar daga FPGA don kowane daidaitaccen siginar launi na VGA wanda ke haifar da tsarin bidiyo wanda zai iya samar da launuka 4,096. Kowane ɗayan waɗannan sigina yana da jerin resistor waɗanda idan aka haɗa su a cikin da'ira, suna samar da mai rarrabawa tare da juriya na 75-ohm na nunin VGA. Waɗannan ƙananan da'irori suna tabbatar da cewa siginar bidiyo ba za su iya wuce iyakar ƙayyadaddun VGA batage, kuma yana haifar da sigina masu launi waɗanda ko dai suna kan (.7V), cikakke a kashe (0V) ko kuma wani wuri tsakanin.

Hoto 2. VGA dubawa.

 

Hoto 3. HD DB-15 mai haɗawa, tsarin rami na PCB, ayyukan fil, da taswirar siginar launi.

Ana amfani da nunin VGA na tushen CRT ampƘwayoyin lantarki masu motsi masu motsi (ko cathode rays) don nuna bayanai akan allo mai rufin phosphor. Nunin LCD suna amfani da tsararrun maɓalli waɗanda zasu iya sanya voltage cikin ƙaramin adadin kristal na ruwa, ta haka yana canza izinin haske ta hanyar kristal akan tushen pixel-by-pixel. Kodayake bayanin mai zuwa yana iyakance ga nunin CRT, nunin LCD sun samo asali don amfani da lokutan sigina iri ɗaya kamar nunin CRT (don haka tattaunawar “sigina” da ke ƙasa ta shafi duka CRTs da LCDs). Nunin CRT masu launi suna amfani da katako na lantarki guda uku (ɗaya don ja, ɗaya don shuɗi, ɗaya don kore) don ƙarfafa phosphor wanda ke rufe gefen nunin ƙarshen bututun ray na cathode (duba siffa 1). Ƙwayoyin lantarki suna fitowa daga “bindigu na lantarki”, waxanda suke da filaye masu zafi masu zafi da aka sanya su kusa da farantin annular mai inganci da ake kira “grid”. Ƙarfin wutar lantarki da grid ya sanya shi yana jan haskoki na electrons masu kuzari daga cathodes, kuma waɗannan haskoki suna ciyar da su ta hanyar halin yanzu da ke gudana a cikin cathodes. Wadannan haskoki da aka fara haɓakawa zuwa ga grid, amma ba da daɗewa ba za su faɗi ƙarƙashin rinjayar ƙarfin lantarki mafi girma wanda ke haifar da duk yanayin nunin phosphor mai rufi na CRT ana cajin zuwa 20kV (ko fiye). Hasken hasken yana mayar da hankali ga haske mai kyau yayin da suke wucewa ta tsakiyar grid, sa'an nan kuma suna hanzarta yin tasiri a kan fuskar nunin phosphor mai rufi. Fuskar phosphor tana haskakawa sosai a wurin tasiri, kuma tana ci gaba da haskakawa na ɗaruruwan microse seconds bayan an cire katako. Mafi girma a halin yanzu ciyar a cikin cathode, da haske da phosphor zai haskaka.

Tsakanin grid da farfajiyar nuni, igiyar lantarki ta ratsa wuyan CRT inda igiyoyin waya biyu ke samar da filayen lantarki na orthogonal. Domin cathode haskoki sun hada da barbashi masu caji
(electrons), ana iya karkatar da su ta waɗannan filayen maganadisu. Ana ratsa igiyoyin igiyar ruwa na yanzu ta cikin coils don samar da filayen maganadisu waɗanda ke yin hulɗa tare da hasken cathode kuma su sa su juyar da farfajiyar nuni a cikin tsarin “raster”, a kwance daga hagu zuwa dama kuma a tsaye daga sama zuwa ƙasa. Kamar yadda cathode ray ke motsawa a saman nunin, ana iya ƙara ko rage yawan abin da aka aika zuwa ga bindigogin lantarki don canza hasken nuni a wurin tasirin tasirin cathode.

Lokacin Tsarin VGA
An kayyade lokutan siginar VGA, bugawa, haƙƙin mallaka da sayar da ƙungiyar VESA (www.vesa.org). Ana ba da bayanin lokacin tsarin VGA mai zuwa azaman tsohonampyadda za a iya fitar da mai duba VGA tare da ƙudurin 640 × 480. Don ƙarin cikakkun bayanai, ko don bayani kan wasu mitocin VGA, koma zuwa takaddun da ke akwai a VESA website.
Ana nuna bayanai ne kawai lokacin da katako ke motsawa "gaba" (hagu zuwa dama da sama zuwa kasa), kuma ba lokacin da aka sake saita katakon zuwa hagu ko saman gefen nuni ba. Yawancin yuwuwar lokacin nuni yana ɓacewa a cikin lokutan “blanking” lokacin da aka sake saita katako kuma an daidaita shi don fara sabon wucewar nuni a kwance ko a tsaye. Girman katako, mita da za a iya gano katako a cikin nunin, da kuma mitar da za a iya daidaita wutar lantarki ta ƙayyade ƙudurin nuni. Nuni VGA na zamani na iya ɗaukar kudurori daban-daban, kuma da'irar mai sarrafa VGA tana ƙaddamar da ƙuduri ta samar da sigina na lokaci don sarrafa tsarin raster. Dole ne mai sarrafawa ya samar da bugun jini na aiki tare a 3.3V (ko 5V) don saita mitar da halin yanzu ke gudana ta cikin coils na karkatarwa, kuma dole ne ya tabbatar da cewa an yi amfani da bayanan bidiyo akan bindigogin lantarki a daidai lokacin. Nunin bidiyo na Raster yana bayyana adadin “ layuka” waɗanda suka yi daidai da adadin wucewar kwance a kwance da cathode ya yi akan wurin nunin, da adadin “ginshiƙai” waɗanda suka yi daidai da yanki akan kowane jere wanda aka sanya wa “kayan hoto” ɗaya. ya da pixel. Abubuwan nuni na yau da kullun suna amfani daga layuka 240 zuwa 1200 kuma daga ginshiƙai 320 zuwa 1600. Girman girman nuni da adadin layuka da ginshiƙai suna ƙayyade girman kowane pixel.

Bayanan bidiyo yawanci suna zuwa ne daga ƙwaƙwalwar ajiyar bidiyo, tare da ɗaya ko fiye da bytes da aka sanya wa kowane wurin pixel (Anvyl yana amfani da rago huɗu akan kowane pixel). Dole ne mai sarrafawa ya ba da lissafi cikin ƙwaƙwalwar bidiyo yayin da katako ke motsawa a cikin nunin, da kuma dawo da amfani da bayanan bidiyo zuwa nuni a daidai lokacin da katakon lantarki ke motsawa a kan wani pixel da aka bayar.

Dole ne da'irar mai sarrafa VGA ta haifar da sigina na HS da VS da daidaita isar da bayanan bidiyo dangane da agogon pixel. Agogon pixel yana bayyana lokacin da yake akwai don nuna pixel ɗaya na bayanai. Siginar VS tana bayyana mitar “warkarwa” na nuni, ko kuma mitar da duk bayanan da ke nunin ke sake zana. Matsakaicin mitar wartsakewa aiki ne na nunin phosphor da ƙarfin katako na lantarki, tare da mitoci masu amfani suna faɗuwa a cikin kewayon 50Hz zuwa 120Hz. Adadin layukan da za'a nuna a mitar wartsakewa da aka bayar suna bayyana mitar “sakewa” a kwance. Don nunin 640-pixel ta 480-jere ta amfani da agogon pixel 25MHz da wartsakewar 60 +/- 1Hz, ana iya samun lokutan siginar da aka nuna a teburin da ke ƙasa. Lokaci don daidaita nisa bugun bugun jini da tazarar baranda na gaba da baya (tsakanin baranda sune lokutan bugun bugun gaba da bayan-sync wanda ba za a iya nuna bayanai ba) sun dogara ne akan abubuwan da aka ɗauka daga ainihin nunin VGA.
Da'irar mai sarrafa VGA tana ƙaddamar da fitarwa na madaidaicin-daidaitacce counter wanda agogon pixel ke motsawa don samar da lokutan siginar HS. Ana iya amfani da wannan ƙididdiga don gano kowane wuri na pixel akan jeren da aka bayar.

Hakazalika, ana iya amfani da fitar da na'urar daidaitawa ta tsaye wanda ke ƙaruwa tare da kowane bugun jini na HS don samar da lokacin siginar VS, kuma ana iya amfani da wannan injin don gano kowane layi da aka bayar. Ana iya amfani da waɗannan ƙididdiga guda biyu masu ci gaba don samar da adireshi zuwa RAM na bidiyo. Babu wani lokaci tsakanin farkon bugun bugun jini na HS da farkon bugun bugun VS, don haka mai zanen zai iya tsara kididdigar don samar da adiresoshin RAM na bidiyo cikin sauki, ko don rage ma'anar yanke hukunci don daidaitawar bugun jini.

Audio (I2S)
Kwamitin Anvyl ya haɗa da na'urar Analog na na'urar rikodin sauti na SSM2603CPZ (IC5) tare da jacks mai jiwuwa 1/8 inch guda huɗu don layin-fita (J7), belun kunne (J6), layi-in (J9), da makirufo-in (J8) .
Audio data sampAna tallafawa har zuwa 24 ragowa da 96KHz, da kuma sautin cikin (rikodi) da fitar da sauti (sake kunnawa) sampling rates za a iya saita kansa. Jack ɗin makirufo mono, kuma duk sauran jacks ɗin sitiriyo ne. Nau'in na'urar sauti na ciki yana motsa jackphone amplififi. Takardar bayanan SSM2603CPZ codec audio yana samuwa daga na'urorin Analog website.

Nunin TFT na taɓawa
Ana amfani da allo mai faɗin 4.3 ″ m launi mai haske LED backlit LCD akan Anvyl. Allon yana da nunin ƙuduri na asali na 480 × 272 tare da zurfin launi na 24 rago kowane pixel. Allon taɓawa mai juriya mai wayoyi huɗu tare da murfin antiglare ya rufe duk yankin nuni mai aiki. Ana iya amfani da allon LCD da allon taɓawa da kansa. Karatuttukan taɓawa sun fi surutu lokacin da LCD ke kunne, amma kuna iya tace amo kuma har yanzu kuna samun saurin sampda daraja. Idan kana buƙatar iyakar daidaici da sampDon rates, ya kamata ka kashe LCD a lokacin touchscreensampling.
Don nuna hoto, LCD yana buƙatar ci gaba da sarrafa shi tare da bayanan da aka dace. Wannan bayanan ya ƙunshi layukan da ba su da lokaci waɗanda ke samar da firam ɗin bidiyo. Kowane firam ya ƙunshi layuka masu aiki 272 da layukan da ba su da yawa a tsaye. Kowane layi ya ƙunshi lokutan pixel masu aiki 480 da kuma lokutan da ba a kwance a kwance da yawa.
Don ƙarin bayani kan amfani da Nuni na TFT, koma zuwa littafin tunani na Vmod-TFT. Anvyl da Vmod-TFT suna amfani da kayan aikin nuni iri ɗaya kuma suna buƙatar siginar sarrafawa iri ɗaya. Za'a iya samun ƙirar ƙira waɗanda ke amfani da nunin TFT mai taɓawa na Anvyl akan shafin samfurin Anvyl.

OLED
Ana amfani da Nuni na Inteltronic/Wisechip UG-2832HSWEG04 OLED akan Anvyl. Wannan yana ba da pixel 128 × 32, m-matrix, nunin monochrome. Girman nuni shine 30mm x 11.5mm x 1.45mm. Ana amfani da ƙirar SPI don saita nuni, da kuma aika bayanan bitmap zuwa na'urar. Anvyl OLED yana nuna hoton ƙarshe da aka zana akan allon har sai an kunna shi ko kuma an zana sabon hoto zuwa nunin. Ana kulawa da sabuntawa da sabuntawa a ciki.
Anvyl yana ƙunshe da da'irar OLED iri ɗaya kamar PmodOLED, ban da cewa CS # an ja da ƙasa, yana ba da damar nuni ta tsohuwa. Don ƙarin bayani kan tuƙi Anvyl OLED, koma zuwa PmodOLED littafin tunani. Za a iya samun ƙirar ƙira waɗanda ke amfani da nunin Anvyl OLED akan shafin samfurin Anvyl.

Kebul-UART Bridge (Serial Port)
Anvyl ya haɗa da gadar FTDI FT2232HQ USB-UART don ba da damar aikace-aikacen PC don sadarwa tare da hukumar ta amfani da daidaitattun umarnin tashar jiragen ruwa na Windows COM. Direbobin tashar USB-COM kyauta, ana samun su daga www.ftdichip.com ƙarƙashin “Virtual Com Port” ko kan VCP, canza fakitin USB zuwa bayanan UART/serial port. Ana musayar bayanan tashar tashar jiragen ruwa tare da FPGA ta amfani da tashar jiragen ruwa mai waya biyu (TXD/RXD) da sarrafa kwararar software (XON/XOFF). Bayan an shigar da direbobi, umarnin I/O daga PC ɗin da aka nufa zuwa tashar COM za su samar da zirga-zirgar bayanan serial akan fil T19 da T20 FPGA.

FT2232HQ, wanda aka haɗe zuwa tashar jiragen ruwa J12, ana kuma amfani dashi azaman mai sarrafawa don Digilent USB-J.TAG kewayawa, amma waɗannan ayyuka guda biyu suna nuna kansu gaba ɗaya ba tare da juna ba. Masu shirye-shirye masu sha'awar yin amfani da aikin UART na FT2232 a cikin ƙirar su ba sa buƙatar damuwa game da J.TAG kewaye suna kutsawa tare da bayanan su, kuma akasin haka.

USB HID Hosts
Microchip guda biyu PIC24FJ128GB106 microcontrollers suna ba da Anvyl tare da damar tashar HID na USB. Firmware a cikin microcontrollers na iya fitar da linzamin kwamfuta ko maballin da aka haɗe zuwa nau'in haɗin USB A a J13 da

J14 mai lamba
"HID" da "HOST". Ba a tallafa wa cibiyoyin sadarwa, don haka linzamin kwamfuta ɗaya ko madannai ɗaya kaɗai za a iya amfani da su a kowace tashar jiragen ruwa.

Hoto 9. USB HID interface.

"HOST" PIC24 yana fitar da sigina hudu a cikin FPGA - biyu an sadaukar da su azaman tashar jiragen ruwa / linzamin kwamfuta suna bin ka'idar PS/2, kuma biyun suna da alaƙa da tashar shirye-shirye na wayoyi biyu na FPGA, don haka ana iya tsara FPGA daga tashar jiragen ruwa. file adanawa akan sandar ƙwaƙwalwar USB. Don tsara FPGA, haɗa faifan ƙwaƙwalwar ajiya da aka tsara FAT mai ɗauke da shirye-shiryen .bit guda ɗaya file a cikin tushen directory, load JP2, da kuma sake zagayowar hukumar ikon. Wannan zai sa na'urar sarrafa PIC ta tsara FPGA, da kowane ɗan ƙaramin kuskure files za a ƙi ta atomatik. Lura cewa PIC24 yana karanta yanayin FPGA, init, da fil ɗin da aka yi, kuma yana iya fitar da fil ɗin PROG a matsayin wani ɓangare na jerin shirye-shirye.

HID Controller
Don samun dama ga mai sarrafa mai watsa shiri na USB, ƙirar EDK na iya amfani da daidaitattun PS/2 core (ƙirar da ba EDK ba na iya amfani da injin jiha mai sauƙi).

Mice da maɓallan madannai waɗanda ke amfani da ka'idar PS/2 suna amfani da bas ɗin siriyal mai waya biyu (agogo da bayanai) don sadarwa tare da na'ura mai ɗaukar hoto. Dukansu biyu suna amfani da kalmomin 1-bit waɗanda suka haɗa da farawa, tsayawa, da ɗan ɗanɗano kaɗan, amma fakitin bayanan an tsara su daban, kuma madaidaicin maballin yana ba da damar canja wurin bayanai guda biyu (don haka na'urar mai watsa shiri na iya haskaka LEDs na jihohi akan maballin). Ana nuna lokutan bas a cikin adadi. Ana tafiyar da agogo da siginonin bayanai ne kawai lokacin da canja wurin bayanai ke faruwa, kuma in ba haka ba ana gudanar da su a cikin rashin aiki a ma'ana '11'. Lokutan sun bayyana buƙatun sigina don sadarwar linzamin kwamfuta zuwa-bautar sadarwa da kuma sadarwar madannin madannai guda biyu. Za a iya aiwatar da da'irar dubawa ta PS/1 a cikin FPGA don ƙirƙirar ƙirar madannai ko linzamin kwamfuta.

Allon madannai
Maballin yana amfani da direbobi masu buɗewa don haka maballin, ko na'urar da aka makala, za ta iya tuka bas mai waya biyu (idan na'urar ba za ta aika bayanai zuwa maballin ba, to mai watsa shiri zai iya amfani da tashar shigar da bayanai kawai).
Maɓallai masu nau'in PS/2 suna amfani da lambobin bincike don sadarwa bayanan latsa maɓallin. Ana sanya kowane maɓalli lambar da ake aika duk lokacin da aka danna maɓallin. Idan maɓalli ya riƙe ƙasa, za a aika da lambar sikanin akai-akai kusan sau ɗaya kowace 100ms. Lokacin da aka fito da maɓalli, ana aika lambar maɓallin maɓallin F0 (binary “11110000”), sannan lambar sikanin maɓallin da aka saki ta biyo baya. Idan za'a iya canza maɓalli don samar da sabon harafi (kamar babban harafi), to ana aika haruffan motsi baya ga lambar duba, kuma dole ne mai watsa shiri ya tantance ko wane hali ASCII zai yi amfani da shi. Wasu maɓallai, waɗanda ake kira maɓallai masu tsawo, suna aika E0 (binary “11100000”) gaba da lambar sikanin (kuma suna iya aika lambar duba fiye da ɗaya). Lokacin da aka fito da maɓalli mai tsawo, ana aika lambar maɓalli na E0 F0, sannan lambar dubawa ta biyo baya. Ana nuna lambobin duba mafi yawan maɓalli a cikin adadi. Na'urar mai watsa shiri kuma na iya aika bayanai zuwa madannai. A ƙasa akwai ɗan gajeren jerin wasu umarni gama-gari wanda mai watsa shiri zai iya aikawa.

• ED: Saita Kulle Lambobi, Makullin iyakoki, da Ledojin Kulle Gungura. Allon madannai ya dawo da FA bayan ya karɓi ED, sannan mai watsa shiri ya aika da byte don saita matsayin LED: bit 0 ya saita Kulle Kulle, bit 1 yana saita Num Lock, da bit 2 saita makullin Caps. Bits 3 zuwa 7 an yi watsi da su.
• EE: Echo (gwaji). Allon madannai yana dawo da EE bayan karɓar EE.
• F3: Saita ƙimar maimaita lambar duba. Allon madannai yana dawowa F3 akan karɓar FA, sannan mai watsa shiri ya aika byte na biyu don saita ƙimar maimaitawa.
• FE: Sake aikawa FE yana jagorantar madannai don sake aika lambar sikanin kwanan nan.
• FF: Sake saiti. Yana sake saita madannai.

Maɓallin madannai na iya aika bayanai zuwa ga mai watsa shiri kawai lokacin da duka bayanan da layin agogo suka yi girma (ko marasa aiki). Tunda mai masaukin baki shine babban motar bas, dole ne maɓallin madannai ya duba don ganin ko mai watsa shiri yana aika bayanai kafin tuƙi bas. Don sauƙaƙe wannan, ana amfani da layin agogo azaman siginar "bayyana don aikawa". Idan mai watsa shiri ya ja layin agogon ƙasa, dole ne maballin kewayawa ya aika da kowane bayani har sai an fito da agogon. Maɓallin madannai yana aika bayanai ga mai masaukin baki a cikin kalmomi 11-bit waɗanda ke ɗauke da bit ɗin farawa '0', sannan 8-bits na lambar duba (LSB farko), sannan kuma wani ɗan ɗanɗano kaɗan kuma a ƙare tare da '1' bit tasha. Maɓallin madannai yana haifar da sauyawar agogo 11 (a 20 zuwa 30KHz) lokacin da aka aika bayanan, kuma bayanai suna aiki akan faɗuwar agogon.

Ba duk masana'antun maɓallan maɓalli suna bin ƙa'idodin PS/2 ba; wasu maballin madannai bazai samar da ingantaccen sigina voltagko amfani da daidaitattun ka'idojin sadarwa. Daidaituwa da mai masaukin USB na iya bambanta tsakanin maɓallan madannai daban-daban. 1

Ana nuna lambobin bincika mafi yawan maɓallan PS/2 a cikin hoton da ke ƙasa.

Mouse
Mouse yana fitar da agogo da siginar bayanai lokacin da aka motsa shi, in ba haka ba, waɗannan sigina suna kasancewa a ma'ana '1'. A duk lokacin da aka motsa linzamin kwamfuta, ana aika kalmomi guda 11-bit guda uku daga linzamin kwamfuta zuwa na'urar mai ɗaukar hoto. Kowanne daga cikin kalmomin 11-bit yana ƙunshe da '0' fara bit, sannan sai 8 ragowa na bayanai (LSB na farko), sannan kuma wani ɗan ƙaramin ɗan wasa mara kyau, kuma a ƙare tare da '1' bit tasha. Don haka, kowane watsa bayanai ya ƙunshi 33 bits, inda bits 0, 11, da 22 sune '0' farawa bits, kuma bits 11, 21, da 33 sune '1' stop bits. Filayen bayanan 8-bit uku sun ƙunshi bayanan motsi kamar yadda aka nuna a cikin adadi a sama. Bayanai suna aiki a ƙarshen faɗuwar agogo, kuma lokacin agogo shine 20 zuwa 30KHz.
Mouse yana ɗaukar tsarin haɗin kai na dangi wanda motsi linzamin kwamfuta zuwa dama yana haifar da lamba mai kyau a cikin filin X, kuma motsawa zuwa hagu yana haifar da lamba mara kyau. Hakazalika, motsa linzamin kwamfuta zuwa sama yana haifar da lamba mai kyau a cikin filin Y, kuma matsawa ƙasa yana wakiltar lamba mara kyau (XS da YS bits a cikin byte matsayi sune alamar raƙuman ruwa - '1' yana nuna lamba mara kyau). Girman lambobin X da Y suna wakiltar ƙimar motsin linzamin kwamfuta - mafi girman lambar, da sauri linzamin kwamfuta yana motsawa (bits na XV da YV a cikin byte matsayi sune alamun motsi - '1' yana nufin ambaliya ya faru) . Idan linzamin kwamfuta yana motsawa akai-akai, ana maimaita watsawa 33-bit kowane 50ms ko makamancin haka. Filayen L da R a cikin yanayin byte suna nuna latsa maɓallin Hagu da Dama (a '1' yana nuna maɓallin yana latsawa).

faifan maɓalli
faifan maɓalli na Anvyl yana da maɓallai masu lakabi 16 (0-F). An saita shi azaman matrix wanda kowane layi na maɓalli daga hagu zuwa dama ana ɗaure shi zuwa fil ɗin layi, kuma kowane shafi daga sama zuwa ƙasa yana ɗaure da fil ɗin shafi. Wannan yana ba mai amfani fil ɗin layi huɗu da fitilun ginshiƙa huɗu don magance maɓallin turawa. Lokacin da aka danna maɓalli, ana haɗa fil ɗin da ke daidai da jeren maballin da ginshiƙin.
Don karanta yanayin maɓalli, fil ɗin ginshiƙin da maɓallin ke ciki dole ne a yi ƙasa da ƙasa yayin da sauran fitilun ginshiƙan guda uku suna girma. Wannan yana ba da damar duk maɓallan da ke cikin wannan shafi. Lokacin da aka tura maɓalli a cikin wannan ginshiƙi, madaidaicin layin layin zai karanta ƙananan hankali.
Ana iya ƙayyade yanayin duk maɓallai 16 a cikin matakai huɗu ta hanyar kunna kowane ginshiƙai huɗu ɗaya bayan ɗaya. Ana iya cika wannan ta hanyar jujjuya tsarin "1110" ta cikin filayen ginshiƙan. Yayin kowane mataki, matakan ma'ana na fil ɗin jere sun yi daidai da yanayin maɓallan da ke cikin wannan shafi.

Don ba da damar latsa maɓallin lokaci ɗaya a jere ɗaya, maimakon haka saita fil ɗin ginshiƙi a matsayin jagorar bi-biyu tare da resistors na ciki da kuma kiyaye ginshiƙan a halin yanzu ba a karanta su a cikin matsanancin ƙarfi.

Oscillators/Agogo
Kwamitin Anvyl ya haɗa da oscillator 100MHz Crystal oscillator guda ɗaya wanda aka haɗa zuwa fil D11 (D11 shigarwar GCLK ce a banki 0). Agogon shigarwa na iya fitar da kowane ko duk fale-falen sarrafa agogo huɗu a cikin Spartan-6. Kowane tayal ya ƙunshi Manajojin Agogo Dijital guda biyu (DCMs) da Madaidaicin Kulle-lokaci ɗaya (PLLs) .DCMs suna ba da matakai huɗu na mitar shigarwa (0º, 90º, 180º, da 270º), agogon da aka raba wanda zai iya zama raba agogon shigarwa. ta kowace lamba daga 2 zuwa 16 ko 1.5, 2.5, 3.5… 7.5, da kuma fitowar agogon antiphase guda biyu waɗanda za a iya ninka ta kowace lamba daga 2 zuwa 32 kuma a lokaci guda ana raba su ta kowace lamba daga 1 zuwa 32.

PLLs suna amfani da Voltage Sarrafa Oscillators (VCOs) waɗanda za a iya tsara su don samar da mitoci a cikin kewayon 400MHz zuwa 1080MHz ta saita saiti uku na masu rarraba shirye-shirye yayin daidaitawar FPGA. Abubuwan da aka fitar na VCO suna da nau'i guda takwas daidai-daidai (0º, 45º, 90º, 135º, 180º, 225º, 270º, da 315º) waɗanda za'a iya raba su ta kowace lamba tsakanin 1 da 128.

Asali I / O
Kwamitin Anvyl ya haɗa da LEDs goma sha huɗu (jaja goma, rawaya biyu, da kore biyu), masu sauyawa guda takwas, masu sauyawa DIP guda takwas a cikin ƙungiyoyi biyu, maɓallin turawa guda hudu, nunin kashi bakwai na lamba uku, da 630 taye-point breadboard tare da I/O na dijital goma. Maɓallan turawa, maɓallan faifai da maɓallan DIP suna haɗa su zuwa FPGA ta hanyar masu jujjuyawar jeri don hana lalacewa daga gajerun da'irar da ba a sani ba (wani gajeriyar kewayawa na iya faruwa idan fil ɗin FPGA da aka sanya wa maɓallin turawa ko maɓalli na faifai ba da gangan aka ayyana shi azaman fitarwa ba). Maɓallin turawa su ne "momentan lokaci" masu sauyawa waɗanda yawanci ke haifar da ƙananan fitarwa lokacin da suke hutawa, kuma babban fitarwa kawai lokacin da aka danna su. Maɓallin faifan faifai da maɓallan DIP suna haifar da tsayin daka ko ƙaramar bayanai dangane da matsayinsu. Akwatin burodin dijital guda goma I/O (BB1 – BB10) ana haɗa kai tsaye zuwa FPGA domin a iya haɗa su cikin sauƙi cikin da'irori na al'ada.

Danna Maɓallan	Maɓallin Slide	Farashin DIP	LEDs			Allodi
Saukewa: BTN0	Saukewa: SW0	DIP8-1: G6	Saukewa: LD0	LD9: 7	Saukewa: AB1		BB9: R19
BTN1: D5	SW1: u4	DIP8-2: G4	LD1: Y4	LD10: U6	BB2: P17		Saukewa: BB10
BTN2: A3	Saukewa: SW2	DIP8-3: F5	LD2: Y1	LD11: T8	BB3: P18
Saukewa: BTN3	SW3: P4	DIP8-4: E5	LD3: Y3	LD12: T7	BB4: Y19
	SW4: R4	DIP9-1: F8	Saukewa: AB4	Saukewa: LD13	BB5: Y20
	SW5: P6	DIP9-2: F7	Saukewa: LD5	LD14: U8	BB6: R15
	SW6: P5	DIP9-3: C4	Saukewa: AB6		BB7: R16
	SW7: P8	DIP9-4: D3	LD7: AA4		BB8: R17

Tebur 1. Basic I / O pinout.

Nuni-Kashi Bakwai

Hukumar Anvyl ta ƙunshi nunin LED mai kashi bakwai na cathode mai lamba 2 guda uku. Kowannen lambobi biyu yana kunshe da sassa bakwai da aka tsara a cikin tsarin "siffa takwas", tare da LED a kowane bangare. Ana iya haskaka LEDs na yanki daban-daban, don haka kowane ɗayan ƙirar 128 za a iya nuna shi akan lambobi ta hanyar haskaka wasu sassan LED da barin sauran duhu. Daga cikin waɗannan alamu guda 128 masu yuwuwa, guda goma daidai da lambobi goma ne suka fi amfani.
Ana samun siginar katode gama gari azaman siginonin shigarwar “lambobi” shida zuwa nunin lambobi 2 guda uku. An haɗa nau'ikan nau'ikan nau'ikan nau'ikan nau'ikan nau'ikan nau'ikan lambobi shida a cikin kuɗaɗen kewayawa guda bakwai waɗanda aka yiwa lakabin AA ta hanyar AG (don haka, don ex.ampHar ila yau, an haɗa nau'o'in "D" guda shida daga lambobi shida tare zuwa kullin kewayawa guda ɗaya da ake kira "AD"). Waɗannan sigina na anode bakwai suna samuwa azaman abubuwan shiga zuwa nunin lambobi 2. Wannan makircin haɗin siginar yana haifar da nuni mai yawa, inda siginar anode suka zama gama gari ga duk lambobi amma kawai za su iya haskaka sassan lambobi waɗanda siginar cathode daidai yake.

Za a iya amfani da da'irar mai sarrafa nuni don nuna lamba biyu akan kowane nuni. Wannan da'irar tana tafiyar da siginonin katode da sifofin anode masu dacewa na kowane lambobi a cikin maimaitawa, ci gaba da ci gaba, a ƙimar sabuntawa wanda ya fi saurin amsawar idon ɗan adam. Kowace lamba tana haskaka kashi ɗaya cikin shida na lokacin, amma saboda ido ba zai iya gane duhun lamba ba kafin ya sake haskakawa, lambar tana bayyana ci gaba da haskakawa. Idan sabuntawa (ko "sake sabuntawa") an rage jinkirin zuwa wurin da aka bayar (kusan 45 hertz), to yawancin mutane za su fara ganin flicker nuni.
Domin kowanne daga cikin lambobi shida su bayyana mai haske kuma suna ci gaba da haskakawa, kowace lambobi yakamata a motsa su sau ɗaya a kowace 1 zuwa 16ms (don sabuntawa na 1KHz zuwa 60Hz). Don misaliampDon haka, a cikin tsarin wartsakewa na 60Hz, za a sabunta nunin gabaɗaya sau ɗaya kowane 16ms, kuma kowane lambobi za a haskaka don 1/6 na sake zagayowar wartsake, ko 2.67ms. Dole ne mai sarrafawa ya tabbatar da cewa daidaitaccen tsarin anode yana nan lokacin da aka kunna siginar cathode daidai. Don kwatanta tsarin, idan an tabbatar da Cat1 yayin da AB da AC aka tabbatar, to za a nuna "1" a matsayi na 1. Sa'an nan kuma, idan an tabbatar da Cat2 yayin da AA, AB da AC aka tabbatar, to "7" zai kasance. za a nuna su a matsayi na lamba 2. Idan Cat1 da AB, AC suna motsawa don 8ms, sannan Cat2 da AA, AB, AC ana fitar da su don 8ms a jere mara iyaka, nunin zai nuna "17". ExampAna nuna zanen lokaci don mai sarrafa lambobi biyu a ƙasa.

Faɗawa Counters
Kwamitin Anvyl yana da mai haɗin fil ɗin 2 × 20 da tashoshin Pmod mai 12-pin guda bakwai. Tashoshin tashar jiragen ruwa na Pmod sune kusurwar dama ta 2 × 6, masu haɗin mata 100-mil waɗanda ke aiki tare da daidaitattun 2 × 6 fil masu buƙatun da ake samu daga masu rarraba kasida iri-iri. Kowane tashar Pmod mai 12-pin yana ba da sigina na 3.3V VCC guda biyu (fili 6 da 12), siginar ƙasa guda biyu (filin 5 da 11), da siginonin dabaru takwas. VCC da Ground fil na iya isar da har zuwa 1A na yanzu. Siginonin bayanan Pmod ba su dace da nau'i-nau'i ba, kuma ana fatattakar su ta amfani da mafi kyawun waƙa ba tare da sarrafa impedance ko jinkirta daidaitawa ba. Digilent yana samar da babban tarin allunan kayan haɗi na Pmod waɗanda zasu iya haɗawa zuwa tashoshin Pmod. Muna da saitin Pmods da aka ba da shawarar ga Anvyl da ake kira "Anvyl Pmod Pack".

Mai haɗin haɓaka 40-pin yana da sigina na 32 I / O waɗanda aka raba tare da Pmods JD, JE, JF da JG. Hakanan yana ba da haɗin GND, VCC3V3, da VCC5V0.

Pmod JA	Farashin JB	Pmod JC	Pmod JD	Pmod JE	Farashin JF	Pmod JG
JA1: AA18	JB1: Y16	JC1: Y10	Saukewa: AB1	JE1: U10	jF1:v7	JG1: V20
JA2: AA16	Saukewa: AB2	Saukewa: AB2	JD2: Y12	JE2:v9	jf2: w6	JG2: T18
JA3: Y15	JB3: Y14	Saukewa: AB3	JD3: T11	JE3: Y8	JF3: Y7	JG3: D17
JA4: V15	JB4: U14	Saukewa: AB4	JD4: W10	JE4: A8	JF4: AA6	JG4: B18
Saukewa: AB7	JB7: AA14	JC7: AA12	JD7: W12	JE7: U9	jf7: w8	JG7: T17
Saukewa: AB8	JB8: W14	JC8: Y11	JD8: R11	JE8: w9	JF8: Y6	JG8: A17
Saukewa: AB9	JB9: T14	JC9: AA10	JD9: V11	JE9: Y9	JF9: AB7	JG9: c16
JA10: W15	JB10: W11	JC10: Y13	JD10: T10	JE10: AB8	JF10: AB6	JG10: A18

Table 2. Pmod pinout.

Haƙƙin mallaka Digilent, Inc. Duk haƙƙin mallaka.
Sauran samfura da sunayen kamfanoni da aka ambata na iya zama alamun kasuwanci na masu su.

Takardu / Albarkatu

DIGILENT Anvyl FPGA [pdf] Manual mai amfani XC6SLX45-CSG484-3, Anvyl FPGA Board, Anvyl FPGA, Board

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