Atmel 8-bit AVR Microcontroller tare da 2/4 / 8K Bytes In-Tsarin Tsarin Shirye-shiryen Flash Mai amfani da Manhaja

Saurin Sauri
- ATtiny25V / 45V / 85V: 0 - 4 MHz @ 1.8 - 5.5V, 0 - 10 MHz @ 2.7 - 5.5V
- ATtiny25 / 45/85: 0 - 10 MHz @ 2.7 - 5.5V, 0 - 20 MHz @ 4.5 - 5.5V

Yanayin Yanayi na Masana'antu

Ƙarƙashin Ƙarfin Ƙarfi

Yanayin aiki:

1 MHz, 1.8V: 300 μA

Yanayin Powerarfi:

Fitar da Fannoni

Sanyawa ATtiny 25/45/85

Bayanin Pin

VCC: Supply voltage.
GND: kasa.
Port B (PB5: PB0): Port B tashar I/O ce mai 6-bit bi-directional tare da masu juye juye na ciki (wanda aka zaɓa don kowane bit). Matakan fitarwa na Port B suna da halayen motsa jiki mai ma'ana tare da babban nutsewa da ƙarfin tushe. A matsayin abubuwan da aka shigar, fitilun Port B waɗanda aka ja ƙasa kaɗan za su samo asali na yanzu idan an kunna resistors ɗin cirewa. Ana bayyana fil ɗin Port B sau uku lokacin da yanayin sake saiti ya fara aiki, koda kuwa agogon baya aiki.

Port B kuma yana aiki da ayyuka na wasu fasaloli na musamman na ATtiny25 / 45/85 kamar yadda aka jera
A ATtiny25, tashoshin I / O na shirin PB3 da PB4 (fil 2 da 3) ana musayar su a Yanayin Haɗin ATtiny15 don tallafawa jituwa ta baya tare da ATtiny15.

SAKE SAKE: Sake saita shigarwar. Ƙananan matakin akan wannan fil na tsawon fiye da mafi ƙarancin tsayin bugun bugun jini zai haifar da sake saiti, koda kuwa agogo baya aiki kuma idan ba a kashe fil ɗin sake saiti ba. An ba da mafi ƙarancin tsayin bugun bugun jini a ciki Table 21-4 shafi na 165. Pulananan bugun jini ba su da tabbas don samar da sake saiti.

Hakanan za'a iya amfani da fil ɗin sake saiti azaman maɓallin I / O (mai rauni)

Ƙarsheview

ATtiny25 / 45/85 mai ƙananan iko ne CMOS 8-bit microcontroller bisa ga ingantaccen gine-ginen RISC na AVR. Ta hanyar aiwatar da umarni masu ƙarfi a cikin zagaye na agogo ɗaya, ATtiny25 / 45/85 yana samun nasarori ta hanyar kusantar 1 MIPS a cikin MHz wanda ya ba mai tsara tsarin damar inganta ikon amfani da saurin aiki.

Tsarin zane

Babban AVR ya haɗu da wadataccen umarnin da aka tsara tare da rijistar aiki na 32 gama gari. Dukkan rajista 32 suna da alaƙa kai tsaye zuwa ithungiyar Arithmetic Logic Unit (ALU), wanda ke ba da damar yin rajista guda biyu masu zaman kansu a cikin umarni ɗaya wanda aka aiwatar a cikin zagaye ɗaya agogo. Ginin da aka samu shine mafi ingancin lamba yayin samun nasarorin har sau goma fiye da na al'ada CISC microcontrollers.

ATtiny25 / 45/85 yana ba da waɗannan fasalulluka: 2/4 / 8K baiti na In-System Programmable Flash, 128/256/512 bytes EEPROM, 128/256/256 bytes SRAM, 6 babbar manufar I / O, layin 32 manufar aiki rajista, 8-bit Mai ƙidayar lokaci / Counter tare da kwatanta halaye, daya 8-bit high gudun Mai eridayar lokaci / Counter, Universal Serial Interface, Ciki da kuma Waje katsewa, a 4-channel, 10-bit ADC, wani programmable Watchdog Mai ƙidayar lokaci tare da na ciki Oscillator, da kuma hanyoyin amfani da hanyoyin adana wutar lantarki guda uku. Yanayin rago ya dakatar da CPU yayin barin SRAM, Mai ƙidayar lokaci / Counter, ADC, Analog Comparator, da Tsarin katsewa don ci gaba da aiki. Yanayin Powerarfafawa yana adana abubuwan rajistar, yana kashe duk ayyukan guntu har sai Mai Cirewa ko Sake Sake Kayan komputa na gaba. ADC Yanayin Rage Sauti yana dakatar da CPU da duk nau'ikan I / O banda ADC, don rage sauya sheƙa yayin sauya ADC.

An ƙera na'urar ne ta amfani da fasahar ƙwaƙwalwar Atmel mai ɗimbin yawa. Fushin ISP Flash On-chip yana ba da damar a sake tsara ƙwaƙwalwar Shirye-shiryen In-System ta hanyar amfani da SPI a jere, ta wani mai shirye-shiryen ƙwaƙwalwar ajiya wanda ba ya canzawa ko ta lambar On-chip boot da ke gudana a kan AVR core.

ATtiny25 / 45/85 AVR ana tallafawa tare da cikakken ɗakunan shirye-shirye da kayan aikin ci gaba na tsarin waɗanda suka haɗa da: C Comilers, Macro Assemblers, Debugger Program / Simulators da Kayan Gwaji.

Game da Albarkatu

Akwai wadatattun kayan aikin ci gaba, bayanan aikace-aikace da takaddun bayanai don zazzagewa http://www.atmel.com/avr.

Lambar Examples

Wannan takaddar tana ƙunshe da lamba mai sauƙi examples wanda ke nuna a taƙaice yadda ake amfani da sassa daban -daban na na'urar. Waɗannan lambar tsohonamples ɗauka cewa ɓangaren takamaiman taken file an haɗa shi kafin tattarawa. Ku sani cewa ba duk masu siyar da kayan tattarawa na C sun haɗa da ma'anoni kaɗan a cikin kanun labarai ba files da katsalandar sarrafawa a C yana dogara ne akan mai tarawa. Da fatan za a tabbatar tare da takaddar mai tattarawa C don ƙarin cikakkun bayanai.

Don Rijistar I / O dake cikin tsawan I / O map, "IN", "OUT", "SBIS", "SBIC", "CBI", da "SBI" dole ne a maye gurbinsu da umarnin da ke ba da damar isa ga I / Ya Yawanci, wannan yana nufin "LDS" da "STS" haɗe tare da "SBRS", "SBRC", "SBR", da "CBR". Lura cewa ba duk na'urorin AVR bane suka hada da tsawan taswirar I / O.

Sensing Capacitive Touch

Laburaren QTouch na Atmel yana ba da sauƙi don amfani da mafita don mu'amala mai ma'ana a kan microcontrollers Atmel AVR. Laburaren QTouch ya haɗa da goyan bayan hanyoyin saye na QTouch® da QMatrix®.

Ana sauƙaƙe abubuwan taɓa taɓawa cikin kowane aikace-aikacen ta hanyar haɗa QTouch Library da amfani da Interface-ming Interface (API) na ɗakin karatun don ayyana tashoshin taɓawa da na'urori masu auna sigina. Aikace-aikacen sannan ya kira API don dawo da bayanin tashar da tantance yanayin firikwensin taɓawa.

Laburaren QTouch kyauta ne kuma ana iya saukar da shi daga Atmel webshafin. Don ƙarin bayani da cikakkun bayanai na aiwatarwa, koma zuwa Jagorar Mai Amfani da Laburaren QTouch - wanda ake samu daga Atmel website.

Riƙe bayanai

Sakamakon cancanta na Dogara ya nuna cewa ƙididdigar rashin nasarar riƙe bayanan ya ragu ƙasa da 1 PPM sama da shekaru 20 a 85 ° C ko shekaru 100 a 25 ° C.

Babban CPU AVR

Gabatarwa

Wannan ɓangaren yana tattauna ainihin gine-ginen AVR gaba ɗaya. Babban aikin CPU shine don tabbatar da aiwatar da shirin. Saboda haka CPU dole ne ya sami damar samun damar tunani, yin lissafi, sarrafa kayan gefe, da kuma iya katsewa.

Gine -ginen Samaview

Don kara girman aiki da daidaituwa, AVR yana amfani da gine-ginen Harvard - tare da tunani daban-daban da motocin bas don shirin da bayanai. Umurni a cikin ƙwaƙwalwar Shirye-shiryen ana aiwatar da su tare da bututun mai matakin ɗaya. Yayinda ake aiwatar da umarni guda, ana ba da umarni na gaba daga ƙwaƙwalwar shirin. Wannan ra'ayin yana ba da umarnin aiwatarwa a kowane zagayen agogo. Memorywaƙwalwar Shirye-shiryen shine memorywaƙwalwar Flash mai sake tsarawa.

Rajista mai saurin shiga File ya ƙunshi 32 x 8-bit gabaɗaya maƙasudin yin rijistar aiki tare da lokacin samun damar zagayowar agogo ɗaya. Wannan yana ba da damar yin aiki da Sashin Lissafin Arithmetic Logic (ALU). A cikin aikin ALU na yau da kullun, ana fitar da operands guda biyu daga Rajista File, ana aiwatar da aikin, kuma ana adana sakamakon a cikin Rajista File- a cikin zagaye ɗaya agogo

Ana iya amfani da shida daga cikin rajista 32 azaman uku-16 mai nuna alamun rijistar adireshin kai tsaye don Bayanin sararin Data - yana ba da damar ƙididdigar adireshin ingantacce. Hakanan za'a iya amfani da ɗayan waɗannan alamun adireshin azaman alamar adreshin don nemo tebur a cikin ƙwaƙwalwar shirin Flash. Waɗannan ƙarin ayyukan rajistar sune 16-bit X-, Y-, da Z-rajista, waɗanda aka bayyana a baya a wannan sashin.

ALU na tallafawa ayyukan lissafi da dabaru tsakanin ayyukan rajista ko tsakanin tsayayye da rajista. Hakanan ana iya aiwatar da ayyukan rijista ɗaya a cikin ALU. Bayan aiki na lissafi, ana sabunta Rajistar Matsayi don yin tunani game da sakamakon aikin.

Ana bayar da kwararar shirye-shirye ta tsallake sharaɗi da ƙa'idodi mara kyau da umarnin kira, iya kai tsaye magance duk sararin adireshin. Yawancin umarnin AVR suna da tsari iri-iri na 16, amma akwai kuma umarnin 32-bit.

Yayin katsewa da kira na ƙasa, ana adana adireshin komar Shirye-shiryen komputa (PC) akan Stack. An rarraba Stack yadda yakamata a cikin SRAM data gaba ɗaya, sabili da haka girman Stack din yana iyakantacce ne ta jimlar girman SRAM da kuma amfanin SRAM. Duk shirye-shiryen mai amfani dole ne su fara SP a cikin Sake saitin na yau da kullun (kafin aiwatar da al'amuran yau da kullun ko katsewa). Ana karanta Rubutun Stack (SP) a cikin sararin I / O. Bayanai SRAM ana iya samun sauƙin samun su ta hanyoyi daban-daban na adireshi guda biyar masu goyan baya a cikin gine-ginen AVR.

Wuraren ƙwaƙwalwar ajiya a cikin gine-ginen AVR duk layi ne na yau da kullun kuma taswirar ƙwaƙwalwar ajiya.

Mabudin katsewa mai sassauci yana da rajistar sarrafawa a cikin sararin I / O tare da ƙarin Interarfafa Globalarfafa bitarfafa bit a cikin Rijistar Yanayi. Duk katsewa suna da Rarraba Wuta daban a teburin katsewa Vector. Katsewar suna da fifiko daidai da matsayinsu na katse Vector. Aramin katse adireshin Vector, mafi girman fifiko.

Filin ƙwaƙwalwar I/O ya ƙunshi adiresoshi 64 don ayyukan gefe na CPU azaman Rajistar Kulawa, SPI, da sauran ayyukan I/O. Ana iya isa ga ƙwaƙwalwar I/O kai tsaye, ko a matsayin wuraren Sararin Bayanan da ke biye da na mai yin rajista File, 0x20 - 0x5F.

ALU - ithididdigar gicididdigar ithididdiga

Babban aiki AVR ALU yana aiki kai tsaye dangane da duk rijistar aiki na 32 gama gari. A cikin zagaye ɗaya na agogo, ayyukan lissafi tsakanin mahimmancin rijista ko tsakanin rijista da gaggawa ana aiwatar da su. Ayyukan ALU sun kasu kashi uku manyan - lissafi, ma'ana, da kuma bit- ayyuka. Wasu aikace-aikacen gine-ginen suna ba da ƙarfin haɓaka mai ƙarfi wanda ke tallafawa duka rijista / rashin sa hannu da kuma ƙaramin juzu'i. Duba sashin "Saitin Umarni" don cikakken bayanin.

Rijistar Matsayi

Rijistar Matsayi ya ƙunshi bayani game da sakamakon hukuncin lissafi da aka aiwatar kwanan nan. Ana iya amfani da wannan bayanin don canza canjin shirin don aiwatar da aiki na sharaɗi. Lura cewa an sabunta Rajistar Matsayi bayan duk ayyukan ALU, kamar yadda aka ƙayyade a cikin Sanarwar Saitin Umarni. Wannan a lokuta da yawa zai cire buƙata don amfani da umarnin kwatancen sadaukarwa, wanda zai haifar da sauri da ƙaramar lamba.

Rijistar Matsayi ba a adana ta atomatik lokacin shigar da aikin katsewa kuma aka dawo dashi lokacin dawowa daga katsewa. Dole ne a sarrafa wannan ta hanyar software.

SREG - AVR Matsayin Matsayi

Lissafin Matsayi na AVR - SREG - an bayyana shi azaman:

Bit	7	6	5	4	3	2	1	0
0x3F ku	I	T	H	S	V	N	Z	C	Farashin SREG
Karanta/Rubuta	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Darajar farko	0	0	0	0	0	0	0	0

Bit 7 - I: Interaddamarwa ta Duniya ta Kunna

Dole ne a saita bitar katsewa ta Enable bit don katsewar abubuwan da za a kunna. Mutumin da ya katse damar sarrafawa ana yin shi a cikin rajista na daban. Idan aka dakatar da Enaddamar da Rijista ta Duniya, babu ɗayan tsangwama da aka kunna mai zaman kansa daga katsewar aikin mutum. I-bit ana share shi da kayan aiki bayan wani rikici ya faru, kuma an saita shi ta hanyar koyarwar RETI don bawa damar katsewa mai zuwa. Hakanan za'a iya saita I-bit kuma a share shi ta hanyar aikace-aikacen tare da umarnin SEI da CLI, kamar yadda aka bayyana a cikin bayanin koyarwar koyarwa.

Bit 6 - T: Bit Kwafin Ma'aji

Umurnin Bit Copy na BLD (Bit LoaD) da BST (Bit STore) suna amfani da T-bit azaman tushen ko makoma don bit ɗin da aka sarrafa. Kadan daga rijista a cikin Rajista File za a iya kwafa cikin T ta hanyar umarnin BST, kuma kaɗan a cikin T za a iya kwafa shi cikin ɗan rajista a cikin Rajista File ta hanyar umarnin BLD.

Bit 5 - H: Rabin ryauke da Tuta

Rabin Carauke da Tutar H yana nuna Rabin ryauke da wasu ayyuka na lissafi. Rabin isauki yana da amfani a lissafin BCD. Duba “Bayanin Saita Umarni” don cikakken bayani.

Bit 4 – S: Alamar Bit, S = N ⊕ V

S-bit koyaushe abin keɓewa ne ko tsakanin Tutar Kasa mara kyau N da Comarfafa Twoarfin Guda Biyu V. Duba “Bayanin Saitin Umarni” don cikakken bayani.

Bit 3 - V: Tutar flowaruwa Ta Biyu

'Sarin Cikakken Tushe Biyu Flag V yana tallafawa haɓakar lissafin biyu. Duba “Bayanin Saita Umarni” don cikakken bayani.

Bit 2 - N: Tutar Kasa

Tutar Kasa mara kyau N tana nuna sakamako mara kyau a cikin lissafi ko aiki na hankali. Duba “Bayanin Saita Umarni” don cikakken bayani.

Bit 1 - Z: Tutar Zero

Tutar Zero Flag Z tana nuna sakamako mara kyau a cikin lissafi ko aiki na hankali. Duba “Bayanin Saita Umarni” don cikakken bayani.

Bit 0 - C: ryauke da Tuta

Flaauke da Tutar C yana nuna ɗauka a cikin lissafi ko aiki na hankali. Duba “Bayanin Saita Umarni” don cikakken bayani.

Rijistar Manufa File

The Register File an inganta shi don saitin umarnin koyarwar AVR Enhanced RISC. Domin cimma nasarar da ake buƙata da sassaucin ra'ayi, mai rijista yana tallafawa waɗannan dabarun shigarwa/fitarwa File:

Outputaya daga cikin ayyukan sarrafa 8-bit da kuma sakamakon sakamako 8-bit

Ayyuka biyu na kayan bit-8 da kuma sakamakon sakamako 8-bit

Ayyuka biyu na kayan bit-8 da kuma sakamakon sakamako 16-bit

Outputaya daga cikin ayyukan sarrafa 16-bit da kuma sakamakon sakamako 16-bit

Hoto na 4-2 yana nuna tsarin abubuwan rijista 32 na aikin gama gari a cikin CPU.

Kamar yadda aka nuna a Hoto na 4-2, kowane rijista kuma ana sanya adireshin ƙwaƙwalwar ajiyar Bayanai, yin taswirar su kai tsaye zuwa cikin wurare 32 na farko na Mai amfani Data Space. Kodayake ba a aiwatar da shi ta zahiri azaman wuraren SRAM ba, wannan ƙungiyar ƙwaƙwalwar ajiya tana ba da sassauƙa mai yawa don samun damar yin rajista, kamar yadda za a iya saita rajistar X-, Y- da Z-pointer don ƙididdige kowane rajista a cikin file.Yawancin umarnin da ke aiki akan Rajista File samun dama kai tsaye ga duk masu rijista, kuma yawancinsu umarnin zagayowar zunubi ne.

Rajistar X, rajistar Y, da Z-rajista

Rijistar R26..R31 suna da wasu ƙarin ayyuka zuwa amfanin su na gaba ɗaya. Waɗannan rajista sune alamomin adireshin 16-bit don magance kai tsaye na sararin bayanan. Adireshin adiresoshin kai tsaye suna yin rajista X, Y, da Z kamar yadda aka bayyana a ciki Hoto na 4-3.

A cikin hanyoyi daban-daban na adireshin waɗannan adiresoshin adireshin suna da ayyuka azaman ƙaura matsuguni, ƙara atomatik, da ragin atomatik (duba bayanin umarnin da aka tsara don cikakkun bayanai).

Takaitaccen Bayani

Ana amfani da Stack ne galibi don adana bayanan wucin gadi, don adana masu canji na cikin gida da kuma adana adiresoshin dawowa bayan katsewa da kiran ƙasa. Rijistar Stack Pointer a koyaushe yana nuna saman Stack. Lura cewa An aiwatar da Stack yayin girma daga wurare masu ƙwaƙwalwa mafi girma zuwa ƙananan wuraren ƙwaƙwalwar ajiya. Wannan yana nuna cewa umarnin Stack PUSH yana rage Maƙallan Stack.

Maƙallan pointsauni yana nuni zuwa yankin SRAM Stack data inda roananan andananan da Interaddamarwa suke. Dole ne wannan shirin ya bayyana wannan wuri na Stack a cikin bayanan SRAM kafin a aiwatar da duk wani kira da yake a kasa ko kuma a sami damar tayar da hankali. Dole ne a saita Alamar Tsayawa don nunawa sama da 0x60. Stack Pointer yana raguwa da ɗaya lokacin da aka tura bayanai akan Stack tare da umarnin PUSH, kuma yana raguwa da biyu lokacin da aka tura adireshin dawowa akan Stack tare da kiran da ke ƙasa ko katsewa. Stack Pointer yana daɗa ɗaya yayin da aka fito da bayanai daga Stack tare da umarnin POP, kuma yana ƙaruwa da biyu yayin da aka fito da bayanai daga Stack tare da dawowa daga ƙaramin RET ko dawowa daga katse RETI.

Ana aiwatar da Pointer na AVR azaman rijista 8-bit biyu a cikin I / O sarari. Adadin ragin da aka yi amfani da shi shine dogara ga aiwatarwa. Lura cewa sararin bayanai a cikin wasu aiwatarwar gine-ginen AVR yana da ƙarami cewa kawai ana buƙatar SPL. A wannan yanayin, rajistar SPH ba za ta kasance ba.

SPH da SPL - Rijistar Bayyana Maɗaukaki

Bit	15	14	13	12	11	10	9	8
0x3E	Saukewa: SP15	Saukewa: SP14	Saukewa: SP13	Saukewa: SP12	Saukewa: SP11	Saukewa: SP10	Saukewa: SP9	Saukewa: SP8	SPH
0 x3d	Saukewa: SP7	Saukewa: SP6	Saukewa: SP5	Saukewa: SP4	Saukewa: SP3	Saukewa: SP2	Saukewa: SP1	Saukewa: SP0	Farashin SPL
	7	6	5	4	3	2	1	0
Karanta/Rubuta	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Karanta/Rubuta	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Darajar farko	RAMEND	RAMEND	RAMEND	RAMEND	RAMEND	RAMEND	RAMEND	RAMEND
Darajar farko	RAMEND	RAMEND	RAMEND	RAMEND	RAMEND	RAMEND	RAMEND	RAMEND

Umarni aiwatar da Umarni

Wannan sashe yana bayyana ra'ayoyin lokacin isa ga gaba ɗaya don aiwatar da koyarwa. AVR CPU ne ke tafiyar da agogon CPU clkCPU, wanda aka samo shi kai tsaye daga tushen agogon da aka zaɓa don guntu. Ba a yi amfani da rabon agogo na ciki.

Hoto na 4-4 yana nuna daidaiton umarnin ɗaukarwa da aiwatar da umarnin da gine -ginen Harvard ya ba da kuma Rajista mai saurin shiga File ra'ayi. Wannan shine ainihin tsarin bututun don samun har zuwa 1 MIPS a kowane MHz tare da madaidaitan sakamako na musamman don ayyuka a kowane farashi, ayyuka a kowane agogo, da ayyuka ta kowane rukunin wuta.

Hoto na 4-5. Ayyukan ALU Single Cycle

Sake saitawa da katse Hanyar

AVR yana ba da samfuran katsewa daban-daban. Wadannan katsewa da kuma Sake Sake Vector kowannensu yana da keɓaɓɓen Vector na Shirin a cikin sararin ƙwaƙwalwar Shirin. Duk katsewa ana sanyawa mutum damar bits wanda dole ne a rubuta ma'ana daya tare da Global katsewa Enable bit a cikin Register Matsayi don bawa damar katsewa.

Adireshin mafi ƙasƙanci a cikin sararin ƙwaƙwalwar Shirye-shiryen ta hanyar tsoho an bayyana su azaman Sake saitin da katse Vectors. Cikakken jerin vectors an nuna a "Katsewa" a shafi na 48. Jerin kuma yana tantance matakan fifiko na katsewa daban-daban. Theananan adireshin mafi girma shine matakin fifiko. Sake saitawa yana da fifiko mafi girma, kuma na gaba shine INT0 - Neman Tsagaitawa na waje 0.

Lokacin da katsewa ya faru, to Global katsewa Enable I-bit ana share shi kuma duk katsewar an kashe. Mai amfani da laushi zai iya rubuta dabaru daya zuwa I-bit don ba da damar katsewar gida. Duk katsewar da aka kunna zata iya katse aikin yau da kullun. An saita I-bit ta atomatik lokacin da aka dawo daga Umarnin Katsewa - RETI -

Akwai asali iri biyu katsewa. Nau'in farko yana farawa ne ta hanyar abin da ya saita Tutarda Cirewa. Don waɗannan katsewa, ana sanya Counter na Kayayyakin zuwa ainihin Mai katse Vector don aiwatar da aikin katsewa na yau da kullun, kuma kayan aiki ya share Tutar Cutar da ta dace. Hakanan za a iya share Tutar da aka katse ta hanyar rubuta mahimmin abu zuwa matsayin (s) ɗan tutar da za a share. Idan yanayin katsewa ya auku yayin da aka tsayar da abin da ya sa aka katse saitin, za a saita Tutar katsewa kuma a tuna ta har sai an katse saitin, ko kuma an goge tutar ta hanyar software. Hakanan, idan yanayi ko katsewa guda biyu ya faru yayin da aka dakatar da Interarfafa Globalarfafa Duniya, za a saita Tutar da ke daidai da za a tuna da ita har sai an saita bitanƙarar katsewa na Duniya, sannan za a aiwatar da shi ta hanyar tsari na fifiko.

Nau'in katsewa na biyu zai haifar idan dai yanayin katsewar yana nan. Waɗannan katsewa ba su da alamun Tushewa. Idan yanayin katsewa ya ɓace kafin a sami damar katsewa, to katsewar ba zai jawo ba.

Lokacin da AVR ya fita daga katsewa, koyaushe zai dawo zuwa babban shirin kuma ya aiwatar da ƙarin umarni ɗaya kafin a kawo duk wani katsewa da ke jiran.

Lura cewa Rijistar Matsayi ba'a adana ta atomatik lokacin shigar da aikin katsewa, ko dawowa idan aka dawo daga aikin katsewa. Dole ne a sarrafa wannan ta hanyar software.

Lokacin amfani da umarnin CLI don kashe katsewa, za a kashe katsewa nan da nan. Babu katsewa da za a aiwatar bayan umarnin CLI, koda kuwa yana faruwa lokaci guda tare da umarnin CLI. Wadannan tsohonample nuna yadda za a iya amfani da wannan don gujewa katsewa yayin jerin rubutattun EEPROM.

Lambar Majalisar Example

a cikin r16, SREG; Store darajar SREG

cli ; musaki katsewa yayin jerin lokaci

sbi EECR, EEMPE; fara rubuta EEPROM

sbi EECR, EEPE

fitar SREG, r16; dawo da ƙimar SREG (I-bit)

C Code Example

babban cSREG;

cSREG = SREG; /* adana darajar SREG */

/* kashe katsewa yayin jerin lokaci */

_CLI ();

EECR | = (1<

EECR | = (1 <

SREG = cSREG; /* mayar da darajar SREG (I-bit) */

Lokacin amfani da umarnin SEI don ba da damar katsewa, za a aiwatar da umarnin da ke biye da SEI kafin kowane katsewa ya katse, kamar yadda aka nuna a wannan tsohonample.

Lambar Majalisar Example

sai ; saita Ƙunƙarar Katsewar Duniya

barci; shiga barci, jiran katsewa

; bayanin kula: zai shiga bacci kafin wani lokacin

; katse (s)

C Code Example

_SAI(); /* saita Ƙunƙarar Katsewar Duniya */

_BARCI(); /* shiga barci, jira don katsewa */

/ * bayanin kula: zai shiga bacci kafin duk wani abin da zai biyo baya * /

Katse Lokacin Amsawa

Amsar katsewar aiwatarwa don duk katsewar AVR shine ƙarancin zagayowar agogo huɗu mafi ƙaranci. Bayan an zagaye agogo huɗu ana aiwatar da adireshin Vector don ainihin rikicewar sarrafawa na yau da kullun. A wannan lokacin zagayen agogo huɗu, ana tura Counter na Shirye-shiryen akan Dutsen. Vector yawanci tsalle ne ga aikin katsewa, kuma wannan tsalle yana ɗaukar zagaye agogo uku. Idan katsewa ya faru yayin aiwatar da umarnin zagaye da yawa, ana kammala wannan koyarwar kafin a dakatar da aikin. Idan katsewa ya auku lokacin da MCU yake cikin yanayin bacci, ana ba da lokacin amsa yankewa ta hanyar zagaye agogo huɗu. Wannan haɓaka yana zuwa ban da lokacin farawa daga zaɓin yanayin bacci da aka zaɓa.

Dawowa daga aikin katsewa na yau da kullun yana ɗaukar zagaye agogo huɗu. A yayin wadannan zagayen agogo hudu, ana sake fito da Counter Program (baiti biyu) daga Stack, Stack Pointer din ya karu da biyu, kuma an saita I-bit a SREG.

Orieswazon AVR

Wannan sashin yana bayanin banbancin tunani a cikin ATtiny25 / 45/85. Gine-ginen AVR yana da manyan wurare guda biyu na ƙwaƙwalwar ajiya, ƙwaƙwalwar Bayanai da sararin ƙwaƙwalwar Shirye-shirye. Bugu da kari, ATtiny25 / 45/85 yana dauke da Memorywar EEPROM don adana bayanai. Duk wuraren ƙwaƙwalwar ajiya guda uku masu layi ne kuma na yau da kullun.

-Waƙwalwar Shirye-shiryen Shirye-shiryen Sake Shiryawa

ATtiny25 / 45/85 ya ƙunshi baiti 2/4 / 8K by-On Inn-In-In-In-Tsarin Tsarin ƙwaƙwalwar ajiya wanda za'a iya sabunta shi don shirin. Tunda duk umarnin AVR yakai 16 ko 32 fadi, an shirya Flash azaman 1024/2048/4096 x 16.

Memorywaƙwalwar ajiyar Flash tana da jimiri na aƙalla rubuce rubuce / share 10,000. ATtiny25 / 45/85 Counter Program (PC) yana da faɗin 10/11/12 faɗi, don haka ya magance wuraren ƙwaƙwalwar 1024/2048/4096. "Shirin ƙwaƙwalwar ajiya - ming ”a shafi na 147 yana dauke da cikakken bayani kan saukar da data ta Flash ta amfani da SPI fil.

Za'a iya raba tebur masu ɗorewa a cikin dukkanin filin adireshin ƙwaƙwalwar ajiya (duba bayanin koyarwar ƙwaƙwalwar LPM - Load)

Hoto na 5-1. Taswirar Ƙwaƙwalwar Shirin

AMwaƙwalwar Bayanai na SRAM

Hoto na 5-2 yana nuna yadda ATtiny25 / 45/85 SRAM Memory ke tsara.

Ƙananan 224/352/607 wuraren ƙwaƙwalwar bayanai suna magance duka Rajista File, ƙwaƙwalwar I/O da bayanan SRAM na ciki. Wuraren 32 na farko suna magana da Rajista File, wurare 64 na gaba daidaitaccen ƙwaƙwalwar I/O, kuma wuraren 128/256/512 na ƙarshe suna magance SRAM bayanan ciki.

Hanyoyi daban-daban guda biyar don murfin ƙwaƙwalwar ajiyar bayanai: Kai tsaye, kai tsaye tare da ƙaura, kaikaice, madaidaiciya tare da Rage-rage, da kai tsaye tare da Ƙaruwa. A cikin Rijista File, yana yin rijista R26 zuwa R31 yana fasalta rajista mai nuna alamar kai tsaye.

Adireshin kai tsaye ya isa duk sararin bayanan.

Kai tsaye tare da Yanayin Sauyawa ya isa wurare adreshin 63 daga asalin adireshin da rajistar Y- ko Z ta bayar.

Lokacin amfani da hanyoyin yin rajista kai tsaye ba tare da ta atomatik da ƙari ba, adireshin yana yin rajista X, Y, da Z suna raguwa ko ƙari.

Rijistar manyan manufa guda 32, Rijistar I/O 64, da baiti na 128/256/512 na bayanan SRAM na cikin ATtiny25/45/85 duk ana samun su ta hanyar duk waɗannan hanyoyin magancewa. Rijista File an bayyana a cikin "Gen- eral Manufar Rijista File”A shafi na 10.

Hoto na 5-2. Taswirar Ƙwaƙwalwar Data

Shigar Data Memory Lokaci

Wannan sashe yana bayyana ra'ayoyin lokacin isa ga gaba ɗaya don samun damar ƙwaƙwalwar ajiya. Ana yin damar shiga bayanan SRAM na ciki a cikin zagayowar clkCPU biyu kamar yadda aka bayyana a ciki Hoto na 5-3.

Hoto na 5-3. Za a iya yin amfani da SRAM Data On-chip Cycles EEPROM Memory Data

ATtiny25 / 45/85 ya ƙunshi baiti 128/256/512 na ƙwaƙwalwar ajiyar EEPROM. An shirya shi azaman sarari daban na bayanai, wanda za'a iya karanta kuma a rubuta baiti ɗaya. EEPROM yana da jimiri na akalla 100,000 na rubuta / shafe hawan keke. Samun damar tsakanin EEPROM da CPU an bayyana shi a cikin wadannan, yana tantance Takaddun Adireshin EEPROM, da Rijistar Bayanai na EEPROM, da kuma Rajistar Sarrafa EEPROM. Don cikakkun bayanai duba "Sauke Serial" a shafi na 151.

EEPROM Karanta / Rubuta Dama

Rajistar Samun EEPROM ana samun damarta a sararin I / O.

An bayar da lokacin samun damar rubutu na EEPROM a ciki Tebur 5-1 a shafi na 21. Aiki na lokaci-lokaci, duk da haka, yana barin software mai amfani ya gano lokacin da za'a iya rubuta byte na gaba. Idan lambar mai amfani ta ƙunshi umarnin da ke rubuta EEPROM, dole ne a ɗauki wasu matakan tsaro. A cikin matattarar wutar lantarki, VCC na iya tashi ko faɗuwa a hankali

Ƙarfi/ƙasa. Wannan yana haifar da na’urar na ɗan wani lokaci don yin aiki da ƙarfitage ƙasa da ƙayyadaddun ƙayyadaddun ƙima don mitar agogon da aka yi amfani da shi. Duba "Hana cin hanci da rashawa EEPROM" a shafi na 19 don cikakkun bayanai game da yadda za a guje wa matsaloli a cikin waɗannan yanayi.

Don hana rubutun EEPROM ba da gangan ba, dole ne a bi takamaiman hanyar rubutu. Koma zuwa "Atomic Shirye-shiryen Baiti ”a shafi na 17 kuma “Tsaga Tsara Tsara Tsara Tsara shiri” a shafi na 17 don cikakkun bayanai akan wannan.

Lokacin da aka karanta EEPROM, ana dakatar da CPU don zagaye agogo huɗu kafin aiwatar da umarni na gaba. Lokacin da aka rubuta EEPROM, ana dakatar da CPU don zagayowar agogo biyu kafin a aiwatar da umarni na gaba.

Tsarin Atomic Byte

Amfani da Tsarin Atomic Byte shi ne hanya mafi sauki. Lokacin rubuta baiti zuwa EEPROM, mai amfani dole ne ya rubuta adireshin a cikin Rijistar EEAR da bayanai zuwa cikin EEDR Register. Idan EEPMn ragowa ba sifiri, rubuta EEPE (a cikin hawan keke huɗu bayan an rubuta EEMPE) zai haifar da goge / rubuta aiki. Dukkanin gogewa da rubutu ana yin su a cikin aiki ɗaya kuma ana ba da cikakken lokacin shirye-shirye a ciki Tebur 5-1 a shafi na 21. EEPE bit ya kasance an saita har sai an goge da rubuta ayyukan an kammala su. Duk da yake na'urar tana cikin aiki da shirye-shirye, ba zai yiwu a yi wani aiki na EEPROM ba.

Tsara Tsara Tsara Tsinkaya

Yana yiwuwa a raba gogewa da rubutu a cikin ayyuka biyu daban -daban. Wannan na iya zama da amfani idan tsarin yana buƙatar ɗan gajeren lokacin isa ga wani takaitaccen lokaci (yawanci idan wutar lantarki voltagya fado). Don samun ci gaba- tage na wannan hanyar, ana buƙatar cewa an share wuraren da za a rubuta kafin aikin rubutawa. Amma tunda ayyukan sharewa da rubuce-rubuce sun kasu kashi biyu, yana yiwuwa a yi ayyukan goge lokacin da tsarin ya ba da damar yin ayyuka masu mahimmanci na lokaci (musamman bayan Ƙarfafawa).

Goge

Don share baiti, dole ne a rubuta adireshin zuwa EEAR. Idan EEPMn ragowa yakai 0b01, rubuta EEPE (a cikin zagaye huɗu bayan an rubuta EEMPE) zai haifar da aikin sharewa kawai (ana ba da lokacin shiryawa a Tebur 5-1 akan shafi na 21). Bakin EEPE ya kasance an saita shi har sai aikin sharewa ya kammala. Duk da yake na'urar tana cikin shirye-shirye, ba zai yiwu a yi wani aiki na EEPROM ba.

Rubuta

Don rubuta wuri, dole ne mai amfani ya rubuta adireshin cikin EEAR da bayanan zuwa EEDR. Idan EEPMn ragowa yakai 0b10, rubuta EEPE (a tsakanin zagaye hudu bayan an rubuta EEMPE) zai haifar da aikin rubuta kawai (ana bada lokacin shiryawa a Tebur 5-1 a shafi na 21). EEPE bit ya kasance an saita har sai aikin rubutu ya cika. Idan ba a share wurin da za a rubuta kafin a rubuta ba, dole ne a yi la’akari da bayanan da aka adana kamar ɓatattu. Duk da yake na'urar tana cikin aiki da shirye-shirye, ba zai yiwu a yi wani aiki na EEPROM ba.

Ana amfani da Oscillator mai ƙayyadadden lokaci don samun damar EEPROM. Tabbatar da yawan Oscillator yana cikin buƙatun da aka bayyana a ciki “OSCCAL - Oscillator Calibration Register” a shafi na 31.

Lambar nan mai zuwa examples suna nuna taro ɗaya da aikin C ɗaya don gogewa, rubutawa, ko rubutun atomic na EEPROM. Tsohonamples suna ɗauka cewa ana sarrafa katsewa (misali, ta hanyar dakatar da katsewa a duniya) don kada wani katsewa ya faru yayin aiwatar da waɗannan ayyukan.

Lambar Majalisar Example

EEPROM_ rubuta:

; Jira don kammala rubutun da ya gabata

sbic EECR, EEPE

rjmp EEPROM_write

; Saita yanayin Shiryawa

ldi r16, (0<<EEPM1)|(0<<EEPM0)

Farashin EECR,r16

; Kafa adireshi (r18: r17) a cikin rajistar adireshi

daga EEARH, r18

daga EARL, r17

; Rubuta bayanai (r19) zuwa rijistar bayanai

daga EEDR, r19

; Rubuta ma'ana ɗaya zuwa EEMPE

sbi EECR, EEMPE

; Fara rubuta rubutun eeprom ta hanyar saita EEPE

sbi EECR, EEPE

ret

C Code Example

void EEPROM_write(wanda ba a sanya hannu ba char ucAddress, ucData mara sa hannu)

{

/* Jira don kammala rubutun baya */ yayin da (EECR & (1<

;

/* Saita Yanayin Shirye-shiryen */

EECR = (0 <

/ * Kafa adireshi da rajistar bayanai * / EEAR = ucAddress;

EEDR = ucData;

/* Rubuta ma'ana daya zuwa EEMPE */

EECR | = (1 <

/ * Fara eeprom rubuta ta saita EEPE * /

EECR | = (1 <

}

Lambar gaba examples nuna taro da ayyukan C don karanta EEPROM. Tsohonamples ɗauka cewa ana sarrafa katsewa don kada wani katsewa ya faru yayin aiwatar da waɗannan ayyukan.

Lambar Majalisar Example

EEPROM_karanta:

; Jira don kammala rubutun da ya gabata

sbic EECR, EEPE

rjmp EEPROM_karanta

; Kafa adireshi (r18: r17) a cikin rajistar adireshi

daga EEARH, r18

daga EARL, r17

; Fara fara karantawa ta hanyar rubuta EERE

sbi EECR, EERE

; Karanta bayanai daga rajistar bayanai

r16,EEDR

ret

C Code Example

EEPROM_karanta (wanda ba a sanya hannu ba char ucAddress)

{

/ * Jira don kammala rubutun da ya gabata * /

yayin (EECR & (1 <

;

/ * Kafa adireshin adireshin * / EEAR = ucAddress;

/* Fara eeprom karanta ta rubuta EERE */

EECR | = (1 <

/ * Mayar da bayanai daga rajistar bayanai * /

dawo da EEDR;

}

Hana Cin hanci da rashawa EEPROM

A lokacin ƙananan VCC, bayanan EEPROM na iya lalacewa saboda wadatar voltage yayi ƙasa sosai don CPU da EEPROM suyi aiki yadda yakamata. Waɗannan batutuwa iri ɗaya ne da tsarin matakan jirgi ta amfani da EEPROM, kuma yakamata a yi amfani da hanyoyin ƙira ɗaya.

Lalacewar bayanan EEPROM na iya haifar da yanayi biyu lokacin da voltage yayi ƙasa sosai. Na farko, jerin rubutu na yau da kullun zuwa EEPROM yana buƙatar ƙaramin ƙarartage don aiki daidai. Abu na biyu, CPU da kanta na iya aiwatar da umarni ba daidai ba, idan ƙimar samarwatage yayi ƙasa da ƙasa.

Ba za a iya kauce wa lalata bayanan EEPROM ba ta hanyar bin wannan shawarar shawarar:

Ci gaba da AVR RESET yana aiki (ƙarami) a lokacin rashin isasshen ƙarfin wutan lantarkitage. Ana iya yin wannan ta hanyar ba da damar Mai Binciken Brown-out na ciki (BOD). Idan matakin ganewa na BOD na ciki bai dace da

matakin ganowa da ake buƙata, za a iya amfani da ƙananan da'irar kariyar sake saitin VCC na waje. Idan sake saiti ya faru yayin da aikin rubutu ke ci gaba, za a kammala aikin rubuta muddin wutar lantarki voltage ya ishe.

I / O Memory

An nuna ma'anar sararin I / O na ATtiny25 / 45/85 a ciki "Takaita Takardar" a shafi na 200.

Duk ATtiny25 / 45/85 I / Os da kayan haɗi ana sanya su a cikin sararin I / O. Duk wuraren I / O na iya samun dama ta hanyar LD / LDS / LDD da umarnin ST / STS / STD, canja wurin bayanai tsakanin mahimman ayyukan rijista na 32 da kuma I / O sarari. I / O Rijista tsakanin zangon adireshin 0x00 - 0x1F ana samun damar kai tsaye ta hanyar amfani da umarnin SBI da CBI. A cikin waɗannan rijistar, ana iya bincika ƙimar rago ɗaya ta amfani da umarnin SBIS da SBIC. Dubi sashin koyarwar don ƙarin cikakkun bayanai. Lokacin amfani da takamaiman umarni na I / O IN da OUT, dole ne a yi amfani da adiresoshin I / O 0x00 - 0x3F. Lokacin magance I / O Rijista azaman sararin bayanai ta amfani da umarnin LD da ST, dole ne a ƙara 0x20 zuwa waɗannan adiresoshin.

Don dacewa tare da na'urori na gaba, yakamata a rubuta ragowa zuwa sifili idan an samu dama. Kada a rubuta adiresoshin ƙwaƙwalwar ajiya na I / O

Wasu daga Tutocin Matsayi ana share su ta hanyar rubuta mai ma'ana a gare su. Lura cewa umarnin CBI da SBI zasuyi aiki ne kawai akan takaitaccen bit, kuma saboda haka za'a iya amfani dashi akan rijistar da ke ɗauke da irin waɗannan Tutocin Matsayi. Umarnin CBI da SBI suna aiki tare da rijista 0x00 zuwa 0x1F kawai.

Bayanin I / O da Peripherals Control Register an bayyana su a cikin sassan na gaba.

Yi rijista bayanin

EEARH - Rajistar Adireshin EEPROM

Bit	7	6	5	4	3	2	1	0
0x1F ku	–	–	–	–	–	–	–	EEAR 8	EARH
Karanta/Rubuta	R	R	R	R	R	R	R	R/W
Darajar farko	0	0	0	0	0	0	0	X/0

Bits 7: 1 - Res: An adana ragowa

An adana waɗannan ragowa don amfanin nan gaba kuma koyaushe ana karanta su azaman sifili.

Bits 0 - EEAR8: Adireshin EEPROM

Wannan shine mafi mahimmancin adireshin EEPROM na ATtiny85. A cikin na'urori da basu da EEPROM, watau ATtiny25 / ATtiny45, an adana wannan bit ɗin kuma koyaushe zai karanta sifili. Initialimar farkon Adireshin Adireshin EEPROM (EEAR) ba a bayyana ba kuma saboda haka dole ne a rubuta ƙimar da ta dace kafin a isa ga EEPROM.

EEARL - Adireshin Adireshin EEPROM

Bit

0x1E	EEAR 7	EEAR 6	EEAR 5	EEAR 4	EEAR 3	EEAR 2	EEAR 1	EEAR 0	EARL
Rear / Rubuta	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Darajar farko	X	X	X	X	X	X	X	X

Bit 7 - EEAR7: Adireshin EEPROM

Wannan shine mafi mahimmancin adireshin EEPROM na ATtiny45. A cikin na'urori da basu da EEPROM, watau ATtiny25, an adana wannan bit ɗin kuma koyaushe zai karanta sifili. Theimar farko ta Adireshin Adireshin EEPROM (EEAR) ba a bayyana ba kuma dole ne a rubuta ƙimar da ta dace kafin a isa ga EEPROM.

Bits 6: 0 - EEAR [6: 0]: Adireshin EEPROM

Waɗannan su ne ƙananan (ƙananan) na Rajistar Adireshin EEPROM. Ana magana da baiti na EEPROM bayanan layi-layi a cikin zangon 0… (128/256 / 512-1). Valueimar farko na EEAR ba a bayyana ba kuma dole ne a rubuta ƙimar da ta dace kafin a sami damar EEPROM.

EEDR - EEPROM Rijistar Bayanai

Bit	7	6	5	4	3	2	1	0
0 x1d	Bayanin EDR7	Bayanin EDR6	Bayanin EDR5	Bayanin EDR4	Bayanin EDR3	Bayanin EDR2	Bayanin EDR1	Bayanin EDR0	EDR
Karanta/Rubuta	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Darajar farko	0	0	0	0	0	0	0	0

Ga aikin rubuta EEPROM rajistar EEDR ta ƙunshi bayanan da za a rubuta wa EEPROM a cikin adireshin da EEAR Register ya bayar. Ga aikin EEPROM na karantawa, EEDR yana dauke da bayanan da aka karanta daga

EEPROM a adireshin da EEAR ya bayar. 5.5.4 EECR - Rajistar Sarrafa EEPROM
Bit 7 6 5			4	3	2	1	0
0x1c ku –	–	EPM1	EPM0	EERIE	EEMPE	EPE	NAN	Farashin EECR
Karanta / Rubuta R R R / W.			R/W	R/W	R/W	R/W	R/W
Valimar farko 0 0 X			X	0	0	X	0

Bit 7 - Res: An adana Bit

An adana wannan bit ɗin don amfanin nan gaba kuma koyaushe za'a karanta shi azaman 0 a ATtiny25 / 45/85. Don dacewa tare da na'urorin AVR na gaba, koyaushe ku rubuta wannan ɗan ba komai. Bayan karantawa, rufe wannan bit ɗin.

Bit 6 - Res: An adana Bit

An adana wannan bit ɗin a cikin ATtiny25 / 45/85 kuma koyaushe za'a karanta shi azaman sifili.

Bits 5: 4 - EEPM [1: 0]: Yanayin Yanayin Shirye-shiryen EEPROM

Yanayin shirye-shiryen EEPROM na shirye-shiryen ragowa yana bayyana wane aikin shirye-shiryen da zai haifar yayin rubuta EEPE. Zai yiwu a shirya bayanai a cikin aikin atom guda ɗaya (goge tsohuwar ƙimar da shirin sabon ƙimar) ko raba ayyukan Goge da Rubuta cikin ayyuka daban-daban guda biyu. Ana nuna lokacin Shiryawa don halaye daban-daban a ciki Table 5-1. Yayin da aka saita EEPE, duk abin da aka rubuta zuwa EEPMn ba za a yi watsi da shi ba. Yayin sake saiti, za a sake saita ragogin EEPMn zuwa 0b00 sai dai idan EEPROM yana cikin shirye-shirye.

Tebur 5-1. Yanayin EEPROM Bits

EPM1	EPM0	Lokacin Shiryawa	Aiki
0	0	3.4 ms	Gogewa da Rubutawa a cikin aiki ɗaya (Atomic Operation)
0	1	1.8 ms	Goge kawai
1	0	1.8 ms	Rubuta Kawai
1	1	–	An tanadi don amfani nan gaba

Bit 3 - EERIE: EEPROM Shirye Shirye Ya Kunna

Rubuta EERIE ga mutum yana bawa damar dakatar da Shirye-shiryen EEPROM idan an saita I-bit a cikin SREG. Rubuta EERIE ba komai zai iya katse shi. EEPROM Shirye Shirye yana haifar da katsewa koyaushe lokacin da Nonwaƙwalwar vowazon mara ma'ana ke shirye don shirye-shirye.

Bit 2 - EEMPE: EEPROM Jagorar Jagora Mai Amfani

EEMPE bit yana yanke hukunci ko rubuta EEPE ga ɗayan zaiyi tasiri ko a'a.

Lokacin da aka saita EEMPE, saita EEPE a cikin kewayon agogo huɗu zai shirya EEPROM a adireshin da aka zaɓa. Idan EEMPE ba komai, sanya EEPE ba zaiyi wani tasiri ba. Lokacin da aka rubuta EEMPE ga ɗaya ta software, kayan aiki zasu share ɗan ba komai bayan zagaye agogo huɗu.

Bit 1 - EEPE: Enable EEPROM Shirin

Shirye-shiryen EEPROM Enable Signal EEPE shine siginar ba da damar shirye-shiryen zuwa EEPROM. Lokacin da aka rubuta EEPE, za a shirya EEPROM daidai da saitin rarar EEPMn. Dole ne a rubuta bit na EEMPE ga ɗayan kafin a rubuta mai ma'ana ga EEPE, in ba haka ba babu rubutun EEPROM da zai gudana. Lokacin da lokacin samun damar rubuta ya wuce, ana share bitar EEPE da kayan aiki. Lokacin da aka saita EEPE, an dakatar da CPU don sake zagayowar biyu kafin aiwatar da umarni na gaba.

Bit 0 - EERE: EEPROM Karanta Enable

EEPROM Karanta Enable Signal - EERE - shine bugun karantawa zuwa EEPROM. Lokacin da aka saita madaidaicin adireshi a cikin Rajistar EEAR, dole ne a rubuta EERE bit ga ɗayan don faɗakar da karatun EEPROM. Samun damar karanta EEPROM yana daukar umarni daya, kuma ana samun bayanan da aka nema nan da nan. Lokacin da aka karanta EEPROM, an dakatar da CPU don zagaye huɗu kafin aiwatar da umarni na gaba. Ya kamata mai amfani ya zaba ɗan EEPE kafin ya fara aikin karantawa. Idan aikin rubutu yana gudana, ba zai yuwu a karanta EEPROM ba, ko a canza Rajistar EEAR.

Tsarin Clock da Zabuka

Tsarin agogo da Rarraba su

CPU agogo

Ana karkatar da agogon CPU zuwa sassan tsarin da ya shafi aikin AVR core. FitampAbubuwan irin waɗannan samfuran sune Rijistar Manufa File, Rijistar Hali da ƙwaƙwalwar ajiyar bayanai da ke riƙe da Stin Pointer. Dakatar da agogon CPU yana hana ainihin yin ayyuka gaba ɗaya da lissafi.

Agogon I / O - clkI / O

Aikin I / O yana amfani da yawancin modirar modal na I / O, kamar Mai ƙidayar lokaci / Counter. Ana amfani da agogo na / O ta hanyar ruptaddamarwar ternalasashen waje, amma lura cewa wasu rikice-rikice na waje ana gano su ta hanyar maganganu marasa daidaituwa, suna ba da damar gano irin waɗannan katsewar koda kuwa an dakatar da agogon I / O.

Flash Clock - clkFLASH

Agogon Flash yana sarrafa aikin Flash ke dubawa. Agogon Flash yawanci yana aiki lokaci ɗaya tare da agogon CPU.

ADC Clock - clkADC

Ana ba da ADC tare da keɓaɓɓen yankin agogo. Wannan yana ba da damar dakatar da agogo na CPU da I / O domin rage amo da aka samu ta hanyar dijital dijital. Wannan yana bada cikakken sakamakon ADC.

PLL na ciki don Fastarfin Agogon Keɓaɓɓe - clkPCK

PLL na ciki a cikin ATtiny25 / 45/85 yana haifar da mitar agogo wanda aka ninka 8x daga shigarwar tushe. Ta hanyar tsoho, PLL yana amfani da fitarwa na ciki, 8.0 MHz RC oscillator azaman tushe. A madadin, idan an saita LSM na bit na PLLCSR PLL zai yi amfani da fitowar RC oscillator kashi biyu. Don haka fitowar PLL, agogon gefe mai sauri shine 64 MHz. Za'a iya zaɓar agogo na gefe mai sauri, ko agogo wanda aka ƙayyade daga wannan, azaman tushen agogo don Mai eridayar lokaci / Counter1 ko azaman agogon tsarin. Duba Hoto na 6-2. Mitar agogo mai sauri na gefe yana raba biyu lokacin da aka saita LSM na PLLCSR, yana haifar da mitar agogo na 32 MHz. Lura, ba za a iya saita LSM ba idan ana amfani da PLLCLK azaman agogon tsarin.

Hoto na 6-2. PCK tsarin rufewa.

An kulle PLL akan RC oscillator kuma daidaita RC oscillator ta hanyar rajistar OSCCAL zai daidaita agogon gefe mai sauri a lokaci guda. Koyaya, koda an ɗauki oscillator na RC zuwa mafi girma fiye da 8 MHz, saurin agogo mai gefe ya cika a 85 MHz (mafi munin yanayi) kuma yana ci gaba da juyawa a mafi girman damar. Ya kamata a lura cewa PLL a cikin wannan yanayin ba a kulle shi ba tare da agogon oscillator RC. Sabili da haka, ana ba da shawarar kada a ɗauki canje-canje na OSCCAL zuwa mafi girma fiye da 8 MHz don kiyaye PLL a cikin madaidaicin yanayin aiki.

An kunna PLL na ciki lokacin da:

An saita bit ɗin PLLE a cikin rajistar PLLCSR.

An tsara fuse na CKSEL zuwa '0001'.

An tsara fuse na CKSEL zuwa '0011'.

Ana saita bit PLOCK PLLCSR lokacin da aka kulle PLL. Dukansu RC oscillator na ciki da PLL ana kashe su cikin wutar ƙasa da yanayin bacci.

PLL na ciki a Yanayin Haɗin ATtiny15

Tunda ATtiny25 / 45/85 na'urar ƙaura ce ga masu amfani da ATtiny15 akwai yanayin daidaita ATtiny15 don daidaiton unguwa. Yanayin dacewa na ATtiny15 an zaɓi shi ta hanyar shirya CKSEL ya haɗa zuwa '0011'.

A cikin yanayin daidaitawa na ATtiny15 an daidaita mitar RC oscillator na ciki zuwa 6.4 MHz kuma an saita maɓallin yawa na PLL zuwa 4x. Duba Hoto na 6-3. Tare da waɗannan gyare-gyaren tsarin agogo yana dacewa da ATtiny15 kuma sakamakon agogon gefe mai sauri yana da ƙarfin 25.6 MHz (daidai yake da ATtiny15).

Hoto na 6-3. Tsarin agogo na PCK a cikin Yanayin dacewa na ATtiny15.

Tushen agogo

Na'urar tana da zaɓuɓɓukan tushen agogo masu zuwa, zaɓaɓɓu ta hanyar Flash Fuse rago kamar yadda aka nuna a ƙasa. Agogo daga tushen da aka zaɓa shi ne shigar da janareta na agogon AVR, kuma an tura shi zuwa matakan da suka dace.

Table 6-1. Zaɓuɓɓukan Clocking Na'ura Zaɓi

Zaɓin Clocking Na'ura	CKSEL[3:0](1)
Agogon Waje (duba shafi na 26)	0000
Babban Yanayin PLL Clock (duba shafi na 26)	0001
Calibrated Ciki Oscillator (duba shafi na 27)	0010(2)
Calibrated Ciki Oscillator (duba shafi na 27)	0011(3)
Ciki 128 kHz na Oscillator (duba shafi na 28)	0100
-Ananan-Frequency Crystal Oscillator (duba shafi na 29)	0110
Crystal Oscillator / Yumbu Resonator (duba shafi na 29)	1000-1111
Ajiye	0101, 0111

Ga dukkan fius “1” na nufin ba a shirya su ba yayin da “0” na nufin an tsara su.

An kawo na'urar tare da zaɓin wannan zaɓi.

Wannan zai zabi Yanayin Karfafawa na ATtiny15, inda aka raba agogon tsarin da hudu, wanda ke haifar da saurin MHz 1.6. Don ƙarin bayani, gani "Calibrated Internal Oscillator" a shafi na 27.

Ana ba da zaɓuɓɓuka daban-daban don kowane zaɓi na clocking a cikin sassan da ke gaba. Lokacin da CPU ta farka daga Power-down, ana amfani da tushen agogo da aka zaɓa don lokacin farawa, tabbatar da daidaitaccen aikin Oscillator kafin fara aiwatar da umarni. Lokacin da CPU ya fara daga sake saiti, akwai ƙarin jinkiri wanda zai ba da ikon zuwa matakin karko kafin fara aiki na yau da kullun. Ana amfani da Watchdog Oscillator don sanya lokaci wannan lokaci na ainihi na lokacin farawa. Yawan WDT Oscillator hawan keke da aka yi amfani da su don kowane lokacin fita yana cikin Table 6-2.

Table 6-2. Adadin Zagayen Oscillator na Watchdog

Nau'in Lokaci-fita	Adadin Zagaye
4 ms	512
64 ms	8K (8,192)

Agogon Waje

Don fitar da na'urar daga tushen agogo na waje, CLKI ya kamata a tura shi kamar yadda aka nuna a ciki Hoto na 6-4. Don gudanar da na'urar a kan agogo na waje, dole ne a tsara CKSEL Fuses zuwa "00".

Hoto na 6-4. Kanfigareshan Direban Agogo na Waje

Lokacin da aka zaɓi wannan asalin agogo, SUT Fuses ne ke ƙayyade lokutan farawa kamar yadda aka nuna a ciki Table 6-3.

Table 6-3. Lokutan farawa don zaɓin agogon waje

SUT[1:0]	Fara-up Lokaci daga Power-saukar	Dearin jinkiri daga Sake saiti	An Shawarar Amfani
00	6 CK ku	14CK	BOD ya kunna
01	6 CK ku	14CK + 4 ms	Risingarfin tashi da sauri
10	6 CK ku	14CK + 64 ms	Sannu a hankali ikon tashi
11	Ajiye

Lokacin amfani da agogo na waje, ana buƙatar kaucewa canje-canje kwatsam a cikin mitar agogo da aka sanya don tabbatar da tsayayyen aikin MCU. Bambancin mita fiye da 2% daga zagayowar agogo ɗaya zuwa na gaba na iya haifar da halin da ba za a iya faɗi ba. Ana buƙatar tabbatar da cewa an riƙe MCU a cikin Sake saita yayin waɗannan canje-canje a cikin agogo.

Lura cewa ana iya amfani da Presale na agogo don aiwatar da sauye-sauye na saurin agogo na ciki yayin tabbatar da daidaitaccen aiki. Koma zuwa "Mai ba da izini na tsarin agogo" a shafi na 31 don cikakkun bayanai.

Babban Yanayin PLL Clock

Akwai PLL na ciki wanda ke ba da ƙimar agogo 64 MHz wanda aka kulle zuwa RC Oscillator don amfani da Mai Timidayar /idaya / Counter1 kuma don tushen agogon tsarin. Lokacin da aka zaɓa azaman tushen tsarin agogo, ta hanyar shirya CKSEL ya haɗa zuwa '0001', ana raba shi huɗu kamar yadda aka nuna a Table 6-4.

Table 6-4. Hanyoyin Aiki Mai Girma PLL

CKSEL[3:0]	Marasa suna
0001	16 MHz

Lokacin da aka zaɓi wannan asalin agogo, SUT fuses ne ke ƙayyade lokutan farawa kamar yadda aka nuna a ciki Table 6-5.

Table 6-5. Lokutan farawa don Babban Agogon PLL

SUT[1:0]	Lokacin Farawa daga Downarfin .asa	Ƙarin Jinkiri daga Sake saitin Ƙarfi (VCC = 5.0V)	Shawarar amfani
00	14CK + 1K (1024) CK + 4 ms	4 ms	BOD ya kunna

Table 6-5. Lokutan farawa don Babban Agogon PLL

SUT[1:0]	Lokacin Farawa daga Downarfin .asa	Ƙarin Jinkiri daga Sake saitin Ƙarfi (VCC = 5.0V)	Shawarar amfani
01	14CK + 16K (16384) CK + 4 ms	4 ms	Risingarfin tashi da sauri
10	14CK + 1K (1024) CK + 64 ms	4 ms	Sannu a hankali ikon tashi
11	14CK + 16K (16384) CK + 64 ms	4 ms	Sannu a hankali ikon tashi

Calibrated Ciki Oscillator

Ta hanyar tsoho, Oscillator na ciki RC yana ba da kimanin agogon 8.0 MHz. Ko da yake voltage da yanayin zafin jiki, mai amfani zai iya daidaita wannan agogon sosai. Duba "Calibrated Ciki RC Oscillator Accu- racy ”a shafi na 164 kuma "Gudun Oscillator na Cikin Gida" a shafi na 192 don ƙarin bayani. An aika na'urar tare da CKDIV8 Fuse wanda aka tsara. Duba "Mai ba da izini na tsarin agogo" a shafi na 31 don ƙarin bayani.

Ana iya zaɓar wannan agogon azaman agogon tsarin ta hanyar shirya Cuses na Fuse kamar yadda aka nuna a ciki Tebur 6-6 akan shafi

27. Idan aka zaɓa, zai yi aiki ba tare da abubuwan haɗin waje ba. Yayin sake saiti, kayan aiki suna ɗora darajar ƙimar daidaitawa a cikin rijistar OSCCAL kuma ta haka ne yake ta atomatik calibrates RC Oscillator. An nuna daidaito na wannan ma'aunin kamar matsayin ma'aunin Masana a Tebur 21-2 a shafi na 164.

Ta canza rijistar OSCCAL daga SW, duba “OSCCAL - Oscillator Calibration Register” a shafi na 31, yana yiwuwa a sami daidaito mafi girma fiye da ta amfani da ma'aunin masana'anta. An nuna daidaito na wannan aikin a matsayin ma'aunin Mai amfani a ciki Tebur 21-2 a shafi na 164.

Lokacin da aka yi amfani da wannan Oscillator azaman agogon guntu, za a yi amfani da Watchdog Oscillator don Mai Kula da Lokaci da kuma Sake saita Lokaci-fita. Don ƙarin bayani game da ƙimar kayyadadden tsari, duba sashin "Kali- Bration Bytes ”a shafi na 150.

Hakanan za'a iya saita oscillator na ciki don samar da agogo 6.4 MHz ta hanyar rubuta CKSEL fuses zuwa "0011", kamar yadda aka nuna a Table 6-6 a ƙasa. An mayar da wannan saitin azaman Yanayin Haɗuwa da ATtiny15 kuma ana da niyyar samar da tushen agogo mai ƙididdiga a 6.4 MHz, kamar yadda yake a ATtiny15. A cikin Yanayin Haɗin ATtiny15 PLL yana amfani da oscillator na ciki wanda yake gudana a 6.4 MHz don ƙirƙirar siginar agogo na gefe na 25.6 MHz don Mai ƙidaya / Counter1 (duba “8-bit Mai ƙidayar lokaci / Counter1 a cikin Yanayin ATtiny15 ”a shafi na 95). Lura cewa a cikin wannan yanayin aikin siginar agogo 6.4 MHz koyaushe ana raba ta huɗu, suna ba da agogon tsarin 1.6 MHz.

Table 6-6. Hanyoyin Aiki na RC Oscillator na ciki

CKSEL[3:0]	Marasa suna
0010(1)	8.0 MHz
0011(2)	6.4 MHz

An kawo na'urar tare da zaɓin wannan zaɓi.

Wannan saitin zai zaɓi Yanayin Karɓar ATtiny15, inda aka raba agogon tsarin zuwa huɗu, wanda ya haifar da mita MHz 1.6.

Lokacin da aka zaɓi mai ƙwanƙwasa 8 MHz oscillator na ciki azaman tushen agogo, SUT Fuses ne ke ƙayyade lokutan farawa kamar yadda aka nuna a Table 6-7 kasa.

Table 6-7. Lokutan farawa don Agogon Oscillator na ciki Calibrated

SUT[1:0]	Fara-up Lokaci daga Power-saukar	Ƙarin Jinkiri daga Sake saitin (VCC = 5.0V)	An Shawarar Amfani
00	6 CK ku	14CK(1)	BOD ya kunna
01	6 CK ku	14CK + 4 ms	Risingarfin tashi da sauri
10(2)	6 CK ku	14CK + 64 ms	Sannu a hankali ikon tashi
11	Ajiye

1. Idan an tsara fius ɗin RSTDISBL, wannan lokacin farawa zai ƙaru zuwa 14CK + 4 ms don tabbatar da ana iya shiga yanayin shirye-shirye.
2. An kawo na'urar tare da wannan zaɓin zaɓi.

A cikin ATtiny15 Yanayin Yanayin Karɓi ya ƙaddara ta SUT firs kamar yadda aka nuna a ciki Table 6-8 kasa.

Table 6-8. Lokutan farawa don agogon Oscillator na ciki Calibrated (a cikin Yanayin ATtiny15)

SUT[1:0]	Fara-up Lokaci daga Power-saukar	Ƙarin Jinkiri daga Sake saitin (VCC = 5.0V)	An Shawarar Amfani
00	6 CK ku	14CK + 64 ms
01	6 CK ku	14CK + 64 ms
10	6 CK ku	14CK + 4 ms
11	1 CK ku	14CK(1)

Lura: Idan aka tsara fuse RTDISBL, wannan lokacin farawa za a ƙara zuwa 14CK + 4 ms don tabbatar da cewa ana iya shigar da yanayin shirye-shirye.

A taƙaice, ana iya samun ƙarin bayani game da Yanayin Haɗin ATtiny15 a sashe "Port B (PB5: PB0)" akan shafi na 2, "PLL na cikin gida a Yanayin Haɗin ATtiny15" a shafi na 24, "8-bit Mai ƙidayar lokaci / Counter1 a ATtiny15 Yanayin" a kan shafi na 95, "Ituntatawa na cire kuskureWIRE" a shafi na 140, "Calibration Bytes" a shafi na 150 kuma a cikin tebur "Mai ba da izinin agogo Zaɓi ”a shafi na 33.

Ciki 128 kHz na Oscillator

Oscillator na ciki na 128 kHz ƙaramin iko Oscillator ne wanda ke ba da agogon 128 kHz. Mitar tana ƙididdigewa a 3V da 25°C. Ana iya zaɓar wannan agogon azaman agogon tsarin ta hanyar tsara CKSEL Fuses zuwa "0100".

Lokacin da aka zaɓi wannan asalin agogo, SUT Fuses ne ke ƙayyade lokutan farawa kamar yadda aka nuna a ciki Table 6-9.

Table 6-9. Lokacin farawa don 128 kHz na ciki Oscillator

SUT[1:0]	Fara-up Lokaci daga Power-saukar	Dearin jinkiri daga Sake saiti	An Shawarar Amfani
00	6 CK ku	14CK(1)	BOD ya kunna
01	6 CK ku	14CK + 4 ms	Risingarfin tashi da sauri
10	6 CK ku	14CK + 64 ms	Sannu a hankali ikon tashi
11	Ajiye

Lura: Idan aka tsara fuse RTDISBL, wannan lokacin farawa za a ƙara zuwa 14CK + 4 ms don tabbatar da cewa ana iya shigar da yanayin shirye-shirye.

-Ananan-Frequency Crystal Oscillator

Don amfani da kristal agogo na 32.768 kHz a matsayin tushen agogo don na'urar, dole ne a zaɓi Osananan-mita Crystal Oscillator ta hanyar saita CKSEL fis to '0110'. Ya kamata a haɗa lu'ulu'u kamar yadda aka nuna a ciki Hoto na 6-5. Don samun damar ɗaukar nauyi don kristal 32.768 kHz, da fatan za a tuntuɓi takaddar bayanan masana'anta.

Lokacin da aka zaɓi wannan oscillator, SUT fuses ne ke ƙayyade lokutan farawa kamar yadda aka nuna a ciki Table 6-10.

Shafin 6-10. Lokutan farawa don Zaɓin Agogon Ƙarƙashin Mitar Crystal Oscillator

SUT[1:0]	Lokacin Farawa daga Downarfin .asa	Ƙarin Jinkiri daga Sake saitin (VCC = 5.0V)	Shawarar amfani
00	1K (1024) CK(1)	4 ms	Risingarfin saurin tashi ko BOD ya kunna
01	1K (1024) CK(1)	64 ms	Sannu a hankali ikon tashi
10	32K (32768) CK	64 ms	Madan tsayi yayin farawa
11	Ajiye

Lura: Ya kamata a yi amfani da waɗannan zaɓuɓɓuka kawai idan kwanciyar hankali a lokacin farawa ba shi da mahimmanci.

Osananan-mita Crystal Oscillator yana ba da damar ɗora kaya ciki, duba Table 6-11 a kowane fil TOSC.

Shafin 6-11. Ƙarfin Ƙarƙashin Ƙarfafa Crystal Oscillator

Na'ura	32 kHz Osc. Rubuta	Cap (Xtal1 / Tosc1)	Cap (Xtal2 / Tosc2)
ATtiny 25/45/85	Tsarin Osc.	16 pF	6 pF

Crystal Oscillator / Yumbu Resonator

XTAL1 da XTAL2 shigar da fitarwa ne, bi da bi, na juyawa amplifier wanda za'a iya saita shi don amfani azaman On-chip Oscillator, kamar yadda aka nuna a Hoto na 6-5. Ko dai ana iya amfani da lu'ulu'u mai lu'ulu'u ko kuma mai ɗaukar yumbu.

C1 da C2 ya kamata koyaushe su kasance daidai ga duka lu'ulu'u da resonators. Mafi kyawun ƙimar capacitors ya dogara da kristal ko resonator da ake amfani da shi, adadin ƙarfin ƙarfin da ya ɓace, da ƙarar lantarki na yanayi. An ba da wasu ƙa'idodin farko don zaɓar capacitors don amfani da lu'ulu'u Table 6-12 a ƙasa. Don maɓallin yumbu, ya kamata a yi amfani da ƙimar ƙarfin ƙarfin da masana'anta suka bayar.

Shafin 6-12. Hanyoyin Aiki na Crystal Oscillator

CKSEL[3:1]	Yanayin Frequency (MHz)	Shawara Range don Capacitors C1 da C2 don Amfani da Lu'ulu'u (pF)
100(1)	0.4-0.9	–
101	0.9-3.0	12-22
110	3.0-8.0	12-22
111	8.0 –	12-22

Bayanan kula: Bai kamata a yi amfani da wannan zaɓi tare da lu'ulu'u ba, kawai tare da resonators na yumbu.

Oscillator na iya aiki a cikin hanyoyi daban-daban guda uku, kowannensu ya inganta don takamaiman kewayon mitar. Yan fis din CKSEL ne suka zabi yanayin aikin [3: 1] kamar yadda aka nuna a ciki Table 6-12.

Cuse CKSEL0 tare da SUT [1: 0] Fuses suna zaɓar lokutan farawa kamar yadda aka nuna a ciki Table 6-13.

Shafin 6-13. Lokutan farawa don Zaɓin agogon Crystal Oscillator

Farashin CKSEL0	SUT[1:0]	Fara-up Lokaci daga Power-saukar	Dearin jinkiri daga Sake saiti	An Shawarar Amfani
0	00	258 CK ku(1)	14CK + 4 ms	Yumbu resonator, saurin tashin wuta
0	01	258 CK ku(1)	14CK + 64 ms	Yumbu resonator, sannu a hankali ƙarfin tashi
0	10	1K (1024) CK(2)	14CK	Yumbu resonator, BOD ya kunna
0	11	1K (1024) CK(2)	14CK + 4 ms	Yumbu resonator, saurin tashin wuta
1	00	1K (1024) CK(2)	14CK + 64 ms	Yumbu resonator, sannu a hankali ƙarfin tashi
1	01	16K (16384) CK	14CK	Crystal Oscillator, BOD ya kunna
1	10	16K (16384) CK	14CK + 4 ms	Crystal Oscillator, saurin tashi
1	11	16K (16384) CK	14CK + 64 ms	Crystal Oscillator, sannu a hankali ƙarfin tashi

Bayanan kula

Waɗannan zaɓuɓɓukan yakamata ayi amfani dasu lokacin da basa aiki kusa da iyakar mitar na'urar, kuma kawai idan daidaituwar mita a farawa bata da mahimmanci ga aikin. Waɗannan zaɓuɓɓuka ba su dace da lu'ulu'u ba.

Waɗannan zaɓuɓɓukan an yi niyya don amfani tare da maɓallin yumbu kuma zai tabbatar da daidaituwar mita a farawa. Hakanan za'a iya amfani dasu tare da lu'ulu'u lokacin da basa aiki kusa da iyakar mitar na'urar, kuma idan tsayayyar mitar a farawa bata da mahimmanci ga aikin.

Tsohuwar Clock Source

Ana jigilar na'urar tare da CKSEL = "0010", SUT = "10", da CKDIV8. Tsarin saitin agogo na tsoho shine Tsarin Oscillator na cikin RC wanda ke gudana a 8 MHz tare da mafi girman lokacin farawa da agogon tsarin farko na 8, wanda ya haifar da agogon tsarin 1.0 MHz. Wannan saitin tsoho yana tabbatar da cewa duk masu amfani zasu iya yin saitin tushen agogo da suke so ta amfani da In-System ko High-voltage Programmer.

Mai ba da izini na Clock System

Za'a iya raba agogon tsarin ATtiny25 / 45/85 ta hanyar saita “CLKPR - Rijistar Tsare Tsare na Clock” a shafi na 32. Ana iya amfani da wannan fasalin don rage yawan amfani da wutar lantarki lokacin da buƙatun sarrafa wutar lantarki yayi ƙasa. Ana iya amfani da wannan tare da duk zaɓuɓɓukan tushen agogo, kuma zai shafi mitar agogon CPU da duk abubuwan da ke aiki tare. clkI/O, clkADC, clkCPU, da clkFLASH an raba su da wani abu kamar yadda aka nuna a ciki Tebur 6-15 a shafi na 33.

Lokacin Canjawa

Lokacin sauyawa tsakanin saitunan masu ba da izini, mai ba da izini na Tsare Tsaro na System ya tabbatar da cewa babu glitches da ke faruwa a cikin tsarin agogo kuma babu wani tsaka-tsakin tsaka-tsakin da ya fi ƙarfin mitar agogo daidai da saitin da ya gabata, ko kuma mitar agogo daidai da sabon saitin.

Counterididdigar ƙirar da ke aiwatar da prescaler yana gudana a ƙwanƙwasa agogon da ba a raba shi ba, wanda zai iya zama mafi sauri fiye da mitar agogon CPU. Saboda haka, ba zai yuwu a tantance halin da mai cutar yake ba - koda kuwa ana iya karanta shi, kuma ba za a iya yin hasashen daidai lokacin da ake dauka don sauyawa daga wani agogo zuwa wani ba.

Daga lokacin da aka rubuta ƙimomin CLKPS, yana ɗaukar tsakanin T1 + T2 da T1 + 2 * T2 kafin sabon ikon agogo ya fara aiki. A wannan tsakanin, an samar da gefunan agogo 2 masu aiki. Anan, T1 shine lokacin agogo da ya gabata, kuma T2 shine lokacin da ya dace da sabon saitin mai gabatarwa.

Sakamakon Buya na Clock

Na'urar zata iya fitar da agogon tsarin akan pin CLKO (lokacin da ba'a amfani dashi azaman fil XTAL2). Don ba da damar fitarwa, dole ne a tsara CKOUT Fuse. Wannan yanayin ya dace lokacin da ake amfani da agogon guntu don fitar da wasu da'irori akan tsarin. Lura cewa agogo ba zai fito yayin sake saiti ba kuma aikin yau da kullun na I / O zai zama overridden lokacin da aka tsara fius. Ciki RC Oscillator, WDT Oscillator, PLL, da agogo na waje (CLKI) za'a iya zaɓar su lokacin da agogo ya fito akan CLKO. Ba za a iya amfani da Crystal oscillators (XTAL1, XTAL2) don fitowar agogo akan CLKO. Idan anyi amfani da System Clock Prescaler, agogon tsarin ne yake fitarwa.

Yi rijista bayanin

OSCCAL - Rajistar Kayayyakin Oscillator

Bit	7	6	5	4	3	2	1	0
0 x31	CAL7	CAL6	CAL5	CAL4	CAL3	CAL2	CAL1	CAL0	OSCCAL
Karanta/Rubuta	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W

Bits 7: 0 - CAL [7: 0]: Darajar Calimar Oscillator

Ana amfani da Rijistar Kayayyakin Oscillator don gyara Calcrated Internal RC Oscillator don cire sauye-sauyen aiwatarwa daga mitar oscillator. Writtenimar kayyadadden tsari an rubuta ta atomatik zuwa wannan rijistar yayin sake saiti, yana ba Ma'aikatar mitar da aka ƙayyade kamar yadda aka ƙayyade a Tebur 21-2 a shafi na 164. Manhajar aikace-aikacen na iya rubuta wannan rajistar don canza saurin oscillator. A oscillator za a iya calibrated zuwa mitoci kamar yadda kayyade a Tebur 21-2 a shafi na 164. Calibration a waje da wannan zangon bashi da tabbas.

Lura cewa ana amfani da wannan oscillator don amfani da damar EEPROM da Flash wajen samun damar shiga, kuma waɗannan lokutan rubuta zasu shafi yadda yakamata. Idan an rubuta EEPROM ko Flash, to, kada a sanya shi sama da 8.8 MHz. In ba haka ba, EEPROM ko Flash rubuta na iya kasawa.

Bitarin CAL7 yana ƙayyade kewayon aiki don oscillator. Kafa wannan bit ɗin zuwa 0 yana bada mafi ƙarancin zangon mitar, saita wannan bit ɗin zuwa 1 yana bada mafi girman zangon mitar. Jeriran zangon biyun suna jere, a wasu kalmomin saitin OSCCAL = 0x7F yana bada ƙarfi fiye da OSCCAL = 0x80.

An yi amfani da ragogin CAL [6: 0] don kunna mitar a cikin zaɓin da aka zaɓa. Saitin 0x00 yana ba da mafi ƙarancin 'yanci a cikin wannan kewayon, kuma saitin 0x7F yana ba da mafi girma mitar a cikin kewayon.

Don tabbatar da daidaitaccen aiki na MCU ya kamata a canza ƙimar ƙimar a cikin ƙananan. Bambancin mita fiye da 2% daga zagaye ɗaya zuwa na gaba na iya haifar da halin rashin tabbas. Canje-canje a cikin OSCCAL bai kamata ya wuce 0x20 don kowane ma'auni ba. Ana buƙatar don tabbatar da cewa an riƙe MCU a Sake saita yayin waɗannan canje-canje a cikin agogo

Shafin 6-14. Matsakaicin Mitar Oscillator na ciki RC

Darajar OSCCAL	Pananan Lowananan Mita tare da Mutunta Mitar Mitar	Hankula Mafi Girma Mitar tare da Mutunta Mitar Mitar
0 x00	50%	100%
0x3F ku	75%	150%
0x7F ku	100%	200%

CLKPR - Rijistar Adadin Clock

Bit	7	6	5	4	3	2	1	0
0 x26	CLKPCE	–	–	–	CLKPS3	CLKPS2	CLKPS1	CLKPS0	Farashin CLKPR
Karanta/Rubuta	R/W	R	R	R	R/W	R/W	R/W	R/W

Valimar Farawa 0 0 0 0 Duba Bayanin Bit

Bit 7 - CLKPCE: Canza Canjin Mai Kula da Clock

Dole ne a rubuta bit na CLKPCE don ma'ana ɗaya don ba da damar canjin ragin CLKPS. Ana sabunta bit na CLKPCE ne kawai yayin da sauran ragowa a cikin CLKPR ke rubuce cikin sauƙi zuwa sifili. Ana tsarkake CLKPCE ta kayan aiki guda huɗu na kayan aiki bayan an rubuta shi ko lokacin da aka rubuta ragowar CLKPS. Sake sake rubuta bit ɗin CLKPCE a cikin wannan lokacin-fitar lokaci baya ƙara tsawan lokacin fita, ko share bitar CLKPCE.

Bits 6: 4 - Res: An adana ragowa

Waɗannan ragogin an adana ragowa a cikin ATtiny25 / 45/85 kuma koyaushe za a karanta su azaman sifili.

Bits 3: 0 - CLKPS [3: 0]: Mai Kiyaye Clock Zaɓi Bits 3 - 0

Waɗannan raƙuman sun ayyana mahimmin rabo tsakanin tushen agogon da aka zaɓa da agogon tsarin ciki. Waɗannan ragowa za a iya rubuta su gudu-lokaci don bambanta mitar agogo don dacewa da bukatun aikace-aikacen. Yayinda mai rarrabawa ya raba shigarwar agogo zuwa ga MCU, saurin dukkan kayan haɗin aiki yana ragu yayin da aka yi amfani da yanayin rabo. An ba da abubuwan rarrabuwa a ciki Table 6-15.

Don kauce wa canje-canje ba da gangan ba na yawan agogo, dole ne a bi hanya ta musamman ta rubutu don sauya ragin CLKPS:

Rubuta Canjin Canjin Clock Clock (CLKPCE) kaɗan zuwa ɗaya da duk sauran ragowar a cikin CLKPR zuwa sifili.

Tsakanin zagaye huɗu, rubuta ƙimar da ake so zuwa CLKPS yayin rubuta sifili zuwa CLKPCE.

Dole ne a katse katsewa yayin canza saitin mai ba da izini don tabbatar da cewa ba a katse hanyar rubutawa ba.

CKDIV8 Fuse yana ƙayyade ƙimar farko na raƙuman CLKPS. Idan CKDIV8 ba a tsara shi ba, za a sake saita ragowar CLKPS zuwa "0000". Idan an tsara CKDIV8, ana sake saita ragowar CLKPS zuwa "0011", yana ba da kashi takwas a farawa. Ya kamata a yi amfani da wannan fasalin idan tushen agogon da aka zaɓa yana da mitar mafi girma fiye da matsakaicin mitar na'urar a yanayin aiki na yanzu. Lura cewa kowace ƙima za a iya rubutawa zuwa raƙuman CLKPS ba tare da la'akari da saitin CKDIV8 Fuse ba. Dole ne software ɗin aikace-aikacen ya tabbatar da cewa isassun abin rarraba shine

zaɓaɓɓen idan asalin agogo da aka zaɓa yana da ƙarfi fiye da matsakaicin mitar na'urar a halin yanayin aiki na yanzu. An aika na'urar tare da CKDIV8 Fuse wanda aka tsara.

Shafin 6-15. Agogo Prescaler Zaɓi

CLKPS3	CLKPS2	CLKPS1	CLKPS0	Dalilin Rabon Clock
0	0	0	0	1
0	0	0	1	2
0	0	1	0	4
0	0	1	1	8
0	1	0	0	16
0	1	0	1	32
0	1	1	0	64
0	1	1	1	128
1	0	0	0	256
1	0	0	1	Ajiye
1	0	1	0	Ajiye
1	0	1	1	Ajiye
1	1	0	0	Ajiye
1	1	0	1	Ajiye
1	1	1	0	Ajiye
1	1	1	1	Ajiye

Lura: An kashe prescaler a cikin yanayin daidaitawa na ATtiny15 kuma baya rubutawa zuwa CLKPR, ko shirya fuse CKDIV8 yana da wani tasiri akan agogon tsarin (wanda koyaushe zai kasance 1.6 MHz).

Gudanar da Iko da Yanayin Barci

Babban aiki da ingancin masana'antun masana'antu sun sa AVR microcontrollers zaɓi mafi kyau don aikace-aikacen ƙananan ƙarfi. Bugu da kari, yanayin bacci yana bawa aikin damar rufe kayan aikin da ba a amfani da su a cikin MCU, don haka yana adana iko. AVR yana samar da hanyoyi daban-daban na bacci wanda ke bawa mai amfani damar daidaita ikon amfani da buƙatun aikace-aikacen.

Yanayin bacci

Hoto 6-1 a shafi na 23 gabatar da tsarin agogo daban-daban da kuma rarraba su a ATtiny25 / 45/85. Adadin yana da amfani wajen zaɓar yanayin bacci mai dacewa. Table 7-1 yana nuna hanyoyin bacci daban-daban da hanyoyin tashin su.

Table 7-1. Domain Clock Mai Aiki da Tushen Farkawa a cikin Yanayin Barci Daban-daban

Yankin Clock masu aiki

Oscillators

Tushen farkawa

Yanayin Barci

clkCPU

clkFLASH

clkIO

clkADC

clkPCK

Babban Maɓallin Clock ya kunna

INT0 da Canjin Pin

SPM / EEPROM

Shirya

USI Fara Yanayi

ADC

Sauran I/O

Kare Katsewa

Rago

ADC Rage Sauti

X(1)

Powerarfin ƙasa

X(1)

Lura: Don INT0, matakin katsewa kawai.

Don shigar da kowane ɗayan yanayin bacci guda uku, dole ne a rubuta SE bit a cikin MCUCR don amfani da hankali ɗaya kuma dole ne a aiwatar da umarnin SLEEP. SM [1: 0] rago a cikin rajistar MCUCR zaɓi zaɓi yanayin bacci (Aiki, ADC Rage Rage ko -arfi) za a kunna ta umarnin SLEEP. Duba Table 7-2 don taƙaitawa.

Idan katsewa mai kunnawa ya faru yayin da MCU ke cikin yanayin bacci, MCU ya farka. Daga nan an dakatar da MCU na tsawon hud'u huɗu ban da lokacin farawa, yana aiwatar da ayyukan katsewa, kuma yana ci gaba da aiwatarwa daga umarnin da ke bin BARCI. Abubuwan da ke cikin Rijistar File kuma SRAM ba ya canzawa lokacin da na'urar ta farka daga bacci. Idan sake saiti ya faru yayin yanayin bacci, MCU ya farka yana aiwatarwa daga Reset Vector.

Lura: cewa idan an yi amfani da matakin da ya jawo katsewa don farkawa matakin da aka canza dole ne a riƙe shi na ɗan lokaci don tada MCU (kuma don MCU don shigar da aikin katse na yau da kullun). Duba "Katsewa daga waje" a shafi na 49 don cikakkun bayanai.

Yanayin rago

Lokacin da aka rubuta ragowar SM [1:0] zuwa 00, umarnin SLEEP yana sa MCU shiga yanayin rashin aiki, yana dakatar da CPU amma barin Analog Comparator, ADC, USI, Timer/Counter, Watchdog, da tsarin katsewa don ci gaba da aiki. cin abinci. Wannan yanayin barci yana dakatar da clkCPU da clkFLASH, yayin da yake barin sauran agogo suyi gudu.

Yanayin ragowa yana bawa MCU damar farkawa daga katsewar waje da kuma na ciki kamar eraruwar Lokaci. Idan ba'a buƙatar farkawa daga Analog Comparator ba, Analog ɗin Analog zai iya aiki ƙasa ta hanyar saita ACD a ciki "ACSR - Analog Comparator Control da Status Register" a shafi na 120. Wannan zai rage yawan amfani da wuta a cikin Yanayi mara kyau. Idan ADC ta kunna, hira zata fara ta atomatik lokacin da aka shigar da wannan yanayin.

ADC Yanayin Rage Sauti

Lokacin da aka rubuta ragowar SM [1:0] zuwa 01, umarnin BARCI yana sa MCU shiga ADC Noise Reduction yanayin, yana dakatar da CPU amma barin ADC, katsewar waje, da Watchdog don ci gaba da aiki (idan an kunna). Wannan yanayin barci yana dakatar da clkI/O, clkCPU, da clkFLASH, yayin da yake barin sauran agogo suyi gudu.

Wannan yana inganta yanayin hayaniya don ADC, yana ba da ƙimar ƙuduri mafi girma. Idan an kunna ADC, hira zata fara ta atomatik lokacin da aka shigar da wannan yanayin. Baya ga samar da ADC Conversion Cikakken katsewa, kawai Sake Sakewa na waje, Sake saitin Tsaro, Sake saitin launin ruwan kasa, SPM / EEPROM mai shirin katsewa, matakin katsewa na waje akan INT0 ko katse canjin fil zai iya tayar da MCU daga Rage Rarrashin ADC hanya.

Yanayin Powerarfi

Lokacin da aka rubuta ragowa SM [1: 0] zuwa 10, koyarwar SLEEP tana sanya MCU shiga yanayin Powerarfafawa. A wannan yanayin, an dakatar da Oscillator, yayin da waje ya katse, USI ta fara gano yanayin da Watchdog ke ci gaba da aiki (idan an kunna). Sake Sake Sake Waje, Sake saitin Tsaro, Sake saitin launin ruwan kasa, Sake dakatar da yanayin USI, matakin katsewa na waje akan INT0 ko katse canjin fil zai iya tayar da MCU. Wannan yanayin bacci yana dakatar da kowane agogo da aka samar, yana barin aiki na asynchronous modules kawai.

BOD Kashe software

Lokacin da BODLEVEL fius ɗin BODLEVEL ya ba da damar gano Gano launin ruwan kasa (duba Tebur 20-4 a shafi na 148), BOD yana sa ido sosai kan samar da voltage lokacin lokacin bacci. A wasu na'urori yana yiwuwa a ajiye wuta ta hanyar kawar da BOD ta software a yanayin barci na Power-Down. Amfani da yanayin yanayin bacci zai kasance daidai da lokacin da fuse ke kashe BOD a duniya.

Idan software ta kashe BOD, aikin BOD yana kashe nan da nan bayan shigar da yanayin barci. Bayan tashi daga barci, BOD yana sake kunnawa ta atomatik. Wannan yana tabbatar da aiki mai aminci idan matakin VCC ya faɗi yayin lokacin barci.

Lokacin da aka kashe BOD, lokacin farkawa daga yanayin bacci zaiyi daidai da na farkawa daga Sake Sakewa. Dole ne mai amfani ya saita lokutan farkawa da hannu kamar yadda bayanin bandgap yana da lokacin farawa kuma BOD yana aiki daidai kafin MCU ya ci gaba da aiwatar da lambar. Duba SUT [1: 0] da CKSEL [3: 0] gutsunan gutsunan tebur "Fuse Low Byte" a shafi na 149

Kashe BOD yana sarrafawa ta BODS (BOD Sleep) bit na MCU Control Register, duba “MCUCR - MCU Sarrafawa Yi rijista ”a shafi na 37. Rubuta wannan ɗan zuwa ga mutum yana kashe BOD a Power-Down, yayin rubuta sifili yana kiyaye BOD ɗin yana aiki. Tsoho saitin ba komai, watau BOD yana aiki.

Rubutawa ga BODS bit ana sarrafa shi ta hanyar lokaci mai ƙayyadewa da ɗan kunnawa, duba “MCUCR - MCU Control Regis- ter ”a shafi na 37.

Iyakance

An aiwatar da aikin dakatar da BOD a cikin na'urori masu zuwa, kawai:

ATtiny25, sake duba E, da sabo

ATtiny45, bita D, da sabo

ATtiny85, bita C, da sabo

Ana yiwa alamar bita akan kunshin na'urar kuma ana iya samun ta kamar haka:

Sideasan gefen fakitoci 8P3 da 8S2

Babban gefen kunshin 20M1

Rijistar Rage Iko

Rijistar Rage Iko (PRR), duba “PRR - Rijistar Rage Iko” a shafi na 38, yana ba da hanya don rage yawan amfani da wutar lantarki ta hanyar tsayar da agogo ga daidaitattun sassan mutum. Yanayin yankin na yanzu ya daskarewa kuma rajistar I / O ba za a iya karantawa ko rubutawa ba. Abubuwan da gefe ke amfani dasu lokacin dakatar da agogo zai ci gaba da kasancewa cikin aiki, saboda haka yakamata yawancin ɓangarorin su zama masu nakasa kafin tsayar da agogo. Faɗakar da ƙirar, wanda aka yi ta share bit a cikin PRR, yana sanya ƙirar a cikin yanayi ɗaya kamar yadda kafin rufewa.

Ana iya amfani da kashewar module a yanayin dleaura da Yanayin aiki don rage haɓakar ƙarfin ikon gaba ɗaya. A duk sauran yanayin bacci, agogo ya riga ya tsaida. Duba “Kayayyakin kayan kwalliyar I / O na yanzu” a shafi na 177 domin misaliamples.

Rage Rage Karfin Amfani

Akwai batutuwa da yawa da za a yi la’akari da su yayin ƙoƙarin rage ƙarfin amfani a cikin tsarin sarrafa AVR. Gabaɗaya, yakamata ayi amfani da yanayin bacci gwargwadon iko, kuma yakamata a zaɓi yanayin bacci domin ƙarancin ayyukan na'urar suyi aiki. Duk ayyukan da ba'a buƙata ya kamata a kashe su. Musamman, waɗannan matakan masu zuwa na iya buƙatar kulawa ta musamman yayin ƙoƙarin cimma mafi ƙarancin iko mai yiwuwa.

Analog zuwa Digital Converter

Idan an kunna, ADC za a kunna ta a duk yanayin bacci. Don adana wuta, ADC ya kamata ta kashe kafin shiga kowane yanayin bacci. Lokacin da aka kashe ADC kuma aka sake kunnawa, juzu'i na gaba zai zama jujjuya juyawa. Koma zuwa "Analog to Digital Converter" a shafi na 122 don cikakkun bayanai kan aikin ADC.

Mai kwatanta Analog

Lokacin shigar da yanayin rashin aiki, yakamata a kashe Kwatancen Analog idan ba ayi amfani dashi ba. Lokacin shiga yanayin Rage Rikicin ADC, yakamata a kashe Kwatancen Analog. A cikin sauran hanyoyin bacci, analog ɗin analog ɗin yana kashe ta atomatik. Koyaya, idan an saita kwatancen Analog don amfani da Voltage Magana azaman shigarwar, yakamata a kashe kwatancen Analog a duk yanayin bacci. In ba haka ba, Voltage Za a kunna Reference, mai zaman kansa daga yanayin bacci. Koma zuwa "Kwatancen Analog" a shafi na 119 don cikakkun bayanai game da yadda za'a saita Analog Comparator.

Gano mai fitar da ruwan kasa

Idan ba'a buƙatar Mai gano Maɓallin Brown a cikin aikace-aikacen ba, yakamata a kashe wannan rukunin. Idan BODLEVEL Fuses ya ba da Gano mai fitar da launin ruwan kasa, za'a kunna shi a duk yanayin bacci, sabili da haka, koyaushe cinye ƙarfi. A cikin yanayin bacci mai zurfi, wannan zai ba da gudummawa sosai ga yawan amfani da ake yi a yanzu. Duba "Brown-fita Detec- illolin ”a shafi na 41 kuma "Kashe BOD na Software" a shafi na 35 don cikakkun bayanai kan yadda za a saita Gano mai fitar da Brown.

Ciki Voltage Magana

Ciki na cikitage Za a kunna Reference lokacin da ake buƙata ta Binciken Brown-out, Analog Comparator ko ADC. Idan an kashe waɗannan kayayyaki kamar yadda aka bayyana a sassan da ke sama, vol na cikitage reference za a kashe kuma ba za ta cinye iko ba. Lokacin da aka sake kunnawa, mai amfani dole ne ya ƙyale tunani ya fara aiki kafin a yi amfani da fitarwa. Idan an ajiye abin tunani a cikin yanayin bacci, ana iya amfani da fitarwa nan da nan. Koma zuwa "Ciki Voltage Reference ”a shafi na 42 don cikakkun bayanai kan lokacin farawa.

Watchdog Timer

Idan ba a buƙatar Mai ƙidayar lokaci a cikin aikace-aikacen, yakamata a kashe wannan rukunin. Idan an kunna Mai ƙidayar lokaci, za a kunna ta a duk yanayin bacci, sabili da haka, koyaushe cinye ƙarfi. A cikin yanayin bacci mai zurfi, wannan zai ba da gudummawa sosai ga yawan amfani da ake yi a yanzu. Koma zuwa "Mai ƙidayar lokaci" a shafi na 42 don cikakkun bayanai kan yadda ake saita Saitunan Tsaro.

Fil Fil

Lokacin shigar da yanayin barci, duk fil ɗin tashar jiragen ruwa yakamata a daidaita su don amfani da ƙaramin ƙarfi. Abu mafi mahimmanci shine tabbatar da cewa babu fil ɗin da ke fitar da lodin juriya. A cikin yanayin barci inda duka agogon I/O (clkI/O) da agogon ADC (clkADC) ke tsayawa, za a kashe masu shigar da na'urar. Wannan yana tabbatar da cewa ba a cinye wuta ba

ta hanyar shigar da hankali lokacin da ba a buƙata ba. A wasu lokuta, ana buƙatar dabarun shigarwa don gano yanayin farkawa, kuma

sannan za'a kunna shi. Koma zuwa sashen "Ingantaccen shigar da bayanai da yanayin bacci" a shafi na 57 don cikakkun bayanai kan abin da aka kunna fil. Idan an kunna buffer ɗin shigarwa kuma an bar siginar shigarwar tana iyo ko tana da matakin siginar analog kusa da VCC/2, buffer ɗin shigarwa zai yi amfani da ƙarfin da ya wuce kima.

Don fil ɗin shigar da analog, yakamata a kashe majin shigar da dijital a kowane lokaci. Matsayin siginar analog kusa da VCC/2 akan fil ɗin shigarwa na iya haifar da mahimmancin halin yanzu koda a yanayin aiki. Za a iya kashe masu buffer na dijital ta hanyar rubutawa zuwa Dijital Disable Register (DIDR0). Koma zuwa "DIDR0 - Dijital Input Disable Register 0" a shafi na 121 don cikakkun bayanai.

Yi rijista bayanin

MCUCR - Rajistar Sarrafa MCU

Rajistar Sarrafa MCU ta ƙunshi rarar sarrafawa don sarrafa wuta.

Bit	7	6	5	4	3	2	1	0
0 x35	BODS	PUD	SE	SM1	SM0	JIKI	ISC01	ISC00	MCUCR
Karanta/Rubuta	R	R/W	R/W	R/W	R/W	R	R/W	R/W
Darajar farko	0	0	0	0	0	0	0	0

Bit 7 - JIKIN: BOD Barci

Ana samun aikin nakasa na BOD a cikin wasu na'urori, kawai. Duba "Ituntatawa" a shafi na 36.

Domin nakasa BOD yayin bacci (duba Tebur 7-1 a shafi na 34) dole ne a rubuta bitar BODS don ma'ana ɗaya. Ana sarrafa wannan ta hanyar jadawalin lokaci da ƙaramin damar, BODSE a cikin MCUCR. Na farko, duka BODS da JIKI dole ne a saita su zuwa ɗaya. Na biyu, a tsakanin zagaye agogo huɗu, BODS dole ne a saita shi zuwa ɗaya kuma BODSE dole ne a saita shi zuwa sifili. BODS bit yana aiki zagaye agogo uku bayan an saita shi. Dole ne a aiwatar da umarnin bacci yayin da BODS ke aiki don kashe BOD don ainihin yanayin bacci. BODS bit an share ta atomatik bayan zagaye agogo uku.

A cikin na'urori inda ba a aiwatar da BODing BOD wannan bit ɗin ba shi da amfani kuma koyaushe zai karanta sifili.

Bit 5 - SE: Bar damar

Dole ne a rubuta bit SE zuwa ma'ana don sanya MCU shiga yanayin barci lokacin da aka aiwatar da umarnin BARCI. Don guje wa shigar da MCU zuwa yanayin barci sai dai idan manufar mai shirye-shiryen ne, ana ba da shawarar rubuta bit ɗin Sleep Enable (SE) zuwa ɗaya kafin aiwatar da umarnin BARCI kuma a share shi nan da nan bayan an tashi.

Bits 4: 3 - SM [1: 0]: Yanayin Barcin Zaɓi Bits 1 da 0

Wadannan ragin zabi tsakanin samfuran bacci guda uku kamar yadda aka nuna a ciki Table 7-2.

Table 7-2. Yanayin Barci Zaɓi

SM1	SM0	Yanayin Barci
0	0	Rago
0	1	ADC Rage Sauti
1	0	Powerarfin ƙasa
1	1	Ajiye

Bit 2 - BODSE: BOD Bar Enable

Ana samun aikin nakasa na BOD a cikin wasu na'urori, kawai. Duba "Ituntatawa" a shafi na 36.

Bitarin BODSE yana ba da damar saita bitar sarrafa BODS, kamar yadda aka bayyana akan bayanin ɗan BODS. Bugun BOD ana sarrafa shi ta hanyar jeren lokaci.

Ba a amfani da wannan bit ɗin a cikin na'urori inda ba a aiwatar da aikin BOD ba kuma zai karanta a matsayin sifili a cikin waɗannan na'urori.

PRR - Rijistar Rage Iko

Rijistar Rage Iko ta ba da hanya don rage yawan amfani da wuta ta hanyar barin alamomin agogon gefe su zama nakasassu.

Bit	7	6	5	4	3	2	1	0
0 x20	–	–	–	–	PRTIM1	PRTIM0	PRUSI	Farashin PRADC	PRR
Karanta/Rubuta	R	R	R	R	R/W	R/W	R/W	R/W
Darajar farko	0	0	0	0	0	0	0	0

Bits 7: 4 - Res: An adana ragowa

Waɗannan ragogin an adana ragowa a cikin ATtiny25 / 45/85 kuma koyaushe za a karanta su azaman sifili.

Bit 3 - PRTIM1: Mai Sauke Rage Powerarfi / Counter1

Rubuta ma'ana ga wannan ya rufe tsarin ƙirar Mai eridayar lokaci / Counter1. Lokacin da Mai theidayar lokaci / Counter1 ke kunne, aiki zai ci gaba kamar kafin rufewa.

Bit 2 - PRTIM0: Mai Sauke Rage Powerarfi / Counter0

Rubuta ma'ana ga wannan ya rufe tsarin ƙirar Mai eridayar lokaci / Counter0. Lokacin da Mai theidayar lokaci / Counter0 ke kunne, aiki zai ci gaba kamar kafin rufewa.

Bit 1 - PRUSI: Rage Rage Rage USI

Rubuta ma'ana ɗaya zuwa wannan ya rufe USI ta dakatar da agogo zuwa koyaushe. Lokacin farkawar USI kuma, yakamata a sake inganta USI don tabbatar da aiki mai kyau.

Bit 0 - PRADC: Rage Rage ADC

Rubuta ma'ana ga wannan ya rufe ADC. Dole ne a kashe ADC kafin a rufe. Lura cewa ana amfani da agogon ADC ta wasu ɓangarorin mai kwatancen analog, wanda ke nufin cewa ba za a iya amfani da mai kwatanta analog lokacin da wannan ƙaramin ya yi girma ba.

Tsarin Gudanarwa da Sake saiti

Sake saita AVR

Yayin sake saiti, ana saita dukkan Rijistar I / O zuwa ƙimomin su na farko, kuma shirin yana farawa aiwatarwa daga Sake Sake Sanarwa. Umurnin da aka sanya a Sake Sake Vector dole ne ya zama RJMP - dangin Jump - umarni ga tsarin sake saiti. Idan shirin bai taɓa ba da damar samo tushen katsewa ba, ba a amfani da katsalandan Vectors, kuma ana iya sanya lambar shirin yau da kullun a waɗannan wuraren. Siffar kewaye a ciki Hoto na 8-1 yana nuna ma'anar sake saiti. Ana ba da jigon wutar lantarki na maimaita kewayawa a ciki "Tsarin Tsarin Sake Sakewa" a shafi na 165.

Hoto 8-1 Sake saitin dabaru

Ana sake saita tashoshin I / O na AVR zuwa asalin su lokacin da tushen sake saiti yayi aiki. Wannan baya buƙatar kowane tushen agogo da yake gudana.

Bayan duk tushen sake saiti sun kasance basa aiki, ana kiran mai jinkirta jinkiri, yana shimfiɗa sake saiti na ciki. Wannan yana ba da iko don isa matakin karko kafin fara aiki na yau da kullun. Mai amfani ya bayyana lokacin-fita na lissafin jinkirin jinkiri ta hanyar SUT da CKSEL Fuses. An gabatar da zaɓi daban-daban don lokacin jinkirta a “Agogo Bayanai ”a shafi na 25.

Sake saita kafofin

ATtiny25 / 45/85 yana da tushe huɗu na sake saiti:

Sake kunna wuta. An sake saita MCU lokacin da aka samar da voltage yana ƙasa da Ƙofar Sake saitin Wuta (VPOT).

Sake saitin waje An sake saita MCU lokacin da ƙaramin matakin ya kasance akan maimaita RESET don mafi tsayi fiye da ƙaramar bugun jini.

Sake Sake Kulawa. An sake saita MCU lokacin da lokacin doaukar Agogon ya ƙare kuma an kunna Watchdog.

Sake saitin launin ruwan kasa. An sake saita MCU lokacin da aka samar da voltage VCC yana ƙasa da Ƙofar Sake saitin Brown-out (VBOT) kuma an kunna Mai gano Brown-out.

Sake saita Sake kunnawa

Pularfin bugun Sake saita wuta (POR) ana samar dashi ta hanyar zagayen gano On-chip. An bayyana matakin ganowa a ciki "Sys- tem da Sake saita halaye "a shafi na 165. Ana kunna POR a duk lokacin da VCC ke ƙasa da matakin ganowa. Za'a iya amfani da da'irar POR don kunna Sake saitin Farawa, da kuma gano gazawar samar da voltage.

Wurin Sake kunna Wuta (POR) yana tabbatar da cewa an sake saita na'urar daga Power-on. Isar da Ƙarfin Sake saita Ƙofafi voltage yana kiran ma'ajin jinkiri, wanda ke ƙayyade tsawon lokacin da aka ajiye na'urar a cikin SAKETA bayan tashin VCC. Ana sake kunna siginar RESET, ba tare da wani bata lokaci ba, lokacin da VCC ta ragu ƙasa da matakin ganowa.

Hoto na 8-2. Farawar MCU, SAKE SATA An ɗaure zuwa VCC

Sake saitin CIKI

Hoto na 8-3. Farawar MCU, SAKE SAITA A KASA

Sake saitin waje

An Sake Sake saita Na waje ta ƙarancin matakin a maimaita SAT ɗin idan an kunna. Sake saita bugun jini fiye da mafi ƙarancin bugun jini nisa (duba "Tsarin Tsarin Sake Sakewa" a shafi na 165) zai samar da sake saiti, koda agogo baya aiki. Ba a ba da garantin gajerun gaɓoɓin don samar da sake saiti ba. Lokacin da siginar da aka yi amfani da ita ta kai Sake saita Ƙofar Voltage - VRST - a kan kyakkyawan gefensa, ƙididdiga na jinkirta farawa MCU bayan lokacin ƙarewa ya ƙare.

Hoto na 8-4. Sake saitin Waje Lokacin Aiki

Gano launin ruwan kasa

ATtiny25/45/85 yana da da'irar Ganewar Kan-chip Brown-out (BOD) don saka idanu matakin VCC yayin aiki ta hanyar kwatanta shi zuwa ƙayyadadden matakin faɗakarwa. BODLEVEL Fuses na iya zaɓar matakin jawo don BOD. Matsakaicin matakin yana da juzu'i don tabbatar da Ganewar Brown-fito kyauta. Ya kamata a fassara hysteresis akan matakin ganowa azaman VBOT+ = VBOT + VHYST/2 da VBOT- = VBOT - VHYST/2.

Lokacin da aka kunna BOD, kuma VCC tana raguwa zuwa ƙimar ƙasa da matakin jawo (VBOT-in Hoto na 8-5), Ana kunna Sake saitin Brown-out nan da nan. Lokacin da VCC ya ƙaru sama da matakin jawo (VBOT+ in Hoto na 8-5), ma'aunin jinkiri yana farawa MCU bayan lokacin ƙarewa tTOUT ya ƙare.

Da'irar BOD zata gano digo a cikin VCC kawai idan voltage yana zama ƙasa da matakin jawo na tsawon lokaci fiye da tBOD da aka bayar a ciki "Tsarin Tsarin Sake Sakewa" a shafi na 165.

Sake Sake Kulawa

Lokacin da Watchdog ya ƙare, zai haifar da ɗan gajeren bugun bugun jini na tsawon lokacin sake zagayowar CK ɗaya. A gefen faɗuwar wannan bugun jini, mai ƙidayar ƙidayar jinkiri ya fara ƙidayar lokacin Ƙarewa tTOUT. Koma zuwa "Mai ƙidayar lokaci" a shafi na 42 don cikakkun bayanai game da aikin Mai ƙidayar lokaci.

Voltage Reference kunna sigina da lokacin farawa

Voltage reference yana da lokacin farawa wanda zai iya yin tasiri kan yadda yakamata ayi amfani dashi. An ba da lokacin farawa "Tsarin Tsarin Sake Sakewa" a shafi na 165. Don adana wuta, ba a kunna kunna bayanan koyaushe. Adadin yana kan lokacin yanayi mai zuwa:

Lokacin da aka kunna BOD (ta hanyar shirya BODLEVEL [2: 0] Fuse Bits).

Lokacin da aka haɗa rubutun bandgap zuwa Analog Comparator (ta hanyar saita ACBG bit a ACSR).

Lokacin da aka kunna ADC.

Don haka, lokacin da ba a kunna BOD ba, bayan saita ACBG bit ko kunna ADC, dole ne mai amfani koyaushe ya ba da izini don farawa kafin a yi amfani da fitarwa daga Analog Comparator ko ADC. Don rage yawan amfani da wuta a yanayin Powerarfin ƙasa, mai amfani zai iya kauce wa yanayi uku da ke sama don tabbatar da cewa an kashe ambaton kafin shiga yanayin Powerarfin wuta.

Watchdog Timer

Agogon Kula da Agogo yana aiki ne daga On-chip Oscillator wanda yake gudana a 128 kHz. Ta hanyar sarrafa takaddar mai kayyade lokaci na Watchdog, za a iya daidaita tazarar Sake saita Watchdog kamar yadda aka nuna a ciki Tebur 8-3 a shafi na 46. WDR - Sake Sake Kulawa - umarni ya sake saita Mai Tsaron Lokaci. Hakanan ana saita Saitunan Tsaro lokacin da yake naƙasasshe kuma lokacin da Sake saitin Chip ya faru. Za'a iya zaɓar lokutan zagayowar agogo goma don tantance lokacin sake saiti. Idan lokacin sake saiti ya ƙare ba tare da sake Sake saita Watchdog ba, ATtiny25 / 45/85 zai sake saitawa kuma ya aiwatar daga Sake Sake Vector. Don cikakkun bayanai akan Sake Sanarwar Tsaro, koma zuwa Tebur 8-3 a shafi na 46.

Hakanan za'a iya saita Saitunan Tsaro don samar da katsewa maimakon sake saiti. Wannan na iya zama da matukar taimako yayin amfani da Watchdog don farkawa daga -arfin ƙasa.

Don hana nakasa Watchdog ba da gangan ba ko canjin lokaci ba da gangan ba, ana zaɓar matakan tsaro guda biyu ta fis ɗin WDTON kamar yadda aka nuna a Table 8-1 Koma zuwa "Tsarin Lokaci don Canza Con- urationididdigar Tima'idodin Tsaro "a shafi na 43 don cikakkun bayanai.

Table 8-1. Kanfigareshan WDT azaman Aiki na Saitunan Fuse na WDTON

WDTON	Matsayin Tsaro	Yankin farko na WDT	Yadda za'a Kashe WDT	Yadda zaka Canja Lokaci- fita
Ba shiri	1	An kashe	Tsarin lokaci	Babu iyaka
Shirye-shirye	2	An kunna	Ana kunna koyaushe	Tsarin lokaci

Hoto na 8-7. Watchdog Timer

Jerin Lokaci na Lokaci don Canza Tsarin Kan Mai Tsaro

Jerin don sauya tsari ya ɗan bambanta tsakanin matakan aminci guda biyu. An bayyana hanyoyin daban don kowane matakin.

Matsayin Tsaro 1: A cikin wannan yanayin, da farko an kashe agogon Watchdog Timer, amma ana iya kunna shi ta rubuta bit WDE zuwa ɗaya ba tare da wani hani ba. Ana buƙatar jerin ƙayyadaddun lokaci lokacin kashe mai kunnawa Watchdog Timer. Don musaki mai kunnawa Watchdog Timer, dole ne a bi hanya mai zuwa:

A cikin aiki ɗaya, rubuta ma'ana zuwa WDCE da WDE. Dole ne a rubuta ma'ana zuwa WDE game da ƙasa da ƙimar darajar WDE ta baya.

A tsakanin zagayen agogo huɗu masu zuwa, a cikin aiki ɗaya, rubuta ragin WDE da WDP kamar yadda ake so, amma tare da cire WDCE kaɗan.

Safety Level 2: A cikin wannan yanayin, Watchdog Timer koyaushe yana kunna, kuma WDE bit koyaushe zai karanta azaman ɗaya. Ana buƙatar jerin ƙayyadaddun lokaci lokacin canza lokacin Lokacin Karewa. Don canza lokacin Karewa, dole ne a bi tsari mai zuwa:

A cikin aiki ɗaya, rubuta mai ma'ana zuwa WDCE da WDE. Kodayake an saita WDE koyaushe, dole ne a rubuta WDE zuwa ɗayan don fara jeren lokacin.

A tsakanin zagayen agogo huɗu masu zuwa, a cikin aiki ɗaya, rubuta ragin WDP kamar yadda ake so, amma tare da cire WDCE kaɗan. Theimar da aka rubuta wa bit ɗin WDE ba shi da mahimmanci.

Lambar Example

Lambar nan mai zuwa example nuna taro ɗaya da aikin C ɗaya don kashe WDT. Tsohonample yana ɗaukar cewa ana sarrafa katsewa (misali, ta hanyar dakatar da katsewa a duniya) don kada wani katsewa ya faru yayin aiwatar da waɗannan ayyukan.

Lambar Majalisar Example(1)

WDT_kashe:

wdr

; Share WDRF a cikin MCUSR

ldi r16, (0<

daga MCUSR, r16

; Rubuta ma'ana ɗaya zuwa WDCE da WDE

; Adana saitin tsoffin shugabannin yara don hana Sake Sake Kula da Tsararrun Al'umma

r16, WDTCR

ko r16, (1<

daga WDTCR, r16

; Kashe WDT

ldi r16, (0<

daga WDTCR, r16

ret

C Code Example(1)

WDT_off (rashin banza)

{

_WDR ();

/* Share WDRF a cikin MCUSR */ MCUSR = 0x00

/* Rubuta ma'ana guda zuwa WDCE da WDE */ WDTCR = (1<

/ * Kashe WDT * / WDTCR = 0x00;

}

Fadakarwa: 1. Duba “Lambar Examples ”a shafi na 6.

Yi rijista bayanin

MCUSR - Rajistar Halin MCU

Rajistar Matsayi na MCU yana ba da bayani kan wacce tushen sake saiti ya haifar da Sake Sakewar MCU.

Bit	7	6	5	4	3	2	1	0
0 x34	–	–	–	–	WDRF	Farashin BORF	FITARWA	PORF	MCUSR
Karanta/Rubuta	R	R	R	R	R/W	R/W	R/W	R/W

Valimar Farawa 0 0 0 0 Duba Bayanin Bit

Bits 7: 4 - Res: An adana ragowa

Waɗannan ragogin an adana ragowa a cikin ATtiny25 / 45/85 kuma koyaushe za a karanta su azaman sifili.

Bit 3 - WDRF: Sake Kulawa da Tsaro a Matsayi

An saita wannan bit ɗin idan Sake saitin Tsaro ya faru. An sake saita bit ɗin ta Sake Sake -arfi, ko ta hanyar rubuta ƙirar mara hankali ga tuta.

Bit 2 - BORF: Sake saitin Tuta mai launin ruwan kasa

An saita wannan bit ɗin idan Sake saita Maɓallin Ruwan ƙasa ya auku. An sake saita bit ɗin ta Sake Sake -arfi, ko ta hanyar rubuta ƙirar mara hankali ga tuta.

Bit 1 - KARANTA: Sake saitin Tuta

An saita wannan bit ɗin idan Sake saitin waje ya auku. An sake saita bit ɗin ta Sake Sake -arfi, ko ta hanyar rubuta ƙirar mara hankali ga tuta.

Bit 0 - PORF: Sake Sake Alamar -arfi

An saita wannan bit ɗin idan Sake Sake kunna wuta ya auku. An sake saita bit ɗin kawai ta hanyar rubutun ƙirar hankali zuwa tutar.

Don yin amfani da Sake saita Tutoci don gano yanayin sake saiti, mai amfani ya karanta sannan kuma sake saita MCUSR da wuri-wuri a cikin shirin. Idan rajista ta barje kafin wani sake saiti ya auku, asalin sake saiti za a iya samu ta hanyar nazarin Sake saitin Flags.

WDTCR - Rijistar Kula da Mai ƙidayar lokaci

Bit	7	6	5	4	3	2	1	0
0 x21	WDIF	WDIE	Farashin 3	WDCE	WDE	Farashin 2	Farashin 1	Farashin 0	WDTCR
Karanta/Rubuta	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Darajar farko	0	0	0	0	X	0	0	0

Bit 7 - WDIF: Tsare Lokaci na Kallo ya katse Tutar

An saita wannan ɗan bit lokacin da fitar lokaci ya faru a cikin Mai ƙidayar lokaci kuma an saita Mai Tsaron lokaci don katsewa. WDIF ana share shi ta hanyar kayan aiki yayin aiwatar da katsewar katsewar katsewar aiki daidai. A madadin, WDIF an share ta ta hanyar rubuta ma'ana zuwa tutar. Lokacin da aka saita I-bit a cikin SREG da WDIE, An katse Kuskuren lokacin-fita.

Bit 6 - WDIE: Katse Lokaci na Hangen aiki Ya Kunna

Lokacin da aka rubuta wannan bit ɗin zuwa ɗaya, WDE ya share, kuma an saita I-bit a cikin Register na Yanayi, An kunna katsewar lokacin Kulawa. A wannan yanayin ana yin katsewa daidai gwargwadon sake saiti idan lokacin hutu a cikin Mai ƙidayar lokaci ya faru.

Idan an saita WDE, WDIE za ta share ta atomatik ta kayan aiki lokacin da fita lokaci ya faru. Wannan yana da amfani don kiyaye Tsaron Sake Tsaro na tsaro yayin amfani da katsewa. Bayan WDIE bit an share shi, fita ta gaba zai haifar da sake saiti. Don kaucewa Sake Kulawa na Masu Kula, dole ne a saita WDIE bayan kowane katsewa.

Table 8-2. Kanfigareshan Mai ƙididdigewa Watchdog Timer

WDE	WDIE	Doungiyar Mai Kula da doan sanda	Aiki kan Lokaci-fita
0	0	Tsaya	Babu
0	1	Gudu	Katsewa
1	0	Gudu	Sake saiti
1	1	Gudu	Katsewa

Bit 4 - WDCE: Canza Canjin ableara aiki

Wannan bit dole ne a saita lokacin da aka rubuta bit na WDE zuwa azanci. In ba haka ba, ba za a kashe Dogaran ba. Da zarar an rubuta zuwa ɗaya, kayan aikin zasu share wannan bayan bayan agogo hudu. Koma bayan bayanin WDE bit don aikin musaki na Watchdog. Hakanan dole ne a saita wannan bit yayin canza ragorar takaddama. Duba “Tsarin Lokaci don Canza Tsarin Kan Lokaci na Tsaro "a shafi na 43.

Bit 3 - WDE: Tsaro ya kunna

Lokacin da aka rubuta WDE don ma'ana daya, sai a sa mai lura da agogo, kuma idan aka rubuta WDE zuwa ma'anar hankali, aikin Watchdog Timer yana aiki. WDE kawai za'a iya share shi idan WDCE bit yana da matakin dabaru ɗaya. Don musaki wani Saitunan Tsaro mai aiki, dole ne a bi wannan hanyar:

A cikin aiki ɗaya, rubuta ma'ana zuwa WDCE da WDE. Dole a rubuta ma'ana ɗaya zuwa WDE duk da cewa an saita ta zuwa ɗaya kafin musaki ya fara aiki.

A tsakanin zagayen agogo huɗu masu zuwa, rubuta ma'ana 0 zuwa WDE. Wannan yana dakatar da doungiyar tsaro.

A matakin tsaro na 2, ba zai yuwu a kashe Mai Tsaron Lokaci ba, koda tare da algorithm da aka bayyana a sama. Duba "Ka'idodin Lokaci don Canza Tsarin Lokaci na Tsaro" a shafi na 43.

A matakin tsaro na 1, WDF ya mamaye WDE a cikin MCUSR. Duba “MCUSR - Rajistar Halin MCU” a shafi na 44 don bayanin WDRF. Wannan yana nufin cewa ana saita WDE koyaushe lokacin da aka saita WDRF. Don share WDE, dole ne a share WDRF kafin a kashe Watchdog tare da aikin da aka bayyana a sama. Wannan fasalin yana tabbatar da sake saiti da yawa yayin yanayi da ke haifar da gazawa, da farawa mai aminci bayan gazawar.

Lura: Idan ba za a yi amfani da mai ƙidayar lokaci ba a cikin aikace-aikacen, yana da mahimmanci a bi ta hanyar kashe hanyar da ake sa ido a farkon na'urar. Idan an kunna Watchdog bisa kuskure, ga misaliample ta hanyar mai tserewa ko yanayin launin ruwan kasa, za a sake saita na'urar, wanda hakan zai haifar da sabon saitin tsaro. Don gujewa wannan yanayin, software na aikace -aikacen yakamata koyaushe ya share tutar WDRF da bitar sarrafa WDE a cikin tsarin farawa.

Bits 5, 2: 0 - WDP [3: 0]: Mai Kula da eran sanda mai kula da 3, 2, 1, da 0

Ragowar WDP [3: 0] suna ƙayyade ƙayyadadden lokacin Watchdog lokacin da aka kunna Mai Tsaron lokaci. Ana nuna bambancin ƙididdigar farashi da lokutan Lokutansu masu dacewa a ciki Table 8-3.

Table 8-3. Watchdog Timer Prescale Select

Farashin 3	Farashin 2	Farashin 1	Farashin 0	Adadin WDT Oscillator Hawan keke	Yawancin lokaci-Fita a VCC = 5.0V
0	0	0	0	2K (2048) hawan keke	16 ms
0	0	0	1	4K (4096) hawan keke	32 ms
0	0	1	0	8K (8192) hawan keke	64 ms
0	0	1	1	16K (16384) hawan keke	0.125 s ku
0	1	0	0	32K (32764) hawan keke	0.25 s ku
0	1	0	1	64K (65536) hawan keke	0.5 s ku
0	1	1	0	128K (131072) hawan keke	1.0 s ku
0	1	1	1	256K (262144) hawan keke	2.0 s ku
1	0	0	0	512K (524288) hawan keke	4.0 s ku
1	0	0	1	1024K (1048576) hawan keke	8.0 s ku

Table 8-3. Watchdog Timer Prescale Select (Ci gaba)

Farashin 3	Farashin 2	Farashin 1	Farashin 0	Adadin WDT Oscillator Hawan keke	Yawancin lokaci-Fita a VCC = 5.0V
1	0	1	0	Ajiye(1)
1	0	1	1
1	1	0	0
1	1	0	1
1	1	1	0
1	1	1	1

Lura: 1. Idan aka zaɓa, za a yi amfani da ɗayan ingantattun saitunan da ke ƙasa 0b1010.

Taƙaitawa

Wannan ɓangaren yana bayanin takamaiman abin da aka dakatar da shi kamar yadda aka yi a ATtiny25 / 45/85. Don cikakken bayani game da katsewar AVR, koma zuwa "Sake saitawa da katsewa sarrafawa" a shafi na 12.

Katse Vectors a ATtiny25 / 45/85

An bayyana katsewar katako na ATtiny25 / 45/85 a ciki Table 9-1kasa.

Table 9-1. Sake saitin kuma Katse Vectors

Vector A'a	Adireshin Shirin	Source	Ma'anar katsewa
1	0 x0000	Sake saitin	Fil na waje, Sake Sake kunna wuta, Sake saitin launin ruwan kasa, Sake saitin Masu Tsaro
2	0 x0001	INT0	Neman katsewa na waje 0
3	0 x0002	Bayanin PCINT0	Neman Fatawar Cire Pin 0
4	0 x0003	TIMER1_COMPA	Mai ƙidayar lokaci / Counter1 Kwatanta wasa A
5	0 x0004	Lokaci1_OVF	Mai ƙidayar lokaci / Counter1 ambaliya
6	0 x0005	Lokaci0_OVF	Mai ƙidayar lokaci / Counter0 ambaliya
7	0 x0006	EE_RDY	EEPROM Shirya
8	0 x0007	ANA_COMP	Mai kwatanta Analog
9	0 x0008	ADC	ADC Conversion Ya Kammala
10	0 x0009	Lokaci1_COMPB	Mai ƙidayar lokaci / Counter1 Kwatanta Wasan B
11	0x000A	TIMER0_COMPA	Mai ƙidayar lokaci / Counter0 Kwatanta wasa A
12	0x000B	Lokaci0_COMPB	Mai ƙidayar lokaci / Counter0 Kwatanta Wasan B
13	0x000c ku	WDT	Doara lokacin Kulawa
14	0 x000d	USI_START	USI FARA
15	0x000E	USI_OVF	USI ambaliya

Idan shirin bai taɓa ba da damar tushen katsewa ba, ba a amfani da Masu katsewa ba, kuma ana iya sanya lambar shirin yau da kullun a waɗannan wuraren.

An nuna saitin al'ada da na gaba ɗaya don katse adireshin vector a cikin ATtiny25/45/85 a cikin shirin tsohonample kasa.

Lambar Majalisar Example
.org 0x0000	; Saita adireshin na gaba	sanarwa
rjmp Sake saita	; Adireshin 0x0000
rjmp INT0_ISR	; Adireshin 0x0001
rjmp PCINT0_ISR	; Adireshin 0x0002
rjmp TIM1_COMPA_ISR	; Adireshin 0x0003
rjmp TIM1_OVF_ISR	; Adireshin 0x0004
rjmp TIM0_OVF_ISR	; Adireshin 0x0005
rjmp EE_RDY_ISR	; Adireshin 0x0006
rjmp ANA_COMP_ISR	; Adireshin 0x0007
rjmp ADC_ISR	; Adireshin 0x0008
rjmp TIM1_COMPB_ISR	; Adireshin 0x0009
rjmp TIM0_COMPA_ISR	; Adireshin 0x000A
rjmp TIM0_COMPB_ISR	; Adireshin 0x000B
rjmp WDT_ISR	; Adireshin 0x000C
rjmp USI_START_ISR	; Adireshin 0x000D
rjmp USI_OVF_ISR	; Adireshin 0x000E
SATI:	; Babban shirin farawa
	; Adireshin 0x000F
…

Lura: Duba “Lambar Examples ”a shafi na 6.

Katsewar Waje

Katsewar Waje ta jawo INT0 pin ko wani daga PCINT [5: 0] fil. Lura da cewa, idan an kunna, katsewar zata haifar koda kuwa an saita INT0 ko PCINT [5: 0] a matsayin kayan aiki. Wannan fasalin yana ba da hanyar samar da katsewar software. Canjin fil ya katse PCI zai iya jawowa idan wani ya kunna PCINT [5: 0] fil toggles. PCMSK Rijistar sarrafa wacce fil ke taimakawa ga katsewar canjin fil. An katse musayar fan a kan PCINT [5: 0] an gano asynchronously. Wannan yana nuna cewa ana iya amfani da waɗannan katsewar don farka ɓangaren kuma daga yanayin bacci ban da Yanayin Aiki.

Rashin katsewa na INT0 na iya haifar da faɗuwa ko tashen ƙasa ko ƙananan matakin. An saita wannan kamar yadda aka nuna a cikin takamaiman takaddun rajista na MCU - MCUCR. Lokacin da aka katse INT0 kuma aka saita shi azaman matakin da ya faɗo, katsewar zai haifar idan dai aka riƙe fil ɗin ƙasa. Lura cewa fitowar fadowa ko tashiwar katsewa akan INT0 yana buƙatar kasancewar agogon I / O, wanda aka bayyana a ciki "Tsarin agogo da Rarraba su" akan shafi na 23.

Levelananan Matsewa

An gano ƙaramar matakin katsewa akan INT0 asynchronously. Wannan yana nuna cewa ana iya amfani da wannan katsewar don farka ɓangaren kuma daga yanayin bacci ban da Yanayin Aiki. An dakatar da agogon I / O a duk yanayin bacci banda yanayin dleaura.

Lura cewa idan an yi amfani da matakin da ya jawo katsewa don farkawa daga Power-down, matakin da ake buƙata dole ne a riƙe tsayin daka don MCU don kammala farkawa don fara katse matakin. Idan matakin ya ɓace kafin ƙarshen Lokacin Farawa, MCU zata ci gaba da farkawa, amma ba za a haifar da katsewa ba. An bayyana lokacin farawa ta SUT da CKSEL Fuses kamar yadda aka bayyana a ciki "Zaɓuɓɓukan Tsarin Clock da Zaɓuɓɓukan Clock" a shafi na 23.

Idan an cire matakin ƙasa akan mai katsewa kafin na'urar ta farka to ba za a karkatar da aiwatar da shirin zuwa sabis na katsewa ba amma ci gaba daga umarnin da ke bin umarnin SLEEP.

Canja Canjin Fata Ya Katse Lokaci

TsohonampAna nuna alamar katse canjin canjin fil a Hoto na 9-1.

Yi rijista bayanin

MCUCR - Rajistar Sarrafa MCU

Rijistar sarrafa katsewa ta waje A ya ƙunshi rarar sarrafawa don katsewar hankali.

Bit	7	6	5	4	3	2	1	0
0 x35	BODS	PUD	SE	SM1	SM0	JIKI	ISC01	ISC00	MCUCR
Karanta/Rubuta	R	R/W	R/W	R/W	R/W	R	R/W	R/W
Darajar farko	0	0	0	0	0	0	0	0

Bits 1: 0 - ISC0 [1: 0]: Katse Sense Control 0 Bit 1 da Bit 0

Ruptarfafawa ta 0arshen 0 an kunna shi ta hanyar pin na waje INT0 idan an saita tutar SREG da abin rufe fuska mai dacewa. An bayyana matakin da gefuna akan pin INTXNUMX na waje wanda ke kunna katsewa a ciki Table 9-2. Darajar akan fil INT0 shine sampjagoranci kafin gano gefuna. Idan an zaɓi katse ko juyawa na juyawa, bugun da ya wuce tsawon agogo ɗaya zai haifar da katsewa. Ba a ba da garantin gaɓoɓin gajarta don haifar da katsewa. Idan an zaɓi katsewar ƙaramin matakin, dole ne a riƙe ƙaramin matakin har sai an kammala umarnin aiwatarwa na yanzu don haifar da katsewa.

Table 9-2. Katse 0 Sarrafa Sense

ISC01	ISC00	Bayani
0	0	Levelananan matakin INT0 yana haifar da buƙatar katsewa.
0	1	Duk wani canjin ma'ana akan INT0 yana haifar da buƙatar katsewa.
1	0	Faduwar faɗakarwar INT0 tana haifar da buƙatar katsewa.
1	1	Tashin haɓaka na INT0 yana haifar da buƙatar katsewa.

GIMSK - Rijistar Maɓallin Janar Karkatawa

Bit	7	6	5	4	3	2	1	0
0x3B	–	INT0	PCIe	–	–	–	–	–	GIMSK
Karanta/Rubuta	R	R/W	R/W	R	R	R	R	R
Darajar farko	0	0	0	0	0	0	0	0

Bits 7, 4: 0 - Res: An adana ragowa

Waɗannan ragogin an adana ragowa a cikin ATtiny25 / 45/85 kuma koyaushe za a karanta su azaman sifili.

Bit 6 - INT0: Neman katsewa na waje 0 Zai taimaka

Lokacin da aka saita bit na INT0 (ɗaya) kuma an saita I-bit a cikin Register na Yanayi (SREG) (ɗaya), ana kunna katsewar fil na waje. Ruptarfafa Sense Control0 ragowa 1/0 (ISC01 da ISC00) a cikin MCU Control Register (MCUCR) sun bayyana ko katsewar waje tana kunne a yayin ɗagawa da / ko faɗuwar gefen INT0 fil ko matakin da aka fahimta. Ayyuka akan fil zai haifar da buƙatar katsewa koda kuwa an saita INT0 azaman fitarwa. An katse katsalandan daidai na Neman Rushewar Neman 0 daga INT0 mai katsewa Vector.

Bit 5 - PCIE: Canja Fuskantar Pin kunna

Lokacin da aka saita bitar PCIE (ɗaya) kuma aka saita I-bit a cikin Register na Yanayi (SREG) (ɗaya), an kunna katse canjin fil. Duk wani canji a kan wani fil na PCINT da aka kunna [5: 0] zai haifar da matsala. An katse katsalandan da ya dace na Neman Karkatar da Neman daga PCI ya katse Vector. PCINT [5: 0] PMS ana kunna shi daban-daban ta Rijistar PCMSK0.

GIFR - Janar katse Tutar Rijista

Bit	7	6	5	4	3	2	1	0
0x3A	–	Farashin INTF0	Farashin PCIF	–	–	–	–	–	GIFR
Karanta/Rubuta	R	R/W	R/W	R	R	R	R	R
Darajar farko	0	0	0	0	0	0	0	0

Bits 7, 4: 0 - Res: An adana ragowa

Waɗannan ragogin an adana ragowa a cikin ATtiny25 / 45/85 kuma koyaushe za a karanta su azaman sifili.

Bit 6 - INTF0: Tutar da ke 0eta XNUMX

Lokacin da gefe ko tunani ya canza akan fil INT0 ya haifar da neman katsewa, INTF0 ya zama saita (ɗaya). Idan an saita I-bit a cikin SREG da bit INT0 a cikin GIMSK (ɗaya), MCU zai yi tsalle zuwa Mai dakatar da Vector daidai. Ana share tuta lokacin da aka aiwatar da aikin katsewa. A madadin, ana iya share tutar ta hanyar rubuta mai ma'ana a kanta. Wannan tuta koyaushe ana shareta lokacin da aka saita INT0 azaman katse matakin.

Bit 5 - PCIF: Canjin Canjin Fuskar Pin

Lokacin da tunani ya canza kan kowane PCINT [5: 0] fil yana haifar da neman katsewa, PCIF ya zama saita (ɗaya). Idan an saita I-bit a cikin SREG da PCIE a cikin GIMSK (ɗaya), MCU zai tsallake zuwa daidaitaccen Yanayin Vector. Ana share tuta lokacin da aka aiwatar da aikin katsewa. A madadin, ana iya share tutar ta hanyar rubuta mai ma'ana a kanta.

PCMSK - Rijistar Maɓallin Canjin Fil

Bit	7	6	5	4	3	2	1	0
0 x15	–	–	Bayanin PCINT5	Bayanin PCINT4	Bayanin PCINT3	Bayanin PCINT2	Bayanin PCINT1	Bayanin PCINT0	PCMSK
Karanta/Rubuta	R	R	R/W	R/W	R/W	R/W	R/W	R/W
Darajar farko	0	0	0	0	0	0	0	0

Bits 7: 6 - Res: An adana ragowa

Waɗannan ragogin an adana ragowa a cikin ATtiny25 / 45/85 kuma koyaushe za a karanta su azaman sifili.

Bits 5: 0 - PCINT [5: 0]: Canji Canji ya Kunshi Maganin 5: 0

Kowane PCINT [5: 0] bit yana zaɓan ko an kunna katsewar fil a kan m I / O fil. Idan an saita PCINT [5: 0] kuma an saita bitar PCIE a cikin GIMSK, an kunna katse canjin fil a kan daidai lambar I / O. Idan PCINT [5: 0] ya share, sauya musanya fil yana kan na I / O naƙasasshe.

I/O Ports

Gabatarwa

Duk tashoshin jiragen ruwa na AVR suna da ayyukan Karatu-Gyara-Rubuta na gaskiya lokacin amfani da su azaman tashar jiragen ruwa na I/O na dijital. Wannan yana nufin cewa ana iya canza alƙawarin fil ɗin tashar jiragen ruwa ɗaya ba tare da canza canjin shugabanci ba da gangan tare da umarnin SBI da CBI. Hakanan yana faruwa lokacin canza ƙimar tuƙi (idan an saita shi azaman fitarwa) ko kunna/kashe masu tsayayyar cirewa (idan an daidaita su azaman shigar). Kowane buffer mai fitarwa yana da halayen tuƙi na daidaitacce tare da babban nutsewa da damar tushe. Direban fil yana da ƙarfi don fitar da nunin LED kai tsaye. Duk fil ɗin tashar jiragen ruwa suna da tsayayyun zaɓaɓɓun abubuwan cirewa tare da wadatar-voltage juriya mara canzawa. Duk I/O fil suna da diodes kariya zuwa duka VCC da Ground kamar yadda aka nuna a ciki Hoto na 10-1. Koma zuwa "Halayen Lantarki" a shafi na 161 don cikakken jerin sigogi.

Hoto na 10-1. Daidaitaccen Tsarin I/O Pin

Duk rejista da nassoshi kaɗan a wannan sashe an rubuta su gabaɗaya. Ƙananan harafi “x” yana wakiltar harafin lamba na tashar jiragen ruwa, ƙaramin ƙaramin harafin “n” yana wakiltar lambar bit. Koyaya, lokacin amfani da rajista ko bit ya bayyana a cikin shirin, dole ne a yi amfani da madaidaicin fom. Don tsohonample, PORTB3 don bit a'a. 3 a Port B, a nan ana yin kwatankwacin PORTxn. An jera Rijistar I/O ta zahiri da wuraren bit a ciki "Yi rijistar bayanin" akan shafi na 64.

An rarraba wuraren adireshin I / O guda uku don kowane tashar jiragen ruwa, ɗayan kowannensu don Rijistar Bayanai - PORTx, Bayanin Jagorar Bayanai - DDRx, da Fil Input Fil - Pinx. Ana karanta Filin shigar da Input ɗin P / Port kawai, yayin da Rajistar Bayanai da Rajistar Jagorar Bayanai ana karantawa / rubutawa. Koyaya, rubuta ma'ana ɗaya zuwa kaɗan a cikin Rikodin PINx, zai haifar da sauyawa a cikin ɗan daidai a cikin Rajistar Bayanai. Bugu da kari, Pull-up Disable - PUD bit a cikin MCUCR yana dakatar da aikin jawowa ga dukkan fil a duk tashar jiragen ruwa lokacin da aka saita.

Amfani da tashar I / O a matsayin General Digital I / O an bayyana a ciki "Tashar jiragen ruwa azaman General Digital I / O" a shafi na 53. Yawancin maɓallan tashar jiragen ruwa suna ninkawa tare da wasu ayyuka na daban don keɓaɓɓun fasaloli a kan na'urar. Yadda kowannensu ya yi aiki tare da tashar tashar jiragen ruwa an bayyana shi a ciki "Sauran Ayyukan Port" a shafi na 57. Koma zuwa sassan sassan kowane mutum don cikakken bayanin ayyukan madadin.

Lura cewa ba da damar maye gurbin aikin wasu tashoshin tashar jiragen ruwa ba zai shafi yin amfani da sauran biyun a tashar ba kamar I / O na dijital na gaba ɗaya.

Tashar jiragen ruwa azaman Janar Digital I / O

Tashar jiragen ruwa sune tashar I / O mai bi-biyun kai tsaye tare da jan-buta na ciki. Hoto na 10-2 yana nuna kwatancen aikin ɗayan pin ɗin I / O-tashar, anan ana kiran shi da suna Pxn.

Hoto na 10-2. Janar Digital I/O(1)

Harhadawa fil

Kowane tashar tashar jiragen ruwa ya ƙunshi rago uku na rijista: DDxn, PORTxn, da PINxn. Kamar yadda aka nuna a "Yi rijistar bayanin" akan shafi na 64, ana samun ragogin DDxn a adireshin DDRx I / O, da PORTxn ragowa a adireshin PORTx I / O, da kuma PINxn ragowa a adireshin PINx I / O.

DDxn kadan a cikin rajistar DDRx ya zaɓi shugabancin wannan fil. Idan an rubuta DDxn ma'ana daya, ana daidaita Pxn azaman fil mai fitarwa. Idan an rubuta DDxn mara hankali, Pxn an saita shi azaman fil na shigar da shi.

Idan PORTxn an rubuta ma'ana ɗaya lokacin da aka saita fil ɗin azaman fil ɗin shigarwa, ana kunna maɓallin haɓakawa. Don canza maɓallin ja-gaba, PORTxn dole ne a rubuta sifili mara kyau ko kuma a saita pin ɗin azaman fil na fitarwa. Fusoshin tashar jiragen ruwa ana bayyana su sau uku lokacin da yanayin sake saiti ya fara aiki, koda kuwa babu agogo masu gudana.

Idan PORTxn an rubuta ma'ana daya lokacin da aka saita pin a matsayin fil mai fitarwa, to tashar tashar jiragen ruwa ana tuka ta (ɗaya). Idan PORTxn an rubuta azancin sifili lokacin da aka saita pin a matsayin fil mai fitarwa, toshe tashar tashar jiragen ruwa ƙasa yake (sifili).

Kunna Fil

Rubuta ma'ana ɗaya zuwa PINxn ya sauya darajar PORTxn, mai zaman kansa akan ƙimar DDRxn. Lura cewa ana iya amfani da umarnin SBI don sauya abu ɗaya a cikin tashar jirgin ruwa.

Sauyawa tsakanin Input da Output

Lokacin canzawa tsakanin jihohi uku ({DDxn, PORTxn} = 0b00) da fitarwa mai girma ({DDxn, PORTxn} = 0b11), jihar tsaka-tsaki tare da ko dai an kunna cirewa {DDxn, PORTxn} = 0b01) ko ƙananan fitarwa ({DDxn, PORTxn} = 0b10) dole ne ya faru. A al'ada, jihar da aka ba da damar cirewa yana da cikakkiyar karɓa, saboda yanayin da ya dace ba zai lura da bambanci tsakanin babban direba mai ƙarfi da ja-up ba. Idan ba haka lamarin yake ba, za a iya saita bit ɗin PUD a cikin Rijistar MCUCR don musaki duk abubuwan jan hankali a duk tashoshin jiragen ruwa.

Sauya sheka tsakanin bayanai tare da jawo-sama da ƙara ƙarancin matsala yana haifar da matsala iri ɗaya. Dole ne mai amfani ya yi amfani da ƙasa-ƙasa ({DDxn, PORTxn} = 0b00) ko babban yanayin fitarwa ({DDxn, PORTxn} = 0b10) azaman matsakaiciyar mataki.

Table 10-1 ya taƙaita siginar sarrafawa don ƙimar fil.

Tebur 10-1. Saitunan Pin Port

DDxn	PORTxn	PUD (a cikin MCUCR)	I/O	Ja-up	Sharhi
0	0	X	Shigarwa	A'a	Yankin ƙasa (Hi-Z)
0	1	0	Shigarwa	Ee	Pxn zai samo asali idan kari. ja low.
0	1	1	Shigarwa	A'a	Yankin ƙasa (Hi-Z)
1	0	X	Fitowa	A'a	Fitarwa Lowananan (Sink)
1	1	X	Fitowa	A'a	Fitarwa Mai Girma (Source)

Karanta Pinimar Pin

Mai zaman kansa daga saitin hanyar Gudanar da Bayanan bit DDxn, ana iya karanta fil din tashar ta hanyar bitxn Register bit. Kamar yadda aka nuna a Hoto na 10-2, PINxn Register kadan kuma makullin da ya gabata ya zama aiki tare. Ana buƙatar wannan don kaucewa ƙaddara idan fil ɗin jiki ya canza darajar kusa da gefen agogo na ciki, amma kuma yana gabatar da jinkiri. Hoto na 10-3 yana nuna zanen lokaci na aiki tare lokacin karanta ƙimar fil ɗin da aka yi a waje. Matsakaicin mafi ƙarancin jinkirin yaduwa ana nuna tpd, max da tpd, min bi da bi.

Yi la'akari da lokacin agogo farawa jim kaɗan bayan faɗuwar farko na agogon tsarin. Ana rufe lagon lokacin da agogo ya yi ƙasa, kuma yana bayyane lokacin da agogo ya yi girma, kamar yadda yankin da ke inuwa na alamar "SYNC LATCH" ke nunawa. Signalimar sigina tana kulle lokacin da agogon tsarin ya yi ƙasa. An rufe shi cikin Rijistar PINxn a ƙarshen agogo mai nasara. Kamar yadda kibiyoyi biyu suka nuna tpd, max da tpd, min, canjin sigina guda a kan fil zai jinkirta tsakanin clock da 1½ lokacin agogo wanda ya danganta da lokacin da aka tabbatar.

Lokacin karanta karatun software da aka sanya darajar fil, dole ne a saka umarnin nop kamar yadda aka nuna a ciki Hoto na 10-4. Koyarwar da aka fitar ta saita siginar "SYNC LATCH" a gefen gefen agogo. A wannan yanayin, jinkirta tpd ta hanyar aiki tare lokaci ɗaya ne na agogo.

Lambar nan mai zuwa example ya nuna yadda ake saita tashar jiragen ruwa B fil 0 da 1 high, 2 da 3 low, da kuma ayyana tashar jiragen ruwa fil daga 4 zuwa 5 a matsayin shigarwa tare da ja-up da aka sanya zuwa tashar tashar tashar jiragen ruwa 4. Sakamakon fil dabi'un ana sake karantawa, amma kamar yadda aka tattauna a baya, an haɗa umarnin nop don samun damar sake karanta ƙimar da aka sanya kwanan nan ga wasu fil ɗin.

Lambar Majalisar Example(1)

…

; Ƙayyade abubuwan cirewa da saita abubuwan da aka fi so

; Ƙayyade kwatance don fil ɗin tashar jiragen ruwa

ldi r16,(1<<PB4)|(1<<PB1)|(1<<PB0)

ldi r17,(1<<DDB3)|(1<<DDB2)|(1<<DDB1)|(1<<DDB0)

daga PORTB,r16

daga DDRB,r17

; Saka nop don aiki tare

babu

; Karanta tashar tashar jiragen ruwa

r16,PINB

…

Lura: Don shirin taron, ana amfani da rajistar rijiyoyin wucin gadi guda biyu don rage lokacin daga abubuwan cirewa ana saita su akan fil 0, 1 da 4, har sai an saita raƙuman kwatance daidai, suna bayyana bit 2 da 3 a matsayin ƙasa kuma suna sake fasalin bits 0 da 1 a matsayin manyan direbobi masu ƙarfi.

C Code Example

wanda ba a sanya hannu ba;

…

/* Ƙayyade abubuwan cirewa da saita abubuwan fitarwa mai girma */

/* Ƙayyade kwatance don fil ɗin tashar jiragen ruwa */ PORTB = (1<

DDRB = (1<<DDB3)|(1<<DDB2)|(1<<DDB1)|(1<<DDB0);

/* Saka nop don aiki tare*/

_NOP ();

/* Karanta tashar tashar jiragen ruwa */ i = PINB;

…

Shigar da Inji na Dijital da Yanayin Barci

Kamar yadda aka nuna a Hoto na 10-2, siginar shigar da dijital na iya zama clamped zuwa ƙasa a shigar da schmitt-trigger. Siginar da ke nuna SLEEP a cikin wannan adadi, MCU Mai Kula da Barci ne ya saita shi a yanayin saukar da wuta don guje wa yawan wutar lantarki idan an bar wasu siginonin shigarwa suna iyo, ko suna da matakin siginar analog kusa da VCC/2.

SLEEP an yi overridden don tashar fil an kunna shi azaman katsewar fil na waje. Idan buƙatar katsewa ta waje ba a kunna ba, SLEEP yana aiki kuma don waɗannan maɓallan. Hakanan SLEEP yana cike da wasu ayyuka na daban kamar yadda aka bayyana a ciki "Sauran Ayyukan Port" a shafi na 57.

Idan babban matakin hankali ("ɗaya") yana kan fil ɗin katsewa na waje wanda aka saita azaman "Katsewa akan Rising Edge, Falling Edge, ko Duk wani Canjin Logic akan Fin" yayin da ba'a kunna katsewar waje ba, Tutar Katsewar waje daidai zata kasance. saita lokacin dawowa daga yanayin barci da aka ambata a sama, azaman clampshiga cikin waɗannan yanayin bacci yana haifar da canjin dabaru da aka nema.

Fuskokin da ba a haɗa ba

Idan wasu fil ba'a amfani dasu, ana bada shawara don tabbatar da cewa waɗannan fil ɗin suna da ƙayyadadden matakin. Kodayake galibin abubuwan dijital sun kasance marasa ƙarfi a cikin yanayin bacci mai zurfin gaske kamar yadda aka bayyana a sama, ya kamata a kauce wa abubuwan shiga cikin ruwa don rage yawan amfani da ake yi a yanzu a duk sauran hanyoyin da aka kunna abubuwan dijital (Sake Sake, Yanayin aiki da Yanayin dleaura).

Hanya mafi sauƙi don tabbatar da ƙayyadadden matakin fil ɗin da ba a yi amfani da shi ba, shine don ba da damar cirewa na ciki. A wannan yanayin, za a kashe cirewa yayin sake saiti. Idan ƙarancin wutar lantarki yayin sake saiti yana da mahimmanci, ana ba da shawarar yin amfani da cirewar waje ko cirewa. Ba a ba da shawarar haɗa fil ɗin da ba a yi amfani da su kai tsaye zuwa VCC ko GND ba, tunda wannan na iya haifar da igiyoyin ruwa da yawa idan an saita fil ɗin da gangan azaman fitarwa.

Sauran Ayyukan Port

Yawancin tashoshin tashar jiragen ruwa suna da madaidaitan ayyuka ban da kasancewar I / Os na dijital na gaba ɗaya. Hoto na 10-5 yana nuna yadda siginar tashar tashar jiragen ruwa ke sarrafa sigina daga sauƙaƙe Hoto na 10-2 za a iya overridden da madadin ayyuka. Signalsila siginan da ke kan gaba ba za su kasance a cikin duk fil ɗin tashar jiragen ruwa ba, amma adadi yana aiki azaman cikakken kwatancen zartar da zartar da duk tashar tashar tashar a cikin AVR microcontroller family.

Tebur 10-2. Bayanin Jumla na Sigina Masu Matsala don Madadin Ayyuka

Sunan siginar	Cikakken suna	Bayani
PUOE	Rarfafa Enarfafawa Enable	Idan an saita wannan alamar, siginar PUOV ce ke sarrafa ikon jawo-sama. Idan wannan siginar ya tsabtace, za a kunna ja sama lokacin da {DDxn, PORTxn, PUD} = 0b010.
PUOV	-Ara Overimar -aukewa	Idan an saita PUOE, za a kunna / kashe lokacin da aka saita / share PUOV, ba tare da la'akari da saitin ragin DDxn, PORTxn, da PUD Register ba.
DDOE	Bayar da Bayanin Bayanai Bayanai Kunna	Idan an saita wannan siginar, Mai fitar da Output Enable yana iya sarrafawa ta siginar DDOV. Idan wannan siginar ya tsabtace, Datnn DDxn Register ya kunna mai fitar da abin fitarwa.
DDOV	Bayanin Bayar da Bayanin Bayanai Bayani	Idan an saita DDOE, Direba na fitarwa yana aiki / kashe lokacin da aka saita / share DDOV, ba tare da la'akari da saitin bitar DDxn Register ba.
PVOE	Rushe Valimar Port Portarfafawa	Idan an saita wannan siginar kuma an kunna Driver Output, ƙimar tashar tashar tana sarrafa ta siginar PVOV. Idan PVOE ya share, kuma aka kunna Driver na Fitarwa, theimar tashar tana ƙarƙashin bitar PORTxn Register.
PVOV	Valimar Tushewar Valimar Port	Idan an saita PVOE, an saita darajar tashar zuwa PVOV, ba tare da la'akari da saitin bit na PORTxn Register ba.
PTOE	Port Portgle Override Na kunna	Idan an saita PTOE, an juya PORTxn Register kaɗan.
DIEOE	Input na Dijital Enable Bayar da rarfafawa Enable	Idan an saita wannan ɗan bitar, Dijital Input Enable yana sarrafa ta siginar DIEOV. Idan wannan siginar ta tsabtace, Inaddamar da Input Dijital ta ƙaddara ta yanayin MCU (Yanayi na al'ada, yanayin bacci).
DIEOV	Input dijital yana ba da damar Overimar Tushe	Idan an saita DIEOE, Dijital Input tana aiki / nakasa lokacin da aka saita / share DIEOV, ba tare da la'akari da yanayin MCU ba (Yanayi na al'ada, yanayin bacci).
DI	Input dijital	Wannan shine Input na Dijital zuwa madadin ayyuka. A cikin adadi, an haɗa siginar zuwa fitowar schmitt-jawo amma kafin aiki tare. Sai dai in anyi amfani da Input na Dijital azaman tushen agogo, ɗayan da ke madadin aikin zaiyi amfani da aikin saitin sa.
AIO	Analog Input / Output	Wannan shine Analog Input / Output to / daga madadin ayyuka. Ana haɗa siginar kai tsaye zuwa kushin, kuma ana iya amfani da shi bi-bi-bi.

Subananan sassan masu zuwa ba da daɗewa ba suna bayyana madaidaitan ayyuka na kowane tashar jiragen ruwa, kuma suna danganta siginan fifiko zuwa madadin aiki. Koma zuwa bayanin aikin madadin don ƙarin bayani.

Sauran Ayyuka na Port B

Ana nuna fil na Port B tare da madadin aiki a ciki Table 10-3.

Table 10-3. Madadin Ayyuka na Port B fil

Port Pin	Madadin Aiki
Saukewa: PB5	Sake saita: Sake saita Pin dW: debugWIRE I / O ADC0: ADC Input Channel 0 PCINT5: Fassara Pin Canji, Tushen 5
Saukewa: PB4	XTAL2: Crystal Oscillator Output CLKO: Sakamakon Clock Tsarin ADC2: ADC Input Channel 2 OC1B: Mai eridaya / Counter1 Kwatanta Matsalar B Sakamakon PCINT4: Canjin Canji ya katse 0, Source 4
Saukewa: PB3	XTAL1: Crystal Oscillator Input CLKI: Shigarwar agogon waje ADC3: ADC Input Channel 3 OC1B: Timarin Mai eridaya / Counter1 Kwatanta Matsalar B Sakamakon PCINT3: Canja Canjin Fuskanci 0, Tushen 3
Saukewa: PB2	SCK: Input Clock Serial ADC1: ADC Input Channel 1 T0: Lokaci / Counter0 Clock Source Clock USCK: USI Clock (Yanayin Waya Uku) SCL: USI Clock (Yanayin Waya Biyu) INT0: Katsewa na waje 0 Shigar da PCINT2: Fuskantar Canza Fuska 0, Tushen 2
Saukewa: PB1	MISO: Shigar da Bayanan Jagora na SPI / Bayar da Bayanai Bayanai AIN1: Kwatancen Analog, Input mara kyau OC0B: Mai kidaya / Counter0 Kwatanta Daidaita B Sakamakon OC1A: Mai eridayar lokaci / Counter1 Kwatanta Daidaita Sakamakon Sakamakon DO: Sakamakon Bayanai na USI (Yanayin Waya Uku) PCINT1: Pin Canza Tsoma baki 0, Tushen 1
Saukewa: PB0	MOSI :: SPI Jagorar Bayanan Bayanai / Shigar da Bawan Bayanai AIN0: Kwatancen Analog, Ingantaccen Input OC0A: Mai ƙidayar lokaci/Counter0 Kwatanta Match A fitarwa OC1A: Timarin Mai eridayar lokaci / Counter1 Kwatanta Daidai A Sakamakon DI: Shigar da Bayanan USI (Yanayin Waya Uku) SDA: Shigar da Bayanai na USI (Yanayin Waya Biyu) AREF: Bayanin Analog na waje PCINT0: Canjin Canji ya katse 0, Source 0

Port B, Bit 5 - Sake saita / dW / ADC0 / PCINT5

Sake saita: Sake saitin Sake saitin waje yana aiki kasa kuma an kunna shi ta hanyar shirye-shirye ("1") RSTDISBL Fuse. An kunna Pullup kuma an fitar da direba mai fitarwa da shigar da dijital lokacin da aka yi amfani da fil ɗin azaman Sake Sake.

dW: Lokacin da aka tsara debugWIRE Enable (DWEN) Fuse kuma ba a shirya makullin makullin ba, an kunna tsarin debugWIRE a cikin na'urar da ake niyya. Siffar tashar RESET an saita ta azaman waya-DA (bude-lambatu) bi-directional I / O pin tare da jawo-sama yana kunna kuma ya zama ƙofar sadarwa tsakanin manufa da emulator.

ADC0: Analog zuwa Digital Converter, Channel 0.

PCINT5: Pin Canza maɓallin tushe 5.

Port B, Bit 4 - XTAL2 / CLKO / ADC2 / OC1B / PCINT4

XTAL2: Chip Clock Oscillator pin 2. An yi amfani dashi azaman fil na agogo don duk tushen agogon guntu sai dai calibrateble RC Oscillator na ciki da agogo na waje. Lokacin amfani da azaman fil na agogo, ba za a iya amfani da fil azaman fil na I / O ba. Lokacin amfani da calibratable RC Oscillator ko agogo na waje azaman tushen agogon Chip, PB4 yana aiki azaman maɓallin I / O na talakawa.

CLKO: Zaɓuɓɓukan agogon da aka rarrabu ana iya fitarwa akan fil PB4. Raba agogon tsarin zai fito idan aka tsara CKOUT Fuse, ba tare da la'akari da saitunan PORTB4 da DDB4 ba. Hakanan za'a fitar dashi yayin sake saiti.

ADC2: Analog zuwa Digital Converter, Channel 2.

OC1B: Fitarwa Kwatanta fitowar Wasan wasa: Fil ɗin PB4 na iya zama azaman fitarwa na waje don Mai eridayar lokaci / Counter1 Kwatanta Match B lokacin da aka saita shi azaman fitarwa (saita DDB4) Fil ɗin OC1B shima fil ɗin fitarwa ne don aikin saita lokaci na yanayin PWM.

PCINT4: Pin Canza maɓallin tushe 4.

Port B, Bit 3 - XTAL1 / CLKI / ADC3 / OC1B / PCINT3

XTAL1: Chip Clock Oscillator pin 1. An yi amfani dashi don dukkanin tushen agogon guntu banda calibrateble RC oscillator. Lokacin amfani da azaman fil na agogo, ba za a iya amfani da fil azaman fil na I / O ba.

CLKI: Shigar da agogo daga asalin agogon waje, duba "Agogon waje" a shafi na 26.

ADC3: Analog zuwa Digital Converter, Channel 3.

OC1B: Komawar Output Kwatanta fitowar wasa: PB3 pin na iya zama azaman fitarwa na waje don Mai eridayar lokaci / Counter1 Kwatanta Match B lokacin da aka saita shi azaman fitarwa (saita DDB3) Fil ɗin OC1B shima fil ɗin juzuwar fitarwa ne don aikin saita lokaci na PWM.

PCINT3: Pin Canza maɓallin tushe 3.

Port B, Bit 2 - SCK / ADC1 / T0 / USCK / SCL / INT0 / PCINT2

SCK: Fitowar agogon Jagora, pin shigar da agogo na bawa don tashar SPI. Lokacin da aka kunna SPI azaman Bawa, ana saita wannan fil azaman shigar dashi ba tare da la'akari da saitin DDB2 ba. Lokacin da aka kunna SPI azaman Jagora, DDPB2 ke sarrafa alkiblar bayanai na wannan fil. Lokacin da SPI ta tilasta fil ɗin ya zama abin shigarwa, har yanzu ana iya sarrafa cirewa ta hanyar bit PORTB2.

ADC1: Analog zuwa Digital Converter, Channel 1.

T0: tushen mai ƙidayar lokaci / Counter0.

USCK: Yanayin waya-uku Uku Universal Serial Interface Clock.

SCL: Yanayin waya biyu Serial Clock don USI yanayin waya biyu.

INT0: Tushen katsewa na waje 0.

PCINT2: Pin Canza maɓallin tushe 2.

Port B, Bit 1 - MISO / AIN1 / OC0B / OC1A / DO / PCINT1

MISO: Shigar da Bayanan Babbar Jagora, Filin fitar da Bawa don tashar SPI. Lokacin da aka kunna SPI azaman Jagora, ana saita wannan fil azaman shigar dashi ba tare da la'akari da saitin DDB1 ba. Lokacin da aka kunna SPI azaman Bawa, DDB1 ke sarrafa alkiblar bayanai na wannan fil. Lokacin da SPI ta tilasta fil ɗin ya zama abin shigarwa, har yanzu ana iya sarrafa cirewa ta hanyar bit PORTB1.

AIN1: Analog Kwatancen Maɗaukaki Input. Sanya fil din tashar azaman shigarwa tare da cirewa na ciki an kashe don kauce wa aikin tashar dijital daga tsoma baki tare da aikin Analog Comparator.

OC0B: Fitarwa Kwatanta fitowar wasa. Fil ɗin PB1 na iya zama azaman fitarwa na waje don Mai eridayar lokaci / Counter0 Kwatanta Daidaita B. Dole ne a saita pin ɗin PB1 azaman fitarwa (saitin DDB1 (ɗaya)) don hidimar wannan aikin. Fil ɗin OC0B shima fil ɗin fitarwa ne don aikin mai ƙwanƙwasa yanayin yanayin PWM.

OC1A: Fitarwa Kwatanta fitowar Daidaitawa: P pin ɗin PB1 na iya zama azaman fitarwa na waje don Mai eridayar lokaci / Counter1 Kwatanta Match B lokacin da aka saita shi azaman fitarwa (saitin DDB1). Pin ɗin OC1A shima fil ɗin fitarwa ne don aikin mai ƙidayar lokaci na yanayin PWM.

YI: Yanayin waya-uku fitarwa Bayanin Hadin Gaggawa na Duniya. Yanayin waya uku ya fitar da bayanan ya wuce darajar PORTB1 kuma ana turashi zuwa tashar jiragen ruwa lokacin da aka saita jagorar bayanai kaɗan DDB1 (ɗaya). PORTB1 yana ci gaba da jan-sama, idan alkiblar an shigar da ita kuma an saita PORTB1 (ɗaya).

PCINT1: Pin Canza maɓallin tushe 1.

Port B, Bit 0 - MOSI / AIN0 / OC0A / OC1A / DI / SDA / AREF / PCINT0

MOSI: Fitowar Bayanin Jagora na SPI, shigar da Bawan Bawa don tashar SPI. Lokacin da aka kunna SPI azaman Bawa, ana saita wannan fil azaman shigar dashi ba tare da la'akari da saitin DDB0 ba. Lokacin da aka kunna SPI azaman Jagora, DDB0 ke sarrafa alkiblar bayanai na wannan fil. Lokacin da SPI ta tilasta fil ɗin ya zama abin shigarwa, har yanzu ana iya sarrafa cirewa ta hanyar bit PORTB0.

AIN0: Kwatancen Analog Ingantaccen Input. Sanya fil din tashar azaman shigarwa tare da cirewa na ciki an kashe don kauce wa aikin tashar dijital daga tsoma baki tare da aikin Analog Comparator.

OC0A: Fitarwa Kwatanta fitowar wasa. Fil ɗin PB0 na iya zama azaman fitarwa na waje don Mai eridayar lokaci / Counter0 Kwatanta Match A lokacin da aka saita shi azaman fitarwa (saitin DDB0 (ɗaya)). Pin din OC0A shima fil ne na fitarwa don aikin mai ƙwanƙwasa yanayin yanayin PWM.

OC1A: Inverted Output Kwatanta fitowar wasa: PB0 pin na iya zama azaman fitarwa na waje don Mai eridayar lokaci / Counter1 Kwatanta Match B lokacin da aka saita shi azaman fitarwa (saita DDB0). Fil ɗin OC1A shima fil ɗin juzuwar fitarwa ne don aikin saita lokaci na PWM.

SDA: Yanayin Waya mai Hidima Bayanan Bayanin Gani.

AREF: Maganar Analog na waje don ADC. Pullup da direba fitarwa suna kashewa akan PB0 lokacin da ake amfani da fil azaman nuni na waje ko Voltage Reference tare da capacitor na waje a fil na AREF.

DI: Shigar da Bayanai a cikin yanayin waya uku na USI. USI Yanayin waya uku baya goge ayyukan tashar tashar jiragen ruwa na yau da kullun, don haka dole ne a saita fil azaman shigar da aikin DI.

PCINT0: Pin Canza maɓallin tushe 0.

Table 10-4 kuma Table 10-5 danganta wasu ayyuka na tashar Port B da sigina masu birgewa waɗanda aka nuna a ciki Hoto 10-5 akan shafi na 58.

Table 10-4. Maɓallin Sigina don Madadin Ayyuka a cikin PB[5:3]

Sunan siginar	PB5 / Sake saita / ADC0 / PCINT5	PB4/ADC2/XTAL2/ OC1B/PCINT4	PB3/ADC3/XTAL1/ OC1B/PCINT3
PUOE	RTDISBL(1) • DWEN(1)	0	0
PUOV	1	0	0
DDOE	RTDISBL(1) • DWEN(1)	0	0
DDOV	debugWire watsa	0	0
PVOE	0	Kunna OC1B	Kunna OC1B
PVOV	0	OC1B	OC1B
PTOE	0	0	0
DIEOE	RTDISBL(1) + (PCINT5 • PCIE + ADC0D)	PCINT4 • PCIE + ADC2D	PCINT3 • PCIE + ADC3D
DIEOV	Saukewa: AD0D	Saukewa: AD2D	Saukewa: AD3D
DI	Shigar da PCINT5	Shigar da PCINT4	Shigar da PCINT3
AIO	Sake Sake shigar da, ADC0 Input	Bayanan ADC2	Bayanan ADC3

Lura: lokacin da Fuse ya kasance "0" (Shirye-shiryen).

Table 10-5. Maɓallin Sigina don Madadin Ayyuka a cikin PB[2:0]

Sunan siginar	PB2/SCK/ADC1/T0/ USCK/SCL/INT0/PCINT2	PB1/MISO/DO/AIN1/ OC1A/OC0B/PCINT1	PB0/MOSI/DI/SDA/AIN0/AR EF/OC1A/OC0A/ Bayanin PCINT0
PUOE	USI_TWO_WIRE	0	USI_TWO_WIRE
PUOV	0	0	0
DDOE	USI_TWO_WIRE	0	USI_TWO_WIRE
DDOV	(USI_SCL_HOLD + PORTB2) • DDB2	0	(SDA + PORTB0) • DDB0
PVOE	USI_TWO_WIRE • DDB2	OC0B Kunna + OC1A Kunna + USI_THREE_WIRE	OC0A Kunna + OC1A Kunna + (USI_TWO_WIRE DDB0)
PVOV	0	OC0B + OC1A + YI	OC0A + OC1A
PTOE	USITC	0	0
DIEOE	PCINT2 • PCIE + ADC1D + USISIE	PCINT1 • PCIE + AIN1D	PCINT0 • PCIE + AIN0D + AMFANI
DIEOV	Saukewa: AD1D	AIN1D	AIN0D
DI	T0 / USCK / SCL / INT0 / Shigar da PCINT2	Shigar da PCINT1	Shigar DI / SDA / PCINT0
AIO	Bayanan ADC1	Analog Kwatancen kwatancen Kuskuren Shiga	Analog Kwatancen Ingantaccen Input

Yi rijista bayanin

MCUCR - Rajistar Sarrafa MCU

Bit	7	6	5	4	3	2	1	0
0 x35	BODS	PUD	SE	SM1	SM0	JIKI	ISC01	ISC00	MCUCR
Karanta/Rubuta	R	R/W	R/W	R/W	R/W	R	R/W	R/W
Darajar farko	0	0	0	0	0	0	0	0

Bit 6 - PUD: Kashe Kashewa

Lokacin da aka rubuta wannan bit ɗin ga ɗaya, masu cirewa a cikin tashoshin I / O suna da nakasasshe koda kuwa an saita Rikodin DDxn da PORTxn don ba da damar jawowa ({DDxn, PORTxn} = 0b01). Duba "Harhadawa fil" a shafi na 54 don ƙarin cikakkun bayanai game da wannan fasalin.

PORTB - Rijistar Bayanai na Port B

Bit	7	6	5	4	3	2	1	0
0 x18	–	–	PORTB5	PORTB4	PORTB3	PORTB2	PORTB1	PORTB0	PORTB
Karanta/Rubuta	R	R	R/W	R/W	R/W	R/W	R/W	R/W
Darajar farko	0	0	0	0	0	0	0	0

DDRB - Port B Bayanin Bayanai na Port B

Bit	7	6	5	4	3	2	1	0
0 x17	–	–	Saukewa: DDB5	Saukewa: DDB4	Saukewa: DDB3	Saukewa: DDB2	Saukewa: DDB1	Saukewa: DDB0	DDRB
Karanta/Rubuta	R	R	R/W	R/W	R/W	R/W	R/W	R/W
Darajar farko	0	0	0	0	0	0	0	0

PINB - Adireshin Fil B Input Fil

Bit	7	6	5	4	3	2	1	0
0 x16	–	–	PINB5	PINB4	PINB3	PINB2	PINB1	PINB0	PINB
Karanta/Rubuta	R	R	R/W	R/W	R/W	R/W	R/W	R/W
Darajar farko	0	0	N/A	N/A	N/A	N/A	N/A	N/A

8-bit Mai ƙidayar lokaci / Counter0 tare da PWM

Siffofin

Fitarwa Mai Zaman Kanta Biyu

Buididdigar Doubleididdigar Sau Biyu Kwatanta Rajista

Share Lokaci akan Kwatanta Wasan (Sake Sake Kai)

Glitch Free, Lokaci Daidaita Pulse Nisa Modulator (PWM)

Canjin PWM Lokaci

Generator Generator

Maɓuɓɓugan Maɓuɓɓuka Uku (TOV0, OCF0A, da OCF0B)

Ƙarsheview

Mai ƙidayar lokaci / Counter0 babban manufa ne 8-bit Mai ƙidayar lokaci / /aramar koyaushe, tare da independentungiyoyin Kwatanta Outwararru biyu masu zaman kansu, kuma tare da goyan bayan PWM. Yana ba da izinin lokacin aiwatar da shirin daidai (gudanarwar taron) da haɓaka igiyar ruwa.

An nuna fasalin toshe sauƙin 8-bit Mai ƙidayar lokaci / Counter a ciki Hoto na 11-1. Don ainihin sanyawa na pinan I / O, koma zuwa "Pinout ATtiny25 / 45/85" a shafi na 2. Ana samun Rajistar I / O mai amfani da CPU, gami da raunin I / O da fil I / O, a sarari. Ana yin takamaiman takamaiman I / O Register da ƙananan wurare a cikin "Yi rijistar bayanin" a shafi na 77.

The Timer/Counter (TCNT0) da Output Compare Rajista (OCR0A da OCR0B) rajista ne 8-bit. Buƙatar katsewa (wanda aka taƙaita zuwa Int.Req. a cikin adadi) sigina duk ana iya gani a cikin Rijistar Katse Tutar Mai ƙidayar lokaci (TIFR). Dukkanin katsewa ana rufe su daban-daban tare da Rijistar Mask ɗin Tsayar da Lokaci (TIMSK). TIFR da TIMSK ba a nuna su a cikin adadi.

Ana iya rufe mai ƙidayar lokaci/Counter a ciki, ta hanyar prescaler, ko ta hanyar agogon waje akan fil T0. The Clock Select Logic block yana sarrafa abin da tushen agogo da gefen agogon Timer/Counter ke amfani da shi don ƙara (ko rage) ƙimar sa. Mai ƙidayar lokaci/Counter baya aiki lokacin da ba a zaɓi tushen agogo ba. Fitowar daga Clock Select Logic ana kiranta da agogo mai ƙidayar lokaci (clkT0).

Pareididdigar pareididdigar putididdigar putididdigar sau biyu (OCR0A da OCR0B) ana kwatanta su da withimar Lokaci / Counter a kowane lokaci. Za'a iya amfani da sakamakon kwatancen ta Waveform Generator don samar da PWM ko fitarwa mai saurin fitarwa akan Fitar Kwatanta (OC0A da OC0B). Duba “parewarewar Kwatanta fitarwa” a shafi na 69. don cikakkun bayanai. Taron Kwatanta Wasan zai kuma saita Tutar da Tutar (OCF0A ko OCF0B) wanda za'a iya amfani dashi don ƙirƙirar Neman Kwatanta inter fitarwa.

Ma'anoni

Yawancin rijista da ɗan ambato a cikin wannan ɓangaren an rubuta su gaba ɗaya. Loweraramin ƙaramin lamba “n” ya maye gurbin Mai /idaya / teridaya lamba, a wannan yanayin 0. Aaramin ƙaramin “x” ya maye gurbin pareungiyar Kwatanta put fitarwa, a wannan yanayin Kwatanta itangare A ko Kwatanta Naúrar B. Duk da haka, lokacin amfani da rijistar ko ɗan bayyana a cikin wani shiri, dole ne ayi amfani da madaidaicin tsari, watau, TCNT0 don samun damar ƙimar darajar Lokaci / Counter0 da sauransu.

Ma'anar a cikin Table 11-1 Hakanan ana amfani dasu sosai a cikin takaddar.

Tebur 11-1. Ma'anoni

Ƙunƙara	Bayani
KASA	Takaddar ta isa GASKIYA idan ya zama 0x00
MAX	Lambar ta kai MAXimum mafi girma lokacin da ta zama 0xFF (decimal 255)
TOP	Maɓallin ya isa TOP lokacin da ya zama daidai da ƙimar mafi girma a cikin jerin ƙididdiga. Ana iya sanya darajar TOP ta zama ƙayyadadden ƙimar 0xFF (MAX) ko ƙimar da aka adana a cikin rijistar OCR0A. Aikin ya dogara da yanayin aiki

Lokaci / Counter Prescaler da Tushen agogo

Lokaci / Counter na iya rufewa ta hanyar ciki ko tushen agogo na waje. An zaɓi tushen agogo ta hanyar amfani da ƙirar Clock Select wanda ke ƙarƙashin ragamar Clock Select (c) wanda yake a cikin Timer / Counter0 Control Register (TCCR0B).

Tushen agogo na ciki tare da Prescaler

Ana iya rufe mai ƙidayar lokaci/Counter0 kai tsaye ta agogon tsarin (ta saita CS0[2:0] = 1). Wannan yana ba da aiki mafi sauri, tare da matsakaicin mitar agogo/ƙiya daidai da mitar agogon tsarin (fCLK_I/O). A madadin, ɗaya daga cikin famfo huɗu daga prescaler ana iya amfani dashi azaman tushen agogo. Agogon da aka ƙayyade yana da mitar ko wanne

Sake saita mai kayyadewa

Mai kiyaye kayan aiki yana gudana kyauta, watau yana aiki da kansa ba tare da tsarin Saiti na Zaɓin Lokaci/Counter0 ba. Tunda zaɓin agogon mai ƙidayar/ƙanƙara bai shafi mai kiyayewa ba, yanayin mai kula da lafiyar zai sami fa'ida ga yanayin da ake amfani da agogon agogo. Daya tsohonample of prescaling artifact shine lokacin da aka kunna timer/counter da agogo ta mai kiyayewa (6> CS0 [2: 0]> 1). Adadin tsarin agogon tsarin daga lokacin da aka kunna mai saita lokaci zuwa ƙidaya ta farko na iya zama daga 1 zuwa N+1 agogon agogon tsarin, inda N yayi daidai da mai raba kayan kariya (8, 64, 256, ko 1024).

Zai yiwu a yi amfani da Sake saita Prescaler don aiki tare da Mai eridayar lokaci / Counter don aiwatar da shirin.

Tushen agogo na waje

Ana iya amfani da tushen agogon waje da aka yi amfani da fil ɗin T0 azaman agogon ƙidayar lokaci/ƙira (clkT0). T0 fil shine sampya jagoranci sau ɗaya kowane sake zagayowar agogon tsarin ta hanyar dabaru na aiki tare na fil. Aiki tare (sampled) sannan aka wuce

ta hanyar na'urar gano bakin ta. Hoto na 11-2 yana nuna kwatancen toshe mai aiki na aiki tare na T0 da dabaru na gano bakin. Ana rufe rijistar a kyakkyawan gefen agogon tsarin ciki (clkI/O). Latch ɗin yana bayyane a cikin babban lokacin agogon tsarin ciki.

Mai gano gefen yana haifar da bugun bugun clkT0 ɗaya ga kowane tabbatacce (CS0 [2:0] = 7) ko korau (CS0 [2:0] = 6) gefen da yake ganowa.

Ana yin rijistar OCR0x sau biyu yayin amfani da kowane ɗayan hanyoyin Yanayin Modarfin Pulse (PWM). Don al'ada da Bayyanannen Mai onidaya a kan Kwatanta (CTC) yanayin yanayin aiki, ɓarnatarwar sau biyu an kashe. Abubuwan sau biyu suna aiki tare da sabunta OCR0x Kwatanta Rijista zuwa ɗayan ko ƙasan jerin ƙididdigar. Aiki tare yana hana afkuwar madogara, bugun PWM mara daidaituwa, don haka samar da kayan kyauta kyauta.

Samun damar yin rijistar OCR0x na iya zama da wuya, amma wannan ba lamari bane. Lokacin da aka kunna sau biyu, CPU yana da damar yin amfani da OCR0x Buffer Register, kuma idan aka kashe buffering sau biyu CPU zai sami damar zuwa OCR0x kai tsaye.

Outarfin Fitarwa Kwatanta

A cikin yanayin tsarin tsara igiyar ruwa ba-PWM ba, ana iya tilasta fitowar wasan na mai gwadawa ta hanyar rubuta guda zuwa bitarfin Kwatanta Outarfin Kwatanta (FOC0x). Tilasta Kwatanta Kwatanta ba zai sanya Tutar OCF0x ba ko sake kunnawa / share mai ƙidayar lokaci ba, amma za a sabunta pin ɗin OC0x kamar a ce ainihin Kwatanta Match ya faru (saitunan COM0x [1: 0] sun bayyana ko an saita PIN ɗin OC0x, an share shi ko kuma ya canza).

Kwatanta Toshewar Match ta TCNT0 Rubuta

Duk CPU rubuta ayyukan zuwa TCNT0 Register zai toshe duk wani Kwatanta Match wanda yake faruwa a zagayen agogo mai zuwa, koda lokacin da aka tsayar da lokacin. Wannan fasalin yana bawa OCR0x damar farawa zuwa daidai da darajar TCNT0 ba tare da haifar da katsewa ba lokacin da aka kunna agogo / Mai ƙidaya lokaci.

Amfani da Comaukar Unaukar Fita

Tunda rubuta TCNT0 a kowane yanayi na aiki zai toshe dukkan Matakan Kwatanta don zagayowar agogo ɗaya, akwai haɗarin shiga yayin canza TCNT0 lokacin amfani da pareungiyar Kwatanta, fitarwa, da kanmu ko Mai eridaya / teridaya yana gudana ko a'a. Idan ƙimar da aka rubuta zuwa TCNT0 tayi daidai da ƙimar OCR0x, za a rasa parewallon Kwatancen, wanda zai haifar da tsarawar igiyar ba daidai ba. Hakanan, kar a rubuta ƙimar TCNT0 daidai yake da GABA lokacin da aka ƙidaya lissafin.

Saitin OC0x yakamata ayi kafin saita Rukunin Gudanar da Bayanai don fil ɗin tashar zuwa fitarwa. Hanya mafi sauƙi don saita ƙimar OC0x ita ce amfani da Outarfin Outarfin Outarfin Kwatanta (FOC0x) a cikin Yanayin Al'ada. Rijistar OC0x suna riƙe ƙimarsu koda lokacin da suke canzawa tsakanin hanyoyin Waveform Generation.

Kasani cewa ragin COM0x [1: 0] ba a ninka shi sau biyu ba tare da kwatancen darajar. Canja COM0x [1: 0] zai yi tasiri nan take.

Kwatanta Matcharan Fitarwa

Yanayin Kwatanta Fitarwa (COM0x [1: 0]) ragowa suna da ayyuka biyu. Generator Generator yana amfani da ragin COM0x [1: 0] don bayyana yanayin Kwatanta Fitarwa (OC0x) a wasan Kwatanta na gaba. Hakanan, rarar COM0x [1: 0] tana sarrafa tushen fitowar pin na OC0x. Hoto na 11-6 yana nuna sassaucin tsari na dabaru wanda tsarin bit na COM0x ya shafa [1: 0]. Rijistar I / O, ragowar I / O, da fil I / O a cikin adadi ana nuna su da ƙarfi. Kawai sassan janar I / O Port Control Register (DDR da PORT) waɗanda raunin COM0x ya shafa [1: 0]. Lokacin da kake magana akan yanayin OC0x, isharar na don Register OC0x ne na ciki, ba lambar OC0x ba. Idan sake saiti ya faru, an sake rijistar OC0x zuwa "0".

Lokacin da aka haɗa OC0A / OC0B zuwa fil na I / O, aikin COM0A [1: 0] / COM0B [1: 0] ragowa ya dogara da saitin bit na WGM0 [2: 0]. Table 11-2 yana nuna aikin bit na COM0x [1: 0] lokacin da aka saita ragin WGM0 [2: 0] zuwa al'ada ko yanayin CTC (wanda ba PWM ba).

Table 11-2. Kwatanta Yanayin fitarwa, Yanayin da ba na PWM ba

Saukewa: COM0A1 COM0B1	Saukewa: COM0A0 COM0B0	Bayani
0	0	Aikin tashar jiragen ruwa na al'ada, cire haɗin OC0A / OC0B.
0	1	Kunna OC0A / OC0B akan Kwatanta Wasan
1	0	Share OC0A / OC0B akan Kwatanta Wasan
1	1	Sanya OC0A / OC0B akan Kwatanta Wasan

Table 11-3 yana nuna alamar bit na COM0x [1: 0] lokacin da aka saita ragowa na WGM0 [2: 0] don saurin yanayin PWM.

Table 11-3. Kwatanta Yanayin fitarwa, Yanayin PWM mai sauri(1)

Saukewa: COM0A1 COM0B1	Saukewa: COM0A0 COM0B0	Bayani
0	0	Aikin tashar jiragen ruwa na al'ada, cire haɗin OC0A / OC0B.
0	1	Ajiye
1	0	Share OC0A / OC0B akan Kwatanta Match, saita OC0A / OC0B a BOTTOM (yanayin da baya juyawa)
1	1	Sanya OC0A / OC0B akan Kwatanta Match, share OC0A / OC0B a BOTTOM (yanayin juyawa)

Lura: Hali na musamman yana faruwa lokacin da OCR0A ko OCR0B yayi daidai da TOP kuma an saita COM0A1/COM0B1. A wannan yanayin, ana yin watsi da wasan kwatankwacin, amma saitin ko bayyane ana yin shi a BOTTOM. Duba "Yanayin PWM mai Sauri" a shafi na 73 don ƙarin bayani.

Table 11-4 yana nuna aiki kaɗan na COM0x [1: 0] lokacin da aka saita ragin WGM0 [2: 0] don daidaita yanayin PWM.

Table 11-4. Kwatanta Yanayin Fitowa, Daidaitaccen Yanayin PWM(1)

Saukewa: COM0A1 COM0B1	Saukewa: COM0A0 COM0B0	Bayani
0	0	Aikin tashar jiragen ruwa na al'ada, cire haɗin OC0A / OC0B.
0	1	Ajiye
1	0	Share OC0A / OC0B akan Kwatanta Match lokacin da ake kirgawa. Sanya OC0A / OC0B akan Kwatanta Matsala lokacin ƙidaya ƙasa.
1	1	Sanya OC0A / OC0B akan Kwatanta Matsala lokacin kirgawa. Share OC0A / OC0B akan Kwatanta Daidaita lokacin ƙidaya ƙasa.

Lura: 1. Hali na musamman yana faruwa lokacin da OCR0A ko OCR0B yayi daidai da TOP kuma an saita COM0A1/COM0B1. A wannan yanayin, ana yin watsi da Match ɗin Kwatanta, amma saitin ko bayyane ana yin shi a TOP. Duba "Yanayin Gyara Yanayin PWM" a shafi na 74 don ƙarin bayani.

Bits 3: 2 - Res: An adana ragowa

Waɗannan ragogin an adana ragowa a cikin ATtiny25 / 45/85 kuma koyaushe za a karanta su azaman sifili.

Bits 1: 0 - WGM0 [1: 0]: Yanayin Tsarin Waveform

An haɗu da bitar WGM02 da aka samo a cikin rijistar TCCR0B, waɗannan rarar suna sarrafa jerin ƙididdigar ƙirar, tushen asalin ƙimar ƙimar (TOP), da kuma wane nau'in ƙarni na zamani da za a yi amfani da shi, duba Table 11-5. Yanayin aiki da goyan bayan Mai /idayar lokaci / terwararraki su ne: Yanayi na yau da kullun (ƙididdiga), Bayyanannu Mai onidayar lokaci akan yanayin Kwatanta (CTC), da nau'ikan nau'ikan nau'ikan Yanayin Modwayar Maganin Pulse (PWM) iri biyu (duba "Yanayin Ayyuka" shafi na 71).

Table 11-5. Waveform Generation Yanayin Bit Bayanin

Yanayin	Farashin 02	Farashin 01	Farashin 00	Yanayin Lokaci / Counter na Aiki	TOP	Sabunta OCRx a	Tutar TOV da aka saita
0	0	0	0	Na al'ada	0xFF ku	Nan da nan	MAX(1)
1	0	0	1	PWM, Daidaita Lokaci	0xFF ku	TOP	KASA(2)
2	0	1	0	CTC	OCR	Nan da nan	MAX(1)
3	0	1	1	Mai sauri PWM	0xFF ku	KASA(2)	MAX(1)
4	1	0	0	Ajiye	–	–	–
5	1	0	1	PWM, Daidaita Lokaci	OCR	TOP	KASA(2)
6	1	1	0	Ajiye	–	–	–
7	1	1	1	Mai sauri PWM	OCR	KASA(2)	TOP

Bit 7 - FOC0A: Forcearfin Fitarwa Kwatanta A

FOC0A bit yana aiki ne kawai lokacin da raunin WGM ya ƙayyade yanayin da ba PWM ba.

Koyaya, don tabbatar dacewa tare da na'urori na gaba, dole ne a saita wannan ɗan ba komai lokacin da aka rubuta TCCR0B yayin aiki a cikin yanayin PWM. Lokacin rubuta abu mai ma'ana zuwa ɗan FOC0A, an gwada Compare Match nan take a kan Waveform Generation unit. Ana canza aikin OC0A gwargwadon saitin ragowa na COM0A [1: 0]. Lura cewa ana aiwatar da bit FOC0A azaman strobe. Saboda haka ƙimar da ke cikin rarar COM0A [1: 0] ita ce ke ƙayyade tasirin kwatancen da aka tilastawa.

Hanya ta FOC0A ba zata haifar da wani tsangwama ba, kuma ba zai share mai ƙidayar lokaci a yanayin CTC ba ta amfani da OCR0A azaman TOP. Kullum ana karanta bit FOC0A azaman sifili.

Bit 6 - FOC0B: Forcearfin Fitarwa Kwatanta B

Bitan FOC0B yana aiki ne kawai lokacin da ragin WGM ya ƙayyade yanayin da ba PWM ba.

Koyaya, don tabbatar dacewa tare da na'urori na gaba, dole ne a saita wannan bit ɗin zuwa sifili lokacin da aka rubuta TCCR0B yayin aiki a yanayin PWM. Lokacin rubuta abu mai ma'ana zuwa ɗan FOC0B, ana gwada Compara Match nan da nan akan rukunin Waveform Generation. Ana canza fitowar OC0B gwargwadon saitin ragowar COM0B [1: 0]. Lura cewa ana aiwatar da bit FOC0B azaman strobe. Sabili da haka ƙimar da ke cikin rarar COM0B [1: 0] ita ce ke ƙayyade tasirin kwatancen da aka tilasta.

Hanya ta FOC0B ba zata haifar da wani tsangwama ba, kuma ba zai share mai ƙidayar lokaci a yanayin CTC ba ta amfani da OCR0B azaman TOP.

Kullum ana karanta bit FOC0B azaman sifili.

Bits 5: 4 - Res: An adana ragowa

Waɗannan ragogin an adana ragowa a cikin ATtiny25 / 45/85 kuma koyaushe za a karanta su azaman sifili.

Bit 3 - WGM02: Yanayin Tsarin Waveform

Duba bayanin a cikin “TCCR0A - Timer / Counter Control Register A” a shafi na 77.

Bits 2: 0 - CS0 [2: 0]: Zaɓi agogo

Selectididdigar Selectayan Clock uku zaɓi zaɓi agogo wanda Mai byidayar lokaci / Counter zasu yi amfani dashi.

Shafin 11-6. Agogo Zaɓi Bayanin Bit

Saukewa: CS02	Saukewa: CS01	Saukewa: CS00	Bayani
0	0	0	Babu tushen agogo (Mai ƙidayar lokaci / Counter ya tsaya)
0	0	1	clkI/O/ (Babu prescaling)
0	1	0	clkI/O/8 (Daga prescaler)
0	1	1	clkI/O/64 (Daga prescaler)
1	0	0	clkI/O/256 (Daga prescaler)
1	0	1	clkI/O/1024 (Daga prescaler)
1	1	0	Tushen agogo na waje akan pin T0. Clock akan faɗuwar ƙasa.
1	1	1	Tushen agogo na waje akan pin T0. Lockara agogo akan gefen haɓaka.

Idan ana amfani da yanayin fil na waje don Mai eridayar lokaci / Counter0, sauyawa akan lambar T0 zai sa agogon ya kunna agogo koda kuwa an saita fil ɗin azaman fitarwa. Wannan fasalin yana ba da damar sarrafa software ta ƙidayar.

Teridaya da Kwatanta Raka'a

An bayyana aikin gama-gari na Mai ƙidayar lokaci / Counter1 a cikin yanayin asynchronous kuma an ambaci aiki a yanayin aiki kawai idan akwai bambanci tsakanin waɗannan hanyoyin biyu. Hoto na 12-2 yana nuna ma'aunin aiki tare na Mai /idaya / Counter 1 tare da jinkirta aiki tare a tsakanin rijista. Lura cewa duk bayanan agogo basa nunawa a cikin hoton. Valuesimar rajistar Mai eridayar lokaci / Counter1 tana ratsa rijistar aiki tare na ciki, wanda ke haifar da jinkirin shigar da aiki tare, kafin ya shafi aikin ƙira. Ana iya karanta rajistar TCCR1, GTCCR, OCR1A, OCR1B, da OCR1C dama bayan rubuta rajistar. Valuesimar bayanan da aka karanta sun jinkirta don rajistar Mai eridayar lokaci / Counter1 (TCNT1) da tutoci (OCF1A, OCF1B, da TOV1), saboda aiki tare da shigarwa da fitarwa.

Mai ƙidayar lokaci / Counter1 yana ƙunshe da babban ƙuduri da amfani mai daidaituwa tare da ƙananan damar haɓakawa. Hakanan yana iya tallafawa madaidaici biyu, mai sauri, 8-bit Pulse Width Modulators ta amfani da saurin agogo zuwa 64 MHz (ko 32 MHz a Yanayin Speedananan Sauri). A wannan yanayin, Mai eridayar lokaci / Counter1 da rijistar kwatancen fitarwa suna aiki ne azaman PWM guda biyu tare da wadatattun kayan juye juye da juyawa. Koma zuwa shafi na 86 don cikakken bayani akan wannan aikin. Hakanan, manyan damar haɓaka suna sanya wannan ƙungiyar ta zama mai amfani don ƙananan saurin ayyuka ko ainihin ayyukan lokaci tare da ayyukan da ba safai ba.

Hoto na 12-2. Mai ƙidayar ƙidayar lokaci/ƙiya 1 Aiki tare da Tsarin Toshe Rijista.

Mai ƙidayar lokaci / Counter1 da prescaler suna ba da damar tafiyar da CPU daga kowane tushen agogo yayin da mai gabatar da aikin ke aiki a kan 64 MHz mai sauri (ko 32 MHz a Yanayin Speedananan Sauri) agogon PCK a cikin yanayin asynchronous.

Lura cewa yawan agogon tsarin dole ne ya zama ƙasa da kashi ɗaya bisa uku na mita PCK. Tsarin aiki tare na mai ƙidayar lokaci / Counter1 yana buƙatar aƙalla gefuna biyu na PCK lokacin da tsarin agogo ya yi girma. Idan yawan lokacin agogo ya yi yawa, yana da haɗari cewa bayanai ko ƙimar sarrafawa sun ɓace.

Masu biyowa Hoto na 12-3 yana nuna zane-zane na Mai ƙidayar lokaci / Counter1.

Table 12-1. Kwatanta Yanayin Zaɓi a Yanayin PWM

COM1x1	COM1x0	Tasiri kan Sakamakon Kwatanta Fine
0	0	OC1x ba a haɗa ba OC1x ba a haɗa ba
0	1	OC1x ya share akan wasan daidaitawa. Sanya lokacinTCNT1 = $ 00. OC1x an saita akan daidaita wasa. An share lokacin TCNT1 = $ 00.
1	0	OC1x ya share akan wasan daidaitawa. Sanya lokacin TCNT1 = $ 00. OC1x ba a haɗa ba
1	1	OC1x Saita kan daidaita wasa. An share lokacin TCNT1 = $ 00. OC1x ba a haɗa ba

ADC halaye

Shafin 21-8. Halayen ADC, Tashoshi Guda Daya. TA = -40°C zuwa +85°C

Alama	Siga	Sharadi	Min	Buga	Max	Raka'a
	Ƙaddamarwa				10	Bits
	Cikakkar daidaito (Ciki har da INL, DNL, da anididdiga, Kuskuren Samuwa da Ci gaba)	VREF = 4V, VCC = 4V, ADC agogo = 200 kHz		2		LSB
		VREF = 4V, VCC = 4V, ADC agogo = 1 MHz		3		LSB
		VREF = 4V, VCC = 4V, ADC agogo = 200 kHz Yanayin Rage Sauti		1.5		LSB
		VREF = 4V, VCC = 4V, ADC agogo = 1 MHz Yanayin Rage Sauti		2.5		LSB
	Haɗin kai-tsaye ba tare da daidaituwa ba (INL) (Tabbaci bayan ƙaddamarwa kuma samun daidaituwa)	VREF = 4V, VCC = 4V, ADC agogo = 200 kHz		1		LSB
	Bambancin layi-layi (DNL)	VREF = 4V, VCC = 4V, ADC agogo = 200 kHz		0.5		LSB
	Kuskuren riba	VREF = 4V, VCC = 4V, ADC agogo = 200 kHz		2.5		LSB
	Kuskuren Offset	VREF = 4V, VCC = 4V, ADC agogo = 200 kHz		1.5		LSB
	Lokacin Canzawa	Canza Gudun Kyauta	14		280	.s
	Yawan Agogo		50		1000	kHz ba
VIN	Shigar da Voltage		GND		VREF	V
	Input bandwidth			38.4		kHz ba
AREF	Reference Reference Voltage		2.0		VCC	V
VINT	Ciki Voltage Magana		1.0	1.1	1.2	V
VINT	Bayanin 2.56V na ciki (1)	VCC> 3.0V	2.3	2.56	2.8	V
RREF				32		ku
RUWA	Resistance Input Analog			100		MΩ
	Sakamakon ADC		0		1023	LSB

Lura: 1. Ƙimar jagorori ne kawai.

Shafin 21-9. Halayen ADC, Tashoshi Daban-daban (Yanayin Unipolar). TA = -40°C zuwa +85°C

Alama	Siga	Sharadi	Min	Buga	Max	Raka'a
	Ƙaddamarwa	Riba = 1x			10	Bits
	Ƙaddamarwa	Riba = 20x			10	Bits
	Cikakkar daidaito (Ciki har da INL, DNL, da Quantization, Gain da Offset Kurakurai)	Riba = 1x VREF = 4V, VCC = 5V ADC agogo = 50 - 200 kHz		10.0		LSB
		Riba = 20x VREF = 4V, VCC = 5V ADC agogo = 50 - 200 kHz		20.0		LSB
	-Ungiyar Ba-layi (INL) (Tabbaci bayan Offaddamarwa da Samun Gyara)	Riba = 1x VREF = 4V, VCC = 5V ADC agogo = 50 - 200 kHz		4.0		LSB
		Riba = 20x VREF = 4V, VCC = 5V ADC agogo = 50 - 200 kHz		10.0		LSB
	Kuskuren riba	Riba = 1x		10.0		LSB
	Kuskuren riba	Riba = 20x		15.0		LSB
	Kuskuren Offset	Riba = 1x VREF = 4V, VCC = 5V ADC agogo = 50 - 200 kHz		3.0		LSB
	Kuskuren Offset	Riba = 20x VREF = 4V, VCC = 5V ADC agogo = 50 - 200 kHz		4.0		LSB
	Lokacin Canzawa	Canza Gudun Kyauta	70		280	.s
	Yawan Agogo		50		200	kHz ba
VIN	Shigar da Voltage		GND		VCC	V
VDIFF	Input bambanci Voltage				VREF/Gain	V
	Input bandwidth			4		kHz ba
AREF	Reference Reference Voltage		2.0		VCC - 1.0	V
VINT	Ciki Voltage Magana		1.0	1.1	1.2	V
VINT	Bayanin 2.56V na ciki (1)	VCC> 3.0V	2.3	2.56	2.8	V
RREF	Tunanin Input Resistance			32		ku
RUWA	Resistance Input Analog			100		MΩ
	ADC Conversion Fitarwa		0		1023	LSB

Lura: Ƙimar jagorori ne kawai.

Shafin 21-10. Halayen ADC, Tashoshi Daban-daban (Yanayin Bipolar). TA = -40°C zuwa +85°C

Alama	Siga	Sharadi	Min	Buga	Max	Raka'a
	Ƙaddamarwa	Riba = 1x			10	Bits
	Ƙaddamarwa	Riba = 20x			10	Bits
	Cikakkar daidaito (Ciki har da INL, DNL, da Quantization, Gain da Offset Kurakurai)	Riba = 1x VREF = 4V, VCC = 5V ADC agogo = 50 - 200 kHz		8.0		LSB
		Riba = 20x VREF = 4V, VCC = 5V ADC agogo = 50 - 200 kHz		8.0		LSB
	-Ungiyar Ba-layi (INL) (Tabbaci bayan Offaddamarwa da Samun Gyara)	Riba = 1x VREF = 4V, VCC = 5V ADC agogo = 50 - 200 kHz		4.0		LSB
		Riba = 20x VREF = 4V, VCC = 5V ADC agogo = 50 - 200 kHz		5.0		LSB
	Kuskuren riba	Riba = 1x		4.0		LSB
	Kuskuren riba	Riba = 20x		5.0		LSB
	Kuskuren Offset	Riba = 1x VREF = 4V, VCC = 5V ADC agogo = 50 - 200 kHz		3.0		LSB
	Kuskuren Offset	Riba = 20x VREF = 4V, VCC = 5V ADC agogo = 50 - 200 kHz		4.0		LSB
	Lokacin Canzawa	Canza Gudun Kyauta	70		280	.s
	Yawan Agogo		50		200	kHz ba
VIN	Shigar da Voltage		GND		VCC	V
VDIFF	Input bambanci Voltage				VREF/Gain	V
	Input bandwidth			4		kHz ba
AREF	Reference Reference Voltage		2.0		VCC - 1.0	V
VINT	Ciki Voltage Magana		1.0	1.1	1.2	V
VINT	Bayanin 2.56V na ciki (1)	VCC> 3.0V	2.3	2.56	2.8	V
RREF	Tunanin Input Resistance			32		ku
RUWA	Resistance Input Analog			100		MΩ
	ADC Conversion Fitarwa		-512		511	LSB

Takaitawar Umarni

Mnemonics	Masu gudanarwa	Bayani	Aiki	Tutoci	#Abubuwan
KARATUN ARTIMETI DA LOGIC
KARA	Rd, Rd	Sanya Rijista biyu	Rd ← Rd + Rr	Z, C, N, V, H	1
ADC	Rd, Rd	Ara tare da ryauke da Rijista biyu	Rd ← Rd + Rr + C	Z, C, N, V, H	1
ADIW	Rdl, K	Imara nan take zuwa Kalma	Rdh:Rdl ← Rdh:Rdl + K	Z, C, N, V, S	2
SUB	Rd, Rd	Rage Rijista biyu	Rd ← Rd - Rr	Z, C, N, V, H	1
NA TASHI	Rd, Ku	Rage Constant daga Rijista	Rd ← Rd - K	Z, C, N, V, H	1
SBC	Rd, Rd	Rage tare da ɗaukar Rijista biyu	Rd ← Rd - Rr - C	Z, C, N, V, H	1
SBCI	Rd, Ku	Rage tare da ryauke Constant daga Reg.	Rd ← Rd – K – C	Z, C, N, V, H	1
SBIW	Rdl, K	Rage Nan take daga Kalma	Rdh:Rdl ← Rdh:Rdl – K	Z, C, N, V, S	2
KUMA	Rd, Rd	Hankula DA Rijista	Rd ← Rd ∙ Rr	Z, N, V	1
ANDI	Rd, Ku	Mai hankali DA Rijista kuma Mai dorewa	Rd ← Rd ∙ K	Z, N, V	1
OR	Rd, Rd	Mai hankali KO Rijista	Rd ← Rd v Rr	Z, N, V	1
ORI	Rd, Ku	Mai hankali KO Rijista kuma Mai dorewa	Rd ← Rd v K	Z, N, V	1
EOR	Rd, Rd	Keɓance KO Rijista	Rd ← Rd ⊕ Rr	Z, N, V	1
COM	Rd	'Saukar plementaya	Rd ← 0xFF - Rd	Z, C, N, V	1
NEG	Rd	Kammala Biyu	Rd ← 0x00 - Rd	Z, C, N, V, H	1
Farashin SBR	Rd, K	Saita Bit (s) a cikin Rijista	Rd ← Rd v K	Z, N, V	1
Farashin CBR	Rd, K	Share Bit (s) a cikin Rijista	Rd ← Rd ∙ (0xFF - K)	Z, N, V	1
INC	Rd	Ƙara	Rd ← Rd + 1	Z, N, V	1
DEC	Rd	Ragewa	Rd ← Rd - 1	Z, N, V	1
TST	Rd	Gwaji don Zero ko Debe	Rd ← Rd ∙ Rd	Z, N, V	1
CLR	Rd	Bayyanar Rijista	Rd ← Rd ⊕ Rd	Z, N, V	1
SER	Rd	Saita Rijista	Rd ← 0xFF	Babu	1
UMARNAN RANKA
RJMP	k	Tsalle Yan Uwa	PC ← PC + k + 1	Babu	2
IJMP		Tsallake kai tsaye zuwa (Z)	PC ← Z	Babu	2
KIRA	k	Kira dangi na kiran dangi	PC ← PC + k + 1	Babu	3
INA KIRA		Kai tsaye Kira zuwa (Z)	PC ← Z	Babu	3
RET		Komawa Komawa	PC ← TAMBAYA	Babu	4
RETI		Katse dawowa	PC ← TAMBAYA	I	4
CPSE	Rd, Rr	Kwatanta, Tsallake idan yayi daidai	idan (Rd = Rr) PC ← PC + 2 ko 3	Babu	1/2/3
CP	Rd, Rr	Kwatanta	Rd - da R	Z, N, V, C, H	1
CPC	Rd, Rr	Kwatanta da ryauka	Rd - Rr - C	Z, N, V, C, H	1
CPI	Rd, K	Kwatanta Rijista tare da Nan take	Rd - ku	Z, N, V, C, H	1
Farashin SBRC	Rr, ba	Tsallake idan Bit a cikin Rijista ya share	idan (Rr(b)=0) PC ← PC + 2 ko 3	Babu	1/2/3
Farashin SBRS	Rr, ba	Tsallake idan an saita Bit a cikin Rijista	idan (Rr(b)=1) PC ← PC + 2 ko 3	Babu	1/2/3
Rahoton da aka ƙayyade na SBIC	P, ba	Tsallake idan Bit a I / O Rijista ya tsabtace	idan (P(b)=0) PC ← PC + 2 ko 3	Babu	1/2/3
SBIS	P, ba	Tsallake idan an saita Bit in I / O Register	idan (P(b)=1) PC ← PC + 2 ko 3	Babu	1/2/3
BRBS	s, ku	Reshe idan an kafa Tutar Matsayi	idan (SREG(s) = 1) sai PC←PC+k + 1	Babu	1/2
BRBC	s, ku	Reshe idan aka Tutar da Tuta	idan (SREG(s) = 0) sai PC←PC+k + 1	Babu	1/2
BREQ	k	Reshe Idan Daidai	idan (Z = 1) sai PC ← PC + k + 1	Babu	1/2
BRNE	k	Reshe Idan Ba Daidai ba	idan (Z = 0) sai PC ← PC + k + 1	Babu	1/2
Farashin BRCS	k	Reshe idan Ya Setauki Saiti	idan (C = 1) sai PC ← PC + k + 1	Babu	1/2
Farashin BRCC	k	Reshe idan Aka ɗauke	idan (C = 0) sai PC ← PC + k + 1	Babu	1/2
BRSH	k	Reshe idan Same ko Mafi Girma	idan (C = 0) sai PC ← PC + k + 1	Babu	1/2
BRLO	k	Reshe idan Lowerasa	idan (C = 1) sai PC ← PC + k + 1	Babu	1/2
BRMI	k	Reshe idan Rage	idan (N = 1) sai PC ← PC + k + 1	Babu	1/2
Farashin BRPL	k	Reshe idan Plusari	idan (N = 0) sai PC ← PC + k + 1	Babu	1/2
BRGE	k	Reshe idan Mafi Girma ko Daidai, Sa hannu	idan (N ⊕ V= 0) sai PC ← PC + k + 1	Babu	1/2
Farashin BRLT	k	Reshe idan Kasa da Zero, Sa hannu	idan (N ⊕ V= 1) sai PC ← PC + k + 1	Babu	1/2
BRHS	k	Reshe idan Rabin ryauke da Tuta	idan (H = 1) sai PC ← PC + k + 1	Babu	1/2
Farashin BRHC	k	Reshe idan Rabin ryauke da Tuta	idan (H = 0) sai PC ← PC + k + 1	Babu	1/2
Farashin BRTS	k	Reshe idan T Flag Set	idan (T = 1) sai PC ← PC + k + 1	Babu	1/2
Farashin BRTC	k	Reshe idan T Flagrantar	idan (T = 0) sai PC ← PC + k + 1	Babu	1/2
BRVS	k	Reshe idan an Overaga Tutar	idan (V = 1) sai PC ← PC + k + 1	Babu	1/2
Farashin BRVC	k	Reshe idan an Flaaga Tuta	idan (V = 0) sai PC ← PC + k + 1	Babu	1/2
BATA	k	Reshe idan katsewa ya kunna	idan (I = 1) sai PC ← PC + k + 1	Babu	1/2
AMARYA	k	Branch idan katsewa nakasa	idan (I = 0) sai PC ← PC + k + 1	Babu	1/2
KOYARWAR CIGABA DA CIGABA
SBI	P, b	Saita Bit a cikin I / O Rijista	I/O(P,b) ← 1	Babu	2
CBI	P, b	Bayyanan Bit a cikin Rijistar I / O	I/O(P,b) ← 0	Babu	2
LSL	Rd	Canjin Hankali Hagu	Rd(n+1) ← Rd(n), Rd(0) ← 0	Z, C, N, V	1
LSR	Rd	Canjin Hankali Dama	Rd(n) ← Rd(n+1), Rd(7) ← 0	Z, C, N, V	1
Muhimmancin	Rd	Juya Hagu Ta ryauka	Rd(0)←C,Rd(n+1)← Rd(n),C←Rd(7)	Z, C, N, V	1
ROR	Rd	Juya Dama Ta Hanyar	Rd(7)←C,Rd(n)← Rd(n+1),C←Rd(0)	Z, C, N, V	1
ASR	Rd	Canjin lissafi Dama	Rd(n) ← Rd(n+1), n=0..6	Z, C, N, V	1

Mnemonics	Masu gudanarwa	Bayani	Aiki	Tutoci	#Abubuwan
SWAP	Rd	Musayar Nibble	Rd(3..0)←Rd(7..4),Rd(7..4)←Rd(3..0)	Babu	1
BSET	s	Flag Saita	SREG(s) ← 1	SREG (s)	1
BCLR	s	Flag Bayyana	SREG(s) ← 0	SREG (s)	1
BST	Rr, ba	Bit Store daga Rijista zuwa T	T ← Rr(b)	T	1
BLD	Rd, ba	Loadananan kaya daga T zuwa Rijista	Rd(b) ← T	Babu	1
SEC		Saita dauki	C ← 1	C	1
CLC		Bayyanannu dauki	C ← 0	C	1
SEN		Sanya Tutar Kasa	N ← 1	N	1
CLN		Bayyananniyar Tutar Kasa	N ← 0	N	1
SEZ		Saita Tutar Zero	Z ← 1	Z	1
CLZ		Bayyanar da Tutar Zero	Z ← 0	Z	1
SEI		Kunna Katsewar Duniya	Ina ← 1	I	1
CLI		Kashe Kashe Duniya	Ina ← 0	I	1
SES		Saita Tutar Sa hannu	S ← 1	S	1
CLS		Bayyanar Tutar Sa hannu	S ← 0	S	1
SEV		Kafa Biyu Haɗa plementarin Cikowa.	V ← 1	V	1
CLV		Bayyanan Biyun Haɓaka plementarfafa	V ← 0	V	1
SET		Sanya T a cikin SREG	T ← 1	T	1
CLT		Share T a cikin SREG	T ← 0	T	1
WAH		Kafa Rabin ryauke da Tutar a SREG	H ← 1	H	1
CLH		Bayyanannen Rabin Tutar a SREG	H ← 0	H	1
KOYARWAR RAYUWAR DATA
MOV	Rd, Rd	Matsar Tsakanin Rijista	Rd ← Rr	Babu	1
MOVW	Rd, Rd	Kwafa Kalmar Rijista	Rd+1:Rd ← Rr+1:Rr	Babu	1
LDI	Rd, Ku	Load Nan da nan	Rd ← K	Babu	1
LD	Rd, X da	Load Kai tsaye	Rd ← (X)	Babu	2
LD	Rd, X +	Load Kai tsaye da Post-Inc.	Rd ← (X), X ← X + 1	Babu	2
LD	Rd, - X	Load Kai tsaye da Pre-Dec.	X ← X - 1, Rd ← (X)	Babu	2
LD	Rd, Ya	Load Kai tsaye	Rd ← (Y)	Babu	2
LD	Rd, Y +	Load Kai tsaye da Post-Inc.	Rd ← (Y), Y ← Y + 1	Babu	2
LD	Rd, - Y	Load Kai tsaye da Pre-Dec.	Y ← Y - 1, Rd ← (Y)	Babu	2
LDD	Rd, Y + q	Load kai tsaye tare da Hijira	Rd ← (Y + q)	Babu	2
LD	Rd, Za	Load Kai tsaye	Rd ← (Z)	Babu	2
LD	Rd, Z +	Load Kai tsaye da Post-Inc.	Rd ← (Z), Z ← Z+1	Babu	2
LD	Rd,-Z	Load Kai tsaye da Pre-Dec.	Z ← Z - 1, Rd ← (Z)	Babu	2
LDD	Rd, Z + q	Load kai tsaye tare da Hijira	Rd ← (Z + q)	Babu	2
LDS	Rd, ku	Load Kai tsaye daga SRAM	Rd ← (k)	Babu	2
ST	X, Rr	Store Kai tsaye	(X) ← Rr	Babu	2
ST	X +, Rr	Adana Kai tsaye da Post-Inc.	(X) ← Rr, X ← X + 1	Babu	2
ST	- X, Rr	Adana kai tsaye da Pre-Dec.	X ← X – 1, (X) ← Rr	Babu	2
ST	Yau, Rr	Store Kai tsaye	(Y) ← Rr	Babu	2
ST	Y +, Rr	Adana Kai tsaye da Post-Inc.	(Y) ← Rr, Y ← Y + 1	Babu	2
ST	- Y, Rr	Adana kai tsaye da Pre-Dec.	Y ← Y – 1, (Y) ← Rr	Babu	2
STD	Y + q, Rr	Ajiye Kai tsaye tare da Sauyawa	(Y + q) ← Rr	Babu	2
ST	Z, Rr	Store Kai tsaye	(Z) ← Rr	Babu	2
ST	Z +, Rr	Adana Kai tsaye da Post-Inc.	(Z) ← Rr, Z ← Z + 1	Babu	2
ST	-Z, da R	Adana kai tsaye da Pre-Dec.	Z ← Z – 1, (Z) ← Rr	Babu	2
STD	Z + q, Rr	Ajiye Kai tsaye tare da Sauyawa	(Z + q) ← Rr	Babu	2
STS	ku, rr	Adana Kai tsaye zuwa SRAM	(k) ← Rr	Babu	2
LPM		Programwaƙwalwar Shirye-shirye	R0 ← (Z)	Babu	3
LPM	Rd, Za	Programwaƙwalwar Shirye-shirye	Rd ← (Z)	Babu	3
LPM	Rd, Z +	Programwaƙwalwar Shirye-shiryen Load da Post-Inc	Rd ← (Z), Z ← Z+1	Babu	3
SPM		Programwaƙwalwar Shirye-shirye	(z) ← R1:R0	Babu
IN	Rd, Ba	A Port	Rd ← P	Babu	1
FITA	P, Rr	Fita tashar jirgin ruwa	P ← Rr	Babu	1
PUSH	Rr	Tura Rijista akan Tari	TAMBAYA ← Rr	Babu	2
POP	Rd	Rijistar Pop daga Stack	Rd ← TAMBAYA	Babu	2
KARATUN MCU
NOP		Babu Aiki		Babu	1
BARCI		Barci	(duba takamaiman saƙo. don aikin Barci)	Babu	1
WDR		Sake Sake Kulawa	(duba takamaiman saƙo. don WDR / Mai ƙidayar lokaci)	Babu	1
KARYA		Karya

Gudu (MHz) (1)	Ƙara Voltage (V)	Yanayin Zazzabi	Kunshin (2)	Lambar oda (3)
10	1.8-5.5	Masana'antu (-40 ° C zuwa + 85 ° C) (4)	8P3	Saukewa: ATtiny45V-10PU
			8S2	ATtiny45V-10SU ATtiny45V-10SUR ATtiny45V-10SH ATtiny45V-10SHR
			8X	ATtiny45V-10XU ATtiny45V-10XUR
			20M1	ATtiny45V-10MU ATtiny45V-10MUR
20	2.7-5.5	Masana'antu (-40 ° C zuwa + 85 ° C) (4)	8P3	Farashin 45-20PU
			8S2	ATtiny45-20SU ATtiny45-20SUR ATtiny45-20SH ATtiny45-20SHR
			8X	Saukewa: ATtiny45-20XU
			20M1	ATtiny45-20MU ATtiny45-20MUR

Bayanan kula: 1. Don sauri vs. vol voltage, duba sashe 21.3 "Gudun" a shafi na 163.

Dukkanin fakitin kyauta ne, mara kyauta kuma basu da cikakkiyar kore kuma suna bin umarnin Turai na Taƙaita abubuwan da ke da haɗari (RoHS).

Alamar lamba

H: NiPdAu ya ƙare

U: matte tin

R: tef & faifai

Ana iya samar da waɗannan na'urori a cikin wafer form. Da fatan za a tuntuɓi ofishin tallace-tallace na Atmel na yankin ku don cikakken odar umarni da mafi ƙarancin adadi.

Erratum

Errata ATtiny 25

Harafin bita a wannan sashe yana nufin bita na na'urar ATtiny25.

Rev D-F

Babu sanannen errata.

Rev B-C

Karatun EEPROM na iya kasawa a ƙarancin ƙarancin wutatage / low agogon mita

Ƙoƙarin karanta EEPROM a ƙananan ƙananan agogo da/ko ƙarancin wadataccen wutatage na iya haifar da bayanai marasa inganci.

Matsala Gyara / Aiki

Kada ayi amfani da EEPROM lokacin da mitar agogo ke ƙasa da 1MHz da ƙarar voltage yana ƙasa da 2V. Idan ba za a iya ɗaga ƙarfin aiki sama da 1MHz ba sai a samar da voltage ya zama fiye da 2V. Hakazalika, idan samarwa voltagba za a iya ɗaga sama da 2V ba sannan mitar aiki ya kamata ta wuce 1MHz.

Wannan fasalin sananne ne don dogaro da zazzabi amma ba'a bayyana shi ba. Ana ba da jagorori don zafin ɗakin, kawai.

Rev A.

Ba sampjagoranci.

Errata ATtiny 45

Harafin bita a wannan sashe yana nufin bita na na'urar ATtiny45.

Rev F-G

Babu sanannen errata

Rev D - E

Karatun EEPROM na iya kasawa a ƙarancin ƙarancin wutatage / low agogon mita

Ƙoƙarin karanta EEPROM a ƙananan ƙananan agogo da/ko ƙarancin wadataccen wutatage na iya haifar da bayanai marasa inganci.

Matsala Gyara / Aiki

Wannan fasalin sananne ne don dogaro da yanayin zafin jiki amma ba'a bayyana shi ba. Ana ba da jagorori don zafin ɗakin, kawai.

Rev B-C

PLL ba kullewa

EEPROM ya karanta daga lambar aikace-aikace baya aiki a Kulle Bit Yanayin 3

Karatun EEPROM na iya kasawa a ƙarancin ƙarancin wutatage / low agogon mita

Mai ƙidayar lokaci mai ƙayyadadden fitarwa 1 PWM akan OC1B- XOC1B baya aiki daidai

PLL ba kullewa

Lokacin da a mitoci a ƙasa da 6.0 MHz, PLL ba zai kulle ba

Matsala gyara / Wurin aiki

Lokacin amfani da PLL, gudu a 6.0 MHz ko mafi girma.

EEPROM ya karanta daga lambar aikace-aikace baya aiki a Kulle Bit Yanayin 3

Lokacin da aka tsara makullin makullan Memory LB2 da LB1 zuwa yanayin 3, karanta EEPROM baya aiki daga lambar aikace-aikace.

Matsala Gyara / Aiki a kusa

Kar a saita Yanayin Kariyar Bitarya na 3 lokacin da lambar aikace-aikacen ke buƙatar karantawa daga EEPROM.

Karatun EEPROM na iya kasawa a ƙarancin ƙarancin wutatage / low agogon mita

Ƙoƙarin karanta EEPROM a ƙananan ƙananan agogo da/ko ƙarancin wadataccen wutatage na iya haifar da bayanai marasa inganci.

Matsala Gyara / Aiki

Wannan fasalin sananne ne don dogaro da zazzabi amma ba'a bayyana shi ba. Ana ba da jagorori don zafin ɗakin, kawai.

Mai ƙidayar lokaci mai ƙayyadadden fitarwa 1 PWM akan OC1B - XOC1B baya aiki daidai

Mai ƙidayar lokaci 1 PWM fitarwa OC1B-XOC1B baya aiki daidai. Sai kawai a cikin yanayin lokacin da ragowar sarrafawa, COM1B1 da COM1B0 suke a cikin yanayi iri ɗaya da COM1A1 da COM1A0, bi da bi, OC1B-XOC1B ya fita yana aiki daidai.

Matsala Gyara / Aiki a kusa

Yanayin aiki kawai shine ayi amfani da saitin sarrafawa iri ɗaya akan COM1A [1: 0] da COM1B [1: 0] ragojin sarrafawa, duba tebur 14- 4 a cikin takardar bayanan. An gyara matsalar ga Tiny45 rev D.

Rev A.

Higharfin ƙarfi ƙasa da amfani da ƙarfi

DebugWIRE yana kwance sadarwa lokacin da aka shiga cikin tsangwama

PLL ba kullewa

EEPROM ya karanta daga lambar aikace-aikace baya aiki a Kulle Bit Yanayin 3

Karatun EEPROM na iya kasawa a ƙarancin ƙarancin wutatage / low agogon mita

Higharfin ƙarfi ƙasa da amfani da ƙarfi

Yanayi uku zasu haifar da powerarfin ƙarfi ƙasa da amfani da ƙarfi. Wadannan su ne:

Fuses ne suka zaɓi agogo na waje, amma har yanzu ana kunna I / O PORT azaman fitarwa.

Ana karanta EEPROM kafin shigar da wuta ƙasa.

VCC ita ce 4.5 volts ko mafi girma.

Disclaimer: An bayar da bayanin da ke cikin wannan takarda dangane da samfuran Atmel. Babu lasisi, bayyana ko bayyanawa, ta estoppel ko akasin haka, ga kowane haƙƙin mallakar fasaha da aka bayar ta wannan takaddar ko dangane da siyar da samfuran Atmel. SAI KAMAR YADDA AKA SANYA A CIKIN SHARUDAN ATMEL DA SHARUƊAN SALLAR DA AKE KWANA AKAN ATMEL. WEBShafin, Atmel ya ɗauki alhakin abin da ya dace da kowane bayani, amma garanti na musamman da kasuwanci, ko rashin halaye. BABU ABUBUWAN DA ATMEL ZAI YIWA ALHAKIN DUK WANI HARKOKIN KAI TSAYE, NA GASKIYA, MASU SABAKI, HUKUNCI, NA MUSAMMAN KO NA FARUWA (HADA, BA TARE DA IYAKA, LALATA GA RASHI DA RIBA, RASHIN CIN ARZIKI, RASHIN CIN ARZIKI) KASUWANCI. AMFANI WANNAN TAKARDAR ODAR XNUMXADXNUMX ZAMA AIKATA?

Atmel baya yin wakilci ko garanti dangane da daidaito ko cikar abubuwan da ke cikin wannan takaddar kuma yana da haƙƙin yin canje-canje ga ƙayyadaddun bayanai da kwatancen samfura a kowane lokaci ba tare da sanarwa ba. Atmel ba ya yin wani alƙawari don sabunta bayanan da ke ciki. Sai dai in an samar da in ba haka ba, samfuran Atmel ba su dace da, kuma ba za a yi amfani da su ba, aikace-aikacen mota. Ba a yi nufin samfuran Atmel, izini, ko garantin amfani da su azaman abubuwan haɗin gwiwa a aikace-aikacen da aka yi niyya don tallafawa ko dorewar rayuwa ba.

Magana

Manual mai amfani

Atmel 8-bit AVR Microcontroller tare da 2/4/8K Bytes In-System Flash Programmable

Siffofin

Ƙarsheview

Riƙe bayanai

Gabatarwa

Rijistar Manufa File

Takaitaccen Bayani

Umarni aiwatar da Umarni

Sake saitawa da katse Hanyar

Katse Lokacin Amsawa

Hana Cin hanci da rashawa EEPROM

Tsarin Clock da Zabuka

Ciki 128 kHz na Oscillator

Tsohuwar Clock Source

Yi rijista bayanin

Iyakance

Yi rijista bayanin

Tsarin Gudanarwa da Sake saiti

Gano launin ruwan kasa

Taƙaitawa

I/O Ports

Sauran Ayyukan Port

Lokaci / Counter Prescaler da Tushen agogo

Teridaya da Kwatanta Raka'a

Alamar lamba

Matsala Gyara / Aiki

Magana

Bar sharhi

Soke amsa