ANALOG NA'urorin MAX16132 Multi Voltage Masu kulawa tare da littafin Mallakin Xilinx FPGAs

Mataki 1: Gano FPGA Family Voltage Bukatun
Koma zuwa teburin da ke sama don tantance ainihin voltage, taimako voltage, da kuma I/O voltage buƙatun don takamaiman dangin ku Xilinx FPGA.

Mataki 2: Zaɓi Multi-vols da ya dacetage Supervisor
Bisa ga voltage buƙatun na Xilinx FPGA ɗin ku, zaɓi ADI Multi-vol mai dacewatage Supervisor sashe lambar MAX16132.

Mataki 3: Shigarwa da Kanfigareshan
Bi umarnin shigarwa da aka bayar tare da mai kula da MAX16132 don saka idanu da kula da voltages don Xilinx FPGA ku.

Jagorar Ƙarfafa na'urorin Kulawa don Xilinx FPGAs

FPGA na zamani yana ƙirƙira ƙirƙira ingantattun dabarun ƙirƙira, yana ba da damar ƙaramin tsari na geometries da ƙananan core vol.tage. Wannan yanayin, duk da haka, yana buƙatar amfani da mahara voltage dogo don ɗaukar ƙa'idodin I/O na gado. Don tabbatar da kwanciyar hankali na tsarin da hana halayen da ba zato ba tsammani, kowane ɗayan waɗannan voltage dogo na buƙatar kulawar sadaukarwa. Analog Devices yana ba da cikakkiyar fayil na voltage hanyoyin saka idanu, wanda ya ƙunshi kewayo mai yawa, e; daga asali guda-tashar zuwa fasali-arziƙi Multi-voltage masu kulawa suna alfahari da daidaiton jagorancin masana'antu (har zuwa ± 0.3% a fadin yanayin zafi). Mahimmin tushe, I/O, da kuma karin voltage bukatu na iyalai Xilinx® FPGA daban-daban ana gabatar dasu a cikin tebur mai sauƙi kuma mai sauƙin ganewa. Core voltage kewayo yawanci ya kai daga 0.72 V zuwa 1 V, yayin da I/O voltage matakan iya bambanta tsakanin 1 V da 3.3 V.

MAX16161:
nanoPower Supply Supervisor tare da Glitch-Free Power-Up da Manual Sake saitin

MAX16193:
± 0.3% Daidaitaccen Tashar Dual-Channel Taga-Ganewa Da'irar Kulawa

LTC2963:
± 0.5% Quad Configurable Supervisor tare da agogon Watchdog

MAX16135:
± 1% Low-Voltage, Quad-Voltage Mai Kula da Window

Multi-voltage Masu kulawa tare da Xilinx FPGAs

Xilinx FPGAs

Xilinx Farashin FPGA Iyali	Core Voltage (V)	Mai taimako Voltage (V)	I/O Voltage (V)
Virtex UltraScale+	0.85, 0.72, 0.90	1.8	1.0, 1.2, 1.35, 1.5, 1.8, 2.5, 3.3
Virtex UltraScale	0.95, 1	1.8	1.0, 1.2, 1.35, 1.5, 1.8, 2.5, 3.3
Virtex 7	1, 0.90	1.8, 2.0	1.2, 1.35, 1.5, 1.8, 2.5, 3.3
Kintex UltraScale+	0.85, 0.72, 0.90	1.8	1.0, 1.2, 1.35, 1.5, 1.8, 2.5, 3.3
Kintex UltraScale	0.95, 0.90, 1.0	1.8	1.0, 1.2, 1.35, 1.5, 1.8, 2.5, 3.3
Kintex 7	1, 0.90, 0.95	1.8	1.2, 1.35, 1.5, 1.8, 2.5, 3.3
Artix UtraScale+	0.85, 0.72	1.8	1.0, 1.2, 1.35, 1.5, 1.8, 2.5, 3.3
Artix 7	1.0, 0.95, 0.90	1.8	1.2, 1.35, 1.5, 1.8, 2.5, 3.3
Spartan Ultrascale+	0.85, 0.72, 0.90	1.8	1.0, 1.2, 1.35, 1.5, 1.8, 2.5, 3.3
Farashin 7	1, 0.95	1.8	1.2, 1.35, 1.5, 1.8, 2.5, 3.3

ADI Multi-voltage Supervisors

Lamba of Voltages Kulawa	Sashe Lamba	Voltages Kulawa (V)	Daidaito (%)
1	MAX16132	1.0 zu5.0	<1
1	Saukewa: MAX16161. MAX16162	1.7 zuwa 4.85, 0.6 zuwa 4.85	<1.5
2	MAX16193	0.6 zuwa 0.9, 0.9 zuwa 3.3	<0.3
3	MAX16134	5.0, 4.8, 4.5, 3.3, 3.0, 2.5, 1.8, 1.2, 1.16, 1.0	<1
4	Saukewa: LTC2962	5.0, 3.3, 2.5, 1.8, 1.5, 1.2, 1.0, 0.5V	<0.5
4	MAX16135	5.0, 4.8, 4.5, 3.3, 3.0, 2.5, 2.3, 1.8, 1.5, 1.36, 1.22, 1.2, 1.16, 1.0	<1
4	MAX16060	3.3, 2.5, 1.8, 0.62 (adj)	<1
6	LTC2936	0.2 zuwa 5.8 (Mai iya aiki)	<1

Taga Voltage Supervisors

Taga voltagAna amfani da masu kulawa don tabbatar da cewa FPGAs suna aiki a cikin amintaccen voltage takamaiman kewayon. Suna yin haka ta hanyar samun undervoltage (UV) da kuma overvoltage (OV) bakin kofa da samar da siginar sake saiti idan ta wuce tagar haƙuri don guje wa kurakuran tsarin da hana lalacewa ga FPGAs ɗinku da sauran na'urorin sarrafawa. Akwai manyan abubuwa guda biyu da yakamata ayi la'akari lokacin zabar voltage mai kulawa: Haƙuri da Daidaitaccen Ƙofa.
Haƙuri shine kewayon kewayon ƙima na ƙima wanda ke saita juzu'itage da undervoltage bakin kofa. Duk da yake, Ƙarfin Ƙarfi, yawanci ana bayyana shi cikin kashi ɗayatage, shine matakin daidaito na ainihin zuwa maƙasudin sake saita ƙofofin.

Ƙarfafatage da overvoltage bambancin bakin kofa tare da Daidaitaccen Ƙarfi

Zaɓi Tagar Haƙuri Dama

Zaɓin mai kula da taga tare da haƙuri ɗaya da ainihin voltagBukatun na iya haifar da rashin aiki saboda daidaiton bakin kofa. Saita juriya iri ɗaya kamar buƙatun aiki na FPGA na iya haifar da sake saitin fitarwa kusa da matsakaicin matsakaici.tage bakin kofa, OV_TH (max), da mafi ƙarancin ƙasƙancitage bakin kofa, d UV_TH (min). Hoton da ke ƙasa yana kwatanta saitin haƙuri (a) iri ɗaya tare da ainihin voltage haƙuri vs. (b) a cikin ainihin voltage hakuri.

Tasirin Daidaiton Ƙofa
Kwatanta taga biyu voltage masu sa ido tare da daidaitattun ƙofa daban-daban, suna sa ido kan jigon jigon voltage wadata dogo. Mai kula da mafi girman daidaitaccen ƙofa zai karkata kaɗan daga iyakar kofa idan aka kwatanta da vol.tage masu kulawa tare da ƙananan daidaito. Yin nazarin hoton da ke ƙasa, masu kula da taga tare da ƙananan daidaito (a) ƙirƙirar ƙunƙuntacciyar taga samar da wutar lantarki tunda siginar sake saiti na iya tabbatar da ko'ina cikin kewayon sa ido na UV da OV. A cikin aikace-aikace tare da ƙa'idodin samar da wutar lantarki mara inganci, wannan na iya haifar da tsarin da ya fi dacewa da juzu'i. A gefe guda, masu sa ido tare da daidaitaccen madaidaicin kofa (fadada wannan kewayon don samar da mafi girman kewayon aiki mai aminci don ikon ku, wanda zai, aikin gabaɗaya.

Tsarin Samar da Wutar Lantarki

FPGAs na zamani suna amfani da voltage dogo don mafi kyawun aiki. Ƙayyadadden ƙarfin ƙarfin ƙarfi da buƙatun saukar da wuta suna da mahimmanci don amincin FPGA. Matsakaicin da bai dace ba yana gabatar da glitches, kurakuran dabaru, har ma da lahani na dindindin ga abubuwan FPGA masu mahimmanci. Analog na'urorin suna ba da cikakkiyar kewayon kulawa/jere-tsaren da'irori musamman waɗanda aka tsara don magance ƙalubalen sarrafa wutar lantarki na FPGA. Waɗannan na'urori suna tsara tsarin kunna wutar lantarki da saukar da wutar lantarki na nau'ikan voltage dogo, yana ba da tabbacin cewa kowane dogo ya kai adadin da aka ayyanatage matakin da ake bukata ramp lokaci da tsari. Wannan maganin sarrafa wutar lantarki yana rage girman halin yanzu, yana hana voltage undershoot/overshoot yanayi, kuma a ƙarshe yana kiyaye amincin ƙirar FPGA ku.

ADI Kulawa da Maganganun Jeri

Lamba of Ana Kula da Kayayyakin	Sashe Lamba	Aiki Vrange	Ƙaddamarwa Daidaito	Jeri	Shirye-shirye Hanya	Kunshin
1: kaskanci	MAX16895	1.5 zuwa 5.5v	1%	Up	R, C, ba	6 uDF
1: kaskanci	Saukewa: MAX16052	2.25 zuwa 28v	1.8%	Up	R, C, ba	6 SOT23
2: kaskanci	Saukewa: MAX6819	0.9 zuwa 5.5v	2.6%	Up	R, C, ba	6 SOT23
2	MAX16041	2.2 zuwa 28v	2.7% kuma 1.5%	Up	R, C, ba	16 TQFN
3	MAX16042					20 TQFN
4	MAX16043					24 TQFN
4: kaskanci	Saukewa: MAX16165	2.7 zuwa 16v	0.80%	Up, Reverse- Power Down	R, C, ba	20 WLP, 20L TQFN
4: kaskanci	MAX16050	2.7 zuwa 16v	1.5%	Up, Reverse- Power Down	R, C, ba	28 TQFN
5: kaskanci	MAX16051	2.7 zuwa 16v	1.5%	Up, Reverse- Power Down	R, C, ba	28 TQFN
6: kaskanci	LTC2937	4.5 zuwa 16.5v	<1.5%	Mai shirye-shirye	I2C, SMB	28 QFN
8	ADM1168	3 zuwa 16v	<1%	Mai shirye-shirye	SMBus	32 LQFP
8	ADM1169	3 zuwa 16v	<1%	Mai shirye-shirye	SMBus	32 LQFP, 40 LFCSP
10: kaskanci (max na 4)	ADM1260	3 zuwa 16v	<1%	Mai shirye-shirye	SMBus	40 LFCSP
12: kaskanci	ADM1166	3 zuwa 16v	<1%	Mai shirye-shirye	SMBus	40 LFCSP, 48 TQFP
17: kaskanci	ADM1266	3 zuwa 15v	<1%	Mai shirye-shirye	PMBus	64 LFCSP

Saukewa: MAX16165:
Haɗe-haɗe sosai, Mabiyi na tashoshi 4 da mai kulawa

Tsarin Samar da Wutar Lantarki yana buƙatar Masu Gudanar da Wuta 8 ta amfani da MAX16165

FAQs

Q: Zan iya amfani da wani Multi-vols daban-dabantagko mai kulawa tare da Xilinx FPGAs?
A: Ana ba da shawarar yin amfani da ƙayyadaddun ADI Multi-voltage Supervisor MAX16132 don dacewa da ingantaccen voltage saka idanu.

Takardu / Albarkatu

ANALOG NA'urorin MAX16132 Multi Voltage Masu kulawa tare da Xilinx FPGAs [pdf] Littafin Mai shi
MAX16132, MAX16132 Multi Voltage Masu kulawa tare da Xilinx FPGAs, Multi Voltage Masu kulawa tare da Xilinx FPGAs, Masu kulawa tare da Xilinx FPGAs, Xilinx FPGAs

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ANALOG NA'urorin MAX16132 Multi-Voltage Masu kulawa tare da Xilinx FPGAs

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