Intel FPGA Eto isare Kaadi D5005 olumulo Itọsọna

Iwe yii ṣapejuwe iraye si iranti taara (DMA) imuse Iṣe-iṣẹ Accelerator Unit (AFU) ati bii o ṣe le kọ apẹrẹ lati ṣiṣẹ lori ohun elo tabi ni simulation.

Olugbo ti a pinnu

Olugbo ti a pinnu ni ohun elo hardware tabi awọn olupilẹṣẹ sọfitiwia ti o nilo Iṣẹ Imuyara (AF) lati fi data pamọ ni agbegbe ni iranti ti o sopọ si ẹrọ FPGA Intel.

Awọn apejọ

Apejọ iwe

Apejọ	Apejuwe
#	Ṣaju aṣẹ ti o tọka si aṣẹ ni lati wa ni titẹ sii bi gbongbo.
$	Tọkasi aṣẹ lati wa ni titẹ sii bi olumulo kan.
Font yii	Fileawọn orukọ, awọn aṣẹ, ati awọn koko-ọrọ ti wa ni titẹ ni fonti yii. Awọn laini aṣẹ gigun ti wa ni titẹ ni fonti yii. Botilẹjẹpe awọn laini aṣẹ gigun le fi ipari si laini atẹle, ipadabọ kii ṣe apakan ti aṣẹ; maṣe tẹ tẹ.
	Tọkasi ọrọ ibi ipamọ ti o han laarin awọn biraketi igun gbọdọ paarọ rẹ pẹlu iye ti o yẹ. Ma ṣe tẹ awọn biraketi igun naa sii.

Awọn adape

Awọn adape	Imugboroosi	Apejuwe
AF	Iṣẹ imuyara	Aworan imuyara Hardware ti a ṣajọ ti ṣe imuse ni ọgbọn FPGA ti o yara ohun elo kan.
AFU	Isare Išė Unit	Ohun imuyara ohun elo imuse ni ọgbọn FPGA eyiti o ṣe agbejade iṣẹ iširo kan fun ohun elo kan lati Sipiyu lati mu ilọsiwaju ṣiṣẹ.
API	Ohun elo siseto Interface	Eto awọn asọye subroutine, awọn ilana, ati awọn irinṣẹ fun kikọ awọn ohun elo sọfitiwia.
CCI-P	Mojuto kaṣe Interface	CCI-P ni wiwo boṣewa AFUs lo lati ṣe ibasọrọ pẹlu agbalejo.
DFH	Akọsori Ẹya Ẹrọ	Ṣẹda atokọ ti o sopọ ti awọn akọle ẹya lati pese ọna extensible ti awọn ẹya afikun.
*tesiwaju…*

Intel Corporation. Gbogbo awọn ẹtọ wa ni ipamọ. Intel, aami Intel, ati awọn ami Intel miiran jẹ aami-išowo ti Intel Corporation tabi awọn oniranlọwọ rẹ. Intel ṣe atilẹyin iṣẹ ti FPGA rẹ ati awọn ọja semikondokito si awọn pato lọwọlọwọ ni ibamu pẹlu atilẹyin ọja boṣewa Intel, ṣugbọn ni ẹtọ lati ṣe awọn ayipada si eyikeyi awọn ọja ati iṣẹ nigbakugba laisi akiyesi. Intel ko gba ojuse tabi layabiliti ti o dide lati inu ohun elo tabi lilo eyikeyi alaye, ọja, tabi iṣẹ ti a ṣalaye ninu rẹ ayafi bi a ti gba ni kikun si kikọ nipasẹ Intel. A gba awọn alabara Intel nimọran lati gba ẹya tuntun ti awọn pato ẹrọ ṣaaju gbigbekele eyikeyi alaye ti a tẹjade ati ṣaaju gbigbe awọn aṣẹ fun awọn ọja tabi awọn iṣẹ. * Awọn orukọ miiran ati awọn ami iyasọtọ le jẹ ẹtọ bi ohun-ini ti awọn miiran.

Awọn adape	Imugboroosi	Apejuwe
FIM	FPGA Interface Manager	Ohun elo FPGA ti o ni Ẹka Interface FPGA (FIU) ati awọn atọkun ita fun iranti, netiwọki, ati bẹbẹ lọ. Awọn atọkun Iṣẹ Imuyara (AF) pẹlu FIM ni akoko ṣiṣe.
FIU	FPGA Interface Unit	FIU ni a Syeed ni wiwo Layer ti o ìgbésẹ bi a Afara laarin Syeed atọkun bi PCIe *, UPI ati AFU-ẹgbẹ atọkun bi CCI-P.
MPF	Iranti Properties Factory	MPF jẹ Àkọsílẹ Ilé Ipilẹ (BBB) ti awọn AFU le lo lati pese awọn iṣẹ ṣiṣe ọna ijabọ CCI-P fun awọn iṣowo pẹlu FIU.

Isare Gilosari

Stack isare fun Intel® Xeon® Sipiyu pẹlu FPGAs Gilosari

Igba	Kukuru	Apejuwe
Intel® isare Stack fun Intel Xeon® Sipiyu pẹlu FPGAs	Iṣatunṣe Stack	Akojọpọ sọfitiwia, famuwia, ati awọn irinṣẹ ti o pese isopọmọ iṣapeye iṣẹ laarin Intel FPGA ati ero isise Intel Xeon kan.
Intel FPGA Eto isare Kaadi	Intel FPGA PAC	PCIe FPGA ohun imuyara kaadi. Ni Oluṣakoso Interface FPGA kan (FIM) ti o so pọ pẹlu ero isise Intel Xeon kan lori ọkọ akero PCIe.

Itọnisọna Olumulo Ẹka Iṣẹ-ṣiṣe DMA Imuyara: Intel FPGA Kaadi Isare ti Eto D5005

DMA AFU Apejuwe

Ọrọ Iṣaaju

Wiwọle iranti taara (DMA) AFUample fihan bi o ṣe le ṣakoso awọn gbigbe iranti laarin ero isise ogun ati FPGA. O le ṣepọ DMA AFU sinu apẹrẹ rẹ lati gbe data laarin iranti agbalejo ati iranti agbegbe FPGA. DMA AFU ni awọn submodules wọnyi:

Ile-iṣẹ Awọn Ohun-ini Iranti (MPF) Dina Ile Ipilẹ (BBB)

Interface Cache Core (CCI-P) si Avalon® Memory-Mapped (Avalon-MM) Adapter
Eto Idanwo DMA eyiti o ni DMA BBB ninu

Awọn submodules wọnyi ni a ṣapejuwe ni awọn alaye diẹ sii ni DMA AFU Hardware Components koko ni isalẹ.

Alaye ti o jọmọ

Awọn Irinṣẹ Hardware DMA AFU loju iwe 6
Avalon Interface pato

Fun alaye diẹ sii nipa ilana Avalon-MM, pẹlu awọn aworan akoko fun kika ati kọ awọn iṣowo.

Package Software DMA AFU

Akopọ isare Intel fun Intel Xeon Sipiyu pẹlu package FPGAs file (*.tar.gz), pẹlu DMA AFU example. Eyi example pese awakọ aaye olumulo. Ohun elo agbalejo nlo awakọ yii gẹgẹbi DMA gbe data laarin agbalejo ati iranti FPGA. Awọn alakomeji hardware, awọn orisun, ati awakọ aaye olumulo wa ninu itọsọna atẹle: $ OPAE_PLATFORM_ROOT/hw/samples/dma_afu . Ṣaaju ki o to ṣe idanwo pẹlu DMA AFU, o gbọdọ fi package sọfitiwia Ṣii Programmable Acceleration Engine (OPAE) sori ẹrọ. Tọkasi fifi sori ẹrọ Package sọfitiwia OPAE ni Itọnisọna Ibẹrẹ iyara Intel isare Stack fun Intel FPGA isare Kaadi D5005 fun awọn ilana fifi sori ẹrọ. Itọsọna Ibẹrẹ Yiyara yii tun pẹlu alaye ipilẹ nipa Ṣiṣii Ẹrọ Imuyara Eto Eto (OPAE) ati tunto AFU kan. Lẹhin fifi Open Programmable Acceleration Engine (OPAE) software package, biample gbalejo ohun elo ati DMA AFU awakọ aaye olumulo wa ninu itọsọna atẹle: $ OPAE_PLATFORM_ROOT/hw/samples/dma_afu/sw. Lati ṣiṣe awọn sample gbalejo ohun elo, fpga_dma_test lori ohun elo Intel FPGA PAC D5005 rẹ, tọka si awọn igbesẹ ni apakan Ṣiṣe DMA AFU Example. Intel Corporation. Gbogbo awọn ẹtọ wa ni ipamọ. Intel, aami Intel, ati awọn aami Intel miiran jẹ aami-išowo ti Intel Corporation tabi awọn oniranlọwọ rẹ. Intel ṣe atilẹyin iṣẹ ṣiṣe ti FPGA rẹ ati awọn ọja semikondokito si awọn pato lọwọlọwọ ni ibamu pẹlu atilẹyin ọja boṣewa Intel, ṣugbọn ni ẹtọ lati ṣe awọn ayipada si eyikeyi awọn ọja ati iṣẹ nigbakugba laisi akiyesi. Intel ko gba ojuse tabi layabiliti ti o dide lati inu ohun elo tabi lilo eyikeyi alaye, ọja, tabi iṣẹ ti a ṣalaye ninu rẹ ayafi bi a ti gba ni kikun si kikọ nipasẹ Intel. A gba awọn alabara Intel nimọran lati gba ẹya tuntun ti awọn pato ẹrọ ṣaaju gbigbekele eyikeyi alaye ti a tẹjade ati ṣaaju gbigbe awọn aṣẹ fun awọn ọja tabi awọn iṣẹ. * Awọn orukọ miiran ati awọn ami iyasọtọ le jẹ ẹtọ bi ohun-ini ti awọn miiran.

Alaye ti o jọmọ

Iṣatunṣe Iṣatunṣe Intel Itọsọna Ibẹrẹ iyara fun Intel FPGA Kaadi Isare Iṣeregbe D5005
Fifi Package Software OPAE sori ẹrọ

Awọn ohun elo Hardware DMA AFU

Awọn atọkun DMA AFU pẹlu FPGA Interface Unit (FIU) ati iranti FPGA. Tọkasi dì Data Manager Interface FPGA fun Intel FPGA Programmable Acceleration Card D5005 fun awọn alaye ni pato ti iranti FPGA. Ohun elo ti o wa lọwọlọwọ n ṣalaye iṣeto iranti yii. Ohun elo ojo iwaju le ṣe atilẹyin awọn atunto iranti oriṣiriṣi. O le lo DMA AFU lati daakọ data laarin orisun atẹle ati awọn ipo irin ajo:

Ogun to ẹrọ FPGA iranti
Ẹrọ FPGA iranti si ogun

Eto Onise Platform kan, $ OPAE_PLATFORM_ROOT/hw/samples/ dma_afu/hw/rtl/TEST_dma/ /dma_test_system.qsys ṣe pupọ julọ ti DMA

AFU. Apa kan ti DMA AFU ti a ṣe ni Platform Designer eto ni a le rii ni atẹle

ibi: $ OPAE_PLATFORM_ROOT/hw/samples/dma_afu/hw/rtl/TEST_dma/ O le wa DMA BBB ni ipo atẹle:

$ OPAE_PLATFORM_ROOT/hw/samples/dma_afu/hw/rtl/dma_bbb

Itọnisọna Olumulo Ẹka Iṣẹ-ṣiṣe DMA Imuyara: Intel FPGA Kaadi Isare ti Eto D5005

DMA AFU Hardware Block aworan atọka

DMA AFU pẹlu awọn modulu inu atẹle wọnyi lati ni wiwo pẹlu Ẹka Ni wiwo FPGA (FIU):

Iranti-Mapped IO (MMIO) Decoder Logic: ṣe awari MMIO kika ati kọ awọn iṣowo ati ya wọn sọtọ lati ikanni CCI-P RX 0 ti wọn de lati. Eyi ni idaniloju pe ijabọ MMIO ko de MPF BBB ati pe o jẹ iṣẹ nipasẹ ikanni aṣẹ MMIO ominira.
Ile-iṣẹ Awọn ohun-ini Iranti (MPF): module yii ṣe idaniloju pe kika awọn idahun lati ipadabọ DMA ni aṣẹ ti wọn fun wọn. Ilana Avalon-MM nbeere awọn idahun kika lati pada si ọna ti o pe.
CCI-P si Avalon-MM Adapter: Module yii tumọ laarin awọn iṣowo CCI-P ati Avalon-MM, gẹgẹbi atẹle:
CCI-P si Avalon-MMIO Adapter: Ọna yii tumọ awọn iṣowo CCI-P MMIO sinu awọn iṣowo Avalon-MM.
Avalon si CCI-P Oluyipada Olumulo: Awọn ọna wọnyi ṣẹda kika-nikan lọtọ ati awọn ọna kikọ-nikan fun DMA lati wọle si iranti agbalejo.
Eto Idanwo DMA: Module yii n ṣiṣẹ bi ipari ni ayika DMA BBB lati fi han awọn oluwa DMA si iyoku ọgbọn ni AFU. O pese wiwo laarin DMA BBB ati CCI-P si Avalon Adapter. O tun pese wiwo laarin DMA BBB ati awọn banki FPGA SDRAM agbegbe.

Alaye ti o jọmọ
FPGA Interface Manager Data Dì fun Intel FPGA Programmable isare Kaadi D5005

DMA igbeyewo System

Eto idanwo DMA so DMA BBB pọ si iyoku apẹrẹ FPGA pẹlu aṣamubadọgba CCI-P ati iranti FPGA agbegbe.

DMA igbeyewo System Àkọsílẹ aworan atọka
Aworan atọka bulọọki yii fihan awọn inu ti eto idanwo DMA. Eto idanwo DMA jẹ afihan bi bulọọki monolithic ni Nọmba 1 ni oju-iwe 7.

Eto idanwo DMA pẹlu awọn modulu inu atẹle wọnyi:

Jina Reach Afara/Afara Pipe: Afara opo gigun ti epo pẹlu airi adijositabulu to wa lati ṣakoso topology ati ilọsiwaju Fmax apẹrẹ.

Akọsori Ẹya Ẹrọ DMA AFU (DFH): Eyi jẹ DFH fun DMA AFU. DFH yii tọka si DFH atẹle ti o wa ni aiṣedeede 0x100 (DMA BBB DFH).
Asan DFH: Yi paati fopin si DFH ti sopọ-akojọ. Ti o ba ṣafikun diẹ sii DMA BBBs si apẹrẹ, rii daju pe adiresi ipilẹ DFH asan wa ni opin ti atokọ ti o sopọ mọ DFH.
MA Ipilẹ Building Àkọsílẹ (BBB): Yi Àkọsílẹ gbe data laarin awọn ogun ati agbegbe FPGA iranti. O tun wọle si iranti ogun lati wọle si awọn ẹwọn ijuwe.

DMA BBB

DMA BBB subsystem gbigbe data lati orisun si awọn adirẹsi opin si lilo Avalon-MM lẹkọ. Awakọ DMA n ṣakoso DMA BBB nipa iraye si iṣakoso ati iforukọsilẹ ipo ti awọn oriṣiriṣi awọn paati inu eto naa. Awakọ DMA tun n ṣakoso DMA BBB nipa lilo iranti pinpin lati baraẹnisọrọ awọn asọye gbigbe. DMA BBB n wọle si data ni iranti FPGA ni aiṣedeede 0x0. DMA BBB n wọle si data ati awọn apejuwe ninu iranti igbalejo ni aiṣedeede 0x1_0000_0000_0000.

DMA BBB Platform onise Block aworan atọka
Aworan atọka idinamọ yii yọkuro diẹ ninu awọn ohun kohun Pipeline Bridge IP inu.

Itọnisọna Olumulo Ẹka Iṣẹ-ṣiṣe DMA Imuyara: Intel FPGA Kaadi Isare ti Eto D5005

DMA AFU Apejuwe

Awọn paati inu DMA BBB Platform Designer ṣe awọn iṣẹ wọnyi:

Afara Gigun Gigun/Afara Opopona: Afara opo gigun ti epo pẹlu airi adijositabulu to wa lati ṣakoso topology ati ilọsiwaju Fmax apẹrẹ.
MA BBB DFH: Eyi jẹ akọsori ẹya ẹrọ fun DMA BBB. DFH yii tọka si DFH atẹle ti o wa ni aiṣedeede 0x100 (Null DFH).
Apejuwe Frontend: Lodidi fun gbigba awọn apejuwe ati gbigbe wọn si Dispatcher. Nigbati gbigbe DMA kan ba pari iwaju yoo gba idasile ipo lati ọdọ Dispatcher ati atunkọ oluṣapejuwe ni iranti ogun.

Olufiranṣẹ: Àkọsílẹ yii ṣe iṣeto awọn gbigbe awọn ibeere DMA si Ka ati Kọ Titunto.
Ka Titunto: Àkọsílẹ yii jẹ iduro fun kika data lati ibi-ogun tabi iranti FPGA agbegbe ati fifiranṣẹ bi data ṣiṣanwọle si Kọ Titunto.
Kọ Titunto: Àkọsílẹ yii jẹ iduro fun gbigba data ṣiṣanwọle lati Titunto si Ka ati kikọ akoonu lati gbalejo tabi iranti FPGA agbegbe.

Forukọsilẹ Maapu ati Awọn aaye adirẹsi

DMA AFU ṣe atilẹyin iranti meji views: DMA naa view ati agbalejo view. DMA naa view ṣe atilẹyin aaye adirẹsi 49-bit. Isalẹ idaji ti DMA view awọn maapu si iranti FPGA agbegbe. Apa oke ti DMA view maapu lati gbalejo iranti. Agbanisodo view pẹlu gbogbo awọn iforukọsilẹ ti o wa nipasẹ awọn iraye si MMIO gẹgẹbi awọn tabili DFH, ati awọn iforukọsilẹ iṣakoso/ipo ti ọpọlọpọ awọn ohun kohun IP ti a lo ninu DMA AFU. MMIO forukọsilẹ ni DMA BBB ati AFU atilẹyin 32- ati 64-bit wiwọle. DMA AFU ko ṣe atilẹyin awọn iraye si MMIO 512-bit. Awọn iraye si awọn iforukọsilẹ Dispatcher inu DMA BBB gbọdọ jẹ awọn bit 32 (Apejuwe frontend ṣe awọn iforukọsilẹ 64-bit).

DMA AFU Forukọsilẹ Map

Maapu iforukọsilẹ DMA AFU pese awọn adirẹsi pipe ti gbogbo awọn ipo laarin ẹyọkan naa. Awọn iforukọsilẹ wọnyi wa ni agbalejo view nitori pe onile nikan ni o le wọle si wọn.

DMA AFU Memory Map

Baiti adirẹsi Offsets	Oruko	Igba ni awọn Bytes	Apejuwe
0x0	DMA AFU DFH	0x40	Akọsori ẹya ẹrọ fun DMA AFU. Ti ṣeto ID_L naa si 0x9081f88b8f655caa ati pe ID_H ti ṣeto si 0x331db30c988541ea. DMA AFU DFH ti wa ni paramita lati tọka si aiṣedeede 0x100 lati wa DFH atẹle (DMA BBB DFH). Iwọ ko gbọdọ ṣe atunṣe adirẹsi ipilẹ ti DMA AFU DFH nitori o gbọdọ wa ni adirẹsi 0x0 gẹgẹbi asọye nipasẹ sipesifikesonu CCIP.
0x100	DMA BBB	0x100	Ṣeto iṣakoso DMA BBB ati wiwo iforukọsilẹ ipo. O le tọka si maapu iforukọsilẹ DMA BBB fun alaye diẹ sii. Laarin DMA BBB ni aiṣedeede 0 DMA BBB pẹlu DFH tirẹ. A ti ṣeto DFH yii lati wa DFH atẹle ni aiṣedeede 0x100 (NULL DFH). Ti o ba ṣafikun awọn BBB DMA diẹ sii, aaye wọn 0x100 yato si ati rii daju NULL DFH tẹle DMA ti o kẹhin nipasẹ 0x100.
0x200	DFH NULL	0x40	Fopin si DFH ti a ti sopọ-akojọ. A ṣeto ID_L si 0x90fe6aab12a0132f ati pe ID_H ti ṣeto si 0xda1182b1b3444e23. NULL DFH ti jẹ parameterized lati jẹ DFH ti o kẹhin ninu ohun elo. Fun idi eyi NULL DFH wa ni adirẹsi 0x200. Ti o ba ṣafikun awọn afikun DMA BBB si eto naa, o nilo lati mu adirẹsi ipilẹ NULL DFH pọ si ni ibamu ki o wa ni adirẹsi ti o ga julọ. Awakọ DMA ati ohun elo idanwo ko lo ohun elo yi.

Forukọsilẹ Maapu ati Awọn aaye adirẹsi

DMA BBB Memory Map
Awọn adirẹsi baiti wọnyi jẹ awọn aiṣedeede ibatan lati adirẹsi ipilẹ DMA BBB ninu eto DMA AFU (0x100).

Baiti adirẹsi Offsets	Oruko	Igba ni awọn Bytes	Apejuwe
0x0	DMA BBB DFH	0x40	Akọsori ẹya ẹrọ fun DMA AFU. Ti ṣeto ID_L naa si 0xa9149a35bace01ea ati pe ID_H ti ṣeto si 0xef82def7f6ec40fc. DMA BBB DFH ti jẹ parameterized lati tọka si 0x100 fun aiṣedeede DFH atẹle. Aiṣedeede atẹle le jẹ DMA BBB miiran, DFH miiran (ko si ninu apẹrẹ yii), tabi NULL DFH.
0x40	Dispatcher	0x40	Iṣakoso ibudo fun dispatcher. Awakọ DMA nlo ipo yii lati ṣakoso DMA tabi beere ipo rẹ.
0x80	Apejuwe Frontend	0x40	Apejuwe iwaju jẹ paati aṣa ti o ka awọn alapejuwe lati iranti agbalejo ati atunkọ oluṣapejuwe nigbati gbigbe DMA ba pari. Awakọ naa n kọ iwaju iwaju nibiti oluṣapejuwe akọkọ n gbe ni iranti ogun ati lẹhinna ohun elo iwaju ti n sọrọ pẹlu awakọ ni akọkọ botilẹjẹpe awọn apejuwe ti o fipamọ sinu iranti ogun.

DMA AFU adirẹsi Space

Olugbalejo le wọle si awọn iforukọsilẹ ti a ṣe akojọ si ni Tabili 4 ni oju-iwe 12 ati Tabili 5 ni oju-iwe 13. DMA BBB ni aaye si aaye adirẹsi 49-bit ni kikun. Idaji isalẹ ti aaye adirẹsi yii pẹlu awọn iranti FPGA agbegbe. Idaji oke ti aaye adirẹsi yii pẹlu iranti adirẹsi olupin 48-bit. Nọmba atẹle yii fihan agbalejo ati DMA views ti iranti.

The DMA AFU ati Gbalejo Views of Memory

Akọsori Ẹya Ẹrọ ti Asopọ-Akojọ

Apẹrẹ DMA AFU example ni awọn akọle ẹya ẹrọ mẹta (DFH) ti o ṣe atokọ ti o sopọ mọ. Yi ti sopọ mọ akojọ faye gba awọn sample elo lati ṣe idanimọ DMA AFU bakanna bi awakọ lati ṣe idanimọ DMA BBB. Akojọ DFH pẹlu NULL DFH ni ipari. Ifisi ti DFH asan ni opin atokọ ti a ti sopọ gba ọ laaye lati ṣafikun diẹ sii DMA BBBs si apẹrẹ rẹ. O kan nilo lati gbe NULL DFH si adirẹsi lẹhin awọn BBB miiran. DMA BBB kọọkan nireti pe DFH ti nbọ yoo wa 0x100 awọn baiti lati adirẹsi ipilẹ ti BBB. Nọmba ti o tẹle n ṣe afihan atokọ ti a ti sopọ fun apẹrẹ DMA AFU example.

Forukọsilẹ Maapu ati Awọn aaye adirẹsi

DMA AFU Device Ẹya akọsori (DFH) Chaining

Awoṣe siseto Software

DMA AFU pẹlu awakọ sọfitiwia ti o le lo ninu ohun elo agbalejo tirẹ. Awọn fpga_dma.cpp ati fpga_dma.h files ti o wa ni ipo atẹle ṣe imuṣe awakọ sọfitiwia:$OPAE_PLATFORM_ROOT/hw/samples/dma_afu/sw Awakọ yii ṣe atilẹyin awọn iṣẹ wọnyi:

API	Apejuwe
fpgaCountDMAChannels	Ṣiṣayẹwo ẹwọn ẹya ẹrọ fun DMA BBBs ati ka gbogbo awọn ikanni to wa.
fpgaDMA Ṣii	Ṣii mimu si ikanni DMA.
fpgaDMAClose	Pa a mu to DMA ikanni.
fpgaDMATransferInit	Bibẹrẹ ohun kan ti o duro fun gbigbe DMA.
fpgaDMATransferReset	Ṣe atunto nkan gbigbe DMA si awọn iye aiyipada.
fpgaDMATransferDestroy	Pa ohun kikọ gbigbe DMA run.
fpgaDMATransferSetSrc	Ṣeto adirẹsi orisun ti gbigbe. Adirẹsi yii gbọdọ wa ni ibamu 64 baiti.
fpgaDMATransferSetDst	Ṣeto adirẹsi ibi ti gbigbe. Adirẹsi yii gbọdọ wa ni ibamu 64 baiti.
fpgaDMATransferSetLen	Ṣeto awọn ipari gbigbe ni awọn baiti. Fun awọn gbigbe ti kii ṣe apo, o gbọdọ ṣeto gigun gbigbe si ọpọ 64 baiti. Fun awọn gbigbe apo, eyi kii ṣe ibeere.
fpgaDMATransferSetTransferType	Ṣeto iru gbigbe. Awọn iye ofin ni: • HOST_MM_TO_FPGA_MM = TX (Alejo si AFU) • FPGA_MM_TO_HOST_MM = RX (AFU lati gbalejo)
fpgaDMATransferSetTransferCallback	Iforukọsilẹ ipe pada fun ifitonileti lori ipari gbigbe asynchronous. Ti o ba pato ipe kan, fpgaDMATransfer pada lẹsẹkẹsẹ (gbigbe asynchronous). Ti o ko ba pato kan callback, fpgaDMATransfer pada lẹhin ti awọn gbigbe ti wa ni ti pari (amuṣiṣẹpọ / ìdènà gbigbe).
fpgaDMATransferSetLast	Tọkasi gbigbe kẹhin ki DMA le bẹrẹ sisẹ awọn gbigbe ti a ti ṣaju tẹlẹ. Iwọn aiyipada jẹ awọn gbigbe 64 ni opo gigun ti epo ṣaaju ki DMA bẹrẹ lati ṣiṣẹ lori awọn gbigbe.
fpgaDMATransfer	Ṣe gbigbe DMA kan.

Fun alaye diẹ sii nipa API, titẹ sii, ati awọn ariyanjiyan igbejade, tọka si akọsori file be $ OPAE_PLATFORM_ROOT/hw/samples/dma_afu/sw/fpga_dma.hIntel Corporation. Gbogbo awọn ẹtọ wa ni ipamọ. Intel, aami Intel, ati awọn aami Intel miiran jẹ aami-išowo ti Intel Corporation tabi awọn oniranlọwọ rẹ. Intel ṣe atilẹyin iṣẹ ṣiṣe ti FPGA rẹ ati awọn ọja semikondokito si awọn pato lọwọlọwọ ni ibamu pẹlu atilẹyin ọja boṣewa Intel, ṣugbọn ni ẹtọ lati ṣe awọn ayipada si eyikeyi awọn ọja ati iṣẹ nigbakugba laisi akiyesi. Intel ko gba ojuse tabi layabiliti ti o dide lati inu ohun elo tabi lilo eyikeyi alaye, ọja, tabi iṣẹ ti a ṣalaye ninu rẹ ayafi bi a ti gba ni kikun si kikọ nipasẹ Intel. A gba awọn alabara Intel nimọran lati gba ẹya tuntun ti awọn pato ẹrọ ṣaaju gbigbekele eyikeyi alaye ti a tẹjade ati ṣaaju gbigbe awọn aṣẹ fun awọn ọja tabi awọn iṣẹ. Awọn orukọ miiran ati awọn ami iyasọtọ le jẹ ẹtọ bi ohun-ini ti awọn miiran.

Awoṣe siseto Software

Lati mọ diẹ sii nipa awoṣe awakọ sọfitiwia, tọka si README file be ni $OPAE_PLATFORM_ROOT/hw/samples/dma_afu/README.md

Nṣiṣẹ DMA AFU Example

Ṣaaju ki o to bẹrẹ:

O yẹ ki o faramọ pẹlu examples ni Intel isare Stack Quick Bẹrẹ Itọsọna fun Intel FPGA Programmable isare Kaadi D5005.
O gbọdọ setumo ohun ayika oniyipada. Oniyipada ayika da lori ẹya Intel Acceleration Stack ti o nlo:
- Fun ẹya lọwọlọwọ, ṣeto oniyipada ayika si $ OPAE_PLATFORM_ROOT
O gbọdọ fi sori ẹrọ ile-ikawe Intel Threading Building Blocks (TBB) niwon awakọ DMA gbarale.
O gbọdọ tun ṣeto soke meji 1 GB hugepages lati ṣiṣe awọn sample elo. $ sudo sh -c “iwoyi 2> /sys/kernel/mm/hugepages/hugepages-1048576kB/ nr_hugepages”

Ṣe awọn igbesẹ wọnyi lati ṣe igbasilẹ iṣẹ-ṣiṣe Accelerator DMA (AF) bitstream, lati kọ ohun elo ati awakọ, ati lati ṣiṣe apẹrẹ apẹẹrẹ tẹlẹ.ample:

Yipada si ohun elo DMA ati itọsọna awakọ: cd $ OPAE_PLATFORM_ROOT/hw/samples/dma_afu/sw
Kọ awakọ ati ohun elo: ṣe

Ṣe igbasilẹ DMA AFU bitstream: sudo fpgasupdate ../bin/dma_afu_unsigned.gbs
Ṣiṣẹ ohun elo agbalejo lati kọ 100 MB ni awọn ipin 1 MB lati iranti agbalejo si iranti ẹrọ FPGA ki o ka pada: ./ fpga_dma_test -s 104857600 -p 1048576 -r mtom

Alaye ti o jọmọ
Intel isare Stack Quick Bẹrẹ Itọsọna fun Intel FPGA Programmable isare Kaadi D5005 Intel Corporation. Gbogbo awọn ẹtọ wa ni ipamọ. Intel, aami Intel, ati awọn ami Intel miiran jẹ aami-išowo ti Intel Corporation tabi awọn oniranlọwọ rẹ. Intel ṣe atilẹyin iṣẹ ṣiṣe ti FPGA rẹ ati awọn ọja semikondokito si awọn pato lọwọlọwọ ni ibamu pẹlu atilẹyin ọja boṣewa Intel, ṣugbọn ni ẹtọ lati ṣe awọn ayipada si eyikeyi awọn ọja ati iṣẹ nigbakugba laisi akiyesi. Intel ko gba ojuse tabi layabiliti ti o dide lati inu ohun elo tabi lilo eyikeyi alaye, ọja, tabi iṣẹ ti a ṣalaye ninu rẹ ayafi bi a ti gba ni kikun si kikọ nipasẹ Intel. A gba awọn alabara Intel nimọran lati gba ẹya tuntun ti awọn pato ẹrọ ṣaaju gbigbekele eyikeyi alaye ti a tẹjade ati ṣaaju gbigbe awọn aṣẹ fun awọn ọja tabi awọn iṣẹ. * Awọn orukọ miiran ati awọn ami iyasọtọ le jẹ ẹtọ bi ohun-ini ti awọn miiran.

Iṣakojọpọ DMA AFU Example

Lati ṣe agbejade ayika ile iṣelọpọ lati ṣajọ AF kan, lo aṣẹ afu_synth_setup bi atẹle:

Yipada si DMA AFU sample liana: $ OPAE_PLATFORM_ROOT/hw/samples/dma_afu
Ṣe agbekalẹ itọsọna kikọ apẹrẹ: afu_synth_setup –orisun hw/rtl/filelist.txt build_synth

Lati iwe ilana iṣelọpọ ti ipilẹṣẹ nipasẹ afu_synth_setup, tẹ awọn aṣẹ wọnyi lati window ebute kan lati ṣe agbekalẹ AF kan fun iru ẹrọ ohun elo ibi-afẹde: cd build_synth run.sh Iwe afọwọkọ iran run.sh AF ṣẹda aworan AF pẹlu ipilẹ kanna. filelorukọ bi AFU ká Syeed iṣeto ni file (.json) pẹ̀lú ìfidín .gbs kan ní ibi:$OPAE_PLATFORM_ROOT/hw/samples/build_synth/dma_afu_s10.gbs Intel Corporation. Gbogbo awọn ẹtọ wa ni ipamọ. Intel, aami Intel, ati awọn aami Intel miiran jẹ aami-išowo ti Intel Corporation tabi awọn oniranlọwọ rẹ. Intel ṣe atilẹyin iṣẹ ṣiṣe ti FPGA rẹ ati awọn ọja semikondokito si awọn pato lọwọlọwọ ni ibamu pẹlu atilẹyin ọja boṣewa Intel, ṣugbọn ni ẹtọ lati ṣe awọn ayipada si eyikeyi awọn ọja ati iṣẹ nigbakugba laisi akiyesi. Intel ko gba ojuse tabi layabiliti ti o dide lati inu ohun elo tabi lilo eyikeyi alaye, ọja, tabi iṣẹ ti a ṣalaye ninu rẹ ayafi bi a ti gba ni kikun si kikọ nipasẹ Intel. A gba awọn alabara Intel nimọran lati gba ẹya tuntun ti awọn pato ẹrọ ṣaaju gbigbekele eyikeyi alaye ti a tẹjade ati ṣaaju gbigbe awọn aṣẹ fun awọn ọja tabi awọn iṣẹ. * Awọn orukọ miiran ati awọn ami iyasọtọ le jẹ ẹtọ bi ohun-ini ti awọn miiran.

Simulating AFU Example

Intel ṣeduro pe ki o tọka si Ẹka Iṣẹ Accelerator Intel (AFU) Ayika Simulation (ASE) Itọsọna Ibẹrẹ iyara fun Intel FPGA PAC rẹ lati faramọ pẹlu ṣiṣe adaṣe iru iṣaaju.amples ati lati ṣeto ayika rẹ. Ṣaaju ki o to tẹsiwaju nipasẹ awọn igbesẹ wọnyi, rii daju pe OPAE_PLATFORM_ROOT oniyipada ayika ti ṣeto si itọsọna fifi sori OPAE SDK. Pari awọn igbesẹ wọnyi lati ṣeto simulator hardware fun DMA AFU:

Yipada si DMA AFU sample liana: cd $ OPAE_PLATFORM_ROOT/hw/samples/dma_afu

Ṣẹda agbegbe ASE ni itọsọna tuntun kan ki o tunto rẹ fun ṣiṣe adaṣe AFU kan: afu_sim_setup –orisun hw/rtl/filelist.txt build_ase_dir
Yi pada si ASE Kọ liana: cd build_ase_dir
Kọ awakọ ati ohun elo: ṣe

Ṣe kikopa: ṣe SIM

Sample jade lati ẹrọ simulator hardware:

[SIM] ** AKIYESI: Ṣaaju ṣiṣe ohun elo software ** [SIM] Ṣeto env(ASE_WORKDIR) ni ebute nibiti ohun elo yoo ṣiṣẹ (daakọ-ati-lẹẹmọ) => [SIM] $ SHELL | Ṣiṣe:[SIM] ———+——————————————————SIM] bash/zsh | okeere ASE_WORKDIR=$ OPAE_PLATFORM_ROOT/hw/samples/dma_afu/ase_mkdir/iṣẹ [SIM] tcsh/csh | setenv ASE_WORKDIR $ OPAE_PLATFORM_ROOT/hw/samples/dma_afu/ase_mkdir/work [SIM] Fun eyikeyi $ SHELL, kan si alabojuto Linux rẹ [SIM] [SIM] Ṣetan fun kikopa… [SIM] Tẹ CTRL-C lati pa afọwọṣe…

Pari awọn igbesẹ wọnyi lati ṣajọ ati ṣiṣẹ sọfitiwia DMA AFU ni agbegbe kikopa:

Ṣii window ebute titun kan.
Yi itọsọna pada si: cd $ OPAE_PLATFORM_ROOT/hw/samples/dma_afu/sw

Simulating AFU Example

Daakọ okun iṣeto ayika (yan okun ti o yẹ fun ikarahun rẹ) lati awọn igbesẹ ti o wa loke ni simulation hardware si ferese ebute. Wo awọn ila wọnyi ni sample o wu lati hardware labeabo. [SIM] bash/zsh | okeere ASE_WORKDIR=$ OPAE_PLATFORM_ROOT/hw/samples/dma_afu/build_ase_dir/iṣẹ [SIM] tcsh/csh | setenv ASE_WORKDIR $ OPAE_PLATFORM_ROOT/hw/samples/dma_afu/build_ase_dir/iṣẹ
Ṣe akojọpọ sọfitiwia naa: $ ṣe USE_ASE=1

Ṣiṣẹ ohun elo agbalejo lati kọ 4 KB ni awọn ipin 1 KB lati iranti agbalejo pada si iranti ẹrọ FPGA ni ipo loopback: ./ fpga_dma_test -s 4096 -p 1024 -r mtom

Alaye ti o jọmọ
Ẹka Iṣẹ Imuyara Intel (AFU) Ayika Simulation (ASE) Itọsọna olumulo Ibẹrẹ kiakia

Imudara fun Imudara Iṣe DMA

Imuse ti NUMA (iwọle iranti ti kii-aṣọkan) iṣapeye ni fpga_dma_test.cpp ngbanilaaye ero isise lati wọle si iranti agbegbe ti ara rẹ ni iyara ju iraye si iranti ti kii ṣe agbegbe (iranti agbegbe si ero isise miiran). Iṣeto NUMA aṣoju jẹ afihan ninu aworan atọka ni isalẹ. Wiwọle agbegbe ṣe aṣoju iraye si lati mojuto si agbegbe iranti si mojuto kanna. Wiwọle latọna jijin ṣe afihan ọna ti o mu nigbati mojuto lori Node 0 wọle si iranti ti o ngbe ni agbegbe iranti si Node 1.

Iṣeto NUMA Aṣoju

Lo koodu atẹle yii lati ṣe iṣapeye NUMA ninu ohun elo idanwo rẹ:

// Ṣeto ibaramu to dara ti o ba beere ti (cpu_affinity || memory_affinity) {unsigned dom = 0, akero = 0, dev = 0, func = 0; fpga_properties atilẹyin; int retval; #ti o ba jẹ (FPGA_DMA_DEBUG) char str [4096]; #endifres = fpgaGetProperties (afc_token, & atilẹyin); ON_ERR_GOTO (res, out_destroy_tok, "fpgaGetProperties"); res = fpgaPropertiesGetBus (props, (uint8_t *) & akero);ON_ERR_GOTO (res, out_destroy_tok, "fpgaPropertiesGetBus"); res = fpgaPropertiesGetDevice (props, (uint8_t *) & dev);ON_ERR_GOTO (res, out_destroy_tok, "fpgaPropertiesGetDevice") res = fpgaPropertiesGetFunction (props, (uint8_t *) & func);ON_ERR_GOTO (res, out_destroy_tok); // Wa ẹrọ lati topology hwloc_topology_t topology; hwloc_topology_init (& topology); hwloc_topology_set_flags (topology, HWLOC_TOPOLOGY_FLAG_IO_DEVICES); Intel Corporation. Gbogbo awọn ẹtọ wa ni ipamọ. Intel, aami Intel, ati awọn aami Intel miiran jẹ aami-išowo ti Intel Corporation tabi awọn oniranlọwọ rẹ. Intel ṣe atilẹyin iṣẹ ṣiṣe ti FPGA rẹ ati awọn ọja semikondokito si awọn pato lọwọlọwọ ni ibamu pẹlu atilẹyin ọja boṣewa Intel, ṣugbọn ni ẹtọ lati ṣe awọn ayipada si eyikeyi ọja ati awọn iṣẹ nigbakugba laisi akiyesi. Intel ko gba ojuse tabi layabiliti ti o dide lati inu ohun elo tabi lilo eyikeyi alaye, ọja, tabi iṣẹ ti a ṣalaye ninu rẹ ayafi bi a ti gba ni kikun si kikọ nipasẹ Intel. A gba awọn alabara Intel nimọran lati gba ẹya tuntun ti awọn pato ẹrọ ṣaaju gbigbekele eyikeyi alaye ti a tẹjade ati ṣaaju gbigbe awọn aṣẹ fun awọn ọja tabi awọn iṣẹ. * Awọn orukọ miiran ati awọn ami iyasọtọ le jẹ ẹtọ bi ohun-ini ti awọn miiran.

Imudara fun Imudara Iṣe DMA

hwloc_topology_load (topology); hwloc_obj_t obj = hwloc_get_pcidev_by_busid (topology, dom, akero, dev, func); hwloc_obj_t obj2 = hwloc_get_non_io_ancestor_obj (topology, obj); #ti o ba jẹ (FPGA_DMA_DEBUG) hwloc_obj_type_snprintf (str, 4096, obj2, 1); printf("%s\n", str);hwloc_obj_attr_snprintf(str, 4096, obj2, "::", 1);printf("%s\n", str); hwloc_bitmap_taskset_snprintf (str, 4096, obj2-> cpuset); printf("CPUSET jẹ %s\n", str); hwloc_bitmap_taskset_snprintf (str, 4096, obj2-> nodeset); printf("NODESET jẹ %s\n", str);#endif if (memory_affinity) {#if HWLOC_API_VERSION> 0x00020000 retval = hwloc_set_membind(topology, obj2->nodeset,HWLOC_MEMBIND_THAD_THMI); # miran retval = hwloc_set_membind_nodeset (topology, obj2-> nodeset, HWLOC_MEMBIND_THREAD, HWLOC_MEMBIND_MIGRATE); #endifON_ERR_GOTO(retval, out_destroy_tok, “hwloc_set_membind”); } ti (cpu_affinity) {retval = hwloc_set_cpubind (topology, obj2-> cpuset, HWLOC_CPUBIND_STRICT); ON_ERR_GOTO (retval, out_destroy_tok, "hwloc_set_cpubind"); }}

DMA ohun imuyara Išẹ Unit User Itọsọna Archives

Intel isare Stack Version	Itọsọna olumulo (PDF)
2.0	DMA ohun imuyara Unit isẹ (AFU) olumulo Itọsọna

Itan Atunyẹwo Iwe-ipamọ fun Itọsọna Olumulo Ẹka Iṣẹ Imuyara DMA

Ẹya Iwe aṣẹ

Intel isare Ẹya akopọ

Awọn iyipada

2020.08.03

2.0.1 (ni atilẹyin pẹlu Intel

Ẹya Quartus® Prime Pro Edition 19.2)

Atunse aworan AF file orukọ ni apakan Iṣakojọpọ DMA AFU Example.

2020.04.17

2.0.1 (ni atilẹyin pẹlu Intel

Ẹya Quartus Prime Pro Edition 19.2)

Atunse alaye kan ninu Olugbo ti a pinnu apakan.

2020.02.20

2.0.1 (ni atilẹyin pẹlu Intel

Ẹya Quartus Prime Pro Edition 19.2)

Ti o wa titi typo.

2019.11.04

2.0.1 (ni atilẹyin pẹlu Intel

Ẹya Quartus Prime Pro Edition 19.2)

Rọpo fpgaconf pẹlu fpgasupdate nigbati o tunto FPGA pẹlu AFU ti o ti ṣaju ni apakan Nṣiṣẹ DMA AFU Example.

Fikun atunkọ Intel FPGA Eto isare Kaadi D5005 si akọle iwe-ipamọ.

• Iyipada ayika ti a ṣafikun $ OPAE_PLATFORM_ROOT.

Abala títúnṣe Awoṣe siseto Software fun kekere àtúnṣe.

Fikun titun apakan Iṣakojọpọ DMA AFU Example.

Abala títúnṣe Imudara fun Imudara Iṣe DMA fun kekere àtúnṣe.

2019.08.05

2.0 (ni atilẹyin pẹlu Intel

Ẹya Quartus Prime Pro 18.1.2)

Itusilẹ akọkọ.

Intel Corporation. Gbogbo awọn ẹtọ wa ni ipamọ. Intel, aami Intel, ati awọn aami Intel miiran jẹ aami-išowo ti Intel Corporation tabi awọn oniranlọwọ rẹ. Intel ṣe atilẹyin iṣẹ ṣiṣe ti FPGA rẹ ati awọn ọja semikondokito si awọn pato lọwọlọwọ ni ibamu pẹlu atilẹyin ọja boṣewa Intel, ṣugbọn ni ẹtọ lati ṣe awọn ayipada si eyikeyi awọn ọja ati iṣẹ nigbakugba laisi akiyesi. Intel ko gba ojuse tabi layabiliti ti o dide lati inu ohun elo tabi lilo eyikeyi alaye, ọja, tabi iṣẹ ti a ṣalaye ninu rẹ ayafi bi a ti gba ni kikun si kikọ nipasẹ Intel. A gba awọn alabara Intel nimọran lati gba ẹya tuntun ti awọn pato ẹrọ ṣaaju gbigbekele eyikeyi alaye ti a tẹjade ati ṣaaju gbigbe awọn aṣẹ fun awọn ọja tabi awọn iṣẹ.

Awọn orukọ miiran ati awọn ami iyasọtọ le jẹ ẹtọ bi ohun-ini ti awọn miiran.

Awọn iwe aṣẹ / Awọn orisun

Intel FPGA Eto isare Kaadi D5005 [pdf] Itọsọna olumulo
Kaadi Imuyara ti Eto FPGA, D5005, FPGA Kaadi Imuyara Eto D5005, Ẹka Iṣẹ imuyara DMA

Awọn itọkasi

Itọsọna olumulo

Intel FPGA Eto isare Kaadi D5005

Nipa Iwe-ipamọ yii

DMA AFU Apejuwe

Forukọsilẹ Maapu ati Awọn aaye adirẹsi

DMA AFU Forukọsilẹ Map

Forukọsilẹ Maapu ati Awọn aaye adirẹsi

Awoṣe siseto Software

Nṣiṣẹ DMA AFU Example

Iṣakojọpọ DMA AFU Example

Simulating AFU Example

Imudara fun Imudara Iṣe DMA

DMA ohun imuyara Išẹ Unit User Itọsọna Archives

Itan Atunyẹwo Iwe-ipamọ fun Itọsọna Olumulo Ẹka Iṣẹ Imuyara DMA

Awọn iwe aṣẹ / Awọn orisun

Awọn itọkasi

Fi ọrọìwòye

Fagilee esi