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Intel FPGA Programmable Acceleration Card D5005

Intel.-FPGA-Programmable-Acceleration-Card-D5005-product

Mayelana nalo Mqulu

Lo mbhalo uchaza ukusetshenziswa kwe-Direct memory access (DMA) Accelerator Functional Unit (AFU) kanye nendlela yokwakha idizayini ezosebenza ku-hardware noma ekufaniseni.

Izilaleli Ezihlosiwe

Izithameli ezihlosiwe zihlanganisa izingxenyekazi zekhompuyutha noma abathuthukisi besofthiwe abadinga i-Accelerator Function (AF) ukuze bagcine idatha endaweni kumemori exhunywe kudivayisi ye-Intel FPGA.

Izivumelwano

Imibhalo Yesigodi

Ingqungquthela Incazelo
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Izifinyezo

Izifinyezo

Izifinyezo Ukunwetshwa Incazelo
AF Umsebenzi we-Accelerator Isithombe esihlanganisiwe se-Hardware Accelerator sisetshenziswe ngomqondo we-FPGA osheshisa uhlelo lokusebenza.
AFU Iyunithi esebenzayo ye-Accelerator I-Hardware Accelerator isetshenziswe ngomqondo we-FPGA elayisha ukusebenza kwekhompyutha kohlelo lokusebenza olusuka ku-CPU ukuze kuthuthukiswe ukusebenza.
I-API I-Application Programming Interface Isethi yezincazelo zendlela engaphansi, amaphrothokholi, namathuluzi wokwakha izinhlelo zokusebenza zesofthiwe.
I-CCI-P I-Core Cache Interface I-CCI-P iyisixhumi esibonakalayo esijwayelekile esisetshenziswa ama-AFU ukuze axhumane nomsingathi.
I-DFH Isihloko Sesici Sedivayisi Idala uhlu oluxhunyiwe lwezihloko zesici ukuze kuhlinzekwe ngendlela enwetshiwe yokwengeza izici.
waqhubeka...

Inkampani ye-Intel Wonke Amalungelo Agodliwe. I-Intel, ilogo ye-Intel, nezinye izimpawu ze-Intel yizimpawu zokuthengisa ze-Intel Corporation noma izinkampani ezingaphansi kwayo. I-Intel iqinisekisa ukusebenza kwe-FPGA yayo kanye nemikhiqizo yesemiconductor ekucacisweni kwamanje ngokuvumelana newaranti evamile ye-Intel, kodwa igodla ilungelo lokwenza izinguquko kunoma imiphi imikhiqizo namasevisi nganoma yisiphi isikhathi ngaphandle kwesaziso. I-Intel ayithathi mthwalo noma isikweletu esivele ngenxa yesicelo noma ukusetshenziswa kwanoma yiluphi ulwazi, umkhiqizo, noma isevisi echazwe lapha ngaphandle kwalapho okuvunyelwene ngakho ngokubhaliwe yi-Intel. Amakhasimende e-Intel ayelulekwa ukuthi athole inguqulo yakamuva yokucaciswa kwedivayisi ngaphambi kokuthembela kunoma yiluphi ulwazi olushicilelwe nangaphambi kokufaka ama-oda emikhiqizo noma amasevisi. *Amanye amagama namabhrendi angafunwa njengempahla yabanye.

Izifinyezo Ukunwetshwa Incazelo
I-FIM I-FPGA Interface Manager Izingxenyekazi zekhompiyutha ze-FPGA eziqukethe i-FPGA Interface Unit (FIU) nezixhumi ezibonakalayo zangaphandle zememori, inethiwekhi, njll.

I-Accelerator Function (AF) ihlangana ne-FIM ngesikhathi sokusebenza.

I-FIU Iyunithi ye-FPGA Interface I-FIU iyisixhumi esibonakalayo seplathifomu esebenza njengebhuloho phakathi kwenkundla yokuxhumana efana ne-PCIe*, i-UPI ne-AFU-side interfaces njenge-CCI-P.
I-MPF I-Memory Properties Factory I-MPF iyi-Basic Building Block (BBB) ​​i-AFUs engayisebenzisa ukuhlinzeka ngemisebenzi ye-CCI-P yokubunjwa kwethrafikhi kumathransekshini ne-FIU.

Ukusheshisa Uhlu lwamagama

Isitaki Sokusheshisa se-Intel® Xeon® CPU esinama-FPGAs Glossary

Ithemu Isifinyezo Incazelo
I-Intel® Acceleration Stack ye-Intel Xeon® CPU enama-FPGA Isitaki Sokusheshisa Iqoqo lesofthiwe, i-firmware, namathuluzi ahlinzeka ngokuxhumeka okuthuthukisiwe kokusebenza phakathi kwe-Intel FPGA nephrosesa ye-Intel Xeon.
Ikhadi Lokusheshisa Le-Intel FPGA I-Intel FPGA PAC Ikhadi le-accelerator le-PCIe FPGA.

Iqukethe i-FPGA Interface Manager (FIM) ebhanqa ne-Intel Xeon processor phezu kwebhasi le-PCIe.

  • I-DMA Accelerator Functional Unit Guide User: Intel FPGA Programmable Acceleration Card D5005

DMA AFU Incazelo

Isingeniso

I-Direct Memory Access (DMA) AFU exampI-le ibonisa indlela yokuphatha ukudluliswa kwememori phakathi kwephrosesa yokusingatha kanye ne-FPGA. Ungakwazi ukuhlanganisa i-DMA AFU ekwakhiweni kwakho ukuze uhambise idatha phakathi kwememori yokusingatha kanye nenkumbulo yendawo ye-FPGA.I-DMA AFU iqukethe amamojula alandelayo:

  • I-Memory Properties Factory (MPF) Basic Building Block (BBB)
  • I-Core Cache Interface (CCI-P) ukuya ku-Avalon® Memory-Mapped (Avalon-MM) Adaptha
  • I-DMA Test System equkethe i-DMA BBB

Lawa ma-submodule achazwe kabanzi esihlokweni se-DMA AFU Hardware Components ngezansi.

Ulwazi Oluhlobene

  • Izingxenye ze-DMA AFU Hardware ekhasini 6
  • Imininingwane ye-Avalon Interface

Ukuze uthole ulwazi olwengeziwe mayelana nephrothokholi ye-Avalon-MM, okuhlanganisa imidwebo yesikhathi yokufunda nokubhala okwenziwayo.

Iphakheji Yesoftware ye-DMA AFU

I-Intel Acceleration Stack ye-Intel Xeon CPU enephakheji le-FPGAs file (*.tar.gz), kuhlanganisa ne-DMA AFU example. Lesi exampi-le inikeza umshayeli wesikhala somsebenzisi. Uhlelo lokusebenza lomsingathi lusebenzisa lo mshayeli kangangokuthi i-DMA ihambisa idatha phakathi komsingathi nememori ye-FPGA. Amabhanari ezingxenyekazi zekhompiyutha, imithombo, kanye nesishayeli sesikhala somsebenzisi kuyatholakala ohlwini lwemibhalo olulandelayo: $OPAE_PLATFORM_ROOT/hw/samples/dma_afu . Ngaphambi kokuzama nge-DMA AFU, kufanele ufake iphakheji yesofthiwe ye-Open Programmable Acceleration Engine (OPAE). Bheka Ukufaka Iphakheji Yesofthiwe ye-OPAE Kumhlahlandlela Wokuqala Osheshayo we-Intel Acceleration Stack ye-Intel FPGA Programmable Acceleration Card D5005 ukuze uthole imiyalelo yokufaka. Lo mhlahlandlela Wokuqalisa Okusheshayo uhlanganisa nolwazi oluyisisekelo mayelana ne-Open Programmable Acceleration Engine (OPAE) kanye nokumisa i-AFU. Ngemva kokufaka iphakheji yesofthiwe ye-Open Programmable Acceleration Engine (OPAE), njengeample host application kanye nesishayeli sesikhala somsebenzisi se-DMA AFU kuyatholakala ohlwini lwemibhalo olulandelayo: $OPAE_PLATFORM_ROOT/hw/samples/dma_afu/sw. Ukugijima i-sampkanye nesicelo sokusingatha, i-fpga_dma_test ku-Intel FPGA PAC D5005 hardware yakho, bheka izinyathelo ezisesigabeni Ukusebenzisa i-DMA AFU Example. Inkampani ye-Intel Wonke Amalungelo Agodliwe. I-Intel, ilogo ye-Intel, nezinye izimpawu ze-Intel yizimpawu zokuthengisa ze-Intel Corporation noma izinkampani ezingaphansi kwayo. I-Intel iqinisekisa ukusebenza kwe-FPGA yayo kanye nemikhiqizo yesemiconductor ekucacisweni kwamanje ngokuvumelana newaranti evamile ye-Intel, kodwa igodla ilungelo lokwenza izinguquko kunoma imiphi imikhiqizo namasevisi nganoma yisiphi isikhathi ngaphandle kwesaziso. I-Intel ayithathi mthwalo noma isikweletu esivele ngenxa yesicelo noma ukusetshenziswa kwanoma yiluphi ulwazi, umkhiqizo, noma isevisi echazwe lapha ngaphandle kwalapho okuvunyelwene ngakho ngokubhaliwe yi-Intel. Amakhasimende e-Intel ayelulekwa ukuthi athole inguqulo yakamuva yokucaciswa kwedivayisi ngaphambi kokuthembela kunoma yiluphi ulwazi olushicilelwe nangaphambi kokufaka ama-oda emikhiqizo noma amasevisi. *Amanye amagama namabhrendi angafunwa njengempahla yabanye.

Ulwazi Oluhlobene

  • I-Intel Acceleration Stack Umhlahlandlela Wokuqala Okusheshayo we-Intel FPGA Ehlelekayo Yokusheshisa Ikhadi D5005
  • Ukufaka Iphakheji Yesofthiwe ye-OPAE

Izingxenye ze-DMA AFU Hardware

I-DMA AFU ihlangana ne-FPGA Interface Unit (FIU) kanye nenkumbulo ye-FPGA. Bheka ku-FPGA Interface Manager Data Sheet ye-Intel FPGA Programmable Acceleration Card D5005 ukuze uthole imininingwane enemininingwane yememori ye-FPGA. Izingxenyekazi zekhompuyutha ezitholakalayo njengamanje zisho lokhu kumiswa kwememori. Izingxenyekazi zekhompyutha zesikhathi esizayo zingase zisekele ukucushwa kwememori okuhlukile. Ungasebenzisa i-DMA AFU ukukopisha idatha phakathi komthombo olandelayo nezindawo oya kuzo:

  • Umsingathi wememori ye-FPGA yedivayisi
  • Imemori yedivayisi ye-FPGA kumsingathi

Uhlelo Lomklami Wenkundla, $OPAE_PLATFORM_ROOT/hw/samples/ dma_afu/hw/rtl/TEST_dma/ /dma_test_system.qsys isebenzisa iningi le-DMA

  • AFU. Ingxenye ye-DMA AFU esetshenziswa ohlelweni Lomklami Wenkundla ingatholakala kulokhu okulandelayo

indawo:$OPAE_PLATFORM_ROOT/hw/samples/dma_afu/hw/rtl/TEST_dma/ Ungathola i-DMA BBB endaweni elandelayo:

  • $OPAE_PLATFORM_ROOT/hw/samples/dma_afu/hw/rtl/dma_bbb

I-DMA Accelerator Functional Unit Guide User: Intel FPGA Programmable Acceleration Card D5005

I-DMA AFU Hardware Block Diagram

Intel.-FPGA-Programmable-Acceleration-Card-D5005-fig-1

I-DMA AFU ihlanganisa amamojula angaphakathi alandelayo azosebenzisana ne-FPGA Interface Unit (FIU):

  • I-Memory-Mapped IO (MMIO) Decoder Logic: ithola i-MMIO yokufunda nokubhala okwenziwayo futhi ikuhlukanise nesiteshi se-CCI-P RX 0 abafika ngaso. Lokhu kuqinisekisa ukuthi ithrafikhi ye-MMIO ayifinyeleli ku-MPF BBB futhi ihlinzekwa yisiteshi somyalo esizimele se-MMIO.
  • I-Memory Properties Factory (MPF): Le mojula iqinisekisa ukuthi ziyafundwa izimpendulo ezivela embuyekeni ye-DMA ngendlela ezikhishwe ngayo. Iphrothokholi ye-Avalon-MM idinga izimpendulo ezifundiwe ukuze zibuye ngendlela efanele.
  • I-CCI-P ukuya ku-Avalon-MM Adapter: Le mojula ihumusha phakathi kwe-CCI-P kanye nokwenziwe kwe-Avalon-MM, ngendlela elandelayo:
  • I-CCI-P ukuya ku-Avalon-MMIO Adapter: Lo mzila uhumusha okwenziwayo kwe-CCI-P MMIO kuya kokwenziwa kwe-Avalon-MM.
  • I-Avalon eya ku-CCI-P I-adaptha Yokusingatha: Lezi zindlela zakha izindlela ezihlukene zokufunda nokubhala kuphela ukuze i-DMA ifinyelele kumemori yosokhaya.
  • Isistimu Yokuhlola I-DMA: Le mojula isebenza njengesembozo ezungeze i-DMA BBB ukuze iveze ochwepheshe be-DMA kuwo wonke umqondo ku-AFU. Inikeza ukuxhumana phakathi kwe-DMA BBB ne-CCI-P kuya ku-Avalon Adapter. Iphinde inikeze ukuxhumana phakathi kwe-DMA BBB namabhange endawo e-FPGA SDRAM.

Ulwazi Oluhlobene
I-FPGA Interface Manager Data Sheet ye-Intel FPGA Programmable Acceleration Card D5005

Uhlelo Lokuhlola lwe-DMA

Isistimu yokuhlola ye-DMA ixhuma i-DMA BBB nayo yonke idizayini ye-FPGA ehlanganisa ukulungiswa kwe-CCI-P kanye nenkumbulo yendawo ye-FPGA.

I-DMA Test System Block Diagram
Lo mdwebo webhulokhi ubonisa abangaphakathi besistimu yokuhlola ye-DMA. Uhlelo lokuhlola lwe-DMA luboniswa njengebhulokhi ye-monolithic kuMfanekiso 1 ekhasini lesi-7.Intel.-FPGA-Programmable-Acceleration-Card-D5005-fig-2

Isistimu yokuhlola ye-DMA ihlanganisa amamojula angaphakathi alandelayo:

  • Ibhuloho leFar Reach/Pipeline Bridge: Ibhuloho lepayipi elinokubambezeleka okulungisekayo kufakwe ukulawula i-topology kanye nokuthuthukisa idizayini ye-Fmax.
  • Isihloko Sesici Sedivayisi ye-DMA AFU (DFH): Lena i-DFH ye-DMA AFU. Le DFH ikhomba ku-DFH elandelayo etholakala ku-offset 0x100 (DMA BBB DFH).
  • I-null DFH: Le ngxenye inqamula uhlu oluxhunyiwe lwe-DFH. Uma wengeza ama-DMA BBB engeziwe ekwakhiweni, qinisekisa ukuthi ikheli lesizinda se-DFH elingenalutho litholakala ekugcineni kohlu oluxhunyiwe lwe-DFH.
  • I-MA Basic Building Block (BBB): Le block ihambisa idatha phakathi komsingathi kanye nememori yendawo ye-FPGA. Iphinde ifinyelele kumemori yokusingatha ukuze ifinyelele amaketanga ezichazi.

I-DMA BBB

Isistimu engaphansi ye-DMA BBB idlulisela idatha isuka emthonjeni iye kumakheli okuyiwa kusetshenziswa imisebenzi ye-Avalon-MM. Umshayeli we-DMA ulawula i-DMA BBB ngokufinyelela isilawuli kanye nerejista yesimo sezingxenye ezihlukahlukene ngaphakathi kohlelo. Umshayeli we-DMA futhi ulawula i-DMA BBB ngokusebenzisa inkumbulo eyabiwe ukuze axhumane nezincazelo zokudlulisa. I-DMA BBB ifinyelela idatha kumemori ye-FPGA ngokusuka ku-0x0. I-DMA BBB ifinyelela idatha nezichazi kumemori yosokhaya ku-offset 0x1_0000_0000_0000.

I-DMA BBB Platform Block Diagram
Lo mdwebo webhulokhi awufaki ama-IP cores angaphakathi e-Pipeline Bridge.Intel.-FPGA-Programmable-Acceleration-Card-D5005-fig-6

I-DMA Accelerator Functional Unit Guide User: Intel FPGA Programmable Acceleration Card D5005

DMA AFU Incazelo

Izingxenye eziku-DMA BBB Platform Designer zisebenzisa le misebenzi elandelayo:

  • Far Reach Bridge/Pipeline Bridge: Ibhuloho elihamba ngamapayipi elinokubambezeleka okulungisekayo kufakwe ukulawula i-topology kanye nokuthuthukisa idizayini ye-Fmax.
  • MA BBB DFH: Lesi isihloko sesici sedivayisi se-DMA BBB. Le DFH ikhomba ku-DFH elandelayo etholakala ku-offset 0x100 (Null DFH).
  • I-Descriptor Frontend: Unomthwalo wemfanelo wokulanda izichazi kanye nokuzidlulisela ku-Dispatcher. Uma ukudluliswa kwe-DMA kuqeda indawo engaphambili ithola ukwakheka kwesimo ku-Dispatcher futhi ibhala phezu kwesichazi kumemori yosokhaya.
  • I-Dispatcher: Leli bhulokhi lihlela i-DMA idlulisela izicelo ku-Read and Write Master.
  • Funda uMfundisi: Leli bhulokhi linesibopho sokufunda idatha kusuka kumsingathi noma kumemori ye-FPGA yendawo nokuyithumela njengokusakaza idatha ku-Writing Master.
  • Bhala Ingcweti: Leli bhulokhi linesibopho sokwamukela idatha yokusakaza-bukhoma evela ku-Read Master nokubhala okuqukethwe ukuze kusingathwe noma inkumbulo ye-FPGA yendawo.

Bhalisa Imephu Nezikhala Zekheli

I-DMA AFU isekela inkumbulo emibili views: I-DMA view kanye nomphathi view. Idatha ye-DMA view isekela isikhala sekheli esingu-49-bit. Ingxenye ephansi ye-DMA view amamephu kumemori yendawo ye-FPGA. Ingxenye engaphezulu ye-DMA view amamephu wokusingatha inkumbulo. Umethuleli view ihlanganisa wonke amarejista afinyeleleka ngokufinyelela kwe-MMIO njengamathebula e-DFH, kanye namarejista okulawula/esimo ezinhlobonhlobo ze-IP cores ezisetshenziswa ngaphakathi kwe-DMA AFU. I-MMIO ibhalisa ku-DMA BBB kanye ne-AFU isekela ukufinyelela okungamabhithi angu-32 no-64. I-DMA AFU ayikusekeli ukufinyelela kwe-512-bit MMIO. Ukufinyelela kumarejista e-Dispatcher ngaphakathi kwe-DMA BBB kufanele kube amabhithi angu-32 (I-Descriptor frontend isebenzisa amarejista angama-64-bit).

Imephu Yokubhalisa ye-DMA AFU

Imephu yerejista ye-DMA AFU inikeza amakheli aphelele azo zonke izindawo ngaphakathi kweyunithi. Lawa marejista akusokhaya view ngoba umsingathi kuphela ongakwazi ukuwafinyelela.

Imephu Yenkumbulo ye-DMA AFU

I-Byte Address Offsets Igama Hamba ngama-Bytes Incazelo
0x0 DMA AFU DFH 0x40 Isihloko sesici sedivayisi se-DMA AFU. I-ID_L isethelwe ku-0x9081f88b8f655caa futhi i-ID_H isethelwe ku-0x331db30c988541ea. I-DMA AFU DFH ifakwe ipharamitha ukuze ikhombe ekususeni u-0x100 ukuze kutholwe i-DFH elandelayo (DMA BBB DFH). Akumele uguqule ikheli lesisekelo le-DMA AFU DFH njengoba kufanele libe sekhelini elithi 0x0 njengoba kuchazwe ngencazelo ye-CCIP.
0x100 I-DMA BBB 0x100 Icacisa isilawuli se-DMA BBB nesixhumi esibonakalayo serejista yesimo. Ungabheka imephu yerejista ye-DMA BBB ukuze uthole ulwazi olwengeziwe. Ngaphakathi kwe-DMA BBB ekunciphiseni 0 i-DMA BBB ihlanganisa ne-DFH yayo. Le DFH isethelwe ukuthola i-DFH elandelayo ku-offset 0x100 (NULL DFH). Uma ungeza ama-DMA BBB engeziwe, wahlukanise ngo-0x100 futhi uqinisekise ukuthi i-NULL DFH ilandela i-DMA yokugcina ngo-0x100.
0x200 I-NULL DFH 0x40 Inqamula uhlu oluxhunyiwe lwe-DFH. I-ID_L isethwe ukuze ithi 0x90fe6aab12a0132f futhi ID_H isethwe ukuze ithi 0xda1182b1b3444e23. I-NULL DFH ibekwe kupharamitha ukuze ibe i-DFH yokugcina kuhadiwe. Ngalesi sizathu i-NULL DFH itholakala ekhelini elithi 0x200. Uma wengeza ama-DMA BBB engeziwe ohlelweni, udinga ukwandisa ikheli lesisekelo le-NULL DFH ngokufanele ukuze lihlale ekhelini eliphezulu kakhulu. Umshayeli we-DMA nohlelo lokusebenza lokuhlola alusebenzisi le hardware.

Inkampani ye-Intel Wonke Amalungelo Agodliwe. I-Intel, ilogo ye-Intel, nezinye izimpawu ze-Intel yizimpawu zokuthengisa ze-Intel Corporation noma izinkampani ezingaphansi kwayo. I-Intel iqinisekisa ukusebenza kwe-FPGA yayo kanye nemikhiqizo yesemiconductor ekucacisweni kwamanje ngokuvumelana newaranti evamile ye-Intel, kodwa igodla ilungelo lokwenza izinguquko kunoma imiphi imikhiqizo namasevisi nganoma yisiphi isikhathi ngaphandle kwesaziso. I-Intel ayithathi mthwalo noma isikweletu esivele ngenxa yesicelo noma ukusetshenziswa kwanoma yiluphi ulwazi, umkhiqizo, noma isevisi echazwe lapha ngaphandle kwalapho okuvunyelwene ngakho ngokubhaliwe yi-Intel. Amakhasimende e-Intel ayelulekwa ukuthi athole inguqulo yakamuva yokucaciswa kwedivayisi ngaphambi kokuthembela kunoma yiluphi ulwazi olushicilelwe nangaphambi kokufaka ama-oda emikhiqizo noma amasevisi. *Amanye amagama namabhrendi angafunwa njengempahla yabanye.

Bhalisa Imephu Nezikhala Zekheli

Imephu Yenkumbulo ye-DMA BBB
Lawa makheli ebhayithi alandelayo ayizici ezihlobene ukusuka ekhelini lesizinda se-DMA BBB ohlelweni lwe-DMA AFU (0x100).

I-Byte Address Offsets Igama Hamba ngama-Bytes Incazelo
0x0 I-DMA BBB DFH 0x40 Isihloko sesici sedivayisi se-DMA AFU. I-ID_L isethelwe ku-0xa9149a35bace01ea futhi i-ID_H isethelwe ku-0xef82def7f6ec40fc. I-DMA BBB DFH ibekwe ipharamitha ukuze ikhombe ku-0x100 ekususeni okulandelayo kwe-DFH. Lokhu kususwa okulandelayo kungaba enye i-DMA BBB, enye i-DFH (ayifakiwe kulo mklamo), noma i-NULL DFH.
0x40 I-Dispatcher 0x40 Lawula imbobo ye-dispatcher. Umshayeli we-DMA usebenzisa le ndawo ukuze alawule i-DMA noma abuze ngesimo sayo.
0x80 I-Descriptor Frontend 0x40 I-frontend yesichazi ingxenye yangokwezifiso efunda izichazi kumemori yosokhaya futhi ibhala phezu kwesichazi lapho ukudlulisa kwe-DMA kuqeda. Umshayeli uyala indawo engaphambili lapho isichazi sokuqala sihlala khona kumemori yosokhaya bese izingxenyekazi ezingaphambili zixhumana nomshayeli ngokuyinhloko nakuba izichazili ezigcinwe kumemori yosokhaya.

DMA AFU Ikheli Space

Umsingathi angakwazi ukufinyelela amarejista asohlwini lweThebula lesi-4 ekhasini le-12 kanye neThebula 5 ekhasini 13. Uhlelo olungaphansi lwe-DMA BBB luyakwazi ukufinyelela esikhaleni samakheli esingama-49-bit esigcwele. Ingxenye engezansi yalesi sikhala sekheli ihlanganisa izinkumbulo zendawo ze-FPGA. Ingxenye engaphezulu yalesi sikhala sekheli ihlanganisa inkumbulo yekheli le-48-bit. Isibalo esilandelayo sibonisa umphathi kanye ne-DMA views yenkumbulo.

I-DMA AFU kanye nomsingathi Views of Memory

Intel.-FPGA-Programmable-Acceleration-Card-D5005-fig-3

Uhlu Oluxhunyiwe Lwesihloko Sesici Sedivayisi

I-DMA AFU design exampI-le iqukethe izihloko zesici sedivayisi ezintathu (DFH) ezakha uhlu oluxhunyiwe. Lolu hlu oluxhunyiwe luvumela i-sample isicelo sokuhlonza i-DMA AFU kanye nomshayeli ukuhlonza i-DMA BBB. Uhlu lwe-DFH luhlanganisa i-NULL DFH ekugcineni. Ukufakwa kwe-null DFH ekugcineni kohlu oluxhunyiwe kukuvumela ukuthi ungeze ama-DMA BBB engeziwe ekwakhiweni kwakho. Udinga nje ukususa i-NULL DFH uye ekhelini elingemva kwamanye ama-BBB. I-DMA BBB ngayinye ilindele ukuthi i-DFH elandelayo itholakale ngamabhayithi angu-0x100 ukusuka ekhelini eliyisisekelo le-BBB. Umfanekiso olandelayo ubonisa uhlu oluxhunyiwe lwe-ex yedizayini ye-DMA AFUample.

Bhalisa Imephu Nezikhala Zekheli

I-DMA AFU Device Feature Header (DFH) Chaining

Intel.-FPGA-Programmable-Acceleration-Card-D5005-fig-4

I-Software Programming Model

I-DMA AFU ihlanganisa umshayeli wesofthiwe ongawusebenzisa kuhlelo lwakho lokusebenza lomsingathi. I-fpga_dma.cpp kanye ne-fpga_dma.h fileezitholakala endaweni elandelayo sebenzisa umshayeli wesofthiwe:$OPAE_PLATFORM_ROOT/hw/samples/dma_afu/sw Lo mshayeli usekela imisebenzi elandelayo:

I-API Incazelo
fpgaCountDMChannels Iskena uchungechunge lwesici sedivayisi kuma-DMA BBB futhi ibale zonke iziteshi ezitholakalayo.
fpgaDMAOpen Ivula isibambo esiteshini se-DMA.
fpgaDMAClose Ivala isibambo esiteshini se-DMA.
fpgaDMATransferInit Iqalisa into emele ukudluliswa kwe-DMA.
fpgaDMATransferReset Isetha kabusha into yesibaluli sokudlulisa i-DMA ibe amanani azenzakalelayo.
fpgaDMATransferDestroy Icekela phansi into yesibaluli sokudlulisa i-DMA.
fpgaDMATransferSetSrc Isetha ikheli lomthombo wokudlulisa. Leli kheli kufanele liqondaniswe ngamabhayithi angu-64.
fpgaDMATransferSetDst Isetha ikheli lendawo yokudluliswa. Leli kheli kufanele liqondaniswe ngamabhayithi angu-64.
fpgaDMATransferSetLen Imisa ubude bokudlulisa ngamabhayithi. Ngokudluliswa okungelona iphakethe, kufanele usethe ubude bokudlulisa bube ukuphindaphinda kwamabhayithi angu-64. Ngokudluliswa kwephakethe, lokhu akuyona imfuneko.
fpgaDMATransferSetTransferType Isetha uhlobo lokudlulisa. Amanani asemthethweni yilawa:

• HOST_MM_TO_FPGA_MM = TX (Isingethe ku-AFU)

• FPGA_MM_TO_HOST_MM = RX (AFU to host)

fpgaDMATransferSetTransferCallback Ibhalisa ukushayelwa emuva ukuze uthole isaziso ekuqedeni ukudlulisa okungavumelaniyo. Uma ucacisa ukuphinda ushayele, i-fpgaDMATransfer ibuya ngokushesha (ukudlulisa okungavumelani).

Uma ungakucacisi ukuphinda ushayele, i-fpgaDMATransfer iyabuya ngemva kokuqedwa kokudlulisa (okuvumelanayo/okuvimba ukudlulisa).

fpgaDMATransferSetLast Ibonisa ukudlulisa kokugcina ukuze i-DMA iqale ukucubungula ukudluliselwa okulandiwe kuqala. Inani elimisiwe liwukudluliselwa okungu-64 kuphayiphi ngaphambi kokuba i-DMA iqale ukusebenza ekudlulisweni.
fpgaDMATransfer Yenza ukudlulisa kwe-DMA.

Ukuze uthole ulwazi olwengeziwe mayelana ne-API, ama-agumenti okokufaka, nokukhiphayo, bheka unhlokweni file itholakala ku-$OPAE_PLATFORM_ROOT/hw/samples/dma_afu/sw/fpga_dma.hIntel Corporation. Wonke Amalungelo Agodliwe. I-Intel, ilogo ye-Intel, nezinye izimpawu ze-Intel yizimpawu zokuthengisa ze-Intel Corporation noma izinkampani ezingaphansi kwayo. I-Intel iqinisekisa ukusebenza kwe-FPGA yayo kanye nemikhiqizo yesemiconductor ekucacisweni kwamanje ngokuvumelana newaranti evamile ye-Intel, kodwa igodla ilungelo lokwenza izinguquko kunoma imiphi imikhiqizo namasevisi nganoma yisiphi isikhathi ngaphandle kwesaziso. I-Intel ayithathi mthwalo noma isikweletu esivele ngenxa yesicelo noma ukusetshenziswa kwanoma yiluphi ulwazi, umkhiqizo, noma isevisi echazwe lapha ngaphandle kwalapho okuvunyelwene ngakho ngokubhaliwe yi-Intel. Amakhasimende e-Intel ayelulekwa ukuthi athole inguqulo yakamuva yokucaciswa kwedivayisi ngaphambi kokuthembela kunoma yiluphi ulwazi olushicilelwe nangaphambi kokufaka ama-oda emikhiqizo noma amasevisi. Amanye amagama namabhrendi angafunwa njengempahla yabanye.

I-Software Programming Model

Ukuze uthole okwengeziwe mayelana nemodeli yokusebenzisa umshayeli wesofthiwe, bheka README file itholakala ku-$OPAE_PLATFORM_ROOT/hw/samples/dma_afu/README.md

Isebenzisa i-DMA AFU Example

Ngaphambi kokuthi uqale:

  • Kufanele ujwayelene ne-exampngaphansi kwe-Intel Acceleration Stack Quick Start Guide ye-Intel FPGA Programmable Acceleration Card D5005.
  • Kufanele uchaze i-variable yemvelo. Ukuhluka kwemvelo kuncike enguqulweni ye-Intel Acceleration Stack oyisebenzisayo:
    • Ngenguqulo yamanje, setha imvelo eguquguqukayo ibe ngu-$OPAE_PLATFORM_ROOT
  • Kufanele ufake ilabhulali ye-Intel Threading Building Blocks (TBB) njengoba umshayeli we-DMA ethembele kuyo.
  • Kufanele futhi usethe amakhasi amakhulu amabili we-1 GB ukuze usebenzise i-sampisicelo. $ sudo sh -c “echo 2 > /sys/kernel/mm/hugepages/hugepages-1048576kB/ nr_hugepages”

Yenza lezi zinyathelo ezilandelayo ukulanda i-bitstream ye-DMA Accelerator Function (AF), ukwakha uhlelo lokusebenza nomshayeli, nokusebenzisa i-design ex.ample:

  1. Shintshela kuhlelo lwe-DMA nenkomba yomshayeli: cd $OPAE_PLATFORM_ROOT/hw/samples/dma_afu/sw
  2. Yakha umshayeli kanye nesicelo: yenza
  3. Landa i-bitstream ye-DMA AFU: sudo fpgasupdate ../bin/dma_afu_unsigned.gbs
  4. Sebenzisa uhlelo lokusebenza lokusingatha ukuze ubhale u-100 MB kuzingxenye ezingu-1 MB ukusuka kumemori yokusingatha ukuya kumemori yedivayisi ye-FPGA uphinde uyifunde: ./ fpga_dma_test -s 104857600 -p 1048576 -r mtom

Ulwazi Oluhlobene
I-Intel Acceleration Stack Quick Guide ye-Intel FPGA Programmable Acceleration Card D5005 Intel Corporation. Wonke Amalungelo Agodliwe. I-Intel, ilogo ye-Intel, nezinye izimpawu ze-Intel yizimpawu zokuthengisa ze-Intel Corporation noma izinkampani ezingaphansi kwayo. I-Intel iqinisekisa ukusebenza kwe-FPGA yayo kanye nemikhiqizo yesemiconductor ekucacisweni kwamanje ngokuvumelana newaranti evamile ye-Intel, kodwa igodla ilungelo lokwenza izinguquko kunoma imiphi imikhiqizo namasevisi nganoma yisiphi isikhathi ngaphandle kwesaziso. I-Intel ayithathi mthwalo noma isikweletu esivele ngenxa yesicelo noma ukusetshenziswa kwanoma yiluphi ulwazi, umkhiqizo, noma isevisi echazwe lapha ngaphandle kwalapho okuvunyelwene ngakho ngokubhaliwe yi-Intel. Amakhasimende e-Intel ayelulekwa ukuthi athole inguqulo yakamuva yokucaciswa kwedivayisi ngaphambi kokuthembela kunoma yiluphi ulwazi olushicilelwe nangaphambi kokufaka ama-oda emikhiqizo noma amasevisi. *Amanye amagama namabhrendi angafunwa njengempahla yabanye.

Ukuhlanganisa i-DMA AFU Example

Ukuze ukhiqize indawo yokwakha yokuhlanganisa ukuze uhlanganise i-AF, sebenzisa umyalo othi afu_synth_setup kanje:

  1. Shintsha ku-DMA AFU sample directory: $OPAE_PLATFORM_ROOT/hw/samples/dma_afu
  2. Khiqiza umkhombandlela wokwakha umklamo: afu_synth_setup -source hw/rtl/filelist.txt build_synth
  3. Kusuka kuhla lwemibhalo lokwakha oluhlanganisiwe olukhiqizwe i-afu_synth_setup, faka imiyalo elandelayo efasiteleni letheminali ukuze ukhiqize i-AF yengxenyekazi yezingxenyekazi zekhompuyutha okuqondiwe: cd build_synth run.sh Iskripthi sesizukulwane se-run.sh AF sidala isithombe se-AF ngesisekelo esifanayo. fileigama njengokucushwa kweplathifomu ye-AFU file (.json) nesijobelelo esithi .gbs endaweni:$OPAE_PLATFORM_ROOT/hw/sampLes/build_synth/dma_afu_s10.gbs Intel Corporation. Wonke Amalungelo Agodliwe. I-Intel, ilogo ye-Intel, nezinye izimpawu ze-Intel yizimpawu zokuthengisa ze-Intel Corporation noma izinkampani ezingaphansi kwayo. I-Intel iqinisekisa ukusebenza kwe-FPGA yayo kanye nemikhiqizo ye-semiconductor ekucacisweni kwamanje ngokuvumelana newaranti evamile ye-Intel, kodwa igodla ilungelo lokwenza izinguquko kunoma imiphi imikhiqizo namasevisi nganoma yisiphi isikhathi ngaphandle kwesaziso. I-Intel ayithathi mthwalo noma isikweletu esivele ngenxa yesicelo noma ukusetshenziswa kwanoma yiluphi ulwazi, umkhiqizo, noma isevisi echazwe lapha ngaphandle kwalapho okuvunyelwene ngakho ngokubhaliwe yi-Intel. Amakhasimende e-Intel ayelulekwa ukuthi athole inguqulo yakamuva yokucaciswa kwedivayisi ngaphambi kokuthembela kunoma yiluphi ulwazi olushicilelwe nangaphambi kokufaka ama-oda emikhiqizo noma amasevisi. *Amanye amagama nemikhiqizo kungafunwa njengempahla yabanye.

Ukulingisa i-AFU Example

I-Intel incoma ukuthi ubhekisele ku-Intel Accelerator Functional Unit (AFU) Simulation Environment (ASE) Quick Start Guide ukuze i-Intel FPGA PAC yakho ijwayele ukulingisa i-ex efanayo.amples kanye nokusetha indawo yakho. Ngaphambi kokuthi uqhubeke ngezinyathelo ezilandelayo, qinisekisa ukuthi i-OPAE_PLATFORM_ROOT imvelo eguquguqukayo isethwe kuhla lwemibhalo yokufaka ye-OPAE SDK. Qedela izinyathelo ezilandelayo zokusetha isilingisi sehadiwe se-DMA AFU:

  1. Shintsha ku-DMA AFU sample directory: cd $OPAE_PLATFORM_ROOT/hw/samples/dma_afu
  2. Dala indawo ye-ASE kumkhombandlela omusha futhi uyilungiselele ukuze ilingise i-AFU: afu_sim_setup -source hw/rtl/filelist.txt build_ase_dir
  3. Shintshela kumkhombandlela wokwakha we-ASE: cd build_ase_dir
  4. Yakha umshayeli kanye nesicelo: yenza
  5. Yenza ukulingisa: yenza sim

Sampumphumela ovela kusifanisi sehadiwe:

[SIM] ** QAPHELA : NGAPHAMBI kokusebenzisa uhlelo lwesofthiwe ** [SIM] Setha i-env(ASE_WORKDIR) kutheminali lapho uhlelo luzosebenza khona (kopisha bese unamathisela) => [SIM] $SHELL | Gijimani:[SIM] ———+—————————————————— [SIM] bash/zsh | thekelisa ASE_WORKDIR=$OPAE_PLATFORM_ROOT/hw/samples/dma_afu/ase_mkdir/work [SIM] tcsh/csh | setenv ASE_WORKDIR $OPAE_PLATFORM_ROOT/hw/samples/dma_afu/ase_mkdir/work [SIM] Nganoma iyiphi enye i-$SHELL, thintana nomlawuli wakho we-Linux [SIM] [SIM] Isilungele ukulingiswa… [SIM] Cindezela u-CTRL-C ukuze uvale isifanisi...

Qedela lezi zinyathelo ezilandelayo ukuze uhlanganise futhi usebenzise isofthiwe ye-DMA AFU endaweni yokulingisa:

  1. Vula iwindi elisha letheminali.
  2. Shintsha uhla lwemibhalo lube: cd $OPAE_PLATFORM_ROOT/hw/samples/dma_afu/sw

Inkampani ye-Intel Wonke Amalungelo Agodliwe. I-Intel, ilogo ye-Intel, nezinye izimpawu ze-Intel yizimpawu zokuthengisa ze-Intel Corporation noma izinkampani ezingaphansi kwayo. I-Intel iqinisekisa ukusebenza kwe-FPGA yayo kanye nemikhiqizo yesemiconductor ekucacisweni kwamanje ngokuvumelana newaranti evamile ye-Intel, kodwa igodla ilungelo lokwenza izinguquko kunoma imiphi imikhiqizo namasevisi nganoma yisiphi isikhathi ngaphandle kwesaziso. I-Intel ayithathi mthwalo noma isikweletu esivele ngenxa yesicelo noma ukusetshenziswa kwanoma yiluphi ulwazi, umkhiqizo, noma isevisi echazwe lapha ngaphandle kwalapho okuvunyelwene ngakho ngokubhaliwe yi-Intel. Amakhasimende e-Intel ayelulekwa ukuthi athole inguqulo yakamuva yokucaciswa kwedivayisi ngaphambi kokuthembela kunoma yiluphi ulwazi olushicilelwe nangaphambi kokufaka ama-oda emikhiqizo noma amasevisi. *Amanye amagama namabhrendi angafunwa njengempahla yabanye.

Ukulingisa i-AFU Example

  1. Kopisha iyunithi yezinhlamvu zokusetha imvelo (khetha iyunithi yezinhlamvu efanele igobolondo lakho) kusukela ezinyathelweni ezingenhla ekulingiseni ihadiwe kuya efasiteleni letheminali. Bheka imigqa elandelayo ku-sample okukhiphayo kusuka kusifanisi sehadiwe. [SIM] bash/zsh | thekelisa ASE_WORKDIR=$OPAE_PLATFORM_ROOT/hw/samples/dma_afu/build_ase_dir/work [SIM] tcsh/csh | setenv ASE_WORKDIR $OPAE_PLATFORM_ROOT/hw/samples/dma_afu/build_ase_dir/work
  2. Hlanganisa isofthiwe: $ yenza USE_ASE=1
  3. Sebenzisa uhlelo lokusebenza lokusingatha ukuze ubhale u-4 KB ezingxenyeni ezingu-1 KB ukusuka kumemori yomsingathi ubuyele kumemori yedivayisi ye-FPGA kumodi ye-loopback: ./ fpga_dma_test -s 4096 -p 1024 -r mtom

Ulwazi Oluhlobene
Intel Accelerator Functional Unit (AFU) Simulation Environment (ASE) Quick Start User Guide

Ukuthuthukisa Ukusebenza Kwe-DMA Okuthuthukisiwe

Ukusetshenziswa kwe-NUMA (ukufinyelela inkumbulo okungajwayelekile) ukwenza ngokugcwele ku-fpga_dma_test.cpp kuvumela iphrosesa ukuthi ifinyelele inkumbulo yayo yendawo ngokushesha kunokufinyelela inkumbulo okungeyona eyendawo (inkumbulo yendawo iye kwenye iphrosesa). Ukucushwa kwe-NUMA okujwayelekile kukhonjisiwe kumdwebo ongezansi. Ukufinyelela kwendawo kumelela ukufinyelela kusuka kungqikithi kuya kumemori yendawo kuya kumongo ofanayo. Ukufinyelela okukude kubonisa indlela ethathwa lapho ingqikithi ku-Node 0 ifinyelela inkumbulo ehlala kumemori yendawo ku-Node 1.

Ukucushwa kwe-NUMA okujwayelekile

Intel.-FPGA-Programmable-Acceleration-Card-D5005-fig-5

Sebenzisa ikhodi elandelayo ukuze usebenzise i-NUMA kuhlelo lwakho lokusebenza lokuhlola:

// Misa ukuhlobana okufanele uma kuceliwe uma (cpu_affinity || memory_affinity) {unsigned dom = 0, ibhasi = 0, dev = 0, func = 0; fpga_properties props;int retval; #uma(FPGA_DMA_DEBUG)char str[4096]; #endifres = fpgaGetProperties(afc_token, &props); ON_ERR_GOTO(res, out_destroy_tok, “fpgaGetProperties”); res = fpgaPropertiesGetBus(ama-props, (uint8_t *) & ibhasi);ON_ERR_GOTO(res, out_destroy_tok, “fpgaPropertiesGetBus”); res = fpgaPropertiesGetDevice(ama-props, (uint8_t *) & dev); ON_ERR_GOTO(res, out_destroy_tok, “fpgaPropertiesGetDevice”) res = fpgaPropertiesGetFunction(ama-props, (uint8_t *) & func);ON_ERRtokTO_Function; // Thola idivayisi ku-topology hwloc_topology_t topology; I-hwloc_topology_init(&topology); hwloc_topology_set_flags(topology, HWLOC_TOPOLOGY_FLAG_IO_DEVICES);Intel Corporation. Wonke Amalungelo Agodliwe. I-Intel, ilogo ye-Intel, nezinye izimpawu ze-Intel yizimpawu zokuthengisa ze-Intel Corporation noma izinkampani ezingaphansi kwayo. I-Intel iqinisekisa ukusebenza kwe-FPGA yayo kanye nemikhiqizo ye-semiconductor ekucacisweni kwamanje ngokuvumelana newaranti evamile ye-Intel, kodwa igodla ilungelo lokwenza izinguquko kunoma yimiphi imikhiqizo namasevisi nganoma yisiphi isikhathi ngaphandle kwesaziso. I-Intel ayithathi mthwalo noma isikweletu esivele ngenxa yesicelo noma ukusetshenziswa kwanoma yiluphi ulwazi, umkhiqizo, noma isevisi echazwe lapha ngaphandle kwalapho okuvunyelwene ngakho ngokubhaliwe yi-Intel. Amakhasimende e-Intel ayelulekwa ukuthi athole inguqulo yakamuva yokucaciswa kwedivayisi ngaphambi kokuthembela kunoma yiluphi ulwazi olushicilelwe nangaphambi kokufaka ama-oda emikhiqizo noma amasevisi. *Amanye amagama nemikhiqizo kungafunwa njengempahla yabanye.

Ukuthuthukisa Ukusebenza Kwe-DMA Okuthuthukisiwe

i-hwloc_topology_load(i-topology); hwloc_obj_t obj = hwloc_get_pcidev_by_busid(topology, dom, bus, dev, func); hwloc_obj_t obj2 = hwloc_get_non_io_ancestor_obj(topology, obj); #uma (FPGA_DMA_DEBUG) hwloc_obj_type_snprintf(str, 4096, obj2, 1); printf(“%s\n”, str);hwloc_obj_attr_snprintf(str, 4096, obj2, ” :: “, 1);printf(“%s\n”, str); hwloc_bitmap_taskset_snprintf(str, 4096, obj2->cpuset); printf(“CPUSET ithi %s\n”, str); hwloc_bitmap_taskset_snprintf(str, 4096, obj2->nodeset); printf(“I-NODESET ithi %s\n”, str);#endif uma (inkumbulo_yokuhambisana) { #if HWLOC_API_VERSION > 0x00020000 retval = hwloc_set_membind(topology, obj2->nodeset,HWLOC_MEMB_MEMB_GRAMEB_MEMB,HWLOC_MEMBATE,HWLOC_MEMB,HWLOC_MEMB,HWLOC_MEMB,HWLOC_MEMB_GRAMEH_GREEN #okunye retval =hwloc_set_membind_nodeset(topology, obj2->nodeset, HWLOC_MEMBIND_THREAD,HWLOC_MEMBIND_MIGRATE); #endifON_ERR_GOTO(retval, out_destroy_tok, “hwloc_set_membind”); } uma (cpu_affinity) {retval = hwloc_set_cpubind(topology, obj2->cpuset, HWLOC_CPUBIND_STRICT); ON_ERR_GOTO(retval, out_destroy_tok, “hwloc_set_cpubind”); }}

I-DMA Accelerator Functional Unit User Guide Izingobo zomlando

Inguqulo yesitaki se-Intel Acceleration Umhlahlandlela Womsebenzisi (PDF)
2.0 I-DMA Accelerator Functional Unit (AFU) Umhlahlandlela Womsebenzisi

Umlando Wokubuyekeza Idokhumenti Ye-DMA Accelerator Functional Unit Umhlahlandlela Womsebenzisi

 

Inguqulo Yedokhumenti

I-Intel Acceleration Inguqulo yesitaki  

Izinguquko

 

 

2020.08.03

2.0.1 (isekelwa yi-Intel

I-Quartus® Prime Pro Edition 19.2)

 

Ulungise isithombe se-AF file igama esigabeni Ukuhlanganisa i-DMA AFU Example.

 

 

2020.04.17

2.0.1 (isekelwa yi-Intel

I-Quartus Prime Pro Edition Edition 19.2)

 

 

Ulungise isitatimende ku Izilaleli Ezihlosiwe ingxenye.

 

 

2020.02.20

2.0.1 (isekelwa yi-Intel

I-Quartus Prime Pro Edition Edition 19.2)

 

 

I-typo elungisiwe.

 

 

 

 

2019.11.04

 

 

2.0.1 (isekelwa yi-Intel

I-Quartus Prime Pro Edition Edition 19.2)

• Kushintshwe i-fpgaconf nge-fpgasupdate lapho kulungiselelwa i-FPGA nge-AFU eyakhiwe ngaphambilini esigabeni Ukusebenzisa i-DMA AFU Example.

• Kwengezwe umbhalo ongezansi Intel FPGA Programmable Acceleration Card D5005 esihlokweni sedokhumenti.

• Okuhlukile kwemvelo okungeziwe $OPAE_PLATFORM_ROOT.

• Isigaba esishintshiwe I-Software Programming Model ukuhlela okuncane.

• Kwengezwe isigaba esisha Ukuhlanganisa i-DMA AFU Example.

• Isigaba esishintshiwe Ukuthuthukisa Ukusebenza Kwe-DMA Okuthuthukisiwe ukuhlela okuncane.

 

 

2019.08.05

2.0 (isekelwa yi-Intel

I-Quartus Prime Pro Edition 18.1.2)

 

 

Ukukhishwa kokuqala.

Inkampani ye-Intel Wonke Amalungelo Agodliwe. I-Intel, ilogo ye-Intel, nezinye izimpawu ze-Intel yizimpawu zokuthengisa ze-Intel Corporation noma izinkampani ezingaphansi kwayo. I-Intel iqinisekisa ukusebenza kwe-FPGA yayo kanye nemikhiqizo ye-semiconductor ekucacisweni kwamanje ngokuvumelana newaranti evamile ye-Intel, kodwa igodla ilungelo lokwenza izinguquko kunoma imiphi imikhiqizo namasevisi nganoma yisiphi isikhathi ngaphandle kwesaziso. I-Intel ayithathi mthwalo noma isikweletu esivele ngenxa yesicelo noma ukusetshenziswa kwanoma yiluphi ulwazi, umkhiqizo, noma isevisi echazwe lapha ngaphandle kwalapho okuvunyelwene ngakho ngokubhaliwe yi-Intel. Amakhasimende e-Intel ayelulekwa ukuthi athole inguqulo yakamuva yokucaciswa kwedivayisi ngaphambi kokuthembela kunoma yiluphi ulwazi olushicilelwe nangaphambi kokufaka ama-oda emikhiqizo noma amasevisi.

  • Amanye amagama namabhrendi angafunwa njengempahla yabanye.

 

Amadokhumenti / Izinsiza

Intel FPGA Programmable Acceleration Card D5005 [pdf] Umhlahlandlela Womsebenzisi
I-FPGA Programmable Acceleration Card, D5005, FPGA Programmable Acceleration Card D5005, DMA Accelerator Functional Unit

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