Kaadị ngwa ngwa ngwa nke Intel FPGA D5005 ntuziaka onye ọrụ

Akwụkwọ a na-akọwa mmejuputa ohere ebe nchekwa ozugbo (DMA) Accelerator Functional Unit (AFU) yana otu esi arụ ọrụ iji rụọ ọrụ na ngwaike ma ọ bụ na simulation.

Ndị na-ege ntị e bu n'obi

Ndị na-ege ntị e bu n'obi gụnyere ngwaike ma ọ bụ ndị nrụpụta ngwanrọ chọrọ Ọrụ Accelerator (AF) iji chekwaa data mpaghara na ebe nchekwa ejikọrọ na ngwaọrụ Intel FPGA.

Mgbakọ

Mgbakọ akwụkwọ

Mgbakọ	Nkọwa
#	Buru iwu na-egosi na a ga-etinye iwu ahụ ka mgbọrọgwụ.
$	Na-egosi na a ga-etinye iwu ka onye ọrụ.
Nke a font	FileA na-ebipụta aha, iwu na mkpụrụokwu na mkpụrụedemede a. A na-ebipụta ahịrị iwu ogologo na mkpụrụedemede a. Ọ bụ ezie na ahịrị iwu ogologo nwere ike kechie na ahịrị na-esote, nloghachi abụghị akụkụ nke iwu ahụ; adịghị pịa tinye.
	Na-egosi ederede idobe nke pụtara n'etiti brackets n'akuku ga-eji uru dabara adaba dochie ya. Abanyela brackets n'akuku.

Mkpebiri

Mkpebiri	Mgbasawanye	Nkọwa
AF	Ọrụ ngwa ngwa	Onyonyo ngwa ngwa ngwa ngwa achịkọtara etinyere na mgbagha FPGA nke na-eme ngwa ngwa.
AFU	Ngalaba na-arụ ngwa ngwa	Akụrụngwa ngwaike emejuputa atumatu na FPGA mgbako nke na-ebuli ọrụ mgbako maka ngwa sitere na CPU iji kwalite arụmọrụ.
API	Ngwa mmemme Interface	Otu nkọwa nke subroutine, protocol, na ngwa ọrụ maka iwulite ngwa ngwanrọ.
CCI-P	Interface cache isi	CCI-P bụ ọkọlọtọ interface AFU na-eji na-ekwurịta okwu na onye ọbịa.
DFH	Isi ihe njirimara ngwaọrụ	Na-emepụta ndepụta ejikọrọ nke nkụnye eji isi mee iji nye ụzọ mgbakwụnye atụmatụ.
*gara n'ihu…*

Ụlọ ọrụ Intel. Ikike niile echekwabara. Intel, akara Intel, na akara Intel ndị ọzọ bụ ụghalaahịa nke Intel Corporation ma ọ bụ ndị enyemaka ya. Intel nyere ikike ịrụ ọrụ nke FPGA na ngwaahịa semiconductor na nkọwapụta ugbu a dịka akwụkwọ ikike ọkọlọtọ Intel siri dị, mana nwere ikike ịme mgbanwe na ngwaahịa na ọrụ ọ bụla n'oge ọ bụla na-enweghị ọkwa. Intel anaghị ewere ọrụ ọ bụla ma ọ bụ ụgwọ sitere na ngwa ma ọ bụ iji ozi ọ bụla, ngwaahịa ma ọ bụ ọrụ akọwara n'ime ebe a belụsọ dị ka Intel kwetara na ederede. A dụrụ ndị ahịa Intel ọdụ ka ha nweta ụdị nkọwa ngwaọrụ kachasị ọhụrụ tupu ha adabere na ozi ọ bụla ebipụtara yana tupu ịnye iwu maka ngwaahịa ma ọ bụ ọrụ. * Enwere ike ịzọrọ aha na akara ndị ọzọ dị ka ihe onwunwe nke ndị ọzọ.

Mkpebiri	Mgbasawanye	Nkọwa
FIM	Onye njikwa interface FPGA	Akụrụngwa FPGA nwere FPGA Interface Unit (FIU) na oghere mpụga maka ebe nchekwa, ịkparịta ụka n'Ịntanet, wdg. Ọrụ Accelerator (AF) na FIM na-emekọrịta ihe n'oge ọsọ.
FIU	Ngalaba Interface FPGA	FIU bụ ikpo okwu interface oyi akwa nke na-eme dị ka àkwà mmiri n'etiti ikpo okwu interfaces dị ka PCIe *, UPI na AFU-n'akụkụ interfaces dị ka CCI-P.
MPF	Ụlọ ọrụ Njirimara ebe nchekwa	MPF bụ Basic Building Block (BBB) nke AFU nwere ike iji nye ọrụ nhazi okporo ụzọ CCI-P maka azụmahịa na FIU.

Nkọwa okwu ngwa ngwa

Stack osooso maka Intel® Xeon® CPU nwere nkọwa nkọwa FPGA

Oge	Mbiri	Nkọwa
Stack Intel® Acceleration maka Intel Xeon® CPU nwere FPGA	Ngwunye osooso	Nchịkọta sọftụwia, ngwa ngwa, na ngwa ọrụ na-enye njikọ kachasị arụ ọrụ n'etiti Intel FPGA na ihe nrụpụta Intel Xeon.
Kaadị ngwa ngwa ngwa ngwa nke Intel FPGA	Intel FPGA PAC	kaadị PCIe FPGA ngwa ngwa. Nwere FPGA Interface Manager (FIM) nke jikọtara ya na ihe nrụpụta Intel Xeon n'elu bọs PCIe.

Ntuziaka onye ọrụ nke otu DMA Accelerator na-arụ ọrụ: Kaadị nkwalite mmemme Intel FPGA D5005

Nkọwa DMA AFU

Okwu mmalite

The Direct Memory Access (DMA) AFU example na-egosi ka esi jikwaa ebe nchekwa na-enyefe n'etiti host processor na FPGA. Ị nwere ike itinye DMA AFU n'ime imewe gị iji bugharịa data n'etiti ebe nchekwa onye ọbịa na ebe nchekwa mpaghara FPGA. DMA AFU nwere submodules ndị a:

Ụlọ ọrụ Ngwongwo Nchekwa (MPF) Ngwongwo Ihe Nrụpụta (BBB)

Interface Cache Core (CCI-P) gaa na nkwụnye ebe nchekwa Avalon® ebe nchekwa (Avalon-MM)
Sistemụ ule DMA nke nwere DMA BBB

A kọwapụtara submodules ndị a n'ụzọ zuru ezu na isiokwu DMA AFU Hardware Components n'okpuru.

Ozi metụtara

Ngwa ngwaike DMA AFU na ibe 6
Nkọwapụta Interface Avalon

Maka ozi ndị ọzọ gbasara ụkpụrụ Avalon-MM, gụnyere eserese oge maka ịgụ na ide azụmahịa.

Ihe ngwugwu ngwanrọ DMA AFU

Stack Acceleration Intel maka Intel Xeon CPU nwere ngwugwu FPGA file (*.tar.gz), gụnyere DMA AFU example. Nke a example na-enye onye ọkwọ ụgbọ ala ohere ọrụ. Ngwa nnabata na-eji ọkwọ ụgbọ ala a nke na DMA na-ebugharị data n'etiti onye ọbịa na ebe nchekwa FPGA. ọnụọgụ abụọ ngwaike, isi mmalite na ọkwọ ụgbọ ala onye ọrụ dị na ndekọ na-esonụ: $ OPAE_PLATFORM_ROOT/hw/samples/dma_afu . Tupu ịnwale DMA AFU, ị ga-etinyerịrị ngwugwu ngwanrọ Open Programmable Acceleration Engine (OPAE). Rụtụ aka na ịwụnye ngwugwu sọftụwia OPAE na ntuziaka mmalite ngwa ngwa Intel Acceleration Stack maka Intel FPGA Programmable Acceleration Card D5005 maka ntuziaka nwụnye. Ntuziaka mmalite ngwa ngwa a tinyekwara ozi bụ isi gbasara Open Programmable Acceleration Engine (OPAE) yana ịhazi AFU. Mgbe ị wụnye ngwugwu ngwanrọ Open Programmable Acceleration Engine (OPAE), dịkaampngwa le ọbịa na onye ọkwọ ụgbọ ala DMA AFU dị na ndekọ na-esonụ: $ OPAE_PLATFORM_ROOT/hw/samples/dma_afu/sw. Iji gbaa sample host ngwa, fpga_dma_test na ngwaike Intel FPGA PAC D5005 gị, rụtụ aka na usoro dị na ngalaba Na-agba ọsọ DMA AFU Ex.ample. Ụlọ ọrụ Intel. Ikike niile echekwabara. Intel, akara Intel, na akara Intel ndị ọzọ bụ ụghalaahịa nke Intel Corporation ma ọ bụ ndị enyemaka ya. Intel nyere ikike ịrụ ọrụ nke FPGA na ngwaahịa semiconductor na nkọwapụta ugbu a dịka akwụkwọ ikike ọkọlọtọ Intel siri dị, mana nwere ikike ịme mgbanwe na ngwaahịa na ọrụ ọ bụla n'oge ọ bụla na-enweghị ọkwa. Intel anaghị ewere ọrụ ọ bụla ma ọ bụ ụgwọ sitere na ngwa ma ọ bụ iji ozi ọ bụla, ngwaahịa ma ọ bụ ọrụ akọwara n'ime ebe a belụsọ dị ka Intel kwetara na ederede. A dụrụ ndị ahịa Intel ọdụ ka ha nweta ụdị nkọwa ngwaọrụ kachasị ọhụrụ tupu ha adabere na ozi ọ bụla ebipụtara yana tupu ịnye iwu maka ngwaahịa ma ọ bụ ọrụ. * Enwere ike ịzọrọ aha na akara ndị ọzọ dị ka ihe onwunwe nke ndị ọzọ.

Ozi metụtara

Ntuziaka mmalite ngwa ngwa nke Intel Acceleration Stack maka Intel FPGA Ngwa ngwa ngwa Kaadị D5005
Ịwụnye ngwugwu ngwanrọ OPAE

Ngwa ngwaike DMA AFU

Oghere DMA AFU nwere FPGA Interface Unit (FIU) na ebe nchekwa FPGA. Rụtụ aka na mpempe akwụkwọ data njikwa FPGA Interface maka Intel FPGA Programmable Acceleration Card D5005 maka nkọwa zuru ezu nke ebe nchekwa FPGA. Ngwaike dị ugbu a na-ekpebi nhazi ebe nchekwa a. Ngwaike n'ọdịnihu nwere ike ịkwado nhazi ebe nchekwa dị iche iche. Ị nwere ike iji DMA AFU idetu data n'etiti ebe ndị a na ebe ị ga-aga:

Onye ọbịa na ebe nchekwa FPGA ngwaọrụ
Ebe nchekwa FPGA ngwaọrụ nye onye ọbịa

Sistemụ nrụpụta Platform, $ OPAE_PLATFORM_ROOT/hw/samples/ dma_afu/hw/rtl/TEST_dma/ /dma_test_system.qsys na-arụ ọtụtụ n'ime DMA

AFU. Akụkụ nke DMA AFU emejuputa atumatu na Platform Designer usoro nwere ike ịhụ na ndị a

ọnọdụ:$OPAE_PLATFORM_ROOT/hw/samples/dma_afu/hw/rtl/TEST_dma/ Ị nwere ike ịhụ DMA BBB na ebe a:

$ OPAE_PLATFORM_ROOT/hw/samples/dma_afu/hw/rtl/dma_bbb

Ntuziaka onye ọrụ nke otu DMA Accelerator na-arụ ọrụ: Kaadị nkwalite mmemme Intel FPGA D5005

Ihe eserese nke DMA AFU Hardware Block

DMA AFU gụnyere modul dị n'ime ndị a iji jiri FPGA Interface Unit (FIU):

Ebe nchekwa IO (MMIO) Decoder Logic: na-achọpụta MMIO ịgụ na dee azụmahịa wee kewapụ ha na ọwa CCI-P RX 0 nke ha rutere. Nke a na-achọpụta na okporo ụzọ MMIO anaghị erute MPF BBB yana ọwa iwu MMIO nọọrọ onwe ya na-arụ ya.
Ebe nchekwa Properties Factory (MPF): Modul a na-ahụ na ịgụ nzaghachi sitere na nloghachi DMA n'usoro e nyere ha. Usoro Avalon-MM chọrọ ịgụ nzaghachi iji laghachi n'usoro ziri ezi.
CCI-P na Avalon-MM Adapter: Modul a sụgharịrị n'etiti azụmahịa CCI-P na Avalon-MM, dịka ndị a:
CCI-P na Avalon-MMIO Adapter: Ụzọ a na-atụgharị azụmahịa CCI-P MMIO ka ọ bụrụ azụmahịa Avalon-MM.
Avalon to CCI-P Host Adapter: Ụzọ ndị a na-emepụta naanị ụzọ ọgụgụ na ide naanị maka DMA iji nweta ebe nchekwa nnabata.
Sistemụ ule DMA: Modul a na-eje ozi dị ka ihe mkpuchi gburugburu DMA BBB iji kpughee ndị isi DMA na mgbagha ndị ọzọ na AFU. Ọ na-enye interface n'etiti DMA BBB na CCI-P na Avalon Adapter. Ọ na-enyekwa ihu n'etiti DMA BBB na ụlọ akụ FPGA SDRAM mpaghara.

Ozi metụtara
Mpempe akwụkwọ data njikwa interface FPGA maka Kaadị ngwa ngwa ngwa ngwa nke Intel FPGA D5005

Sistemụ ule DMA

Usoro ule DMA na-ejikọta DMA BBB na ihe ndị ọzọ nke FPGA gụnyere mgbanwe CCI-P na ebe nchekwa FPGA mpaghara.

Eserese ngọngọ Sistemụ Nnwale DMA
Eserese ngọngọ a na-egosi ihe dị n'ime nke sistemu ule DMA. E gosipụtara usoro ule DMA dị ka ngọngọ monolithic na eserese 1 na ibe 7.

Usoro ule DMA gụnyere modul ime ndị a:

Far Reach Bridge/Pipeline Bridge: Akwa pipeline nke nwere ike imezigharị agụnyere iji chịkwaa topology ma melite imewe Fmax.

Isi ihe njiri mara ngwaọrụ DMA AFU (DFH): Nke a bụ DFH maka DMA AFU. DFH a na-atụ aka na DFH na-esote nke dị na nkwụsị 0x100 (DMA BBB DFH).
Ọ dịghị DFH: Akụkụ a na-akwụsị ndepụta njikọ DFH. Ọ bụrụ na ị gbakwunye DMA BBBs na imewe ahụ, hụ na adreesị ntọala DFH efu dị na njedebe nke ndepụta njikọ DFH.
MA Basic Building Block (BBB): Ihe mgbochi a na-akpali data n'etiti onye ọbịa na ebe nchekwa FPGA mpaghara. Ọ na-enwetakwa ebe nchekwa nnabata iji nweta ụdọ nkọwa.

DMA BBB

Sistemụ DMA BBB na-ebufe data site na isi iyi gaa na adreesị ebe aga site na iji azụmahịa Avalon-MM. Onye ọkwọ ụgbọ ala DMA na-ejikwa DMA BBB site na ịnweta njikwa na ndekọ ọkwa nke ihe dị iche iche dị n'ime sistemụ. Onye ọkwọ ụgbọ ala DMA na-ejikwa DMA BBB site na iji ebe nchekwa ekekọrịtara iji kparịta ndị nkọwa mbufe. DMA BBB na-enweta data na ebe nchekwa FPGA na nkwụsị 0x0. DMA BBB na-enweta data na nkọwa na ebe nchekwa nnabata na 0x1_0000_0000_0000.

DMA BBB Platform Designer Block Eserese
Eserese ngọngọ a na-ewepu ụfọdụ cores Pipeline Bridge IP.

Ntuziaka onye ọrụ nke otu DMA Accelerator na-arụ ọrụ: Kaadị nkwalite mmemme Intel FPGA D5005

Nkọwa DMA AFU

Ihe ndị dị na DMA BBB Platform Designer na-arụ ọrụ ndị a:

Akwa Far Reach Bridge/Pipeline Bridge: Àkwà mmiri pipeline nwere latency a na-agbanwe agbanwe gụnyere iji chịkwaa topology ma melite imewe Fmax.
MA BBB DFH: Nke a bụ nkụnye eji isi mee ihe maka DMA BBB. DFH a na-atụ aka na DFH na-esote nke dị na nkwụsị 0x100 (Null DFH).
Nkọwapụta Frontend: Ọ dịịrị maka ị nweta ndị nkọwa na ibufe ha na Dispatcher. Mgbe mbufe DMA mezuru, frontend na-enweta nhazi ọkwa site na Dispatcher wee degharịa nkọwa na ebe nchekwa nnabata.

Onye nzipu: Ihe mgbochi a na-ahazi nhazigharị DMA na-ebufe arịrịọ na Gụọ na dee Master.
Gụọ Nna-ukwu: Ihe mgbochi a na-ahụ maka ịgụ data sitere na ebe nchekwa FPGA nke onye ọbịa ma ọ bụ nke mpaghara wee ziga ya dị ka data nkwanye na Dee Master.
Dee Master: Ihe mgbochi a na-ahụ maka ịnata data nkwanye sitere na Read Master na ide ihe dị n'ime ya iji kwado ma ọ bụ ebe nchekwa FPGA mpaghara.

Debanye aha maapụ na oghere adreesị

DMA AFU na-akwado ebe nchekwa abụọ views: DMA view na onye ọbịa view. DMA view na-akwado oghere adreesị 49-bit. Ọkara ala nke DMA view maapụ gaa na ebe nchekwa FPGA mpaghara. Ọkara elu nke DMA view map iji kwado ebe nchekwa. Onye nnabata ọbịa view na-agụnye ndekọ niile a na-enweta site na ịnweta MMIO dị ka tebụl DFH, na ndekọ njikwa / ọnọdụ nke ụdị IP dị iche iche ejiri n'ime DMA AFU. MMIO debara aha na DMA BBB na AFU nkwado 32- na 64-bit ohere. DMA AFU anaghị akwado ohere MMIO 512-bit. Ịnweta na ndekọ Dispatcher n'ime DMA BBB ga-abụrịrị 32 bits (Descriptor frontend na-arụ ọrụ ndekọ 64-bit).

Map ndebanye aha DMA AFU

Map ndebanye aha DMA AFU na-enye adreesị zuru oke nke ebe niile dị n'ime ngalaba ahụ. Ndebanye aha ndị a dị na onye ọbịa view n'ihi na ọ bụ naanị onye ọbịa nwere ike ịnweta ha.

Map ebe nchekwa DMA AFU

Adreesị Byte kwụsịrị	Aha	Ogologo oge na Bytes	Nkọwa
0x0	DMA AFU DFH	0x40	nkụnye eji isi mee ihe maka DMA AFU. Edere ID_L ka ọ bụrụ 0x9081f88b8f655caa na ID_H ka atọrọ ka 0x331db30c988541ea. Emebere DMA AFU DFH ka ọ rụtụ aka iji mebie 0x100 iji chọta DFH na-esote (DMA BBB DFH). Ị ga-agbanweghị isi adreesị nke DMA AFU DFH ebe ọ ga-adị na adreesị 0x0 dị ka CCIP nkọwapụta.
0x100	DMA BBB	0x100	Na-akọwapụta njikwa DMA BBB interface yana ndebanye aha ọkwa. Ị nwere ike ịtu aka na maapụ ndebanye aha DMA BBB maka ozi ndị ọzọ. N'ime DMA BBB na nkwụsị 0 DMA BBB gụnyere DFH nke ya. Edebere DFH a ka ọ chọta DFH na-esote na 0x100 (NULL DFH). Ọ bụrụ na ị gbakwunye DMA BBB ọzọ, debe ha 0x100 iche wee hụ na NULL DFH na-esote DMA ikpeazụ site na 0x100.
0x200	FULL DFH	0x40	Kwụsị ndepụta njikọ DFH. Edere ID_L ka ọ bụrụ 0x90fe6aab12a0132f na ID_H ka edobere 0xda1182b1b3444e23. Emebere NULL DFH ka ọ bụrụ DFH ikpeazụ na ngwaike. N'ihi nke a, NULL DFH dị na adreesị 0x200. Ọ bụrụ na ị gbakwunye DMA BBBs na sistemụ, ị ga-ebuli adreesị ntọala NULL DFH ka ọ nọrọ na adreesị kacha elu. Onye ọkwọ ụgbọ ala DMA na ngwa ule anaghị eji ngwaike a.

Debanye aha maapụ na oghere adreesị

DMA BBB Map ebe nchekwa
Adreesị byte ndị a bụ nkwụghachi ụgwọ sitere na adreesị ntọala DMA BBB na sistemụ DMA AFU (0x100).

Adreesị Byte kwụsịrị	Aha	Ogologo oge na Bytes	Nkọwa
0x0	DMA BBB DFH	0x40	nkụnye eji isi mee ihe maka DMA AFU. Edere ID_L ka ọ bụrụ 0xa9149a35bace01ea yana ID_H ka edobere 0xef82def7f6ec40fc. Emebere DMA BBB DFH ka ọ tụọ aka na 0x100 maka nkwụghachi DFH na-esote. Nkwụghachi nke ọzọ nwere ike ịbụ DMA BBB ọzọ, DFH ọzọ (anaghị etinye ya na imewe a), ma ọ bụ NULL DFH.
0x40	Onye ozi	0x40	Ọdụ ụgbọ mmiri njikwa maka onye na-ezipụ ya. Onye ọkwọ ụgbọ ala DMA na-eji ebe a jikwaa DMA ma ọ bụ jụọ ọkwa ya.
0x80	Nkọwapụta Frontend	0x40	Nkọwapụta frontend bụ ngwa ọdịnala na-agụ nkọwa sitere na ebe nchekwa nnabata wee degharịa nkọwa mgbe mbufe DMA gwụchara. Onye ọkwọ ụgbọ ala na-eduzi frontend ebe onye nkọwa mbụ bi na ebe nchekwa nnabata wee na-agwa onye ọkwọ ụgbọ ala okwu n'ụzọ bụ isi n'agbanyeghị na echekwara nkọwa na ebe nchekwa nnabata.

Oghere adreesị DMA AFU

Onye ọbịa ahụ nwere ike ịnweta ndekọ ndị e depụtara na Tebụl 4 na ibe 12 na Tebụl 5 na ibe 13. Usoro DMA BBB nwere ohere ịnweta oghere adreesị 49-bit zuru ezu. Ọkara ala nke oghere adreesị a gụnyere ncheta FPGA mpaghara. Ọkara elu nke oghere adreesị a gụnyere ebe nchekwa adreesị nnabata 48-bit. Ọnụ ọgụgụ na-esonụ na-egosi onye ọbịa na DMA views nke ebe nchekwa.

DMA AFU na onye ọbịa Views nke ebe nchekwa

Ihe ejikọrọ nkụnye eji isi mee ngwaọrụ

DMA AFU imewe example nwere atọ ngwaọrụ atụmatụ nkụnye eji isi mee (DFH) na-etolite a jikọtara ndepụta. Ndepụta njikọ a na-enye ohere sample ngwa iji chọpụta DMA AFU yana onye ọkwọ ụgbọ ala iji chọpụta DMA BBB. Ndepụta DFH gụnyere NULL DFH na njedebe. Ntinye nke DFH efu na njedebe nke ndepụta ejikọtara na-enye gị ohere itinyekwu DMA BBB na nhazi gị. Naanị ị ga-ebuga NULL DFH gaa na adreesị ma BBB ndị ọzọ gachara. DMA BBB ọ bụla na-atụ anya na DFH na-esote ga-adị 0x100 bytes site na adreesị ntọala nke BBB. Onu ogugu a na-egosi ndepụta ejikọtara maka imewe DMA AFU example.

Debanye aha maapụ na oghere adreesị

Njikere Njikere Ngwaọrụ DMA AFU (DFH).

Ihe Nlereanya Mmemme Software

DMA AFU gụnyere onye ọkwọ ụgbọ ala ngwanrọ ị nwere ike iji na ngwa nnabata nke gị. Ihe fpga_dma.cpp na fpga_dma.h files dị na ebe a mejuputa onye ọkwọ ụgbọ ala:$OPAE_PLATFORM_ROOT/hw/samples/dma_afu/sw Onye ọkwọ ụgbọ ala na-akwado ọrụ ndị a:

API	Nkọwa
fpgaCountDMAChannels	Na-enyocha yinye atụmatụ ngwaọrụ maka DMA BBB wee gụọ ọwa niile dị.
fpgaDMA mepere	Mepee aka na ọwa DMA.
fpgaDMAC kwụsịrị	Na-emechi aka na ọwa DMA.
fpgaDMATnsferInit	Na-ebido ihe na-anọchi anya mbufe DMA.
fpgaDMAT na-emegharị nrụpụta	Tọgharịa ihe nfefe DMA ka ọ bụrụ ụkpụrụ ndabara.
fpgaDMAT nwere ike ibibi	Na-ebibi ihe njiri mara mbufe DMA.
fpgaDMATransferSetSrc	Na-edozi adreesị isi iyi nke mbufe. Adreesị a ga-ahazirịrị 64 byte.
fpgaDMATnsferSetDst	Hazie adreesị ebe mbufe ga-aga. Adreesị a ga-ahazirịrị 64 byte.
fpgaDMATnsferSetLen	Na-edozi ogologo mbufe na bytes. Maka mbufe na-abụghị ngwugwu, ị ga-edobe ogologo mbufe ka ọ bụrụ ọnụọgụ nke 64 bytes. Maka mbufe ngwugwu, nke a abụghị ihe achọrọ.
fpgaDMATnsferSetTransferỤdị	Na-ahazi ụdị mbufe. Ụkpụrụ iwu bụ: • HOST_MM_TO_FPGA_MM = TX (Onye ọbịa na AFU) • FPGA_MM_TO_HOST_MM = RX (AFU ga-anabata)
fpgaDMATnsferSetTransferCallback	Na-edebanye ahaghachi oku maka ọkwa maka mmecha mbufe asynchronous. Ọ bụrụ na ị kọwapụta oku azụ, fpgaDMATransfer ga-alaghachi ozugbo (nbufe na-ejikọtaghị ọnụ). Ọ bụrụ na ị kọwapụtaghị oku alọghachi, fpgaDMATransfer ga-alaghachi mgbe mbufe zuru ezu (nfefe mekọrịta/ igbochi).
fpgaDMATnsferSet Ikpeazụ	Na-egosi mbufe ikpeazụ ka DMA nwee ike ịmalite nhazi mbufe ewepụtara. Uru ndabara bụ 64 na-enyefe na pipeline tupu DMA amalite ịrụ ọrụ na nnyefe.
fpgaDMAT enyefe	Na-eme mbufe DMA.

Maka ozi ndị ọzọ gbasara API, ntinye, na arụmụka mmepụta, rụtụ aka na nkụnye eji isi mee file dị $ OPAE_PLATFORM_ROOT/hw/samples/dma_afu/sw/fpga_dma.hIntel Corporation. Ikike niile echekwabara. Intel, akara Intel, na akara Intel ndị ọzọ bụ ụghalaahịa nke Intel Corporation ma ọ bụ ndị enyemaka ya. Intel nyere ikike ịrụ ọrụ nke FPGA na ngwaahịa semiconductor na nkọwapụta ugbu a dịka akwụkwọ ikike ọkọlọtọ Intel siri dị, mana nwere ikike ịme mgbanwe na ngwaahịa na ọrụ ọ bụla n'oge ọ bụla na-enweghị ọkwa. Intel anaghị ewere ọrụ ọ bụla ma ọ bụ ụgwọ sitere na ngwa ma ọ bụ iji ozi ọ bụla, ngwaahịa ma ọ bụ ọrụ akọwara n'ime ebe a belụsọ dị ka Intel kwetara na ederede. A dụrụ ndị ahịa Intel ọdụ ka ha nweta ụdị nkọwa ngwaọrụ kachasị ọhụrụ tupu ha adabere na ozi ọ bụla ebipụtara yana tupu ịnye iwu maka ngwaahịa ma ọ bụ ọrụ. Enwere ike ịzọrọ aha na akara ndị ọzọ dị ka ihe onwunwe nke ndị ọzọ.

Ihe Nlereanya Mmemme Software

Ka ịmatakwu maka ụdị eji ọkwọ ụgbọ ala sọftụwia, rụtụ aka na README file dị na $OPAE_PLATFORM_ROOT/hw/samples/dma_afu/README.md

Na-agba ọsọ DMA AFU Example

Tupu ịmalite:

Ị kwesịrị ịma na examples na Intel Acceleration Stack Quick Start Guide for Intel FPGA Programmable Acceleration Card D5005.
Ị ga-akọwarịrị mgbanwe gburugburu ebe obibi. Ngbanwe gburugburu ebe obibi dabere na ụdị Intel Acceleration Stack ị na-eji:
- Maka ụdị dị ugbu a, tọọ mgbanwe gburugburu ka ọ bụrụ $OPAE_PLATFORM_ROOT
Ị ga-etinyerịrị ọba akwụkwọ Intel Threading Building Blocks (TBB) ebe ọ bụ na onye ọkwọ ụgbọ ala DMA dabere na ya.
Ị ga-edozikwa ibe abụọ 1 GB iji mee sample ngwa. $ sudo sh -c “echo 2> /sys/kernel/mm/hugepages/hugepages-1048576kB/ nr_hugepages”

Mee usoro ndị a iji budata DMA Accelerator Function (AF) bitstream, iji wuo ngwa na ọkwọ ụgbọ ala, yana iji mee ihe ngosi ahụ.ampLe:

Gbanwee na ngwa DMA na ndekọ ọkwọ ụgbọala: cd $ OPAE_PLATFORM_ROOT/hw/samples/dma_afu/sw
Mee onye ọkwọ ụgbọ ala na ngwa: mee

Budata DMA AFU bitstream: sudo fpgasupdate ../bin/dma_afu_unsigned.gbs
Mezue ngwa nnabata iji dee 100 MB na akụkụ 1 MB site na ebe nchekwa ngwaọrụ gaa na ebe nchekwa ngwaọrụ FPGA wee gụọ ya azụ: ./fpga_dma_test -s 104857600 -p 1048576 -r mtom

Ozi metụtara
Ntuziaka mmalite ngwa ngwa nke Intel Acceleration Stack maka Intel FPGA Programmable Acceleration Card D5005 Intel Corporation. Ikike niile echekwabara. Intel, akara Intel, na akara Intel ndị ọzọ bụ ụghalaahịa nke Intel Corporation ma ọ bụ ndị enyemaka ya. Intel nyere ikike ịrụ ọrụ nke FPGA na ngwaahịa semiconductor na nkọwapụta ugbu a dịka akwụkwọ ikike ọkọlọtọ Intel siri dị, mana nwere ikike ịme mgbanwe na ngwaahịa na ọrụ ọ bụla n'oge ọ bụla na-enweghị ọkwa. Intel anaghị ewere ọrụ ọ bụla ma ọ bụ ụgwọ sitere na ngwa ma ọ bụ iji ozi ọ bụla, ngwaahịa ma ọ bụ ọrụ akọwara n'ime ebe a belụsọ dị ka Intel kwetara na ederede. A dụrụ ndị ahịa Intel ọdụ ka ha nweta ụdị nkọwa ngwaọrụ kachasị ọhụrụ tupu ha adabere na ozi ọ bụla ebipụtara yana tupu ịnye iwu maka ngwaahịa ma ọ bụ ọrụ. * Enwere ike ịzọrọ aha na akara ndị ọzọ dị ka ihe onwunwe nke ndị ọzọ.

Na-achịkọta DMA AFU Example

Iji mepụta gburugburu ebe nrụpụta njikọ iji chịkọta AF, jiri iwu afu_synth_setup dị ka ndị a:

Gbanwee na DMA AFU sampakwụkwọ ndekọ aha: $ OPAE_PLATFORM_ROOT/hw/samples/dma_afu
Mepụta ndekọ ihe nrụpụta imewe: afu_synth_setup –source hw/rtl/filelist.txt build_synth

Site na nhazi ndekọ aha nke afu_synth_setup mepụtara, tinye iwu ndị a site na windo ọnụ iji mepụta AF maka ikpo okwu ngwaike ebumnuche: cd build_synth run.sh Edemede run.sh AF na-emepụta onyonyo AF nwere otu isi. fileaha dị ka nhazi ikpo okwu AFU file (.json) nwere suffix .gbs na ebe:$OPAE_PLATFORM_ROOT/hw/samples/build_synth/dma_afu_s10.gbs Intel Corporation. Ikike niile echekwabara. Intel, akara Intel, na akara Intel ndị ọzọ bụ ụghalaahịa nke ụlọ ọrụ Intel ma ọ bụ ndị enyemaka ya. Intel nyere ikike ịrụ ọrụ nke FPGA na ngwaahịa semiconductor na nkọwapụta ugbu a dịka akwụkwọ ikike ọkọlọtọ Intel siri dị, mana nwere ikike ịme mgbanwe na ngwaahịa na ọrụ ọ bụla n'oge ọ bụla na-enweghị ọkwa. Intel anaghị ewere ọrụ ọ bụla ma ọ bụ ụgwọ sitere na ngwa ma ọ bụ iji ozi ọ bụla, ngwaahịa ma ọ bụ ọrụ akọwara n'ime ebe a belụsọ dị ka Intel kwetara na ederede. A dụrụ ndị ahịa Intel ọdụ ka ha nweta ụdị nkọwa ngwaọrụ kachasị ọhụrụ tupu ha adabere na ozi ọ bụla ebipụtara yana tupu ịnye iwu maka ngwaahịa ma ọ bụ ọrụ. * Enwere ike ịzọrọ aha na akara ndị ọzọ dị ka ihe onwunwe nke ndị ọzọ.

Na-eme ka AFU Example

Intel na-atụ aro ka ị rụtụ aka na ngalaba mmekọ nke Intel Accelerator Functional Unit (AFU) Environment Environment (ASE) Ntuziaka mmalite ngwa ngwa maka Intel FPGA PAC gị ka ị mara nke ọma ịme emume yiri nke ahụ.amples na hazie gburugburu gị. Tupu ịga n'ihu na usoro ndị a, chọpụta na edobere mgbanwe gburugburu OPAE_PLATFORM_ROOT na ndekọ nwụnye OPAE SDK. Mezue usoro ndị a iji dozie simulator ngwaike maka DMA AFU:

Gbanwee na DMA AFU sampakwụkwọ ndekọ aha: cd $ OPAE_PLATFORM_ROOT/hw/samples/dma_afu

Mepụta gburugburu ASE na ndekọ ọhụrụ wee hazie ya maka ịmegharị AFU: afu_sim_setup –source hw/rtl/filelist.txt build_ase_dir
Gbanwee na ndekọ ihe wuo ASE: cd build_ase_dir
Mee onye ọkwọ ụgbọ ala na ngwa: mee

Mee ịme anwansị: mee sim

Sampmmepụta sitere na simulator ngwaike:

[SIM] ** AKWỤKWỌ : Tupu ịmee ngwa ngwanrọ ** [SIM] Tọọ env(ASE_WORKDIR) n'ọnụ ebe ngwa ga-agba ọsọ (copy-and-paste) => [SIM] $ SHELL | Gbaa:[SIM] ———+————————————————— [SIM] bash/zsh | mbupu ASE_WORKDIR=$ OPAE_PLATFORM_ROOT/hw/samples/dma_afu/ase_mkdir/ọrụ [SIM] tcsh/csh | setenv ASE_WORKDIR $ OPAE_PLATFORM_ROOT/hw/samples/dma_afu/ase_mkdir/work [SIM] Maka $SHELL ọ bụla ọzọ, kpọtụrụ onye nchịkwa Linux gị [SIM] [SIM] Dị njikere maka ịme anwansị… [SIM] Pịa CTRL-C iji mechie simulator…

Mezue usoro ndị a iji chịkọta ma mebie ngwa DMA AFU na gburugburu ịme anwansị:

Mepee windo ọnụ ọhụrụ.
Gbanwee ndekọ ka ọ bụrụ: cd $OPAE_PLATFORM_ROOT/hw/samples/dma_afu/sw

Na-eme ka AFU Example

Detuo eriri ntọala gburugburu (họrọ eriri dabara adaba maka shei gị) site na usoro dị n'elu na ịme anwansị ngwaike gaa na windo ọnụ. Hụ ahịrị ndị a na sampmmepụta sitere na simulator ngwaike. [SIM] bash/zsh | mbupu ASE_WORKDIR=$ OPAE_PLATFORM_ROOT/hw/samples/dma_afu/build_ase_dir/ọrụ [SIM] tcsh/csh | setenv ASE_WORKDIR $ OPAE_PLATFORM_ROOT/hw/samples/dma_afu/build_ase_dir/ọrụ
Chịkọta ngwanro: $ mee US_ASE=1

Mezue ngwa nnabata iji dee 4 KB na 1 KB akụkụ site na ebe nchekwa nnabata laghachi na ebe nchekwa ngwaọrụ FPGA na ọnọdụ loopback: ./ fpga_dma_test -s 4096 -p 1024 -r mtom

Ozi metụtara
Ngalaba na-arụ ọrụ ngwa ngwa nke Intel Accelerator (AFU) Environment Environment (ASE) Ntuziaka onye ọrụ mmalite ngwa ngwa

Nkwalite maka ịrụ ọrụ DMA emelitere

Mmejuputa NUMA (nnweta nchekwa nchekwa na-abụghị nke otu) na fpga_dma_test.cpp na-enye onye nrụpụta ohere ịnweta ebe nchekwa mpaghara ya ngwa ngwa karịa ịnweta ebe nchekwa na-abụghị nke mpaghara (ebe nchekwa mpaghara gaa na nhazi ọzọ). E gosipụtara nhazi NUMA na-ahụkarị na eserese dị n'okpuru. Oghere mpaghara na-anọchi anya ịnweta site na isi gaa na ebe nchekwa mpaghara gaa n'otu isi. Nnweta dịpụrụ adịpụ na-egosi ụzọ a na-eme mgbe isi na Node 0 na-enweta ebe nchekwa nke bi na ebe nchekwa dị na mpaghara 1.

Nhazi NUMA a na-ahụkarị

Jiri koodu na-esonụ iji mejuputa njikarịcha NUMA na ngwa ule gị:

// Tọọ mmekọrịta kwesịrị ekwesị ma ọ bụrụ na achọrọ ya ma ọ bụrụ (cpu_affinity || memory_affinity) {unsigned dom = 0, ụgbọ ala = 0, dev = 0, func = 0; fpga_properties props;int retval; # ma ọ bụrụ (FPGA_DMA_DEBUG) char str[4096]; #endifres = fpgaGetProperties(afc_token, & props); ON_ERR_GOTO(res, out_destroy_tok, "fpgaGetProperties"); res = fpgaPropertiesGetBus(props, (uint8_t *) & ụgbọ ala);ON_ERR_GOTO(res, out_destroy_tok, "fpgaPropertiesGetBus"); res = fpgaPropertiesGetDevice (props, (uint8_t *) & dev);ON_ERR_GOTO (res, out_destroy_tok, "fpgaPropertiesGetDevice") res = fpgaPropertiesGetFunction (props, (uint8_t *) & func);ON_ERR_GOTO (res, out_destroy_tok), // Chọta ngwaọrụ site na topology hwloc_topology_t topology; hwloc_topology_init (&topology); hwloc_topology_set_flags(topology, HWLOC_TOPOLOGY_FLAG_IO_DEVICES);Intel Corporation. Ikike niile echekwabara. Intel, akara Intel, na akara Intel ndị ọzọ bụ ụghalaahịa nke ụlọ ọrụ Intel ma ọ bụ ndị enyemaka ya. Intel nyere ikike ịrụ ọrụ nke FPGA na ngwaahịa semiconductor na nkọwapụta ugbu a dịka akwụkwọ ikike ọkọlọtọ Intel siri dị, mana nwere ikike ịme mgbanwe na ngwaahịa na ọrụ ọ bụla n'oge ọ bụla na-enweghị ọkwa. Intel anaghị ewere ọrụ ọ bụla ma ọ bụ ụgwọ sitere na ngwa ma ọ bụ iji ozi ọ bụla, ngwaahịa ma ọ bụ ọrụ akọwara n'ime ebe a belụsọ dị ka Intel kwetara na ederede. A dụrụ ndị ahịa Intel ọdụ ka ha nweta ụdị nkọwa ngwaọrụ kachasị ọhụrụ tupu ha adabere na ozi ọ bụla ebipụtara yana tupu ịnye iwu maka ngwaahịa ma ọ bụ ọrụ. * Enwere ike ịzọrọ aha na akara ndị ọzọ dị ka ihe onwunwe nke ndị ọzọ.

Nkwalite maka ịrụ ọrụ DMA emelitere

hwloc_topology_load (topology); hwloc_obj_t obj = hwloc_get_pcidev_by_busid (topology, dom, bọs, dev, func); hwloc_obj_t obj2 = hwloc_get_non_io_ancestor_obj (topology, obj); #ma ọ bụrụ (FPGA_DMA_DEBUG) hwloc_obj_type_snprintf(str, 4096, obj2, 1); printf("%s\n", str);hwloc_obj_attr_snprintf(str, 4096, obj2, "::", 1);printf("%s\n", str); hwloc_bitmap_taskset_snprintf (str, 4096, obj2-> cpuset); printf("CPUSET bụ %s\n", str); hwloc_bitmap_taskset_snprintf (str, 4096, obj2-> nodeset); printf("NODESET bụ %s\n", str);#endif ma ọ bụrụ (memory_affinity) {#ma ọ bụrụ na HWLOC_API_VERSION> 0x00020000 retval = hwloc_set_membind(topology, obj2->nodeset,HWLOC_MEMBIND_THAD_TEMI YNODESET); # ọzọ retval = hwloc_set_membind_nodeset (topology, obj2-> nodeset, HWLOC_MEMBIND_THREAD, HWLOC_MEMBIND_MIGRATE); #endifON_ERR_GOTO(retval, out_destroy_tok, "hwloc_set_membind"); } ma ọ bụrụ (cpu_affinity) {retval = hwloc_set_cpubind (topology, obj2-> cpuset, HWLOC_CPUBIND_STRICT); ON_ERR_GOTO(retval, out_destroy_tok, "hwloc_set_cpubind"); } }

Ebe nchekwa ntuziaka onye ọrụ DMA Accelerator na-arụ ọrụ

Intel Acceleration Stack Version	Ntuziaka onye ọrụ (PDF)
2.0	Ntuziaka onye ọrụ DMA Accelerator Functional Unit (AFU).

Akụkọ Ndozigharị akwụkwọ maka ntuziaka onye ọrụ na-arụ ọrụ ngwa ngwa DMA

Ụdị akwụkwọ

Intel Acceleration Ụdị nchịkọta

Mgbanwe

2020.08.03

2.0.1 (Intel kwadoro ya

Mbipụta Quartus® Prime Pro 19.2)

Emeziri onyonyo AF file aha na ngalaba Na-achịkọta DMA AFU Example.

2020.04.17

2.0.1 (Intel kwadoro ya

Mbipụta Quartus Prime Pro 19.2)

Emeziri nkwupụta na Ndị na-ege ntị e bu n'obi ngalaba.

2020.02.20

2.0.1 (Intel kwadoro ya

Mbipụta Quartus Prime Pro 19.2)

Edebere typo.

2019.11.04

2.0.1 (Intel kwadoro ya

Mbipụta Quartus Prime Pro 19.2)

• Dochie fpgaconf na fpgasupdate mgbe ị na-ahazi FPGA na prebuild AFU na ngalaba. Na-agba ọsọ DMA AFU Example.

• Ndepụta okwu agbakwunyere Kaadị ngwa ngwa ngwa ngwa nke Intel FPGA D5005 na aha akwụkwọ ahụ.

• agbanwere gburugburu $ OPAE_PLATFORM_ROOT.

• ngalaba agbanweela Ihe Nlereanya Mmemme Software maka obere ndezi.

• agbakwunyere ngalaba ọhụrụ Na-achịkọta DMA AFU Example.

• ngalaba agbanweela Nkwalite maka ịrụ ọrụ DMA emelitere maka obere ndezi.

2019.08.05

2.0 (Intel kwadoro ya

Mbipụta Quartus Prime Pro 18.1.2)

Ntọhapụ mbụ.

Ụlọ ọrụ Intel. Ikike niile echekwabara. Intel, akara Intel, na akara Intel ndị ọzọ bụ ụghalaahịa nke ụlọ ọrụ Intel ma ọ bụ ndị enyemaka ya. Intel nyere ikike ịrụ ọrụ nke FPGA na ngwaahịa semiconductor na nkọwapụta ugbu a dịka akwụkwọ ikike ọkọlọtọ Intel siri dị, mana nwere ikike ịme mgbanwe na ngwaahịa na ọrụ ọ bụla n'oge ọ bụla na-enweghị ọkwa. Intel anaghị ewere ọrụ ọ bụla ma ọ bụ ụgwọ sitere na ngwa ma ọ bụ iji ozi ọ bụla, ngwaahịa ma ọ bụ ọrụ akọwara n'ime ebe a belụsọ dị ka Intel kwetara na ederede. A dụrụ ndị ahịa Intel ọdụ ka ha nweta ụdị nkọwa ngwaọrụ kachasị ọhụrụ tupu ha adabere na ozi ọ bụla ebipụtara yana tupu ịnye iwu maka ngwaahịa ma ọ bụ ọrụ.

Enwere ike ịzọrọ aha na akara ndị ọzọ dị ka ihe onwunwe nke ndị ọzọ.

Akwụkwọ / akụrụngwa

Kaadị ngwa ngwa ngwa ngwa nke Intel FPGA D5005 [pdf] Ntuziaka onye ọrụ
Kaadị osooso nke mmemme FPGA, D5005, FPGA Programmable Acceleration Card D5005, DMA Accelerator Functional Unit

Ntụaka

Akwụkwọ ntuziaka onye ọrụ

Kaadị ngwa ngwa ngwa ngwa nke Intel FPGA D5005

Banyere akwụkwọ a

Nkọwa DMA AFU

Debanye aha maapụ na oghere adreesị

Map ndebanye aha DMA AFU

Debanye aha maapụ na oghere adreesị

Ihe Nlereanya Mmemme Software

Na-agba ọsọ DMA AFU Example

Na-achịkọta DMA AFU Example

Na-eme ka AFU Example

Nkwalite maka ịrụ ọrụ DMA emelitere

Ebe nchekwa ntuziaka onye ọrụ DMA Accelerator na-arụ ọrụ

Akụkọ Ndozigharị akwụkwọ maka ntuziaka onye ọrụ na-arụ ọrụ ngwa ngwa DMA

Akwụkwọ / akụrụngwa

Ntụaka

Hapụ ikwu

Kagbuo nzaghachi