intel UG-20094 Afa 10 GX Native Fixed Point DSP IP Core
Intel® Cyclone® 10 GX Native Fixed Point DSP IP Core User Guide
O le Intel Cyclone® 10 GX Native Fixed Point DSP IP autu e vave fa'atino ma pulea se poloka e tasi Intel Cyclone 10 GX Variable Precision Digital Signal Processing (DSP). O le Cyclone 10 GX Native Fixed Point DSP IP core e avanoa mo masini Intel Cyclone 10 GX.
Afa 10 GX Native Fixed Point DSP IP Core Functional Block Diagram
Fa'amatalaga Fa'atatau
Folasaga i Intel FPGA IP Cores.
Afa 10 GX Native Fixed Point DSP IP Core Features
O le Afa o le 10 GX Native Fixed Point DSP IP autu e lagolagoina vaega nei:
- Fa'atinoga maualuga, fa'asili-silisiliina, ma fa'aigoaina atoatoa fa'atelega
- 18-bit ma le 27-bit umi upu
- Lua 18 × 19 fa'atele po'o le tasi 27 × 27 fa'atele ile poloka DSP
- Fa'aopoopo fa'aopoopo, to'ese, ma le 64-bit fa'aputu fa'aputuga resitala e tu'ufa'atasia ai fa'ai'uga fa'atele
- Fa'asolo le 19-bit po'o le 27-bit pe a fa'aletonu le fa'apipi'i muamua ma fa'asolo le 18-bit pe a fa'aaoga muamua le fa'aopoopo e fai ai le laina fa'atuai-tap mo le fa'amamaina o le talosaga.
- Fa'asolo le pasi 64-bit e fa'asalalau ai taunu'uga mai le tasi poloka i le isi poloka e aunoa ma se lagolago mai fafo.
- Ma'a'a muamua-adder lagolago i 19-bit ma 27-bit faiga mo filiga tutusa
- Faletupe resitala fa'alotoifale i le 18-bit ma le 27-bit modes mo le fa'atinoina o le faamama
- 18-bit ma le 27-bit systolic finite impulse response (FIR) filiga faʻatasi ai ma faʻapipiʻi faʻapipiʻi tufatufaina.
Amataina
O lenei mataupu o loʻo tuʻuina atu ai se faʻamatalaga lauteleview o le Intel FPGA IP fa'ata'ita'iga fa'asologa autu e fesoasoani ia te oe e vave amata ile Afa 10 GX Native Fixed Point DSP IP core. O le Intel FPGA IP Library o loʻo faʻapipiʻiina o se vaega o le Intel Quartus® Prime faʻapipiʻi faagasologa. E mafai ona e filifilia ma fa'avasega so'o se Intel FPGA IP core mai le faletusi. Ua saunia e Intel se fa'atonu fa'apipi'i fa'atasi e fa'atagaina oe e fa'avasega le Intel FPGA DSP IP core e lagolago ai le tele o ituaiga talosaga. E ta'ita'ia oe e le fa'atonu fa'amaufa'ailoga i le fa'atulagaina o tau fa'atatau ma le filifiliga o ports e filifili ai.
Fa'amatalaga Fa'atatau
- Folasaga i Intel FPGA IP Cores
Tuuina atu faʻamatalaga lautele e uiga i Intel FPGA IP cores, e aofia ai le faʻavasegaina, gaosia, faʻaleleia, ma le faʻataʻitaʻiina o pusa IP. - Fausia Version-Tutoatasi IP ma Platform Designer (Standard) Simulatio Scripts
Fausia tusitusiga faʻataʻitaʻiga e le manaʻomia ni faʻafouga tusi lesona mo polokalama poʻo le faʻaleleia o le IP. - Puleaina o Poloketi Fa'ata'ita'iga Sili
Ta'iala mo le pulea lelei ma le feavea'i o lau poloketi ma le IP files.
Afa 10 GX Native Fixed Point DSP IP Core Parameter Settings
E mafai ona e fa'avasegaina le Cyclone 10 GX Native Fixed Point DSP IP core e ala i le fa'ama'otiina o fa'amaufa'ailoga e fa'aaoga ai le fa'atonu fa'amau i le polokalama Intel Quartus Prime.
Faiga Fa'agaoioi Tab
| Parameter | IP Fausia Parameter | Taua | Fa'amatalaga |
| Fa'amolemole filifili le faiga fa'agaioiga | faiga_faagaioiga | m18×18_full m18×18_sumof2 m18×18_plus36 m18×18_systolic m27×27 | Filifili le faiga e mana'omia. |
| Fa'aopoopo Fa'aopoopo | |||
| Faiga fa'atusa mo le fa'atele x operand | saini_max | sainia e le'i sainia | Fa'ama'oti le fa'atusa o le fa'atusa mo le fa'atele x operand. |
| Parameter | IP Fausia Parameter | Taua | Fa'amatalaga |
| Faiga fa'atusa mo le fa'atele y operand pito i luga | sainia_me | sainia e le'i sainia | Fa'ailoa mai le fa'atusa mo le fa'atele y operand pito i luga. |
| Faiga fa'atusa mo le fa'atele pito i lalo x operand | sainia_mbx | sainia e le'i sainia | Fa'ailoa mai le fa'atusa mo le fa'atele i lalo x operand. |
| Faiga fa'atusa mo le fa'atele i lalo y operand | sainia_mby | sainia e le'i sainia | Fa'ama'oti le fa'atusa fa'atusa mo le fa'atele pito i lalo y operand.
Filifili i taimi uma e le'i sainia mo m18×18_faaopoopo36 . |
| Fa'aaga le 'sub' port | enable_sub | Leai Ioe | Filifili Ioe e mafai ai
pito i lalo uafu. |
| Resitala fa'aoga 'sub' o le fa'atele | sub_clock | Leai Uati0 Uati1 Uati2 | Filifili Uati0, Uati1, pe Uati2 e mafai ai ma fa'amaoti le fa'ailo o le uati fa'aulu mo le resitara fa'aulu. |
| Fa'aaofia Cascade | |||
| Fa'amalo fa'aoso fa'aulu mo 'ay' fa'aoga | ay_use_scan_in | Leai Ioe | Filifili Ioe ina ia mafai ai ona fa'aulufaleina le fa'aogaina o fa'amaumauga mo le fa'aogaina o fa'amaumauga.
A e fa'aogaina le fa'aogaina o le fa'aogaina, o le Afa 10 GX Native Fixed Point DSP IP e fa'aogaina fa'ailoga fa'aoga e fai ma fa'aoga nai lo fa'ailo e ulufale. |
| Fa'aagaoi le fa'aoso fa'aulu mo 'i' fa'aoga | by_use_scan_in | Leai Ioe | Filifili Ioe e fa'aagaioi ai le fa'aogaina o le fa'asologa fa'asolo mo le fa'aogaina o fa'amaumauga.
Afai e te fa'aogaina le fa'aogaina o le fa'aogaina, o le Afa 10 GX Native Fixed Point DSP IP e fa'aogaina ai fa'ailoga e fai ma fa'aoga nai lo fa'ailo fa'aoga. |
| Fa'afeso'ota'i fa'amaumauga ma le resitala tuai | tuai_scan_out_ay | Leai Ioe | Filifili Ioe e mafai ai ona resitala le tuai i le va o le ay ma tusi resitala o mea e fai.
E le o lagolagoina lenei vaega i totonu m18×18_faaopoopo36 ma m27x27 faiga fa'atino. |
| Parameter | IP Fausia Parameter | Taua | Fa'amatalaga |
| Fa'aaga fa'amatalaga e ala i le tuai resitala | tuai_mata'i_i fafo e | Leai Ioe | Filifili Ioe ina ia mafai ai ona resitala tuai i le va o resitara fa'aoga ma pasi fa'ata'ita'i.
E le o lagolagoina lenei vaega i totonu m18×18_faaopoopo36 ma m27x27 faiga fa'atino. |
| Fa'aaga le uafu su'esu'e | gui_scanout_enable | Leai Ioe | Filifili Ioe e mafai ai
pasi fa'ata'ita'i. |
| 'scanout' le lautele o le pasi | scan_out_width | 1–27 | Fa'ailoa le lautele o
pasi fa'ata'ita'i. |
| Fa'amatalaga 'x' Fa'atonuga | |||
| 'Ax' fa'aoga pasi lautele | ax_width | 1–27 | Fa'ailoa le lautele o
pasi fa'aoga to'i.(1) |
| Resitala fa'aoga 'ax' ole fa'atele | ax_clock | Leai Uati0 Uati1 Uati2 | Filifili Uati0, Uati1, pe Uati2 e mafai ai ma fa'amaoti le fa'ailo o le uati ulufale mo le resitara fa'aulu.
e le maua le resitara fa'aoga ax pe a e setiina puna operand 'ax' ia 'coef'. |
| 'bx' fa'aoga pasi lautele | bx_width | 1–18 | Fa'ailoa le lautele o
bx fa'aoga pasi.(1) |
| Resitala mea 'bx' ole fa'atele | bx_clock | Leai Uati0 Uati1 Uati2 | Filifili Uati0, Uati1, pe Uati2 e mafai ai ma fa'amaoti le fa'ailo o le uati ulufale mo le tusi resitala fa'aoga bx.
bx input register e le o avanoa pe a e setiina 'bx' puna operand ia 'coef'. |
| Fa'amatalaga 'y' Fa'atonuga | |||
| 'ay' po'o le 'scanin' pasi lautele | ay_scan_in_width | 1–27 | Fa'ailoa le lautele o le ay po'o le scanin pasi fa'aoga.(1) |
| Resitala mea 'ay' po'o le 'scanin' ole fa'atele | ay_scan_in_clock | Leai Uati0 Uati1 Uati2 | Filifili Uati0, Uati1, pe Uati2 e mafai ai ma fa'amaoti le fa'ailo o le uati ulufale mo le resitara fa'aoga o le ay po'o le scanin. |
| 'e' ulufale i totonu o le pasi lautele | e_lautele | 1–19 | Fa'ailoa le lautele ole pasi fa'aoga.(1) |
| Parameter | IP Fausia Parameter | Taua | Fa'amatalaga |
| Resitala fa'aoga 'e' a le fa'atele | e_uati | Leai Uati0 Uati1 Uati2 | Filifili Uati0, Uati1, pe Uati2 e mafai ai ma fa'amaoti le fa'ailo o le uati ulufale mo by po'o scanin
tusi resitala.(1) |
| Fa'atonuga 'fuafuaga' | |||
| 'i'uga' le lautele o le pasi | result_a_width | 1–64 | Fa'ailoa le lautele o
taunu'uga fa'aulufale pasi. |
| 'Reultb' le lautele o le pasi | result_b_width | 1–64 | Fa'ailoa le lautele o le taunu'uga o pasi fa'aulu. na'o le resultb e maua pe a fa'aaoga le operation_mode m18×18_tumu. |
| Fa'aaoga tusi resitala o galuega | galuega_uati | Leai Uati0 Uati1 Uati2 | Filifili Uati0, Uati1, pe Uati2 e mafai ai ma fa'amaoti le fa'ailo o le uati fa'aulu mo fa'ai'uga ma fa'ai'uga. |
Pre-adder Tab
| Parameter | IP Fausia Parameter | Taua | Fa'amatalaga |
| 'ay' operand source | operand_source_may | fa'aulufale i totonu | Fa'ailoa le puna operand mo le ay. Filifili failauga e mafai ai ona fa'apipi'i muamua module mo le fa'atele maualuga. E tatau ona tutusa le faatulagaga mo le ay ma le operand source. |
| 'e' puna operand | operand_source_mby | fa'aulufale i totonu | Fa'ailoa le puna operand mo e ala i totonu. Filifili failauga e mafai ai ona fa'apipi'i muamua module mo fa'atele i lalo. E tatau ona tutusa le faatulagaga mo le ay ma le operand source. |
| Seti muamua le fa'aopoopoina se gaioiga i le toesea | preadder_subtract_a | Leai Ioe | Filifili Ioe e fa'ama'oti le fa'agaioiga toese mo le fa'aopoopo muamua mo le fa'atele pito i luga. E tatau ona tutusa le fa'atulagaina mo le fa'aopoopo pito i luga ma lalo. |
| Seti le fa'agaioiga muamua-adder b i le toese | preadder_subtract_b | Leai Ioe | Filifili Ioe e fa'ama'oti le fa'agaioiga toese mo le fa'aopoopo muamua mo le fa'atele pito i lalo. E tatau ona tutusa le fa'atulagaina mo le fa'aopoopo pito i luga ma lalo. |
| Fa'amatalaga 'z' Fa'atonuga | |||
| 'az' fa'aoga pasi lautele | az_width | 1–26 | Fa'ailoa le lautele ole pasi fa'aoga az.(1) |
| Resitala mea 'az' ole fa'atele | az_clock | Leai Uati0 Uati1 Uati2 | Filifili Uati0, Uati1, pe Uati2 e mafai ai ma fa'amaoti le fa'ailo o le uati ulufale mo tusi resitala fa'aoga az. E tatau ona tutusa le faatulagaga o le uati mo le ay ma le az. |
| 'bz' fa'aoga pasi lautele | bz_width | 1–18 | Fa'ailoa le lautele ole pasi fa'aoga bz.(1) |
| Resitala mea 'bz' ole fa'atele | bz_clock | Leai Uati0 Uati1 Uati2 | Filifili Uati0, Uati1, pe Uati2 e mafai ai ma fa'amaoti le fa'ailo o le uati ulufale mo tusi resitala fa'aoga bz. E tatau ona tutusa le fa'atulagaina o le uati mo by ma bz input registers. |
Fa'alotoifale Tab
| Parameter | IP Fausia Parameter | Taua | Fa'amatalaga |
| puna operand 'ax' | operand_source_max | fa'aoga kofe | Fa'ailoa le puna operand mo pasi fa'aoga to'i. Filifili kofe ina ia mafai ai le fa'aoga fa'alotoifale mo le fa'atele maualuga.
Filifili Leai mo Resitala fa'aoga 'ax' ole fa'atele parakalafa pe a e fa'aagaoioi le fa'ailoga o le fa'aui totonu. |
| Parameter | IP Fausia Parameter | Taua | Fa'amatalaga |
| E tatau ona tutusa le tulaga mo le ax ma le bx operand source. | |||
| 'bx' puna operand | operand_source_mbx | fa'aoga kofe | Fa'ailoa le puna operand mo le pasi fa'aoga bx. Filifili kofe ina ia mafai ai le fa'aoga fa'alotoifale mo le fa'atele maualuga.
Filifili Leai mo Resitala mea 'bx' ole fa'atele parakalafa pe a e fa'aagaoioi le fa'ailoga o le fa'aui totonu. E tatau ona tutusa le tulaga mo le ax ma le bx operand source. |
| 'coefsel' Fa'atonu Tusi Resitala | |||
| Resitala mea 'coefsela' ole fa'atele | coef_sel_a_clock | Leai Uati0 Uati1 Uati2 | Filifili Uati0, Uati1, pe Uati2 e mafai ai ma fa'amaoti le fa'ailo o le uati ulufale mo tusi resitala fa'aoga coefsela. |
| Resitala mea 'coefselb' o le fa'atele | coef_sel_b_clock | Leai Uati0 Uati1 Uati2 | Filifili Uati0, Uati1, pe Uati2 e mafai ai ma fa'amaoti le fa'ailo o le uati ulufale mo tusi resitala fa'aoga coefselb. |
| Coefficient Teuina Configuration | |||
| coef_a_0–7 | coef_a_0–7 | Integer | Fa'ailoa le tau fa'atatau mo le pasi fa'aulu.
Mo le 18-bit fa'agaioiga faiga, o le maualuga pito i totonu o le 218 - 1. Mo le 27-bit fa'agaioiga, o le maualuga maualuga o le 227 - 1. |
| coef_b_0–7 | coef_b_0–7 | Integer | Fa'ailoa le tau fa'atatau mo le pasi fa'aoga bx. |
Accumulator/Output Cascade Tab
| Parameter | IP Fausia Parameter | Taua | Fa'amatalaga |
| Fa'aagaoi le taulaga 'fa'aputu'e | enable_accumulate | Leai Ioe | Filifili Ioe e mafai ai
uafu accumulator. |
| Fa'aaga le uafu 'te'e' | enable_negate | Leai Ioe | Filifili Ioe e mafai ai
fa'ate'aina le taulaga. |
| Fa'aaga le 'loadconst' port | enable_loadconst | Leai Ioe | Filifili Ioe e mafai ai
uta uta uta. |
| Tusi resitala mea 'fa'aputu' a le fa'aputu | accumulate_clock | Leai Uati0 Uati1 Uati2 | Filifili Uati0 , Uati1, pe Uati2 e mafai ai ma fa'amaoti le fa'ailo o le uati ulufale mo le fa'aputuina o tusi resitala fa'aulu. |
| Parameter | IP Fausia Parameter | Taua | Fa'amatalaga |
| Resitala mea 'loadconst' o le accumulator | uta_const_clock | Leai Uati0 Uati1 Uati2 | Filifili Uati0, Uati1, pe Uati2 e mafai ai ma fa'amaoti le fa'ailo o le uati ulufale mo tusi resitala fa'aogaina o uta. |
| Resitala fa'aoga 'te'e' ole iunite fa'aopoopo | negate_clock | Leai Uati0 Uati1 Uati2 | Filifili Uati0, Uati1, pe Uati2 e mafai ma fa'amaoti le fa'ailo o le uati ulufale mo le fa'afitia o tusi resitala fa'aoga. |
| Fa'aagaaga lua fa'aputu | enable_double_accum | Leai Ioe | Filifili Ioe e fa'aagaioi ai uiga fa'aopoopo fa'alua. |
| N tau o le fa'atulagaina tumau | load_const_value | 0 – 63 | Fa'ailoa le tau fa'atulagaina tumau.
O lenei tau e mafai ona 2N o fea N o le tau fa'atulagaina tumau. |
| Fa'aagaoi le uafu chainin | fa'aoga_chainadder | Leai Ioe | Filifili Ioe ina ia mafai ai le fa'aogaina o le fa'aogaina o le fa'aogaina ma le pasi fa'aulu.
E le lagolagoina i totonu le vaega fa'aoso fa'aoso m18×18_tumu faiga fa'agaioiga. |
| Fa'aagaoi le uafu o le filifili | gui_chainout_enable | Leai Ioe | Filifili Ioe ina ia mafai ai ona fa'aogaina le pasi fa'atosina. E le lagolagoina i totonu le vaega fa'aoso fa'aoso
m18×18_tumu faiga fa'agaioiga. |
Pipeli Tab
| Parameter | IP Fausia Parameter | Taua | Fa'amatalaga |
| Fa'aopoopo le resitara o paipa fa'aulu ile fa'ailoga fa'amaumauga (x/y/z/coefsel) | input_pipeline_clock | Leai Uati0 Uati1 Uati2 | Filifili Uati0, Uati1, pe Uati2 e mafai ai ma fa'amaoti le fa'ailoga o le uati ulufale mo le x, y, z, coefsela ma le coefselb paipa fa'amau tusi resitala. |
| Fa'aopoopo le resitara o paipa fa'aulu ile 'sub' fa'ailoga fa'amaumauga | sub_pipeline_clock | Leai Uati0 Uati1 Uati2 | Filifili Uati0, Uati1, pe Uati2 e mafai ai ma fa'amaoti le fa'ailo o le uati ulufale mo le resitara fa'aulu o paipa. (2) |
| Fa'aopoopo le resitara o paipa fa'aulu ile fa'ailoga o fa'amaumauga | accum_pipeline_clock | Leai Uati0 Uati1 Uati2 | Filifili Uati0, Uati1, pe Uati2 e mafai ai ma fa'amaoti le fa'ailo o le uati ulufale mo le fa'aputuina o le resitara fa'aulu.(2) |
| Fa'aopoopo le resitara o paipa fa'aoga ile 'loadconst' fa'ailoga fa'amaumauga | load_const_pipeline_clock | Leai Uati0 Uati1 Uati2 | Filifili Uati0, Uati1, pe Uati2 e mafai ai ma fa'amaoti le fa'ailo o le uati ulufale mo le resitara fa'aoga paipa loadconst.(2) |
| Fa'aopoopo le resitara o paipa fa'aulu ile fa'ailoga fa'amatalaga 'te'e' | negate_pipeline_clock | Leai Uati0 Uati1 Uati2 | Filifili Uati0, Uati1, pe Uati2 e mafai ai ma fa'amaoti le fa'ailo o le uati ulufale mo le fa'afitia o le resitara fa'aoga paipa.(2) |
Avanoa o Fa'amatalaga Fa'asili ile Fa'agaioiga Fa'agaioiga
E mafai ona e fa'avasegaina le lautele o fa'amatalaga mo x, y, ma fa'aoga z e pei ona fa'ailoa mai i le laulau.
E tatau ona tutusa uma le fa'atulagaina o le uati o tusi resitala uma e tu'u ai paipa mo fa'ailo fa'atonutonu malosi.
| Faiga Fa'agaioiga | Aupito Maualuga o Faamatalaga Fa'amatalaga | |||||
| ax | ay | az | bx | by | bz | |
| E aunoa ma le muai fa'aopoopo po'o le Fa'alotoifale | ||||||
| m18×18_tumu | 18 (saini)
18 (le saini) |
19 (saini)
18 (e le'i sainia) |
Le fa'aaogaina | 18 (saini)
18 (le saini) |
19 (saini)
18 (le saini) |
Le fa'aaogaina |
| m18×18_sumof2 | ||||||
| m18×18_systolic | ||||||
| m18×18_faaopoopo36 | ||||||
| m27×27 | 27 (saini)
27 (e le'i sainia) |
Le fa'aaogaina | ||||
| Fa'atasi ai na'o le Fa'ailoga Fa'aopoopo | ||||||
| m18×18_tumu | 18 (saini)
18 (e le'i sainia) |
|||||
| m18×18_sumof2 | ||||||
| m18×18_systolic | ||||||
| m27×27 | 27 (saini)
27 (le saini) |
26 (saini)
26 (e le'i sainia) |
Le fa'aaogaina | |||
| Fa'atasi ma le Fa'atotonuga Coefficient Feature | ||||||
| m18×18_tumu | Le fa'aaogaina | 19 (saini)
18 (e le'i sainia) |
Le fa'aaogaina | 19 (saini)
18 (le saini) |
Le fa'aaogaina | |
| m18×18_sumof2 | ||||||
| m18×18_systolic | ||||||
| m27×27 | 27 (saini)
27 (e le'i sainia) |
Le fa'aaogaina | ||||
Fa'amatalaga Fa'atino
O le Afa 10 GX Native Fixed Point DSP IP autu e aofia ai le 2 fausaga; 18 × 18 fa'atele ma le 27 × 27 fa'atele. O fa'ata'ita'iga ta'itasi o le Afā 10 GX Native Fixed Point DSP IP e fa'atupuina na'o le 1 o le 2 fa'ata'ita'iga e fa'atatau i faiga fa'atino ua filifilia. E mafai ona e fa'aogaina modules i lau talosaga.
Fa'amatalaga Fa'atatau
Su'esu'ega Sa'o DSP poloka i le Intel Cyclone 10 GX Devices chapter, Intel Cyclone 10 GX Core Fabric and General Purpose I/Os Handbook.
Faiga Fa'atino
O le Afa 10 GX Native Fixed Point DSP IP autu e lagolagoina le 5 faiga fa'atino:
- O le 18 × 18 Full Mode
- Le 18 × 18 Aotelega o le 2 Mode
- Le 18 × 18 Plus 36 Faiga
- Le 18 × 18 Systolic Mode
- Le 27 × 27 Faiga
O le 18 × 18 Full Mode
Pe a fa'atulagaina e pei o le 18 × 18 atoa, o le Afa 10 GX Native Fixed Point DSP IP e fa'agaoioia e lua tuto'atasi 18 (saini/leai saini) × 19 (saini) po'o le 18.
(saini/leai saini) × 18 (le saini) fa'atele fa'atasi ma 37-bit fa'aulu. O lenei faiga e fa'aoga tutusa ai:
- i'uga = ax * ay
- taunuugab = bx * e
O le 18 × 18 Full Mode Architecture
Le 18 × 18 Aotelega o le 2 Mode
I le 18 × 18 Aofa'iga o 2 modes, o le Afa 10 GX Native Fixed Point DSP IP autu e mafai ai ona fa'atele i luga ma lalo ma maua ai se fa'ai'uga mai le fa'aopoopo po'o le to'esea i le va o fa'atele e 2. O le fa'ailo fa'atonutonu fa'aletonu e pulea ai se fa'aopoopo e fa'atino ai le fa'aopoopo po'o le to'ese. Ole lautele ole gaioiga ole Afa 10 GX Native Fixed Point DSP IP e mafai ona lagolago ile 64 bits pe a e fa'aogaina le accumulator/output cascade. O lenei faiga e fa'aogaina ai le fa'atusa o i'uga =[±(ax * ay) + (bx * by)].
O le 18 × 18 Aofa'iga o le 2 Faiga Fa'ata'ita'iga
Le 18 × 18 Plus 36 Faiga
Pe a fa'atulagaina e pei o le 18 × 18 Plus 36 mode, o le Afa 10 GX Native Fixed Point DSP IP e mafai ai na'o le fa'atele pito i luga. O lenei faiga e fa'aogaina ai le fa'atusa o le i'uga = (ax * ay) + concatenate(bx[17:0],by[17:0]).
O le 18 × 18 Plus 36 Mode Architecture
E tatau ona e setiina le faatulagaga o le Fa'atusa mo fa'atelega pito i lalo y operand e le saini pe a fa'aogaina lenei faiga. Afai o le pasi ulufale e itiiti ifo i le 36-bit i lenei faiga, e manaʻomia oe e tuʻuina atu le faʻaopoopoga saini talafeagai e faʻatumu ai le 36-bit input.
Fa'aaogāina I lalo ifo o le 36-bit Operand I le 18 × 18 Plus 36 Mode
O lenei exampO lo'o fa'aalia ai le fa'atulagaina o le Afa 10 GX Native Fixed Point DSP IP fa'aoga e fa'aoga ai le 18 × 18 Plus 36 fa'agaioiga fa'atasi ma se fa'amatalaga fa'aoga 12-bit saini o le 101010101010 (binary) nai lo le operand 36-bit.
- Seti le fa'atusa mo le fa'atele i lalo x operand: ia saini.
- Seti le Fa'atusa Fa'atusa mo le fa'atele i lalo y operand: e le'i sainia.
- Seti le 'bx' ole lautele ole pasi ile 18.
- Seti 'e' le lautele o le pasi ulufale i le 18.
- Tuuina atu fa'amatalaga o le '111111111111111111' ile bx input pasi.
- Tuuina atu fa'amatalaga o le '111111101010101010' ile pasi fa'aoga.
Le 18 × 18 Systolic Mode
I le 18 × 18 systolic operational modes, o le Cyclone 10 GX Native Fixed Point DSP IP core e mafai ai ona faʻateleina le pito i luga ma lalo, se tusi resitala faʻapipiʻi mo le faʻateleina pito i luga, ma se resitala systolic filifili mo le filifili i faʻailoga faʻaoga. A e fa'agaoioia le fa'aoso fa'asolo, e lagolagoina e lenei faiga le lautele o le fa'aola o le 44 bits. Afai e te faʻaogaina le faʻapipiʻi faʻapipiʻi e aunoa ma le faʻaogaina o le gaosiga, e mafai ona e faʻatulagaina le lautele o le gaosiga i le 64 bits.
Le 18 × 18 Systolic Mode Architecture
Le 27 × 27 Faiga
A fa'atulagaina e pei o le 27 × 27 modes, o le Cyclone 10 GX Native Fixed Point DSP IP core e mafai ai ona fa'ateleina le 27(sainia/leai saini) × 27(saini/le'i saini). E mafai e le pasi fa'atosina ona lagolago i le 64 bits fa'atasi ai ma le fa'aputu/output cascade e mafai. O lenei faiga e fa'aogaina ai le fa'atusa o le i'uga = ax * ay.
O le 27 × 27 Mode Architecture
Filifiliga Modules
O mea fa'apitoa e maua i le Afa 10 GX Native Fixed Point DSP IP Core o:
- Fa'aoso fa'aulu
- mua'i fa'aopoopo
- Coefficient i totonu
- Accumulator ma fa'aoso fa'aola
- Resitala paipa
Fa'aaofia Cascade
O lo'o lagolagoina le fa'aogaina o le fa'aoga i luga ole ay ma le pasi fa'aoga. A e setiina le Enable input cascade mo 'ay' input i le Ioe, o le Afa 10 GX Native Fixed Point DSP IP o le a fa'aogaina mea mai fa'ailo fa'aoga nai lo le pasi ulufale. A e setiina le Enable input cascade mo 'i' input i le Ioe, o le Afa 10 GX Native Fixed Point DSP IP o le a ave mea mai le pasi ulufale nai lo le pasi ulufale.
E fautuaina ina ia fa'aagaaga tusi resitala mo le ay ma/po'o so'o se taimi lava e mafai ai le fa'aulu fa'aulu mo le sa'o o le talosaga.
E mafai ona e fa'agaoioi le tusi resitala fa'atuai e fa'afetaui le mana'omia o le tu'u i le va o le resitara fa'aoga ma le resitala o galuega. E 2 tusi resitala tuai i totonu o le ogatotonu. O le tusi resitala tuai i luga e fa'aoga mo ua po'o le su'esu'e-i totonu uafu a'o le tusi fa'atuai pito i lalo o lo'o fa'aoga mo va'aiga mata'itusi uafu. O nei tusi resitala tuai e lagolagoina i le 18 × 18 mode atoa, 18 × 18 aofaʻi o 2 modes, ma le 18 × 18 systolic modes.
Muamua fa'aopoopo
E mafai ona fa'apipi'i le mua'i fa'aopoopo i fa'atonuga nei:
- Lua 18-bit tuto'atasi (saini/le'i saini) muamua fa'aopoopo.
- Tasi 26-bit muamua fa'aopoopo.
A e fa'agaoioi le fa'aopoopo i le 18 × 18 fa'atele, e fa'aaogaina le ay ma le a e fai ma pasi fa'aoga i le pito i luga a'o le fa'asili a'o le ma le bz o lo'o fa'aaogaina e fai ma pasi ulufale i le pito i lalo. A e fa'agaoioi le fa'aulu i le fa'aopoopo i le 27 × 27 fa'atele, e fa'aaoga le ay ma le az e fai ma pasi fa'aulu i le fa'aopoopo. E lagolagoina uma e le adder le fa'aopoopo ma le toese. A fa'aoga uma fa'auluuluga i totonu ole poloka DSP lava e tasi, e tatau ona tutusa le ituaiga fa'agaioiga (pe fa'aopoopo pe to'ese).
Coefficient i totonu
E mafai ona lagolagoina e le coefficient i totonu e oo atu i le valu coefficient faifai pea mo le faatelevave i 18-bit ma 27-bit modes. A e fa'atagaina le fa'aogaina o le coefficient i totonu, lua pasi fa'aoga e pulea ai le filifiliga o le coefficient multiplexer o le a gaosia. O le coefsela input bus e fa'aaoga e filifili ai le coefficients mua'i fa'auigaina mo le fa'atele pito i luga ma fa'aoga le pasi fa'aoga faufautua e filifili ai le coefficients mua'i fa'avasegaina mo le fa'atele pito i lalo.
E le lagolagoina e le coefficient coefficient i totonu le malosi o le coefficient value ma e manaomia le teuina o coefficient i fafo e faatino ai sea taotoga.
Accumulator ma Output Cascade
E mafai ona fa'aogaina le module accumulator e fa'atino galuega nei:
- Fa'aopoopo po'o to'esega gaioiga
- Fa'ata'amilosaga ta'amilosaga fa'aituau e fa'aaoga ai le tau tumau o le 2N
- Fa'aputuga alavai lua
Ina ia fa'atino fa'amalosi le fa'aopoopoga po'o le toesea o le fa'aputuga, fa'atonutonu le fa'ailoga fa'amalo. Mo se ta'amilosaga fa'aituau, e mafai ona e fa'ama'oti ma utaina se fa'amaufa'ailoga tumau o le 2N a'o le'i fa'aogaina le module accumulator e ala i le fa'amaotiina o se integer i le fa'ailoga N le tau o le fa'asologa masani. O le numera N e tatau ona itiiti ifo i le 64. E mafai ona e fa'amalosia pe fa'amalo le fa'aogaina o le fa'atonu masani e ala i le fa'atonutonuina o le fa'ailoga loadconst. E mafai ona e fa'aogaina lenei ta'aloga e avea o se muxing malosi o le tau lapotopoto i totonu o le auala tali mai accumulator. O le tau fa'amomoli ma le fa'aputuina o fa'ailoga fa'aoga e fa'atasi.
E mafai ona e fa'agaoioi le resitala fa'aopoopo fa'alua e fa'aaoga ai le fa'ailoga Fa'aagaoi le fa'aputu fa'alua e fa'atino fa'aopoopo fa'alua. E mafai e le module accumulator ona lagolagoina le filifiliina o poloka DSP e tele mo le faʻaopoopoga poʻo le toesea o gaioiga e ala i le faʻaogaina o le laina faʻapipiʻi faʻaoga ma le filifili-i fafo uafu gaosiga. I le 18 × 18 systolic mode, e na'o le 44-bit o le pasi fa'aoga filifili ma le pasi fa'atosina o le a fa'aaogaina. Ae ui i lea, o filifili uma e 64-bit i totonu o le pasi ulufale e tatau ona feso'ota'i i le pasi e alu ese mai le poloka DSP muamua.
Tusi Resitala paipa
O le Afa 10 GX Native Fixed Point DSP IP autu e lagolagoina se tulaga e tasi o le resitalaina o paipa. E lagolagoina e le resitara paipa e oo atu i le tolu puna o le uati ma le tasi le faailo manino e toe setiina ai le resitara o paipa. E lima resitara paipa:
- fa'amatalaga fa'aoga pasi paipa resitala
- sub dynamic control signal pipeline register
- fa'afitia fa'amalosi fa'atonutonu fa'ailoga paipa resitala
- fa'aputu fa'aputuga fa'ailoga fa'ailoga paipa
- loadconst dynamic pulea paipa resitala
E mafai ona e filifili e fa'ataga fa'amaumauga ta'itasi e tu'u i totonu pasi paipa resitara ma le fa'atonutonu malosi fa'ailoga paipa resitala tuto'atasi. Peita'i, e tatau ona fa'aoga uma le resitara paipa e mafai ona fa'aogaina le puna o le uati e tasi.
Fuafuaga uati
Le tusi resitala o mea, paipa, ma galuega faatino i totonu ole Afa 10 GX Native Fixed Point DSP IP e lagolago ai puna'oa e tolu/mafaufau ma lua kilia e le tutusa. O tusi resitala uma e fa'aoga e fa'aoga le aclr[0] ma fa'aoga uma le resitara o paipa ma galuega aclr[1]. E mafai e ituaiga resitala ta'itasi ona filifili se tasi o fa'apogai o le uati e tolu ma fa'ailo e mafai ai e le uati. A e fa'atulagaina le Afa 10 GX Native Fixed Point DSP IP i le 18 × 18 systolic mode fa'agaioiga, o le Intel Quartus Prime software o le a fa'apipi'i le resitara fa'apipi'i fa'aoga ma le fa'apogai o le uati resitara filifili i le puna o le uati e tasi e pei o le resitara galuega i totonu.
A e fa'aogaina le fa'ailoga fa'aopoopo fa'alua, o le polokalama a le Intel Quartus Prime o le a fa'apipi'i le fa'apogai o le uati fa'aputu fa'aputu i le puna uati e tasi e pei o le resitara o galuega i totonu.
Fa'atapula'aina ole Fuafuaga Fa'ata
Ole fa'ailoga lea e fa'aalia ai fa'agata e tatau ona e fa'atoga mo polokalame uma o le tusi resitala.
| Tulaga | Taofi |
| Pe a fa'agaoioi le muai fa'aopoopo | E tatau ona tutusa le puna o le uati mo le ay ma le az. |
| E tatau ona tutusa le puna o le uati mo tusi resitala ulufale a by ma bz. | |
| Pe a mafai ona resitala paipa | E tatau ona tutusa le puna o le uati mo resitara uma o paipa. |
| Pe a resitaraina so'o se mea fa'aoga mo fa'ailo fa'atonutonu malosi | E tatau ona tutusa le puna o le uati mo tusi resitala o mea mo lalo, fa'aputu, loadconst, ma negate. |
Afa 10 GX Native Fixed Point DSP IP Fa'ailoga Autu
O le ata o lo'o i lalo o lo'o fa'aalia ai fa'ailoga o lo'o tu'uina atu ma fa'ailo o le Afā 10 GX Native Fixed Point DSP IP core.
Afa 10 GX Native Fixed Point DSP IP Fa'ailoga Autu
Fa'ailoga Fa'aofi Fa'amatalaga
| Igoa Faailoga | Ituaiga | Lautele | Fa'amatalaga |
| to'i[] | Ulufale | 27 | Tu'u le pasi fa'amaumauga i luga ole fa'atele. |
| ie[] | Ulufale | 27 | Tu'u le pasi fa'amaumauga i luga ole fa'atele.
A mafai ona fa'auluina le fa'aopoopo, o nei fa'ailo e tu'uina atu e fai ma fa'ailo fa'aoga i le pito i luga muamua fa'aopoopo. |
| az[] | Ulufale | 26 | O fa'ailo ia o fa'ailoga fa'aoga i le pito i luga a'o le'i fa'aopoopo.
E na'o avanoa nei fa'ailo pe a fa'agaoioi le muai fa'aopoopo. O nei faailo e le maua i totonu m18×18_faaopoopo36 faiga fa'atino. |
| bx[] | Ulufale | 18 | Tu'u le pasi fa'amaumauga ile fa'atele pito i lalo.
O nei faailo e le maua i totonu m27×27 faiga fa'atino. |
| e [] | Ulufale | 19 | Tu'u le pasi fa'amaumauga ile fa'atele pito i lalo.
A fa'agaoioi le fa'apipi'i muamua, o nei fa'ailo e fai ma fa'ailo fa'aulu i le pito i lalo ole fa'aopoopo. O nei faailo e le maua i totonu m27×27 faiga fa'atino. |
| bz[] | Ulufale | 18 | O fa'ailoga nei o fa'ailo fa'aulu i le pito i lalo a'o le'i fa'aopoopo. E na'o avanoa nei fa'ailo pe a fa'agaoioi le muai fa'aopoopo. O nei faailo e le maua i totonu m27×27 ma m18×18_faaopoopo36 faiga fa'atino. |
Fa'ailoga Fa'amatalaga
| Igoa Faailoga | Ituaiga | Lautele | Tesema |
| i'uga[] | Tuuina atu | 64 | Fa'ailoga pasi fa'amatalaga mai luga fa'atele.
O nei faailo e lagolagoina e oo atu i le 37 bits mo m18×18_tumu faiga fa'atino. |
| taunuugab[] | Tuuina atu | 37 | Fa'amatalaga pasi mai le fa'atele pito i lalo.
O fa'ailoga nei e maua i totonu m18×18_tumu faiga fa'atino. |
Uati, Fa'aaga, ma Fa'amama Fa'ailoga
| Igoa Faailoga | Ituaiga | Lautele | Fa'amatalaga |
| clk [] | Ulufale | 3 | Tu'u fa'ailoga uati mo tusi resitala uma.
E na'o avanoa nei fa'ailo o le uati pe a fa'apipi'i se tusi resitala o fa'aoga, resitara o paipa, po'o le resitala o galuega Uati0, Uati1, pe Uati2. • clk[0] = Uati0 • clk[1] = Uati1 • clk[2] = Uati2 |
| ena [] | Ulufale | 3 | E mafai e le uati mo clk[2:0]. Ole fa'ailoga lea o lo'o galue-maualuga.
• ena[0] e mo Uati0 • ena[1] e mo Uati1 • ena[2] e mo Uati2 |
| aclr[] | Ulufale | 2 | Fa'ailo fa'aoga manino le fa'aogaina mo resitara uma. Ole fa'ailoga lea o lo'o galue-maualuga.
Fa'aoga aclr[0] mo tusi resitala uma ma fa'aoga aclr[1] mo resitara uma o paipa ma tusi resitala galuega. Ona o le faaletonu, o lenei faailo e le fa'amaonia. |
Fa'ailoga Fa'atonu
| Igoa Faailoga | Ituaiga | Lautele | Fa'amatalaga |
| lalo | Ulufale | 1 | Fa'ailo fa'aulu e fa'aopoopo pe to'ese ai le fa'atupu o le fa'atele pito i luga ma le fa'atupuina o le fa'atele pito i lalo.
• Deassert lenei faailo e faʻamaonia ai le faʻaopoopoga o gaioiga. • Fa'amau le fa'ailoga lea e fa'amaoti ai le fa'agaioiga toese. Ona o le faaletonu, o lenei faailo e le fa'amaonia. E mafai ona e fa'ailoa pe fa'amalo lenei fa'ailo i le taimi e ta'avale ai.(3) |
| fa'afiti | Ulufale | 1 | Fa'ailo fa'aulu e fa'aopoopo pe to'ese le aofa'i o fa'atele i luga ma lalo ma fa'amaumauga mai fa'ailoga chainin.
• Deassert lenei faailo e faʻamaonia ai le faʻaopoopoga o gaioiga. • Fa'amau le fa'ailoga lea e fa'amaoti ai le fa'agaioiga toese. Ona o le faaletonu, o lenei faailo e le fa'amaonia. E mafai ona e fa'ailoa pe fa'amalo lenei fa'ailo i le taimi e ta'avale ai.(3) |
| fa'aputu | Ulufale | 1 | Fa'ailo fa'aulu e mafai ai pe fa'amalo ai le vaega fa'aputu.
• Deassert lenei faailo e tape le vaega accumulator. • Fa'ailoa le fa'ailoga lea ina ia mafai ai ona fa'aogaina le fa'aputuga. Ona o le faaletonu, o lenei faailo e le fa'amaonia. E mafai ona e fa'ailoa pe fa'amalo lenei fa'ailo i le taimi e ta'avale ai.(3) |
| loadconst | Ulufale | 1 | Fa'ailo fa'aulu e mafai ai pe fa'amalo ai le vaega fa'aauau pea uta.
• Deassert lenei faailo e tape ai le vaega tumau uta. • Fa'ailoa le fa'ailoga lea ina ia mafai ai ona fa'aauau le uta. Ona o le faaletonu, o lenei faailo e le fa'amaonia. E mafai ona e fa'ailoa pe fa'amalo lenei fa'ailo i le taimi e ta'avale ai.(3) |
Fa'ailoga Coeficient i totonu
| Igoa Faailoga | Ituaiga | Lautele | Fa'amatalaga |
| coefsela [] | Ulufale | 3 | Fa'ailoga filifiliga fa'aofi mo 8 tau fa'atatau fa'atatau e le tagata fa'aoga mo le fa'atele pito i luga. O tau faʻatatau o loʻo teuina i totonu o le mafaufau i totonu ma faʻamaonia e alalaupapa coef_a_0 ia coef_a_7.
• coefsela[2:0] = 000 e faasino i coef_a_0 • coefsela[2:0] = 001 e faasino i coef_a_1 • coelsela[2:0] = 010 e faasino i coef_a_2 • … ma isi. E na'o avanoa nei fa'ailo pe a fa'agaoioi le vaega o le fa'aogaina o totonu. |
| coefselb[] | Ulufale | 3 | Fa'ailoga filifiliga fa'aofi mo le 8 fa'atatau fa'atatau e fa'amatalaina e le tagata fa'aoga mo le fa'atele pito i lalo. O tau faʻatatau o loʻo teuina i totonu o le mafaufau i totonu ma faʻamaonia e alalaupapa coef_b_0 ia coef_b_7.
• coefselb[2:0] = 000 e faasino i coef_b_0 • coefselb[2:0] = 001 e faasino i coef_b_1 • coelselb[2:0] = 010 e faasino i coef_b_2 • … ma isi. E na'o avanoa nei fa'ailo pe a fa'agaoioi le vaega o le fa'aogaina o totonu. |
Fa'ailoga Cascade Input
| Igoa Faailoga | Ituaiga | Lautele | Fa'amatalaga |
| scanin [] | Ulufale | 27 | Fa'aulu fa'amaumauga pasi mo fa'aoga fa'asolo fa'asolo.
Fa'afeso'ota'i nei fa'ailo i fa'ailo fa'ata'ita'i mai le DSP muamua. |
| su'esu'ega [] | Ouput | 27 | Pasi fa'amatalaga o le fa'aulu fa'aulufale.
Fa'afeso'ota'i fa'ailoga nei i fa'ailoga scanin o le isi DSP autu. |
Fa'ailoga Cascade Output
| Igoa Faailoga | Ituaiga | Lautele | Fa'amatalaga |
| filifili[] | Ulufale | 64 | Fa'aulu fa'amaumauga pasi mo le fa'aogaina o le fa'aola fa'asolo.
Fa'afeso'ota'i nei fa'ailo i fa'ailo fa'ailo mai le DSP muamua. |
| filifili [] | Tuuina atu | 64 | Pasi fa'amaumauga o fa'aulufalega o le vaega fa'asolo fa'asolo.
Fa'afeso'ota'i nei fa'ailo i fa'ailoga filifili o le isi DSP autu. |
Tala'aga Toe Iloiloga o Pepa mo le Afa 10 GX Native Fixed Point DSP IP Core User Guide
| Aso | Fa'aliliuga | Suiga |
| Novema 2017 | 2017.11.06 | Fa'asalalauga muamua. |
Intel Corporation. Ua taofia aia tatau uma. Intel, le Intel logo, ma isi fa'ailoga Intel o fa'ailoga fa'atau a le Intel Corporation po'o ona lala. E fa'amaonia e Intel le fa'atinoina o ana oloa FPGA ma semiconductor i fa'amatalaga o lo'o iai nei e tusa ai ma le fa'atonuga masani a Intel ae fa'asaoina le aia tatau e fai ai suiga i so'o se oloa ma auaunaga i so'o se taimi e aunoa ma se fa'aaliga. E leai se tiute po'o se noataga e afua mai i le talosaga po'o le fa'aogaina o so'o se fa'amatalaga, oloa, po'o se auaunaga o lo'o fa'amatalaina i i'i se'i vagana ua malilie fa'aalia i se faiga tusitusia e Intel. Ua fautuaina tagata fa'atau Intel e maua le fa'amatalaga lata mai o fa'amatalaga masini a'o le'i fa'alagolago i so'o se fa'amatalaga fa'asalalau ma a'o le'i tu'uina atu oka mo oloa po'o tautua.
O isi igoa ma fa'ailoga e mafai ona ta'ua o se meatotino a isi.
Pepa / Punaoa
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intel UG-20094 Afa 10 GX Native Fixed Point DSP IP Core [pdf] Taiala mo Tagata Fa'aoga UG-20094 Afa 10 GX Native Fixed Point DSP IP Core, UG-20094, Afa 10 GX Native Fixed Point DSP IP Core, Native Fixed Point DSP IP Core, Fixed Point DSP IP Core, DSP IP Core |
