intel Nios II Bayanin Sakin Zane na Zane-zane
Nios II Haɗe-haɗen Zane-zane na Sakin Bayanan Bayani
Waɗannan bayanin kula na saki sun ƙunshi nau'ikan 13.1 zuwa 15.0 na Altera® Nios® II Embedded Design Suite (EDS). Waɗannan bayanan bayanan saki sun bayyana tarihin bita don Nios II EDS. Don jerin sabbin errata na Nios II EDS, bincika Tushen Ilimi a ƙarƙashin Tallafi akan Altera website. Kuna iya amfani da Tushen Ilimi don bincika errata dangane da sigar samfurin da abin ya shafa da sauran sharuɗɗan.
Bayanai masu dangantaka Altera Ilimi Tushen
Tarihin Gyaran Samfur
Tebur mai zuwa yana nuna tarihin bita don Nios II EDS.
Nios II Haɗe-haɗen Zane-zane Suite Tarihin Bita
Don ƙarin bayani game da fasalulluka na Nios II EDS, koma zuwa littafan Nios II.
Kamfanin Intel. An kiyaye duk haƙƙoƙi. Intel, tambarin Intel, da sauran alamun Intel alamun kasuwanci ne na Kamfanin Intel Corporation ko rassan sa. Intel yana ba da garantin aiwatar da samfuran FPGA da semiconductor zuwa ƙayyadaddun bayanai na yanzu daidai da daidaitaccen garanti na Intel, amma yana da haƙƙin yin canje-canje ga kowane samfuri da sabis a kowane lokaci ba tare da sanarwa ba. Intel ba ya ɗaukar wani nauyi ko alhaki da ya taso daga aikace-aikacen ko amfani da kowane bayani, samfur, ko sabis da aka kwatanta a nan sai dai kamar yadda Intel ya yarda da shi a rubuce. An shawarci abokan cinikin Intel su sami sabon sigar ƙayyadaddun na'urar kafin su dogara ga kowane bayanan da aka buga kuma kafin sanya oda don samfur ko ayyuka. *Wasu sunaye da tambura ana iya da'awarsu azaman mallakar wasu.
Bayanai masu alaƙa
- Nios II Classic Reference Reference Handbook
- Nios II Classic Software Developer's Handbook
- Nios II Gen2 Reference Handbook
- Nios II Gen2 Littafin Jagoran Mai Haɓakawa Software
Nios II EDS v15.0 Sabuntawa
v15.0 Nios II EDS ya haɗa da sabbin abubuwa masu zuwa da haɓakawa:
- Sabon MAX 10 analog-to-dijital Converter (ADC) HAL direban
- Sabuwar Wutar Lantarki Serial Peripheral Interface (QSPI) HAL Direba
- Haɓakawa ga Direban MAX 10 ADC HAL
- Nios II GNU kayan aiki da aka haɓaka zuwa v4.9.1
- Ingantattun tallafi don haɓaka lokacin haɗin haɗin gwiwa (-flto) - Ƙarin iko akan haɓaka mai nuna alama ta duniya ta amfani da mgpopt = [babu, gida, duniya, bayanai, duk]
- Duban madaidaici (sabo a cikin GNU v4.9.1) za a iya kashe shi tare da -fno-delete-null-pointer-checks
- Nios II Linux kernel da kayan aikin kayan aiki an karɓi su daga sama High-profile matsalolin da aka warware:
- An gyara matsalolin direban EPCQ HAL
- Sabon janareta na al'ada wanda aka gyara a tashar Windows Nios II
- stdin yanzu yana aiki daidai akan Windows
Nios II EDS v14.1 Sabuntawa
Nios II Gen2 Processor Core
Sigar ƙarshe ta Nios II shine 14.0 kuma ana kiranta Nios II Classic. Sifofin Nios II bayan wannan ginin ana kiran su Nios II Gen2. Na'urori masu sarrafawa na Nios II Gen2 sun dace da na'urori masu sarrafawa na Nios II Classic, amma suna da sabbin abubuwa masu zuwa:
- Zaɓuɓɓuka don kewayon adireshin 64-bit
- Yankin ƙwaƙwalwar ajiya na zaɓi
- Umarnin lissafi mafi sauri kuma mafi ƙayyadaddun ƙididdiga
Sabbin IPs masu haɗawa don 14.1
Jerin sabon IP ya haɗa da:
- HPS Ethernet mai sauya IPs - Waɗannan suna ba ku damar sanya fitilun HPS Ethernet I/O
zuwa FPGA I/O fil kuma canza su daga tsarin GMII zuwa RGMII ko SGMII.
Lura: Wannan yana da taimako sosai idan an iyakance ku ta HPS I/O. - Sabbin ƙayyadaddun ƙayyadaddun ƙayyadaddun ƙa'idodin IP na iyali:
- Arria 10 - TPIU alamar IP. Trace shine kayan aiki na ƙarshe a cikin gyara software na lokacin aiki, kamar siginar siginar don haɓaka FPGA. Wannan IP yana bawa masu haɓakawa damar fitarwa siginonin gano bugu na ARM® Cortex ™-A9 zuwa fil na waje ta yadda za a iya haɗa na'urorin gyara kuskure kamar Lauterbach® ko ARM Dstream, zuwa A10 SoC Cortex-A9.
- Max 10 - Sabbin IPs waɗanda ke sadar da musaya masu jituwa na Qsys zuwa Max10 ADCs da filasha mai amfani. Ana amfani da waɗannan sababbin IPs a cikin Max10 exampda kayayyaki. Sakin 14.1 yana da sabon exampAbubuwan da ke nuna:
- Yanayin barci Max 10, don aikace-aikacen ƙananan wuta
- Analog I/O don masu haɓakawa waɗanda ke son amfani da haɗaɗɗen ADCs
- Ƙimar daidaitawa biyu daga Max 10 on-chip sanyi ƙwaƙwalwar ajiyar ƙwaƙwalwar ajiya Hakanan an sabunta ƙirar tsarin tsarin zinare na Cyclone® V da ArriaV SoC (GSRDs) don tallafawa sakin 14.1 ACDS da SoC EDS, wannan yana nufin cewa za su haɗa da SoC ta atomatik. software yana gyarawa a cikin 14.1 kamar aikin PLL a cikin preloader.
64-Bit Mai watsa shiri Tallafin Inganta
A cikin wannan sakin, an ƙara ƙarfin 64-bit zuwa kayan aikin masu zuwa:
- 64-bit nios2-gdb uwar garken
- 64-bit nios2-flash-programmer
- 64-bit nios2-terminal
Lura: A cikin ACDS, ana jigilar aƙalla sabar GDB biyu da masu shirye-shiryen flash guda biyu.
Haɓakawa zuwa Muhallin Eclipse
An haɓaka yanayin Eclipse zuwa sigar 4.3 don kawo fa'idodin sabon yanayi zuwa ɗakin ci gaban Nios II. Akwai bambance-bambancen zaɓi na layin umarni tsakanin GCC v4.8.3 da sigar da aka goyan baya a baya. Idan kuna da aikin da aka ƙirƙira tare da sigar baya, kuna buƙatar sabunta abubuwan da kuka yifiles ko sabunta kunshin tallafin hukumar ku (BSP). Gidauniyar Software ta Kyauta tana ba da abubuwan zazzagewa da ake samu a ƙarƙashin GCC Zazzagewa kuma ana samun cikakkun bayanan bayanan GCC a ƙarƙashin Sakin GCC.
Bayanai masu alaƙa http://gcc.gnu.org/
Haɓakawa zuwa Nios II GNU Toolchain
An inganta kayan aikin masu zuwa:
- GCC zuwa sigar 4.8.3
- An kunna haɓaka lokacin haɗin haɗin gwiwa ([flto]).
- GDB zuwa sigar 7.7
- newlib zuwa 1.18
An inganta yanayin gini akan dandamalin rundunan windows don ba da lokutan ginawa cikin sauri. Domin misaliample, gina asali webaikace-aikacen uwar garken yanzu yana ɗaukar kashi ɗaya bisa uku na lokacin da ya saba yi.
Ƙarin Taimako don Max10
A cikin wannan sakin, akwai ƙarin tallafi don Max10 ta hanyar ƙari na ƙaddamar da ƙwaƙwalwar ajiya da tallafin bootload don ƙwaƙwalwar filasha mai amfani. Akwai sabon sigar beta na sabon file mai amfani mai canzawa, wanda ake kira alt-file-convert, wannan yana ba da sauƙin shigar da bayanan ku cikin tsari daidai don lodawa cikin filasha.
Haɓakawa zuwa EPCQ IP Peripheral
HAL software da tallafin bootloader don haɓaka EPCQ mai laushi IP na gefe an ƙara. An inganta EPCQ IP core don ƙara tallafi don yanayin x4 da na'urorin L, yana ba da dama ga na'urar EPCQ da sauri daga Nios ko wasu masanan FPGA.
Nios II EDS v14.0 Sabuntawa
64-Bit Mai watsa shiri Support
Nios II Software Build Tools (SBT) v14.0 kawai yana goyan bayan tsarin runduna 64-bit.
Lura: 32-bit runduna ba su da tallafi.
An koma kayan aikin Nios II masu zuwa zuwa samfurin Quartus II:
- nios2-gdb-uwar garken
- nios2-flash-programmer
- nios2-terminal
Duban Tari na Lokacin Gudu
A cikin sigar farko na Nios II EDS, idan an kunna tari na lokacin gudu, tsarin Nios II na iya zama mara amsawa. An warware wannan batu a cikin v14.0.
Dogon Jump Support
A cikin sigar farko na Nios II EDS, mai tarawa bai goyi bayan dogon tsalle daidai ba (a wajen kewayon adireshin 256-MB). An warware wannan batu a cikin v14.0
Taimakawa Hardware Point Point 2
Don cikakken tallafawa Hardware na Floating Point 2, dole ne ku sake tattara sabon laburare C. A cikin Nios II EDS v13.1, mahaɗin ya kasa haɗa ɗakin karatu na C da aka sake tarawa tare da aikace-aikacen. An warware wannan batu a cikin v14.0.
Tallafin Gadar Qsys
An fara da v14.0, Nios II EDS yana goyan bayan Address Span Extender da IRQ Bridge.
Nios II Gen2 Processor Support
Nios II Gen2 Processor Core
A cikin v14.0, Nios II processor core ya haɗa da preview aiwatar da Nios II Gen2 processor core, yana tallafawa sabbin iyalai na na'urar Altera. Nios II Gen2 processor core yana ba da girma da aiki mai kama da ainihin na'urar sarrafa Nios II, kuma yana dacewa da lambar ƙirar Nios II Classic a matakin binary. Gudun kayan aiki da HAL sun haɗa da zaɓuɓɓuka don tallafawa fasalin Nios II Gen2. Tsarin aiki don samar da BSPs da software na gini iri ɗaya ne, amma BSPs da aka samar don Nios II Classic processor dole ne a sake haɓakawa.
HAL Tallafin don Nios II Gen2 Processor
Nios II Hardware Abstraction Layer (HAL) an ƙara shi don tallafawa abubuwan Nios II Gen2 masu zuwa:
- Kewayon adireshin 32-bit
- Yankunan ƙwaƙwalwar ajiya na gefe (ba a cache).
- Kariyar ECC akan cache bayanai da TCMs a cikin Nios II/f core
Nios II Gen2 Cores Processor da MAX 10 FPGA Support
Na'urorin MAX 10 FPGA suna samun goyon bayan Nios II Gen2 processor, amma ba ta Nios II Classic processor ba. Don aiwatar da tsarin Nios II akan na'urar MAX 10, dole ne ku yi amfani da Nios II Gen2 processor core. Bangaren ƙwaƙwalwar ajiya na Altera On-chip Flash, wanda aka gabatar a cikin 14.0, yana ba Avalon-MM damar samun kan-chip MAX 10 mai amfani flash memory. Tare da wannan bangaren, mai kwafin taya Nios II zai iya kwafin lamba zuwa RAM daga ƙwaƙwalwar filasha mai amfani MAX 10. 1.4.6.3.2. Tallafin kayan aiki don MAX 10 FPGA HAL yana ƙara ainihin tallafin direba don MAX 10 analog zuwa dijital (A/D). Ana sabunta kayan aikin shirye-shirye na na'urar Altera don tallafawa tsara ƙwaƙwalwar filasha mai amfani MAX 10.
Menene sabo a cikin v14.0a10: Nios II Gen2 Processor da Arria 10 FPGA Support
Na'urorin Arria 10 FPGA suna samun goyan bayan na'urar sarrafa Nios II Gen2, amma ba ta na'urar sarrafa Nios II na gargajiya ba. Don aiwatar da tsarin Nios II akan na'urar Arria 10, dole ne ku yi amfani da Nios II Gen2 processor core.
Nios II EDS v13.1 Sabuntawa
An haɓaka GCC zuwa 4.7.3
A cikin v13.1, Nios II Software Build Tools (SBT) an sabunta su don tallafawa sigar v4.7.3 na GCC. Akwai bambance-bambancen zaɓi na layin umarni tsakanin GCC v4.7.3 da sigar da aka goyan baya a baya. Idan kuna da aikin da aka ƙirƙira tare da sigar baya, kuna buƙatar sabunta abubuwan da kuka yifiles ko sabunta kunshin tallafin hukumar ku (BSP).
Lura: GCC v4.7.3 yana ƙara sabbin gargaɗi da saƙonni da yawa. Idan kun yi amfani da zaɓin layin umarni -Werror a cikin sigar da ta gabata, zaku iya ganin kurakuran da ba zato ba tsammani ta haifar da sabbin gargaɗin. Don cikakkun bayanai game da aiwatar da Nios II GCC 4.7.3, koma zuwa haɓaka kayan aikin Nios II GNU daga GCC 4.1.2 zuwa GCC 4.7.3 a cikin Altera Knowledge Base. Gidauniyar Software ta Kyauta tana ba da jagora don aikawa zuwa GCC 4.7, tana tattara batutuwan gama gari. Ana iya samun wannan jagorar akan GCC, GNU Compiler Collection, ƙarƙashin Porting to GCC 4.7. Ana samun cikakkun bayanan bayanan GCC a ƙarƙashin Sakin GCC.
Bayanai masu alaƙa
- Altera Ilimi Tushen
- http://gcc.gnu.org/
Ingantattun Tallafin Umarni na Musamman
A cikin v13.1, Qsys yana ƙara wani zaɓi don zaɓar sabon ɓangaren koyarwa na al'ada, Floating Point Hardware 2. Don ɗaukar advantage na goyon bayan software don umarnin Hardware na Floating Point 2, sun haɗa da altera_nios_custom_instr_floating_point_2.h, wanda ke tilasta GCC kiran ayyukan lissafi na newlib (maimakon ginanniyar ayyukan lissafi na GCC). Altera yana ba da shawarar cewa ku sake haɗa newlib da shi don ingantaccen aiki.
Lura: Kar a yi amfani da zaɓin layin umarni -mcustom -fpu-cfg don GCC. Wannan zaɓin baya goyan bayan umarnin Hardware na Floating Point 2. Kayan aikin gina software na Nios II (SBT) yana ƙara umarni na mutum-mcustom don yinfile don tallafawa umarnin al'ada 2 na Floating Point Hardware.
Tallafin ECC
Farawa daga v13.1, editan sigar Nios II Processor yana ba ku damar ba da damar kariya ta ECC don RAMs a cikin ainihin processor da cache na umarni. Ta hanyar tsoho, ba a kunna ECC akan sake saiti. Don haka, dole ne software ta kunna kariyar ECC. Software kuma na iya shigar da kurakuran ECC cikin ragowar bayanan RAM don tallafawa gwajin keɓantawar ECC da bas ɗin taron. Nios II Hardware Abstraction Layer (HAL) an ƙaddamar da shi don tallafawa ƙaddamarwar ECC da keɓancewa.
Universal Boot Copier
A cikin v13.1, an haɓaka kwafin Nios II don tallafawa ƙarin nau'ikan na'urorin filasha. Ana kiran na'urar kwafin taya ta duniya da aka inganta. The Nios II boot kwafi yana kwafin aikace-aikacen binaries daga na'urorin filasha zuwa ƙwaƙwalwar ajiya mara ƙarfi. Ƙwaƙwalwar filasha an shimfiɗa ta tare da hoton FPGA a mafi ƙanƙancin adireshin ƙwaƙwalwar ajiya, sannan kuma hotunan binaryar aikace-aikacen Nios II. A cikin abubuwan da aka fitar na baya, an kayyade girman hoton FPGA ga kowane dangin na'ura. Koyaya, don na'urori a cikin iyalai na Cyclone V, Stratix V, da Arria V, girman hoton ya bambanta dangane da masu canji masu zuwa:
- Nau'in filasha: Quad-output (EPCQ) ko fitarwa guda ɗaya (EPCS) Ingantacciyar na'urar Kanfigareshan Shirye-shiryen
- Ƙarfin na'urar filasha: 128 ko 256 Mbits
- Matsi
- Serial na gefe dubawa (SPI): ×1 ko ×4
- Tsarin na'ura: guda ɗaya ko cascaded
Yana da wahala ga mai kwafin taya ya gano haɗin yanzu don ya iya amfani da girman hoton da ya dace, kuma kowane algorithm na iya kasa tallafawa daidaitawar gaba. Don magance wannan matsalar, ana ƙara kan kai zuwa hoton FPGA don tantance girman hoton. Ta amfani da girman hoton daga kan kai, na'urar kwafi ta duniya na iya aiki tare da kowane saitin filasha a cikin na'urori na yanzu ko na gaba. An sabunta kayan aikin sof2flash don tallafawa mai kwafin taya na duniya. Wannan canjin baya tasiri ga ikon toshewar FPGA don tsara hoton FPGA ta atomatik a kunnawa.
Abubuwan da aka sani da Errata
Jeri mai zuwa yana ƙunshe da sanannun al'amurra da kura-kurai, idan akwai:
- Akwai ɗan ƙaramin bambanci a cikin halayen cache na Nios II Gen2 wanda zai iya shafar masu haɓakawa waɗanda suka zaɓi yin amfani da yanayin cache mara daidaitattun na'urori masu sarrafawa a cikin aikace-aikacen su.
Bayanai masu alaƙa
Altera Knowledge Base Don ƙarin bayani game da sanannun al'amurra da errata da yadda ake aiki a kusa da su, bincika Tushen Ilimin Altera.
- Nios II Haɗe-haɗen Zane-zane na Sakin Bayanan Bayani na Sakin Aika amsa
Takardu / Albarkatu
 |
intel Nios II Bayanin Sakin Zane na Zane-zane [pdf] Umarni Nios II, Bayanan Bayani na Sakin Zane-zane, Nios II Haɗe-haɗen ƙira Suite Bayanan Sakin Bayanan kula, Bayanan Saki na Zane-zane |
