intel FPGA Programmable Acceleration Card N3000 Board Management Controller
Katin Haɗawa na Intel FPGA N3000 BMC Gabatarwa
Game da wannan Takardun
Duba Jagorar Mai amfani da Hukumar Gudanarwar Hukumar N3000 na Intel FPGA don ƙarin koyo game da ayyuka da fasalulluka na Intel® MAX® 10 BMC da fahimtar yadda ake karanta bayanan telemetry akan Intel FPGA PAC N3000 ta amfani da PLDM akan MCTP SMBus da I2C SMBus . Gabatarwa zuwa tushen dogara ga Intel MAX 10 (RoT) da ingantaccen sabunta tsarin nesa an haɗa shi.
Ƙarsheview
Intel MAX 10 BMC yana da alhakin sarrafawa, saka idanu da ba da damar yin amfani da fasalin jirgin. Abubuwan mu'amalar Intel MAX 10 BMC tare da na'urori masu auna firikwensin kan jirgi, FPGA da walƙiya, kuma suna sarrafa jerin kashe wuta da wutar lantarki, daidaitawar FPGA da zaɓen bayanan telemetry. Kuna iya sadarwa tare da BMC ta amfani da ka'idar Matsayin Matsayin Platform (PLDM) sigar 1.1.1. Firmware na BMC filin haɓakawa ne akan PCIe ta amfani da fasalin sabunta tsarin nesa.
Siffofin BMC
- Yana aiki azaman Tushen Amincewa (RoT) kuma yana ba da damar ingantaccen fasalulluka na Intel FPGA PAC N3000.
- Yana sarrafa firmware da sabunta filasha na FPGA akan PCIe.
- Yana sarrafa tsarin FPGA.
- Yana saita saitunan cibiyar sadarwa don na'urar sake saita lokaci ta C827 Ethernet.
- Sarrafa Ƙaddamar da wutar lantarki da jerin abubuwan gano kuskure tare da kariyar rufewa ta atomatik.
- Yana sarrafa iko da sake saiti akan allo.
- Hanyoyin sadarwa tare da na'urori masu auna firikwensin, FPGA flash da QSFPs.
- Yana lura da bayanan telemetry (tsawon allo, voltage da halin yanzu) kuma yana ba da matakan kariya lokacin da karatun ke waje da mahimmin kofa.
- Yana ba da rahoton bayanan telemetry don ɗaukar nauyin BMC ta hanyar Samfurin Bayanan Matsayin Platform (PLDM) akan MCTP SMBus ko I2C.
- Yana goyan bayan PLDM akan MCTP SMBus ta PCIe SMBus. 0xCE adireshin bawa 8-bit ne.
- Yana goyan bayan I2C SMBus. 0xBC shine adireshin bawa 8-bit.
- Yana isa ga adiresoshin MAC na Ethernet a cikin EEPROM da filin gano wuri mai maye gurbin (FRUID) EEPROM.
Kamfanin Intel. An kiyaye duk haƙƙoƙi. Intel, tambarin Intel, da sauran alamun Intel alamun kasuwanci ne na Kamfanin Intel Corporation ko rassan sa. Intel yana ba da garantin aiwatar da samfuran FPGA da semiconductor zuwa ƙayyadaddun bayanai na yanzu daidai da daidaitaccen garanti na Intel, amma yana da haƙƙin yin canje-canje ga kowane samfuri da sabis a kowane lokaci ba tare da sanarwa ba. Intel ba ya ɗaukar wani nauyi ko alhaki da ya taso daga aikace-aikacen ko amfani da kowane bayani, samfur, ko sabis da aka kwatanta a nan sai dai kamar yadda Intel ya yarda da shi a rubuce. An shawarci abokan cinikin Intel su sami sabon sigar ƙayyadaddun na'urar kafin su dogara ga kowane bayanan da aka buga kuma kafin sanya oda don samfur ko ayyuka. *Wasu sunaye da tambura ana iya da'awarsu azaman mallakar wasu.
Hoton Babban Matsayi na BMC
Tushen Amincewa (Root)
Intel MAX 10 BMC yana aiki azaman Tushen Amincewa (RoT) kuma yana ba da damar ingantaccen tsarin sabunta tsarin nesa na Intel FPGA PAC N3000. RoT ya haɗa da fasalulluka waɗanda zasu iya taimakawa hana masu zuwa:
- Lodawa ko aiwatar da lamba ko ƙira mara izini
- Ayyukan rugujewar yunƙurin ta hanyar software mara gata, software mai gata, ko BMC mai masaukin baki
- Ba da gangan aiwatar da tsohuwar lambar ko ƙira tare da sanannun kwari ko lahani ta hanyar baiwa BMC damar soke izini
Intel® FPGA Mai Shirye-shiryen Hanzarta Katin N3000 Jagorar Mai Gudanarwar Gudanarwa
Intel FPGA PAC N3000 BMC kuma yana aiwatar da wasu manufofin tsaro da yawa da suka shafi shiga ta hanyar musaya daban-daban, da kuma kare walƙiya ta kan jirgin ta hanyar iyakance ƙimar rubutu. Da fatan za a koma zuwa Intel FPGA Programmable Acceleration Card N3000 Tsaro Jagoran Mai Amfani don bayani kan RoT da fasalulluka na tsaro na Intel FPGA PAC N3000.
Bayanai masu alaƙa
Katin Haɗawa na Intel FPGA N3000 Jagorar Mai Amfani da Tsaro
Amintaccen Sabunta Tsarin Nisa
BMC tana goyan bayan Amintaccen RSU don Intel MAX 10 BMC Nios® firmware da hoton RTL da sabuntawar hoto na Intel Arria® 10 FPGA tare da tantancewa da daidaito. Nios firmware ne ke kula da tabbatar da hoton yayin aiwatar da sabuntawa. Ana tura sabuntawar akan hanyar sadarwa ta PCIe zuwa Intel Arria 10 GT FPGA, wanda hakanan ya rubuta shi a kan Intel Arria 10 FPGA SPI master zuwa Intel MAX 10 FPGA SPI bawan. Wurin walƙiya na ɗan lokaci mai suna stagyankin yana adana kowane nau'in ingantaccen bitar bitar ta hanyar SPI interface. Ƙirar BMC RoT tana ƙunshe da ƙirar ƙira wanda ke aiwatar da aikin tabbatar da hash na SHA2 256 da aikin tabbatar da sa hannun ECDSA 256 P 256 don tantance maɓalli da hoton mai amfani. Nios firmware yana amfani da ƙirar ƙirar ƙira don tantance hoton mai amfani da aka sanya hannu a cikin stagyankin. Idan tabbaci ya wuce, Nios firmware yana kwafin hoton mai amfani zuwa yankin filasha mai amfani. Idan tantancewar ta gaza, Nios firmware yayi rahoton kuskure. Da fatan za a koma zuwa Intel FPGA Programmable Acceleration Card N3000 Tsaro Jagoran Mai Amfani don bayani kan RoT da fasalulluka na tsaro na Intel FPGA PAC N3000.
Bayanai masu alaƙa
Katin Haɗawa na Intel FPGA N3000 Jagorar Mai Amfani da Tsaro
Gudanar da Tsarin Wuta
Injin na'ura na BMC Power sequencer yana sarrafa Intel FPGA PAC N3000 kunna wutar lantarki da jerin kashe wutar lantarki don lokuta na kusurwa yayin aikin kunna wuta ko aiki na yau da kullun. Ƙunƙarar wutar lantarki ta Intel MAX 10 ta ƙunshi dukkan tsari wanda ya haɗa da Intel MAX 10 boot-up, boot-up Nios, da tsarin sarrafa wutar lantarki don daidaitawar FPGA. Dole ne mai watsa shiri ya duba nau'ikan ginin duka Intel MAX 10 da FPGA, da matsayin Nios bayan kowane zagayowar wutar lantarki, kuma ya ɗauki matakan da suka dace idan Intel FPGA PAC N3000 ya shiga cikin lokuta na kusurwa kamar Intel MAX 10 ko Kamfanin FPGA gina gazawar lodi ko gazawar Nios boot up. BMC tana kare Intel FPGA PAC N3000 ta hanyar rufe ikon katin a ƙarƙashin waɗannan sharuɗɗa:
- 12V Auxiliary ko PCIe baki wadata voltage yana ƙasa 10.46 V
- FPGA ainihin zafin jiki ya kai 100°C
- Yanayin zafin jiki ya kai 85 ° C
Kula da Hukumar Ta hanyar Sensors
Intel MAX 10 BMC mai saka idanu voltage, halin yanzu da zafin jiki na abubuwa daban-daban akan Intel FPGA PAC N3000. Mai watsa shiri BMC na iya samun damar bayanan telemetry ta hanyar PCIe SMBus. PCIe SMBus tsakanin mai masaukin BMC da Intel FPGA PAC N3000 Intel MAX 10 BMC duka PLDM ne akan ƙarshen ƙarshen MCTP SMBus da Standard I2C bawa ga Avalon-MM interface (karanta-kawai).
Kulawar Hukumar ta PLDM akan MCTP SMBus
BMC akan Intel FPGA PAC N3000 yana sadarwa tare da sabar BMC akan PCIe* SMBus. Mai sarrafa MCTP yana goyan bayan Samfurin Bayanan Matsayin Platform (PLDM) akan tari na Tsarin Sufuri na Kayan Gudanarwa (MCTP). Adireshin bawa na ƙarshen MCTP shine 0xCE ta tsohuwa. Ana iya sake tsara shi zuwa sashin da ya dace na FPGA Quad SPI flash ta waje ta hanyar in-band idan ya cancanta. Intel FPGA PAC N3000 BMC yana goyan bayan wani yanki na PLDM da umarnin MCTP don ba da damar sabar BMC don samun bayanan firikwensin kamar vol.tage, halin yanzu da zafin jiki.
Lura:
Samfurin Bayanan Matsayin Platform (PLDM) sama da ƙarshen MCTP SMBus ana tallafawa. PLDM akan MCTP ta hanyar PCIe na asali ba a tallafawa. Nau'in na'urar SMBus: Na'urar "Kafaffen Ba Ganowa ba" tana da tallafi ta tsohuwa, amma duk nau'ikan na'urori huɗu suna da tallafi kuma ana iya sake daidaita su. Ana goyan bayan ACK-Poll
- Ana goyan baya tare da tsohuwar adireshin bawa na SMBus 0xCE.
- An goyan bayan da ƙayyadadden adireshin bawa ko sanyawa.
BMC tana goyan bayan sigar 1.3.0 na Yarjejeniyar Sufuri ta Gudanarwa (MCTP) Ƙayyadaddun Ƙayyadaddun Bayanai (DTMF ƙayyadaddun DSP0236), sigar 1.1.1 na PLDM don Matsayin Kulawa da Kulawa da Platform ( ƙayyadaddun DTMF DSP0248), da sigar 1.0.0 na PLDM don Sarrafa Saƙo da Ganowa (Tsarin DTMF DSP0240).
Bayanai masu alaƙa
Ƙididdigar Ƙwararrun Ƙwararrun Gudanar da Rarraba (DMTF) Don hanyar haɗi zuwa takamaiman ƙayyadaddun DMTF
Saurin Interface SMBus
Aiki na Intel FPGA PAC N3000 yana goyan bayan ma'amalar SMBus a 100 kHz ta tsohuwa.
Tallafin Fakitin MCTP
Ma'anar MCTP
- Ƙungiyar saƙon tana wakiltar nauyin nauyin saƙon MCTP. Jikin saƙon na iya ɗaukar fakitin MCTP da yawa.
- Load ɗin fakiti na MCTP yana nufin ɓangaren ɓangaren saƙon saƙon MCTP wanda aka ɗauka a cikin fakitin MCTP guda ɗaya.
- Sashin watsawa yana nufin girman rabon kayan aikin fakitin MCTP.
Girman Rukunin watsawa
- Girman naúrar watsawa ta asali (ƙaramar naúrar watsawa) don MCTP shine 64 bytes.
- Ana buƙatar duk saƙonnin sarrafawa na MCTP don samun nauyin fakiti wanda bai fi girma daga sashin watsawa na asali ba tare da yin shawarwari ba. (Tsarin shawarwari don manyan raka'o'in watsawa tsakanin wuraren ƙarshe shine takamaiman nau'in saƙo kuma ba a magana a cikin ƙayyadaddun Base na MCTP)
- Duk wani saƙon MCTP wanda girman saƙonsa ya fi 64 bytes za a raba shi zuwa fakiti masu yawa don watsa saƙo ɗaya.
Filin Fakitin MCTP
Fakitin Generic/Filayen Saƙo
Goyan bayan Saitin Umurni
Dokokin MCTP masu goyan baya
- Sami Tallafin Sigar MCTP
- Bayanin Sigar Base Spec
- Bayanin Sigar Ka'idar Sarrafa
- PLDM akan sigar MCTP
- Saita ID na Ƙarshe
- Sami ID na Ƙarshen
- Samun Ƙarshen UUID
- Sami Tallafin Nau'in Saƙo
- Sami Ƙayyadadden Tallafin Saƙon Mai siyarwa
Lura:
Don Samun Ma'anar Tallafin Saƙon Mai siyarwa, BMC yana amsawa tare da lambar kammala ERROR_INVALID_DATA(0x02).
Dokokin Ƙayyadaddun Tushen PLDM masu goyan baya
- SaitaTID
- SamunTID
- SamunPLDMVersion
- GetPLDMT iri
- Sami PLDMCommands
PLDM mai goyan bayan don Kula da Platform da Dokokin Ƙayyadaddun Sarrafa
- SaitaTID
- SamunTID
- SamunSensorReading
- GetSensorThresholds
- SetSensorMatsakai
- Samun PDRRRepositoryInfo
- Farashin PDR
Lura:
Babban kuri'un BMC Nios II don bayanan telemetry daban-daban a kowane miliyon 1, kuma tsawon lokacin jefa kuri'a yana ɗaukar kusan 500 ~ 800 millise seconds, saboda haka saƙon amsawa tare da saƙon buƙatun daidai na umarnin GetSensorReading ko GetSensorThresholds daidai da sabunta kowane 500 ~ 800 milliseconds.
Lura:
GetStateSensorReadings ba shi da tallafi.
PLDM Topology da Matsayi
Ƙididdigar Ma'anar Platform Description
Intel FPGA PAC N3000 yana amfani da 20 Platform Descriptor Records (PDRs). Intel MAX 10 BMC kawai yana goyan bayan haɗin gwiwar PDRs inda PDRs ba za a ƙara ko cirewa da ƙarfi ba lokacin da aka toshe QSFP da cirewa. Lokacin da aka cire yanayin aikin firikwensin kawai za a ba da rahoton cewa babu shi.
Sunayen Sensor da Hannun Rikodi
Ana sanya duk PDRs ƙimar ƙima mai ƙima da ake kira Rikodin Handle. Ana amfani da wannan ƙimar don samun dama ga kowane PDRs a cikin Ma'ajin PDR ta hanyar GetPDR (bayanin DTMF DSP0248). Tebu mai zuwa shine ƙaƙƙarfan jerin firikwensin da aka saka idanu akan Intel FPGA PAC N3000.
PDRs Sunan Sensor da Rikodi Hannu
| Aiki | Sunan Sensor | Bayanin Sensor | PLDM | ||
| Tushen Karatun Sensor (Bayani) | PDR
Rikodi Handle |
Farashin a cikin PDR | Canje-canjen ƙira izini ta hanyar PLDM | ||
| Jimlar ikon shigar da Intel FPGA PAC | Ikon Ginin | Yi lissafta daga yatsun PCIe 12V na yanzu da Voltage | 1 | 0 | A'a |
| Yatsu na PCIe 12V na yanzu | 12V Jirgin Baya na Yanzu | PAC1932 SENSE1 | 2 | 0 | A'a |
| Yatsun PCIe 12V Voltage | 12 V Jirgin Baya Voltage | PAC1932 SENSE1 | 3 | 0 | A'a |
| 1.2 V Rail Voltage | 1.2 V Voltage | Saukewa: MAX10ADC | 4 | 0 | A'a |
| 1.8 V Rail Voltage | 1.8 V Voltage | Babban darajar ADC10 | 6 | 0 | A'a |
| 3.3 V Rail Voltage | 3.3 V Voltage | Babban darajar ADC10 | 8 | 0 | A'a |
| FPGA Core Voltage | FPGA Core Voltage | LTC3884 (U44) | 10 | 0 | A'a |
| FPGA Core Current | FPGA Core Current | LTC3884 (U44) | 11 | 0 | A'a |
| FPGA Core Zazzabi | FPGA Core Zazzabi | FPGA temp diode ta hanyar TMP411 | 12 | Gargadi na sama: 90
Babban Fatal: 100 |
Ee |
| Zazzabi na allo | Zazzabi na allo | TMP411 (U65) | 13 | Gargadi na sama: 75
Babban Fatal: 85 |
Ee |
| QSFP0 Voltage | QSFP0 Voltage | Modulun QSFP na waje (J4) | 14 | 0 | A'a |
| QSFP0 Zazzabi | QSFP0 Zazzabi | Modulun QSFP na waje (J4) | 15 | Gargaɗi na sama: Ƙimar da QSFP mai siyarwa ya saita
Babban Fatal: Ƙimar da QSFP mai siyarwa ya saita |
A'a |
| PCIe Auxiliary 12V na yanzu | 12V AUX | PAC1932 SENSE2 | 24 | 0 | A'a |
| PCIe Auxiliary 12V Voltage | 12 V AUX Voltage | PAC1932 SENSE2 | 25 | 0 | A'a |
| QSFP1 Voltage | QSFP1 Voltage | Modulun QSFP na waje (J5) | 37 | 0 | A'a |
| QSFP1 Zazzabi | QSFP1 Zazzabi | Modulun QSFP na waje (J5) | 38 | Gargaɗi na sama: Ƙimar da QSFP mai siyarwa ya saita
Babban Fatal: Ƙimar da QSFP mai siyarwa ya saita |
A'a |
| PKVL A Core Zazzabi | PKVL A Core Zazzabi | PKVL guntu (88EC055) (U18A) | 44 | 0 | A'a |
| ci gaba… | |||||
| Aiki | Sunan Sensor | Bayanin Sensor | PLDM | ||
| Tushen Karatun Sensor (Bayani) | PDR
Rikodi Handle |
Farashin a cikin PDR | Canje-canjen ƙira izini ta hanyar PLDM | ||
| PKVL A Serdes Zazzabi | PKVL A Serdes Zazzabi | PKVL guntu (88EC055) (U18A) | 45 | 0 | A'a |
| PKVL B Core Zazzabi | PKVL B Core Zazzabi | PKVL guntu (88EC055) (U23A) | 46 | 0 | A'a |
| PKVL B Serdes Zazzabi | PKVL B Serdes Zazzabi | PKVL guntu (88EC055) (U23A) | 47 | 0 | A'a |
Lura:
Babban Gargaɗi da Ƙimar Ƙarfi na QSFP an saita ta mai siyar da QSFP. Koma zuwa takardar bayanan mai siyarwa don ƙimar. BMC za ta karanta waɗannan ƙimar ƙima kuma ta ba da rahoton su. fpgad sabis ne da zai iya taimaka maka kare uwar garken daga faɗuwa lokacin da kayan aikin ya kai saman babban abin da ba za a iya murmurewa ba ko ƙasa da matakin firikwensin da ba za a iya dawo da shi ba (wanda kuma ake kira da kofa mai mutuwa). fpgad yana da ikon sa ido kan kowane firikwensin 20 da Manajan Gudanar da Hukumar ya ruwaito. Da fatan za a koma zuwa batun Ƙaƙwalwar Alƙawari daga Jagorar Mai Amfani da Haɗawa Stack: Intel FPGA Programmable Acceleration Card N3000 don ƙarin bayani.
Lura:
ƙwararrun tsarin sabar OEM yakamata su samar da sanyaya da ake buƙata don ayyukan ku. Kuna iya samun ƙimar firikwensin ta hanyar aiwatar da umarnin OPAE mai zuwa azaman tushen ko sudo: $ sudo fpgainfo bmc
Bayanai masu alaƙa
Jagorar Mai Amfani da Haɗawa Stack: Intel FPGA Mai Shirye-shiryen Haɗawa Katin N3000
Kulawar Hukumar ta I2C SMBus
Daidaitaccen bawan I2C ga Avalon-MM dubawa (karanta-kawai) yana raba PCIe SMBus tsakanin mai masaukin BMC da Intel MAX 10 RoT. Intel FPGA PAC N3000 yana goyan bayan daidaitaccen ƙirar bawa na I2C kuma adireshin bawa shine 0xBC ta tsohuwa kawai don samun damar waje. Yanayin adireshi byte shine yanayin adireshi na 2-byte. Anan ga taswirar ma'aunin ajiyar bayanan telemetry wanda zaku iya amfani da shi don samun damar bayanai ta umarnin I2C. Shagon bayanin yana bayyana yadda za a iya ƙara sarrafa ƙimar rijistar da aka dawo don samun ainihin ƙimar. Raka'a na iya zama Celsius (°C), mA, mV, mW dangane da abin da firikwensin da kuka karanta.
Bayanin Telemetry Rijistar Taswirar Ƙwaƙwalwar ajiya
| Yi rijista | Kashewa | Nisa | Shiga | Filin | Default Value | Bayani |
| Zazzabi na allo | 0 x100 | 32 | RO | [31:0] | 32'h00000000 | TMP411(U65)
Ƙimar rajista ta sanya hannu kan ƙima Zazzabi = ƙimar rajista * 0.5 |
| Babban Gargadi na Hukumar Zazzabi | 0 x104 | 32 | RW | [31:0] | 32'h00000000 | TMP411(U65)
Ƙimar rajista ta sanya hannu lamba |
| Babban Iyaka = ƙimar rajista
* 0.5 |
||||||
| Babban Zazzabi na allo | 0 x108 | 32 | RW | [31:0] | 32'h00000000 | TMP411(U65)
Ƙimar rajista ta sanya hannu lamba |
| High Critical = ƙimar rajista
* 0.5 |
||||||
| FPGA Core Zazzabi | 0 x110 | 32 | RO | [31:0] | 32'h00000000 | TMP411(U65)
Ƙimar rajista ta sanya hannu lamba |
| Zazzabi = ƙimar rajista
* 0.5 |
||||||
| Farashin FPGA
Babban Gargadi |
0 x114 | 32 | RW | [31:0] | 32'h00000000 | TMP411(U65)
Ƙimar rajista ta sanya hannu lamba |
| Babban Iyaka = ƙimar rajista
* 0.5 |
||||||
| ci gaba… | ||||||
| Yi rijista | Kashewa | Nisa | Shiga | Filin | Default Value | Bayani |
| FPGA Core Voltage | 0x13c ku | 32 | RO | [31:0] | 32'h00000000 | LTC3884(U44)
Voltage(mV) = darajar rajista |
| FPGA Core Current | 0 x140 | 32 | RO | [31:0] | 32'h00000000 | LTC3884(U44)
Yanzu (mA) = ƙimar rajista |
| 12v Jirgin baya Voltage | 0 x144 | 32 | RO | [31:0] | 32'h00000000 | Voltage(mV) = darajar rajista |
| 12v Jirgin baya na Yanzu | 0 x148 | 32 | RO | [31:0] | 32'h00000000 | Yanzu (mA) = ƙimar rajista |
| 1.2v Voltage | 0x14c ku | 32 | RO | [31:0] | 32'h00000000 | Voltage(mV) = darajar rajista |
| 12v Aux Voltage | 0 x150 | 32 | RO | [31:0] | 32'h00000000 | Voltage(mV) = darajar rajista |
| 12v Aux na yanzu | 0 x154 | 32 | RO | [31:0] | 32'h00000000 | Yanzu (mA) = ƙimar rajista |
| 1.8v Voltage | 0 x158 | 32 | RO | [31:0] | 32'h00000000 | Voltage(mV) = darajar rajista |
| 3.3v Voltage | 0x15c ku | 32 | RO | [31:0] | 32'h00000000 | Voltage(mV) = darajar rajista |
| Ikon Ginin | 0 x160 | 32 | RO | [31:0] | 32'h00000000 | Power(mW) = darajar rajista |
| PKVL A Core Zazzabi | 0 x168 | 32 | RO | [31:0] | 32'h00000000 | PKVL1 (U18A)
Ƙimar rajista ta sanya hannu lamba Zazzabi = ƙimar rajista * 0.5 |
| PKVL A Serdes Zazzabi | 0x16c ku | 32 | RO | [31:0] | 32'h00000000 | PKVL1 (U18A)
Ƙimar rajista ta sanya hannu lamba Zazzabi = ƙimar rajista * 0.5 |
| PKVL B Core Zazzabi | 0 x170 | 32 | RO | [31:0] | 32'h00000000 | PKVL2 (U23A)
Ƙimar rajista ta sanya hannu lamba Zazzabi = ƙimar rajista * 0.5 |
| PKVL B Serdes Zazzabi | 0 x174 | 32 | RO | [31:0] | 32'h00000000 | PKVL2 (U23A)
Ƙimar rajista ta sanya hannu lamba Zazzabi = ƙimar rajista * 0.5 |
Ana samun ƙimar QSFP ta karanta tsarin QSFP da bayar da rahoton ƙimar karantawa a cikin rijistar da ta dace. Idan ƙirar QSFP ba ta goyan bayan Kulawar Dijital Diagnostics ko kuma idan ba a shigar da tsarin QSFP ba, to ku yi watsi da ƙimar da aka karanta daga rajistar QSFP. Yi amfani da kayan aikin Intelligent Platform Management Interface (IPMI) don karanta bayanan telemetry ta cikin motar I2C.
Umurnin I2C don karanta yanayin yanayin allo a adireshin 0x100:
A cikin umarnin da ke ƙasa:
- 0x20 shine babban adireshin bas ɗin I2C na uwar garken ku wanda zai iya samun damar ramukan PCIe kai tsaye. Wannan adireshin ya bambanta da uwar garken. Da fatan za a koma zuwa takaddar bayanan uwar garken ku don daidai adireshin I2C na sabar ku.
- 0xBC shine adireshin bawa na I2C na Intel MAX 10 BMC.
- 4 shine adadin bayanan bayanan karantawa
- 0x01 0x00 shine adireshin rajista na zazzabi na hukumar wanda aka gabatar a cikin tebur.
Umurni:
ipmitool i2c bas = 0x20 0xBC 4 0x01 0x00
Fitowa:
01110010 00000000 00000000 00000000
Ƙimar fitarwa a cikin hexidecimal shine: 0x72000000 0x72 shine 114 a cikin ƙima. Don ƙididdige yawan zafin jiki a Celsius ninka da 0.5: 114 x 0.5 = 57 °C
Lura:
Ba duk sabobin ke goyan bayan bas ɗin I2C kai tsaye zuwa ramukan PCIe ba. Da fatan za a duba bayanan uwar garken ku don bayanin tallafi da adireshin bas I2C.
Tsarin Bayanan EEPROM
Wannan sashe yana bayyana tsarin bayanai na duka MAC Address EEPROM da FRUID EEPROM kuma wanda mai watsa shiri da FPGA za su iya isa gare su.
MAC EEPROM
A lokacin masana'antu, Intel yana shirya adireshin MAC na EEPROM tare da adiresoshin MAC na Intel Ethernet Controller XL710-BM2. Intel MAX 10 yana shiga cikin adiresoshin da ke cikin adireshin MAC EEPROM ta cikin bas ɗin I2C. Gano adireshin MAC ta amfani da umarni mai zuwa: $ sudo fpga mac
MAC Address EEPROM kawai yana ƙunshe da adireshin MAC na farawa 6-byte a adireshin 0x00h sannan kuma adadin adireshi na MAC na 08. Ana kuma buga adireshin MAC na farawa akan alamar alamar a gefen baya na Printed Circuit Board (PCB). Direban OPAE yana ba da nodes na sysfs don samun adireshin MAC na farawa daga wuri mai zuwa: /sys/class/fpga/intel-fpga-dev.*/intel-fpga-fme.*/spi altera.*.auto/spi_master/ spi */spi*/mac_address Fara adireshin MAC Example: 644C360F4430 Direban OPAE yana samun ƙidayar daga wuri mai zuwa: /sys/class/fpga/ intel-fpga-dev.*/intel-fpga-fme.*/spi-altera.*.auto/spi_master/spi*/ spi*/mac_count MAC lissafin Example: 08 Daga adireshin MAC na farawa, sauran adiresoshin MAC guda bakwai ana samun su ta hanyar ƙara ƙaramar Byte (LSB) na farkon MAC Adireshin ta ƙidaya ɗaya ga kowane adireshin MAC na gaba. Adireshin MAC na gaba misaliampda:
- Saukewa: 644C360F4431
- Saukewa: 644C360F4432
- Saukewa: 644C360F4433
- Saukewa: 644C360F4434
- Saukewa: 644C360F4435
- Saukewa: 644C360F4436
- Saukewa: 644C360F4437
Lura: Idan kana amfani da ES Intel FPGA PAC N3000, MAC EEPROM mai yiwuwa ba za a tsara shi ba. Idan ba a tsara MAC EEPROM ba to adireshin MAC na farko ya karanta ya dawo azaman FFFFFFFFFFFF.
Filin Maye gurbin Naúrar Identification (FRUID) Samun damar EEPROM
Kuna iya karanta filin gano wuri mai maye gurbin (FRUID) EEPROM (0xA0) daga mai masaukin BMC ta hanyar SMBus. Tsarin da ke cikin FRUID EEPROM ya dogara ne akan ƙayyadaddun IPMI, Platform Management FRU Ma'anar Ma'anar Ma'anar Bayanan Bayani, v1.3, Maris 24, 2015, daga wanda aka samo tsarin bayanan hukumar. FRUID EEPROM yana biye da tsarin kai na gama gari tare da yankin allo da yankin Bayanin samfur. Koma zuwa teburin da ke ƙasa don waɗanne filaye a cikin taken gama gari ya shafi FRUID EEPROM.
Babban Shugaban FRUID EEPROM
Duk filayen da ke cikin taken gama gari wajibi ne.
| Tsawon Filin cikin Bytes | Bayanin filin | Darajar EEPROM FRUID |
|
1 |
Siffar Babban Magani na gama gari 7:4 - an tanada, rubuta azaman 0000b
3: 0 - lambar sigar tsari = 1h don wannan ƙayyadaddun bayanai |
01h (Kafa 00000001b) |
|
1 |
Wurin Amfani na Cikin Farawa na Farko (a cikin ɗimbin bytes 8).
00h yana nuna cewa wannan yanki ba ya nan. |
00h (babu) |
|
1 |
Yankin Bayanin Chassis Fara Rago (a cikin ɗimbin bytes 8).
00h yana nuna cewa wannan yanki ba ya nan. |
00h (babu) |
|
1 |
Wurin Farawa na Hukumar (a cikin ɗimbin bytes 8).
00h yana nuna cewa wannan yanki ba ya nan. |
01h ku |
|
1 |
Wurin Bayanin Samfura Farawa na Kashe (a cikin ɗimbin yawa na 8 bytes).
00h yana nuna cewa wannan yanki ba ya nan. |
0 Ch |
|
1 |
MultiRecord Wurin Farawa na Farko (a cikin ɗimbin yawa na 8 bytes).
00h yana nuna cewa wannan yanki ba ya nan. |
00h (babu) |
| 1 | PAD, rubuta kamar 00h | 00h ku |
|
1 |
Na kowa Header Checksum (sifili checksum) |
F2h |
Ana sanya bytes na gama gari daga adireshin farko na EEPROM. Tsarin yana kama da hoton da ke ƙasa.
FRUID EEPROM Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwaƙwalwa
Yankin Hukumar FRUID EEPROM
| Tsawon Filin cikin Bytes | Bayanin filin | Darajojin filin | Rufaffen filin |
| 1 | Tsarin Yanki Shafin 7:4 - Ajiye, rubuta azaman 0000b 3:0 - lambar sigar tsarin | 0 x01 | Saita zuwa 1h (0000 0001b) |
| 1 | Tsawon Yankin allo (a cikin ɗimbin yawa na 8 bytes) | 0x0B | 88 bytes (ya haɗa da 2 pad 00 bytes) |
| 1 | Lambar Harshe | 0 x00 | Saita zuwa 0 don Ingilishi
Lura: Babu wasu harsuna da ke da tallafi a wannan lokacin |
| 3 | Mfg. Kwanan wata / Lokaci: Adadin mintuna daga 0:00 na safe 1/1/96.
Aƙalla muhimman ta farko (kadan ƙarshen zamani) 00_00_00h = Ba a fayyace ba (Filin mai ƙarfi) |
0 x10
0 x65 0xB7 ku |
Bambancin lokaci tsakanin 12:00 AM 1/1/96 zuwa 12 na yamma
11/07/2018 shine 12018960 mintuna = b76510h - an adana shi a cikin ƙaramin tsari na endian |
| 1 | Nau'in Manufacturer allo / byte tsawon | 0xD2 ku | 8-bit ASCII + LATIN1 mai lamba 7:6 – 11b
5:0 - 010010b (18 bytes na bayanai) |
| P | bytes Manufacturer Board | 0 x49
0x6E 0 x74 0 x65 0x6c ku 0 xAE |
8-bit ASCII + LATIN1 mai lamba Intel® Corporation |
| ci gaba… | |||
| Tsawon Filin cikin Bytes | Bayanin filin | Darajojin filin | Rufaffen filin |
| 0 x20
0 x43 0x6F ku 0 x72 0 x70 0x6F ku 0 x72 0 x61 0 x74 0 x69 0x6F ku 0x6E |
|||
| 1 | Nau'in samfurin Sunan allo / byte tsawon | 0xD5 ku | 8-bit ASCII + LATIN1 mai lamba 7:6 – 11b
5:0 - 010101b (21 bytes na bayanai) |
| Q | Sunan samfurin bytes | 0X49
0X6E 0X74 0X65 0X6C 0XAE 0X20 0X46 0X50 0X47 0X41 0X20 0X50 0X41 0X43 0X20 0X4E 0X33 0X30 0X30 0X30 |
8-bit ASCII + LATIN1 mai lamba Intel FPGA PAC N3000 |
| 1 | Nau'in lambar Serial Board / byte tsawon | 0xCC ku | 8-bit ASCII + LATIN1 mai lamba 7:6 – 11b
5:0 - 001100b (12 bytes na bayanai) |
| N | Serial Number bytes (Filin Mai Sauƙi) | 0 x30
0 x30 0 x30 0 x30 0 x30 0 x30 0 x30 0 x30 |
8-bit ASCII + LATIN1 codeed
Lambobin hex 1st 6 sune OUI: 000000 Lambobin hex 2nd 6 sune adireshin MAC: 000000 |
| ci gaba… | |||
| Tsawon Filin cikin Bytes | Bayanin filin | Darajojin filin | Rufaffen filin |
| 0 x30
0 x30 0 x30 0 x30 |
Lura: An ƙididdige wannan azaman example kuma yana buƙatar gyarawa a cikin ainihin na'ura
Lambobin hex 1st 6 sune OUI: 644C36 Lambobin hex 2nd 6 sune adireshin MAC: 00AB2E Lura: Don gane ba shirin FRUID, saita OUI da adireshin MAC zuwa "0000". |
||
| 1 | Nau'in Sashe na allo Nau'in/tsawon byte | 0xCE | 8-bit ASCII + LATIN1 mai lamba 7:6 – 11b
5:0 - 001110b (14 bytes na bayanai) |
| M | Lambar Sashin allo bytes | 0x4B
0 x38 0 x32 0 x34 0 x31 0 x37 0 x20 0 x30 0 x30 0 x32 0 x20 0 x20 0 x20 0 x20 |
8-bit ASCII + LATIN1 mai lamba tare da BOM ID.
Don tsayin byte 14, lambar sashin allo mai lamba exampBayani na K82417-002 Lura: An ƙididdige wannan azaman example kuma yana buƙatar gyarawa a cikin ainihin na'ura. Wannan ƙimar filin ta bambanta da lambar PBA daban-daban. An cire Bita na PBA a cikin FRUID. Waɗannan bytes huɗu na ƙarshe sun dawo babu komai kuma an tanada su don amfani na gaba. |
| 1 | FRU File Nau'in ID / byte tsayi | 0 x00 | 8-bit ASCII + LATIN1 mai lamba 7:6 – 00b
5:0 - 000000b (0 bytes na bayanai) Farashin FRU File Ba a haɗa filin baiti na ID da ya kamata ya bi wannan saboda filin zai zama 'babu'. Lura: FRU File ID bytes. Farashin FRU File filin sigar filin da aka riga aka ƙayyade wanda aka bayar azaman taimakon masana'antu don tabbatar da file wanda aka yi amfani dashi lokacin ƙira ko sabunta filin don loda bayanan FRU. Abubuwan da ke cikin keɓaɓɓen masana'anta ne. Hakanan ana bayar da wannan filin a yankin Bayanin Hukumar. Ko dai ko duka filayen na iya zama 'babu'. |
| 1 | Nau'in MMID/tsawon byte | 0xc6 ku | 8-bit ASCII + LATIN1 codeed |
| ci gaba… | |||
| Tsawon Filin cikin Bytes | Bayanin filin | Darajojin filin | Rufaffen filin |
| 7:6-11b
5:0 - 000110b (6 bytes na bayanai) Lura: An ƙididdige wannan azaman example kuma yana buƙatar gyarawa a cikin ainihin na'ura |
|||
| M | MMID bytes | 0 x39
0 x39 0 x39 0 x44 0 x58 0 x46 |
An tsara shi azaman lambobi hex 6. Musamman example a cikin cell tare da Intel FPGA PAC N3000 MMID = 999DXF.
Wannan ƙimar filin ta bambanta da filayen SKU daban-daban kamar MMID, OPN, PBN da sauransu. |
| 1 | C1h (nau'in / tsawo byte rufaffiyar don nuna babu sauran filayen bayanai). | 0xc1 ku | |
| Y | 00h - duk sauran sarari mara amfani | 0 x00 | |
| 1 | Checksum Area Board (sifili checksum) | 0xB9 ku | Lura: Checksum ɗin da ke cikin wannan tebur ɗin ƙididdiga ce ta sifili da aka lissafta don ƙimar da aka yi amfani da ita a cikin tebur. Dole ne a sake ƙididdige shi don ainihin ƙimar Intel FPGA PAC N3000. |
| Tsawon Filin cikin Bytes | Bayanin filin | Darajojin filin | Rufaffen filin |
| 1 | Siffar Wurin Samfura 7:4 - an tanada, rubuta azaman 0000b
3: 0 - lambar sigar tsari = 1h don wannan ƙayyadaddun bayanai |
0 x01 | Saita zuwa 1h (0000 0001b) |
| 1 | Tsawon Yankin Samfur (a cikin ɗimbin yawa na 8 bytes) | 0x0A | Jimlar 80 bytes |
| 1 | Lambar Harshe | 0 x00 | Saita zuwa 0 don Ingilishi
Lura: Babu wasu harsuna da ke da tallafi a wannan lokacin |
| 1 | Nau'in sunan mai ƙira/tsawon byte | 0xD2 ku | 8-bit ASCII + LATIN1 mai lamba 7:6 – 11b
5:0 - 010010b (18 bytes na bayanai) |
| N | Manufacturer Name bytes | 0 x49
0x6E 0 x74 0 x65 0x6c ku 0 xAE 0 x20 0 x43 0x6F ku |
8-bit ASCII + LATIN1 mai lamba Intel Corporation |
| ci gaba… | |||
| Tsawon Filin cikin Bytes | Bayanin filin | Darajojin filin | Rufaffen filin |
| 0 x72
0 x70 0x6F ku 0 x72 0 x61 0 x74 0 x69 0x6F ku 0x6E |
|||
| 1 | Nau'in Sunan samfur / byte tsawon | 0xD5 ku | 8-bit ASCII + LATIN1 mai lamba 7:6 – 11b
5:0 - 010101b (21 bytes na bayanai) |
| M | Sunan samfur bytes | 0 x49
0x6E 0 x74 0 x65 0x6c ku 0 xAE 0 x20 0 x46 0 x50 0 x47 0 x41 0 x20 0 x50 0 x41 0 x43 0 x20 0x4E 0 x33 0 x30 0 x30 0 x30 |
8-bit ASCII + LATIN1 mai lamba Intel FPGA PAC N3000 |
| 1 | Sashe na samfur/Nau'in lambar samfurin/tsawon byte | 0xCE | 8-bit ASCII + LATIN1 mai lamba 7:6 – 11b
5:0 - 001110b (14 bytes na bayanai) |
| O | Sashin Samfuri/Lambar Model bytes | 0 x42
0 x44 0 x2d 0x4E 0 x56 0 x56 0 x2d 0x4E 0 x33 0 x30 0 x30 0 x30 0 x2d 0 x31 |
8-bit ASCII + LATIN1 codeed
OPN don hukumar BD-NVV- N3000-1 Wannan ƙimar filin ta bambanta da OPNs na Intel FPGA PAC N3000 daban-daban. |
| ci gaba… | |||
| Tsawon Filin cikin Bytes | Bayanin filin | Darajojin filin | Rufaffen filin |
| 1 | Nau'in samfurin / byte tsawon | 0 x01 | 8-bit binary 7:6 – 00b
5:0 - 000001b (1 byte na bayanai) |
| R | Sigar Samfurin bytes | 0 x00 | An sanya wannan filin a matsayin memba na iyali |
| 1 | Nau'in Serial Number samfur / byte tsawon | 0xCC ku | 8-bit ASCII + LATIN1 mai lamba 7:6 – 11b
5:0 - 001100b (12 bytes na bayanai) |
| P | Serial Number bytes (Filaye mai ƙarfi) | 0 x30
0 x30 0 x30 0 x30 0 x30 0 x30 0 x30 0 x30 0 x30 0 x30 0 x30 0 x30 |
8-bit ASCII + LATIN1 codeed
Lambobin hex 1st 6 sune OUI: 000000 Lambobin hex 2nd 6 sune adireshin MAC: 000000 Lura: An ƙididdige wannan azaman example kuma yana buƙatar gyarawa a cikin ainihin na'ura. Lambobin hex 1st 6 sune OUI: 644C36 Lambobin hex 2nd 6 sune adireshin MAC: 00AB2E Lura: Don gane ba shirin FRUID, saita OUI da adireshin MAC zuwa "0000". |
| 1 | Kadari Tag nau'in / tsawon byte | 0 x01 | 8-bit binary 7:6 – 00b
5:0 - 000001b (1 byte na bayanai) |
| Q | Kadari Tag | 0 x00 | Ba a tallafawa |
| 1 | FRU File Nau'in ID / byte tsayi | 0 x00 | 8-bit ASCII + LATIN1 mai lamba 7:6 – 00b
5:0 - 000000b (0 bytes na bayanai) Farashin FRU File Ba a haɗa filin baiti na ID da ya kamata ya bi wannan saboda filin zai zama 'babu'. |
| ci gaba… | |||
| Tsawon Filin cikin Bytes | Bayanin filin | Darajojin filin | Rufaffen filin |
| Lura: FRU file ID bytes.
Farashin FRU File filin sigar filin da aka riga aka ƙayyade wanda aka bayar azaman taimakon masana'antu don tabbatar da file wanda aka yi amfani dashi lokacin ƙira ko sabunta filin don loda bayanan FRU. Abubuwan da ke cikin keɓaɓɓen masana'anta ne. Hakanan ana bayar da wannan filin a yankin Bayanin Hukumar. Ko dai ko duka filayen na iya zama 'babu'. |
|||
| 1 | C1h (nau'in / tsawo byte rufaffiyar don nuna babu sauran filayen bayanai). | 0xc1 ku | |
| Y | 00h - duk sauran sarari mara amfani | 0 x00 | |
| 1 | Checksum Area Info Area Checksum (sifili checksum)
(Filin Mai Sauƙi) |
0 x9d | Lura: checksum a wannan tebur sifili ne wanda aka lissafta don ƙimar da aka yi amfani da su a cikin tebur. Dole ne a sake ƙididdige shi don ainihin ƙimar Intel FPGA PAC. |
Intel® FPGA Mai Shirye-shiryen Hanzarta Katin N3000 Jagorar Mai Gudanarwar Gudanarwa
Tarihin Bita
Tarihin Bita na Intel FPGA Mai Shirye-shiryen Haɓakar Katin N3000 Jagorar Mai Gudanarwar Gudanarwar Gudanarwa
| Sigar Takardu | Canje-canje |
| 2019.11.25 | Sakin Farko na Farko. |
Kamfanin Intel. An kiyaye duk haƙƙoƙi. Intel, tambarin Intel, da sauran alamun Intel alamun kasuwanci ne na Kamfanin Intel Corporation ko rassan sa. Intel yana ba da garantin aiwatar da samfuran FPGA da semiconductor zuwa ƙayyadaddun bayanai na yanzu daidai da daidaitaccen garanti na Intel, amma yana da haƙƙin yin canje-canje ga kowane samfuri da sabis a kowane lokaci ba tare da sanarwa ba. Intel ba ya ɗaukar wani nauyi ko alhaki da ya taso daga aikace-aikacen ko amfani da kowane bayani, samfur, ko sabis da aka kwatanta a nan sai dai kamar yadda Intel ya yarda da shi a rubuce. An shawarci abokan cinikin Intel su sami sabon sigar ƙayyadaddun na'urar kafin su dogara ga kowane bayanan da aka buga kuma kafin sanya oda don samfur ko ayyuka.
*Wasu sunaye da tambura ana iya da'awarsu azaman mallakar wasu.
Takardu / Albarkatu
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intel FPGA Programmable Acceleration Card N3000 Board Management Controller [pdf] Jagorar mai amfani FPGA Programmable Acceleration Card N3000 Board, Management Controller, FPGA, Programmable Acceleration Card N3000 Board, Management Controller, N3000 Board Management Controller, Management Controller |
