Intel OPAE FPGA Linux Alat Supir Arsitéktur

Arsitéktur Supir Alat Intel FPGA Linux OPAE

Supir OPAE Intel FPGA nyadiakeun interfaces pikeun aplikasi spasi-pamaké pikeun ngonpigurasikeun, enumerate, muka, jeung ngakses akselerator FPGA dina platform dilengkepan solusi Intel FPGA tur ngamungkinkeun fungsi manajemén tingkat sistem kayaning reconfiguration FPGA, manajemén kakuatan, jeung virtualization.

Arsitéktur hardware

Ti titik OS urang view, hardware FPGA mucunghul salaku alat PCIe biasa. Mémori alat FPGA diatur maké struktur data nu geus ditangtukeun (Daptar Fitur Alat). Fitur anu dirojong ku alat FPGA kakeunaan ku struktur data ieu, sapertos anu digambarkeun di handap dina gambar ieu:

Alat FPGA PCIe

Supir ngadukung PCIe SR-IOV pikeun nyiptakeun Fungsi Virtual (VFs) anu tiasa dianggo pikeun napelkeun akselerator individu ka mesin virtual.

Intel Corporation. Sadaya hak disimpen. Intel, logo Intel, sareng merek Intel sanés mangrupikeun mérek dagang Intel Corporation atanapi anak perusahaanna. Intel ngajamin kinerja produk FPGA sareng semikonduktorna kana spésifikasi ayeuna saluyu sareng jaminan standar Intel tapi ngagaduhan hak pikeun ngarobih produk sareng jasa naon waé iraha waé tanpa aya bewara. Intel henteu nanggung tanggung jawab atanapi tanggung jawab anu timbul tina aplikasi atanapi pamakean inpormasi, produk, atanapi jasa anu dijelaskeun di dieu iwal ti dinyatakeun sapuk sacara tinulis ku Intel. Konsumén Intel disarankan pikeun ménta versi panganyarna tina spésifikasi alat sateuacan ngandelkeun inpormasi anu diterbitkeun sareng sateuacan nempatkeun pesenan produk atanapi jasa.

Ngaran sareng merek sanésna tiasa diklaim salaku hak milik batur.

Alat FPGA PCIe Virtualized

Mesin Manajemén FPGA (FME)
Mesin Manajemén FPGA ngalaksanakeun kakuatan sareng manajemén termal, ngalaporkeun kasalahan, konfigurasi ulang, ngalaporkeun kinerja, sareng fungsi infrastruktur sanés. Unggal FPGA boga hiji FME, nu sok diaksés ngaliwatan Fungsi Fisik (PF). aplikasi pamaké-spasi bisa acquire aksés ekslusif ka FME maké buka (), sarta ngaleupaskeun maké nutup () salaku pamaké hak husus (root).

Palabuhan
A Port ngagambarkeun panganteur antara lawon FPGA statik ("FPGA Interface Manajer (FIM)") sarta wewengkon sawaréh reconfigurable ngandung hiji Fungsi Akselerator (AF). Port ngadalikeun komunikasi ti software ka akselerator sarta nembongkeun fitur kayaning reset na debug. Hiji alat PCIe bisa mibanda sababaraha Ports, sarta unggal Port bisa kakeunaan ngaliwatan VF ku assigning eta ngagunakeun FPGA_FME_PORT_ASSIGN ioctl dina alat FME.

Unit Akselerator Fungsi (AF).

• Hiji Unit Akselerator Fungsi (AF) napel Port jeung nembongkeun wewengkon 256K MMIO pikeun dipaké pikeun registers kontrol akselerator-spésifik.
• aplikasi pamaké-spasi bisa acquire aksés ekslusif ka AFU napel Port a ku cara maké buka () dina alat Port, sarta ngaleupaskeun maké nutup ().
• aplikasi pamaké-spasi ogé bisa mmap () akselerator wewengkon MMIO.

Parsial Reconfiguration
Sakumaha didadarkeun di luhur, akselerator bisa dikonpigurasi deui ngaliwatan konfigurasi ulang parsial tina Fungsi Akselerator (AF) file. Fungsi Akselerator (AF) kudu geus dihasilkeun pikeun FIM pasti jeung sasaran wewengkon statik (Port) tina FPGA; Upami teu kitu, operasi reconfiguration bakal gagal jeung kamungkinan ngabalukarkeun instability sistem. Kasaluyuan ieu bisa dipariksa ku ngabandingkeun ID panganteur nyatet dina lulugu AF ngalawan ID panganteur kakeunaan ku FME ngaliwatan sysfs. Pamariksaan ieu biasana dilakukeun ku rohangan pangguna sateuacan nyauran konfigurasi ulang IOCTL.

Catetan:
Ayeuna, program parangkat lunak naon waé anu ngaksés FPGA, kalebet anu dijalankeun dina host virtualisasi, kedah ditutup sateuacan nyobian konfigurasi ulang parsial. Léngkah-léngkahna nyaéta:

1. Unload supir ti sémah
2. Cabut VF ti sémah
3. Nonaktipkeun SR-IOV
4. Ngalakukeun reconfiguration parsial
5. Aktipkeun SR-IOV
6. Colokkeun VF ka sémah
7. Ngamuat supir dina tamu

Virtualisasi FPGA
Pikeun ngaksés akselerator tina aplikasi anu dijalankeun dina VM, port AFU masing-masing kedah ditugaskeun ka VF nganggo léngkah-léngkah ieu:

1. PF gaduh sadayana palabuhan AFU sacara standar. Sagala port nu kudu reassigned ka VF kudu dileupaskeun heula ti PF ngaliwatan FPGA_FME_PORT_RELEASE ioctl dina alat FME.
2. Sakali palabuhan N dileupaskeun tina PF, paréntah di handap ieu tiasa dianggo pikeun ngaktipkeun SRIOV sareng VF. Unggal VF ngan boga hiji port kalawan AFU. echo N > PCI_DEVICE_PATH/sriov_numvfs
3. Ngaliwatan VFs ka VMs.
4. AFU dina VF tiasa diaksés tina aplikasi dina VM (nganggo supir anu sami di jero VF).

Catetan:
Hiji FME teu bisa ditugaskeun ka VF, sahingga PR jeung fungsi manajemén séjén ngan sadia ngaliwatan PF.

Organisasi supir

Supir Alat Modul PCIe

Organisasi supir

Alat FPGA muncul salaku alat PCIe biasa; sahingga, supir alat FPGA PCIe (intel-FPGA-PCI.ko) sok dimuat heula sakali FPGA PCIe PF atanapi VF dideteksi. Supir ieu maénkeun peran infrastruktur dina arsitéktur supir. Ieu:

• Nyiptakeun alat wadah FPGA salaku indung tina alat fitur.
• Walks ngaliwatan Daptar Fitur Alat, nu dilaksanakeun dina memori BAR alat PCIe, pikeun manggihan alat fitur sarta sub-fitur maranéhanana sarta nyieun alat platform keur aranjeunna dina alat wadahna.
• Ngarojong SR-IOV.
• Ngenalkeun infrastruktur alat fitur, nu abstrak operasi pikeun sub-fitur sarta nembongkeun fungsi umum pikeun fitur supir alat.

PCIe Module Alat Supir Fungsi

• Ngandung penemuan PCIe, enumerasi alat, sareng penemuan fitur.
• Nyiptakeun diréktori sysfs pikeun alat indungna, FPGA Management Engine (FME), sareng Port.
• Nyiptakeun instansi supir platform, nyababkeun kernel Linux ngamuat supir modul platform masing-masing.

FME Platform Module Alat Supir

• Manajemén kakuatan sareng termal, ngalaporkeun kasalahan, ngalaporkeun kinerja, sareng fungsi infrastruktur sanés. Anjeun tiasa ngaksés pungsi ieu ngalangkungan antarmuka sysfs anu diungkabkeun ku supir FME.
• Parsial Reconfiguration. Supir FME ngadaptarkeun Manajer FPGA salami inisialisasi sub-fitur PR; sakali eta narima hiji FPGA_FME_PORT_PR ioctl ti anjeun, invokes fungsi panganteur umum ti FPGA Manajer pikeun ngalengkepan reconfiguration parsial bitstream ka Port dibikeun.
• manajemén port pikeun virtualization. Supir FME ngenalkeun dua ioctl, FPGA_FME_PORT_RELEASE, anu ngaluarkeun Port tina PF; sarta FPGA_FME_PORT_ASSIGN, nu nangtukeun Port deui ka PF. Sakali Port dileupaskeun tina PF, eta bisa ditugaskeun ka VF ngaliwatan interfaces SR-IOV disadiakeun ku supir PCIe. Kanggo inpo nu leuwih lengkep, tingal "Virtualization FPGA".

FME Platform Module Alat Supir Fungsi

• Nyiptakeun titik alat karakter FME.
• Nyiptakeun sysfs FME files sarta implements nu sysfs FME file aksésori.
• Ngalaksanakeun sub-driver fitur pribadi FME.
• FME fitur pribadi sub-drivers:
  • FME lulugu
  • Manajemén termal
  • Manajemén kakuatan
  • Kasalahan Global
  • Parsial Reconfiguration
  • Performance Global

Port Platform Module Alat Supir
Sarupa jeung supir FME, supir FPGA Port (jeung AFU) (intel-fpga-afu. ko) usik sakali alat platform Port dijieun. Pungsi utama modul ieu nya éta nyadiakeun antarbeungeut pikeun aplikasi spasi pamaké pikeun ngakses akselerator individu, kaasup kontrol reset dasar dina Port, ékspor wewengkon AFU MMIO, DMA layanan pemetaan panyangga, bewara UMsg(1), sarta fungsi debug jauh ( tingali di luhur).

UMsg ngan ukur dirojong ku Akselerasi Stack pikeun Prosesor Intel Xeon® sareng FPGA Terpadu.

Port Platform Module Alat Supir Fungsi

• Nyiptakeun titik alat karakter Port.
• Nyiptakeun sysfs Port files sarta implements nu Port sysfs file aksésori.
• Ngalaksanakeun sub-driver fitur pribadi Port.
• Port fitur pribadi sub-drivers:
  • Port lulugu
  • AFU
  • Kasalahan Port
  • UMsg(2)
  • Ketok Sinyal

Aplikasi FPGA Device Enumeration
Bagian ieu ngenalkeun kumaha aplikasi ngitung alat FPGA tina hirarki sysfs dina /sys/class/fpga. Dina urutample handap, dua alat Intel FPGA dipasang dina host. Unggal alat FPGA gaduh hiji FME sareng dua Port (AFU). Pikeun unggal alat FPGA, diréktori alat dijieun dina /sys/class/fpga:

/sys/class/fpga/intel-fpga-dev.0
/sys/class/fpga/intel-fpga-dev.1

Unggal titik ngagaduhan hiji FME sareng dua Palabuhan (AFU) salaku alat anak:
/sys/class/fpga/intel-fpga-dev.0/intel-fpga-fme.0
/sys/class/fpga/intel-fpga-dev.0/intel-fpga-port.0
/sys/class/fpga/intel-fpga-dev.0/intel-fpga-port.1
/sys/class/fpga/intel-fpga-dev.1/intel-fpga-fme.1
/sys/class/fpga/intel-fpga-dev.1/intel-fpga-port.2
/sys/class/fpga/intel-fpga-dev.1/intel-fpga-port.3

Sacara umum, interfaces FME/Port sysfs dingaranan kieu:
/sys/class/fpga/intel-fpga-dev.i/intel-fpga-fme.j/
/sys/class/fpga/intel-fpga-dev.i/intel-fpga-port.k/

kalawan I consecutively wilanganana sakabeh alat wadahna, j consecutively nomeran FME sarta k consecutively jumlahna sadayana Ports.

Titik alat anu dianggo pikeun ioctl () sareng mmap () tiasa dirujuk ku:
/dev/intel-fpga-fme.j
/dev/intel-fpga-port.k

PCIe Supir Enumeration
Bagéan ieu masihan langkungview tina aliran kode pikeun enumeration alat dipigawé ku intel-fpga-pci.ko. Struktur sareng fungsi data utama disorot. bagian ieu pangalusna dituturkeun nalika viewdina kode sumber nu dibéré bareng (pcie.c).

Struktur Data Enumerasi

enum fpga_id_type {
PARENT_ID,
FME_ID,
PORT_ID,
FPGA_ID_MAX
};
struct statik idr fpga_ids [FPGA_ID_MAX];
struct fpga_chardev_info {
const char *ngaran;
dev_t devt;
};
struct fpga_chardev_info fpga_chrdevs[] = {
{ .ngaran = FPGA_FEATURE_DEV_FME },
{ .name = FPGA_FEATURE_DEV_PORT },
};
kelas struct statik *fpga_class;
struct statik pci_device_id cci_pcie_id_tbl[] = {
{PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIe_DEVICE_ID_RCiEP0_MCP),},
{PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIe_DEVICE_ID_VF_MCP),},
{PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIe_DEVICE_ID_RCiEP0_SKX_P),},
{PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIe_DEVICE_ID_VF_SKX_P),},
{PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIe_DEVICE_ID_RCiEP0_DCP),},
{PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIe_DEVICE_ID_VF_DCP),},
{0,}
};
struct statik pci_driver cci_pci_driver = {
.ngaran = DRV_NAME,
.id_table = cci_pcie_id_tbl,
.usik = cci_pci_probe,
.remove = cci_pci_remove,
.sriov_configure = cci_pci_sriov_configure
};
struct cci_drvdata {
int device_id;
alat struct * fme_dev;
struct mutex konci;
struct list_head port_dev_list;
int released_port_num;
struct list_head wewengkon;
};
struct build_feature_devs_info {
struct pci_dev *pdev;
batal __iomem *ioaddr;
batal __iomem *ioend;
int current_bar;
batal __iomem *pfme_hdr;
alat struct * parent_dev;
struct platform_device * feature_dev;
};

Aliran Enumerasi

• ccidrv_init()
  • Initialize fpga_ids maké idr_init ().
  • Initialize fpga_chrdevs[i].devt maké alloc_chrdev_region ().
  • Initialize fpga_class maké class_create ().
  • pci_register_driver (& cci_pci_driver);
• cci_pci_probe()
  • Aktipkeun alat PCI, ménta aksés ka wewengkon na, set PCI master mode, sarta ngonpigurasikeun DMA.
• cci_pci_create_feature_devs() build_info_alloc_and_init()
  • Alokasikeun struct build_feature_devs_info, initialize eta.
    .parent_dev disetel ka diréktori sysfs indungna (intel-fpga-dev.id) nu ngandung directories FME jeung Port sysfs.
• parse_feature_list()
  • Leumpang Daptar Fitur Alat BAR0 pikeun mendakan FME, Pelabuhan, sareng fitur pribadina.
• parse_feature() parse_feature_afus() parse_feature_fme()
  • Nalika aya FME:
• build_info_create_dev()
  • Alokasi alat platform pikeun FME, simpen di build_feature_devs_info.feature_dev.
  • feature_dev.id diinisialisasi kana hasil idr_alloc(fpga_ids[FME_ID],
  • feature_dev.parent disetel ka build_feature_devs_info.parent_dev.
  • Alokasikeun sababaraha sumber struct dina feature_dev.resource.
• Alokasi struct feature_platform_data, initialize eta, tur nyimpen pointer dina feature_dev.dev.platform_data
  • create_feature_instance() build_info_add_sub_feature()
  • Initialize feature_dev.resource[FME_FEATURE_ID_HEADER].
  • feature_platform_data_add()
  • Initialize feature_platform_data.features [FME_FEATURE_ID_HEADER], sagalana tapi .fops.
• parse_feature() parse_feature_afus() parse_feature_port()
  • Nalika Port kapanggih:
• build_info_create_dev()
  • Alokasi alat platform pikeun Port, nyimpen dina build_feature_devs_info.feature_dev.
  • feature_dev.id diinisialisasi kana hasil idr_alloc(fpga_ids[PORT_ID],
  • feature_dev.parent disetel ka build_feature_devs_info.parent_dev.
  • Alokasikeun susunan sumberdaya struct dina feature_dev.resource.
  • Alokasi struct feature_platform_data, initialize eta, tur nyimpen pointer dina feature_dev.dev.platform_data
• build_info_commit_dev()
  • Tambahkeun struct feature_platform_data.node pikeun Port ka daptar Ports di struct cci_drvdata.port_dev_list
• create_feature_instance() build_info_add_sub_feature()
  • Initialize feature_dev.resource[PORT_FEATURE_ID_HEADER].
• feature_platform_data_add()
  • Initialize feature_platform_data.features [PORT_FEATURE_ID_HEADER], sagalana tapi .fops.
• parse_feature() parse_feature_afus() parse_feature_port_uafu()
  • Nalika aya AFU:
• create_feature_instance() build_info_add_sub_feature()
  • Initialize feature_dev.resource[PORT_FEATURE_ID_UAFU].
• feature_platform_data_add()
  • Initialize feature_platform_data.features [PORT_FEATURE_ID_UAFU], sagalana tapi .fops.
• parse_feature() parse_feature_private() parse_feature_fme_private()
  • Nalika fitur pribadi FME kapanggih:
• create_feature_instance() build_info_add_sub_feature()
  • Initialize feature_dev.resource[id].
• feature_platform_data_add()
  • Initialize feature_platform_data.features[id], sagalana tapi .fops.
• parse_feature() parse_feature_private() parse_feature_port_private()
• Nalika fitur pribadi Port ieu encountered: * create_feature_instance () build_info_add_sub_feature () * Initialize feature_dev.resource[id]. * feature_platform_data_add () Initialize feature_platform_data.features [id], sagalana tapi .fops.
• parse_ports_ti_fme()
  • Upami supir dimuat dina Fungsi Fisik (PF), teras:
• Ngajalankeun aliran parse_feature_list () dina unggal port digambarkeun dina lulugu FME.
• Anggo BAR anu disebatkeun dina unggal éntri Port dina header.

FME Platform Alat Initialization
Bagéan ieu masihan langkungview tina aliran kode pikeun initialization alat FME dipigawé ku intel-fpga-fme.ko. Struktur sareng pungsi data utama disorot. bagian ieu pangalusna dituturkeun nalika viewdina kodeu sumber anu dibéré bareng (fme-main.c).

Struktur Data Alat Platform FME

struct feature_ops {
int (* init) (struct platform_device * pdev, fitur struct * fitur);
int (*uinit)(struct platform_device *pdev, struct fitur *fitur);
panjang (* ioctl) (struct platform_device * pdev, fitur struct * fitur,
unsigned int cmd, unsigned long arg);
int (* test) (struct platform_device * pdev, fitur struct * fitur);
};
fitur struct {
const char *ngaran;
int sumberdaya_index;
batal __iomem *ioaddr;
struct feature_ops *ops;
};
struct feature_platform_data {
struct list_head titik;
struct mutex konci;
unsigned lila dev_status;
struct cdev cdev;
struct platform_device * dev;
unsigned int disable_count;
batal *swasta;
int angka;
int (* config_port) (struct platform_device *, u32, bool);
struct platform_device *(*fpga_for_each_port)(struct platform_device *,
batal *, int (* cocok)(struct platform_device *, batal *)); struct
fitur fitur[0];
};
struct perf_object {
leungeun anjeun;
const struct attribute_group ** attr_groups;
alat struct * fme_dev;
struct list_head titik;
struct list_head barudak;
struct kobject kobj;
};
struct fpga_fme {
u8 port_id;
u64 pr_err;
alat struct * dev_err;
struct perf_object *perf_dev;
struct feature_platform_data *pdata;
};

FME Platform Alat Initialization Aliran

Aliran Initialization FME

• fme_probe() fme_dev_init()
  • Initialize a struct fpga_fme tur nyimpen eta dina feature_platform_data.private widang.
• fme_probe() fpga_dev_feature_init() feature_instance_init()
  • Simpen hiji struct feature_ops kana feature_platform_data.features pikeun tiap fitur Asezare populata.
  • Nyauran fungsi uji, upami aya, tina struct.
  • Nelepon fungsi init tina struct.
• fme_probe() fpga_register_dev_ops()
  • Jieun titik alat karakter FME, ngadaptar struct a file_operasi.

Port Platform Alat Initialization
Bagéan ieu masihan langkungview tina aliran kode pikeun initialization alat port dipigawé ku intel-fpga-afu.ko. Struktur sareng fungsi data utama disorot. bagian ieu pangalusna dituturkeun nalika viewdina kode sumber anu dibéré bareng (afu.c).

Struktur Data Alat Port Platform

struct feature_ops {
int (* init) (struct platform_device * pdev, fitur struct * fitur);
int (*uinit)(struct platform_device *pdev, struct fitur *fitur);
panjang (* ioctl) (struct platform_device * pdev, fitur struct * fitur,
unsigned int cmd, unsigned long arg);
int (* test) (struct platform_device * pdev, fitur struct * fitur);
};
fitur struct {
const char *ngaran;
int sumberdaya_index;
batal __iomem *ioaddr;
struct feature_ops *ops;
};
struct feature_platform_data {
struct list_head titik;
struct mutex konci;
unsigned lila dev_status;
struct cdev cdev;
struct platform_device * dev;
unsigned int disable_count;
batal *swasta;
int angka;
int (* config_port) (struct platform_device *, u32, bool);
struct platform_device *(*fpga_for_each_port)(struct platform_device *,
batal *, int (* cocok)(struct platform_device *, batal *));
fitur fitur struct[0];
};
struct fpga_afu_region {
indéks u32;
u32 bandéra;
ukuran u64;
u64 offset;
u64 fisik;
struct list_head titik;
};
struct fpga_afu_dma_region {
u64 pamaké_addr;
panjangna u64;
u64 iova;
kaca struct ** kaca;
struct rb_node titik;
bool in_use;
};
struct fpga_afu {
u64 region_cur_offset;
int num_regions;
u8 num_umsgs;
struct list_head wewengkon;
struct rb_root dma_regions;
struct feature_platform_data *pdata;
};

Port Platform Alat Initialization Aliran

Port Initialization Aliran

• afu_probe() afu_dev_init()
  • Initialize a struct fpga_afu tur nyimpen eta dina feature_platform_data.private widang.
• afu_probe() fpga_dev_feature_init() feature_instance_init()
  • Simpen hiji struct feature_ops kana feature_platform_data.features pikeun tiap fitur Asezare populata.
  • Nyauran fungsi uji, upami aya, tina struct.
  • Nelepon fungsi init tina struct.
• afu_probe() fpga_register_dev_ops()
  • Jieun titik alat Port karakter, ngadaptar struct a file_operasi.

FME IOCTLs
IOCTLs nu disebut dina buka file deskriptor pikeun /dev/intel-fpga-fme.j FPGA_GET_API_VERSION-ngabalikeun versi ayeuna salaku integer, mimitian ti 0.

FPGA_CHECK_EXTENSION—teu dirojong ayeuna.

FPGA_FME_PORT_RELEASE-arg mangrupakeun pointer ka:

struct fpga_fme_port_release {
__u32 argsz; // di: sizeof(struct fpga_fme_port_release)
__u32 bandéra; // dina: kudu 0
__u32 port_id; // di: port ID (ti 0) pikeun ngaleupaskeun.
};

FPGA_FME_PORT_ASSIGN-arg mangrupakeun pointer ka:

struct fpga_fme_port_assign {
__u32 argsz; // di: sizeof(struct fpga_fme_port_assign)
__u32 bandéra; // dina: kudu 0
__u32 port_id; // di: port ID (ti 0) pikeun napelkeun. (kudu geus
saméméhna dikaluarkeun ku FPGA_FME_PORT_RELEASE)
};

FPGA_FME_PORT_PR—arg mangrupikeun pointer ka:

struct fpga_fme_port_pr {
__u32 argsz; // di: sizeof(struct fpga_fme_port_pr)
__u32 bandéra; // dina: kudu 0
__u32 port_id; // dina: port ID (tina 0)
__u32 panyangga_ukuran; // di: ukuran panyangga bitstream dina bait. Kudu 4-bait
dijajarkeun.
__u64 panyangga_alamat; // di: prosés alamat panyangga bitstream
__u64 status; // kaluar: status kasalahan (bitmask)
};

Port IOCTLs
IOCTLs nu disebut dina buka file descriptor pikeun /dev/intel-fpga-port.k FPGA_GET_API_VERSION-ngabalikeun versi ayeuna salaku integer, mimitian ti 0. FPGA_CHECK_EXTENSION-moal dirojong ayeuna.

FPGA_PORT_GET_INFO—arg mangrupikeun pointer ka:

struct fpga_port_info {
__u32 argsz; // di: sizeof(struct fpga_port_info)
__u32 bandéra; // kaluar: mulih 0
__u32 num_regions; // kaluar: Jumlah wewengkon MMIO, 2 (1 keur AFU jeung 1 keur
STP)
__u32 num_umsgs; // kaluar: Jumlah UMsg dirojong ku hardware
};

FPGA_PORT_GET_REGION_INFO-arg mangrupakeun pointer ka:

struct fpga_port_region_info {
__u32 argsz; // di: sizeof(struct fpga_port_region_info)
__u32 bandéra; // kaluar: (bitmask) { FPGA_REGION_READ, FPGA_REGION_WRITE,
FPGA_REGION_MMAP }
__u32 indéks; // di: FPGA_PORT_INDEX_UAFU atanapi FPGA_PORT_INDEX_STP
__u32 padding; // dina: kudu 0
__u64 ukuran; // kaluar: ukuran wewengkon MMIO dina bait
__u64 offset; // kaluar: offset wewengkon MMIO ti mimiti alat fd
};

FPGA_PORT_DMA_MAP—arg mangrupikeun pointer ka:
struct fpga_port_dma_map {
__u32 argsz; // di: sizeof(struct fpga_port_dma_map)
__u32 bandéra; // di: kudu 0 __u64 user_addr; // di: prosés virtual
alamat. Kudu dijajarkeun kaca.
__u64 panjangna; // di: panjang pemetaan dina bait. Kedah janten sababaraha halaman
ukuran.
__u64 iova; // kaluar: alamat virtual IO };

FPGA_PORT_DMA_UNMAP—arg mangrupikeun pointer ka:
struct fpga_port_dma_unmap {
__u32 argsz; // di: sizeof(struct fpga_port_dma_unmap)
__u32 bandéra; // dina: kudu 0
__u64 iova; // di: alamat virtual IO balik ku saméméhna
FPGA_PORT_DMA_MAP };

• FPGA_PORT_RESET-arg kedah NULL.
• FPGA_PORT_UMSG_ENABLE—arg kudu NULL.
• FPGA_PORT_UMSG_DISABLE-args kudu NULL.

FPGA_PORT_UMSG_SET_MODE-arg mangrupakeun pointer ka:

struct fpga_port_umsg_cfg {
__u32 argsz; // di: sizeof(struct fpga_port_umsg_cfg)
__u32 bandéra; // dina: kudu 0
__u32 hint_bitmap; // di: bitmap mode hint UMsg. Ngalambangkeun mana UMsg urang
diaktipkeun.
};

FPGA_PORT_UMSG_SET_BASE_ADDR—

• UMsg kedah ditumpurkeun sateuacan ngaluarkeun ioctl ieu.
• Widang iova kudu keur panyangga cukup badag pikeun sakabéh UMsg urang (num_umsgs * PAGE_SIZE).
  • Panyangga ditandaan salaku "dipake" ku manajemén panyangga supir.
  • Lamun iova nyaeta NULL, sagala wewengkon saméméhna teu ditandaan salaku "digunakeun".
• arg mangrupakeun pointer ka:
  struct fpga_port_umsg_base_addr {
  • u32 argsz; // di: sizeof(struct fpga_port_umsg_base_addr)
  • u32 bandéra; // dina: kudu 0
  • u64 iova; // di: alamat virtual IO ti FPGA_PORT_DMA_MAP. };

Catetan:

• Pikeun mupus kasalahan port, Anjeun kudu nulis bitmask pasti tina kasalahan ayeuna, pikeun example, kasalahan ucing > jelas
• UMsg ngan dirojong ngaliwatan Acceleration Stack pikeun Intel Xeon Processor sareng FPGA Terpadu.

sysfs Files

FME lulugu sysfs files
intel-fpga-dev.i/intel-fpga-fme.j/

sysfs file	médan mmio	ngetik	aksés
ports_num	fme_header.capability.num_ports	desimal int	Dibaca wungkul
cache_size	fme_header.capability.cache_size	desimal int	Dibaca wungkul
versi	fme_header.capability.fabric_verid	desimal int	Dibaca wungkul
socket_id	fme_header.capability.socket_id	desimal int	Dibaca wungkul
bitstream_id	fme_header.bitstream_id	hex uint64_t	Dibaca wungkul
bitstream_metadata	fme_header.bitstream_md	hex uint64_t	Dibaca wungkul

sysfs Manajemén Termal FME files
intel-fpga-dev.i/intel-fpga-fme.j/thermal_mgmt/

sysfs file	médan mmio	ngetik	aksés
bangbarung1	thermal.threshold.tmp_thshold1	desimal int	Pamaké: Baca-hijina Akar: Baca-tulis
bangbarung2	thermal.threshold.tmp_thshold2	desimal int	Pamaké: Baca-hijina Akar: Baca-tulis
threshold_trip	thermal.threshold.therm_trip_thshold	desimal int	Dibaca wungkul
threshold1_reached	thermal.threshold.thshold1_status	desimal int	Dibaca wungkul
threshold2_reached	thermal.threshold.thshold2_status	desimal int	Dibaca wungkul
threshold1_policy	termal. threshold.thshold_policy	desimal int	Pamaké: Baca-hijina Akar: Baca-tulis
suhu	thermal.rdsensor_fm1.fpga_temp	desimal int	Dibaca wungkul

sysfs Manajemén Daya FME files
intel-fpga-dev.i/intel-fpga-fme.j/power_mgmt/

sysfs file	médan mmio	ngetik	aksés
dihakan	power.status.pwr_consumed	hex uint64_t	Dibaca wungkul
bangbarung1	kakuatan.ambang.ambang1	hex uint64_t	Pamaké: Baca-hijina Akar: Baca-tulis
bangbarung2	kakuatan.ambang.ambang2	hex uint64_t	Pamaké: Baca-hijina Akar: Baca-tulis
bangbarung1_status	power.threshold.threshold1_status	decimal unsigned	Dibaca wungkul
bangbarung2_status	power.threshold.threshold2_status	decimal unsigned	Dibaca wungkul
rtl	power.status.fpga_latency_report	decimal unsigned	Dibaca wungkul

Kasalahan Global FME sysfs files
intel-fpga-dev.i/intel-fpga-fme.j/errors/

sysfs file	médan mmio	ngetik	aksés
pcie0_errors	gerror.pcie0_err	hex uint64_t	Maca-nulis
pcie1_errors	gerror.pcie1_err	hex uint64_t	Maca-nulis
inject_error	gerror.ras_error_inj	hex uint64_t	Maca-nulis

intel-fpga-dev.i/intel-fpga-fme.j/errors/fme-errors/

sysfs file	médan mmio	ngetik	aksés
kasalahan	gerror.fme_err	hex uint64_t	Dibaca wungkul
first_error	gerror.fme_first_err.err_reg_status	hex uint64_t	Dibaca wungkul
next_error	gerror.fme_next_err.err_reg_status	hex uint64_t	Dibaca wungkul
jelas	Hapus kasalahan, first_error, next_error	rupa-rupa uint64_t	Tulisan wungkul

Catetan:
Pikeun mupus kasalahan FME, anjeun kedah nyerat bitmask pasti tina kasalahan ayeuna, contonaample ucing kasalahan > jelas.

FME parsial Reconfiguration sysfs files
intel-fpga-dev.i/intel-fpga-fme.j/pr/

sysfs file	médan mmio	ngetik	aksés
interface_id	pr.fme_pr_intfc_id0_h, pr.fme_pre_intfc_id0_l	hex 16-bait	Dibaca wungkul

sysfs Performance Global FME files
intel-fpga-dev.i/intel-fpga-fme.j/dperf/clock

sysfs file	médan mmio	ngetik	aksés
jam	gperf.clk.afu_interf_clock	hex uint64_t	Dibaca wungkul

intel-fpga-dev.i/intel-fpga-fme.j/dperf/cache/ (Teu valid pikeun Acceleration Stack pikeun Intel Xeon CPU sareng FPGAs)

sysfs file	médan mmio	ngetik	aksés
beku	gperf.ch_ctl.freeze	desimal int	Maca-nulis
read_hit	gperf.CACHE_RD_HIT	hex uint64_t	Dibaca wungkul
maca_miss	gperf.CACHE_RD_MISS	hex uint64_t	Dibaca wungkul
write_hit	gperf.CACHE_WR_HIT	hex uint64_t	Dibaca wungkul
nulis_miss	gperf.CACHE_WR_MISS	hex uint64_t	Dibaca wungkul
hold_request	gperf.CACHE_HOLD_REQ	hex uint64_t	Dibaca wungkul
tx_req_stall	gperf.CACHE_TX_REQ_STALL	hex uint64_t	Dibaca wungkul

sysfs file	médan mmio	ngetik	aksés
rx_req_stall	gperf.CACHE_RX_REQ_STALL	hex uint64_t	Dibaca wungkul
data_write_port_contention	gperf.CACHE_DATA_WR_PORT_CONTEN	hex uint64_t	Dibaca wungkul
tag_write_port_contention	gperf.CACHE_TAG_WR_PORT_CONTEN	hex uint64_t	Dibaca wungkul

intel-fpga-dev.i/intel-fpga-fme.j/dperf/iommu/ (Teu valid pikeun Acceleration Stack pikeun Intel Xeon CPU sareng FPGAs)

sysfs file	médan mmio	ngetik	aksés
beku	gperf.vtd_ctl.freeze	desimal int	Pamaké: Baca-hijina Akar: Baca-tulis

intel-fpga-dev.i/intel-fpga-fme.j/dperf/iommu/afuk/ (Teu valid pikeun Acceleration Stack pikeun Intel Xeon CPU sareng FPGAs)

sysfs file	médan mmio	ngetik	aksés
read_transaction	gperf.VTD_AFU0_MEM_RD_TRANS	hex uint64_t	Dibaca wungkul
nulis_transaksi	gperf.VTD_AFU0_MEM_WR_TRANS	hex uint64_t	Dibaca wungkul
tlb_read_hit	gperf.VTD_AFU0_TLB_RD_HIT	hex uint64_t	Dibaca wungkul
tlb_write_hit	gperf.VTD_AFU0_TLB_WR_HIT	hex uint64_t	Dibaca wungkul

intel-fpga-dev.i/intel-fpga-fme.j/dperf/fabric/

sysfs file	médan mmio	ngetik	aksés
ngaktifkeun	gperf.fab_ctl.(diaktipkeun)	desimal int	Pamaké: Baca-hijina Akar: Baca-tulis
beku	gperf.fab_ctl.freeze	desimal int	Pamaké: Baca-hijina Akar: Baca-tulis
pcie0_read	gperf.FAB_PCIE0_RD	hex uint64_t	Dibaca wungkul
pcie0_write	gperf.FAB_PCIE0_WR	hex uint64_t	Dibaca wungkul
pcie1_read	gperf.FAB_PCIE1_RD	hex uint64_t	Dibaca wungkul
pcie1_write	gperf.FAB_PCIE1_WR	hex uint64_t	Dibaca wungkul
upi_read	gperf.FAB_UPI_RD	hex uint64_t	Dibaca wungkul
upi_nulis	gperf.FAB_UPI_WR	hex uint64_t	Dibaca wungkul

intel-fpga-ev.i/intel-fpga/fme.j/dperf/fabric/portk/

sysfs file	médan mmio	ngetik	aksés
pcie0_read	gperf.FAB_PCIE0_RD	hex uint64_t	Dibaca wungkul
pcie0_write	gperf.FAB_PCIE0_WR	hex uint64_t	Dibaca wungkul
pcie1_read	gperf.FAB_PCIE1_RD	hex uint64_t	Dibaca wungkul
pcie1_write	gperf.FAB_PCIE1_WR	hex uint64_t	Dibaca wungkul
upi_read	gperf.FAB_UPI_RD	hex uint64_t	Dibaca wungkul
upi_nulis	gperf.FAB_UPI_WR	hex uint64_t	Dibaca wungkul

Port lulugu sysfs files
intel-fpga-dev.i/intel-fpga-port.k/

sysfs file	médan mmio	ngetik	aksés
id	port_header.capability.port_number	desimal int	Dibaca wungkul
ltr	port_header.control.latency_tolerance	desimal int	Dibaca wungkul

Port AFU Lulugu sysfs files
intel-fpga-dev.i/intel-fpga-port.k/

sysfs file	médan mmio	ngetik	aksés
afu_id	afu_header.guid	hex 16-bait	Dibaca wungkul

Port Kasalahan sysfs files
intel-fpga-dev.i/intel-fpga-port.k/errors/

sysfs file	médan mmio	ngetik	aksés
kasalahan	perror.port_error	hex uint64_t	Dibaca wungkul
first_error	perror.port_first_error	hex uint64_t	Dibaca wungkul
first_malformed_req	perror.malreq	hex 16-bait	Dibaca wungkul
jelas	kasalahan.(sagala kasalahan)	rupa-rupa uint64_t	Tulisan wungkul

Catetan:
Pikeun mupus kasalahan Port, anjeun kudu nulis bitmask pasti tina kasalahan ayeuna, contonaample ucing kasalahan > jelas.

Riwayat révisi

Vérsi Dokumén	Parobahan
2017.10.02	Kaluaran Awal.

OPAE Intel FPGA Linux Alat Supir Arsitéktur Guide

Dokumén / Sumberdaya

Intel OPAE FPGA Linux Alat Supir Arsitéktur [pdf] Pituduh pamaké Arsitéktur Supir Alat OPAE FPGA Linux, OPAE FPGA, Arsitéktur Supir Alat Linux, Arsitéktur Supir, Arsitéktur

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• Manual pamaké