intel OPAE FPGA Linux Driver Architecture

OPAE Intel FPGA Linux Architecture ọkwọ ụgbọ ala

Onye ọkwọ ụgbọ ala OPAE Intel FPGA na-enye oghere maka ngwa onye ọrụ iji hazie, depụta, mepee, na ịnweta ngwa ngwa FPGA na nyiwe nwere azịza Intel FPGA ma na-enyere ọrụ njikwa ọkwa sistemụ dị ka nhazigharị FPGA, njikwa ike na ime ihe.

Ihe owuwu ngwaike

Site na OS nke view, ngwaike FPGA na-egosi dị ka ngwaọrụ PCIe mgbe niile. A na-ahazi ebe nchekwa ngwaọrụ FPGA site na iji nhazi data eburu ụzọ kọwaa (Ndepụta Njirimara Ngwaọrụ). A na-ekpughe atụmatụ ndị ngwaọrụ FPGA na-akwado site na nhazi data ndị a, dị ka egosiri n'okpuru na foto a:

Ngwaọrụ FPGA PCIe

Onye ọkwọ ụgbọ ala na-akwado PCIe SR-IOV ka imepụta Virtual Functions (VFs) nke enwere ike iji nye ndị na-eme ngwa ngwa na igwe mebere.

Ụlọ ọrụ Intel. Ikike niile echekwabara. Intel, akara Intel, na akara Intel ndị ọzọ bụ ụghalaahịa nke Intel Corporation ma ọ bụ ndị enyemaka ya. Intel nyere ikike ịrụ ọrụ nke FPGA na ngwaahịa semiconductor na nkọwapụta ugbu a dịka akwụkwọ ikike ọkọlọtọ Intel siri dị mana ọ nwere ikike ịme mgbanwe na ngwaahịa na ọrụ ọ bụla n'oge ọ bụla na-enweghị ọkwa. Intel anaghị ewere ọrụ ọ bụla ma ọ bụ ụgwọ sitere na ngwa ma ọ bụ iji ozi ọ bụla, ngwaahịa ma ọ bụ ọrụ akọwara n'ime ebe a belụsọ dị ka Intel kwetara na ederede. A dụrụ ndị ahịa Intel ọdụ ka ha nweta ụdị nkọwa ngwaọrụ kachasị ọhụrụ tupu ha adabere na ozi ọ bụla ebipụtara yana tupu ịnye iwu maka ngwaahịa ma ọ bụ ọrụ.

Enwere ike ịzọrọ aha na akara ndị ọzọ dị ka ihe onwunwe nke ndị ọzọ.

Ngwa FPGA PCIe mebere nke ọma

Igwe njikwa FPGA (FME)
Igwe njikwa FPGA na-arụ ike na njikwa ọkụ, mkpesa njehie, nhazigharị, mkpesa arụmọrụ, yana ọrụ akụrụngwa ndị ọzọ. FPGA ọ bụla nwere otu FME, nke a na-enweta mgbe niile site na Ọrụ anụ ahụ (PF). Ngwa onye ọrụ nwere ike nweta ohere pụrụiche na FME site na iji open(), wee hapụ ya site na iji nso () dị ka onye ọrụ nwere ohere (mgbọrọgwụ).

Port
Otu ọdụ ụgbọ mmiri na-anọchite anya interface dị n'etiti akwa FPGA static ("FPGA Interface Manager (FIM)") na mpaghara nwere ike ịhazigharị akụkụ nke nwere Ọrụ Accelerator (AF). Ọdụ ụgbọ mmiri na-ejikwa nzikọrịta ozi sitere na ngwanrọ gaa na ihe osooso wee kpughee atụmatụ dị ka nrụpụta na nbipu. Ngwaọrụ PCIe nwere ike ịnwe ọtụtụ ọdụ ụgbọ mmiri, enwere ike ikpughe Port nke ọ bụla site na VF site n'ekenye ya site na iji FPGA_FME_PORT_ASSIGN ioctl na ngwaọrụ FME.

Ngalaba Accelerator (AF).

• Agbakwunyere Ngalaba Accelerator Function (AF) na ọdụ ụgbọ mmiri wee kpughee mpaghara MMIO 256K ga-eji maka ndekọ njikwa ngwa ngwa akọwapụtara.
• Ngwa oghere onye ọrụ nwere ike nweta ohere pụrụ iche na AFU nke agbakwunyere na Port site na iji oghe () na ngwaọrụ Port, wee hapụ ya site na iji nso ().
• Ngwa-ohere onye ọrụ nwekwara ike mmap() mpaghara MMIO ngwa ngwa.

Nhazigharị akụkụ
Dịka e kwuru n'elu, enwere ike ịhazigharị ngwa ngwa site na nhazigharị akụkụ nke Ọrụ Accelerator (AF) file. Ọrụ Accelerator (AF) ga-abụrịrị na emepụtara ya maka mpaghara FIM na mpaghara static ezubere iche (Port) nke FPGA; ma ọ bụghị ya, ọrụ nhazigharị ahụ ga-ada ma eleghị anya na-akpata ọgba aghara usoro. Enwere ike ịlele ndakọrịta a site n'ịtụle ID interface ahụ edepụtara na nkụnye eji isi mee AF ​​megide ID interface nke FME kpughere site na sysfs. A na-emekarị nlele a site na oghere onye ọrụ tupu ịkpọgharịa IOCTL nhazigharị.

Mara:
Ugbu a, mmemme sọftụwia ọ bụla na-enweta FPGA, gụnyere ndị na-agba ọsọ n'ime onye ọbịa nke ọma, ga-emechirịrị tupu ị nwaa nhazigharị akụkụ. Usoro ga-abụ:

1. Budata ọkwọ ụgbọ ala n'aka onye ọbịa
2. Wepụ VF na onye ọbịa
3. Gbanyụọ SR-IOV
4. Mee nhazigharị akụkụ
5. Kwado SR-IOV
6. Tinye VF na onye ọbịa
7. Bunye onye ọkwọ ụgbọ ala n'ime onye ọbịa

FPGA Virtualization
Iji mee ka ịnweta ngwa osooso site na ngwa na-agba na VM, a ga-ekenye ọdụ ụgbọ mmiri AFU na VF site na iji usoro ndị a:

1. PF nwere ọdụ ụgbọ mmiri AFU niile na ndabara. Ọdụ ụgbọ mmiri ọ bụla a ga-ekenye ya na VF ga-ebu ụzọ wepụta ya na PF site na FPGA_FME_PORT_RELEASE ioctl na ngwaọrụ FME.
2. Ozugbo ewepụtara ọdụ ụgbọ mmiri N na PF, enwere ike iji iwu dị n'okpuru mee ka SRIOV na VF nwee ike. VF ọ bụla nwere naanị otu ọdụ ụgbọ mmiri nwere AFU. echo N > PCI_DEVICE_PATH/sriov_numvfs
3. Nyefee site na VF gaa na VM.
4. AFU dị n'okpuru VF na-enweta site na ngwa dị na VM (na-eji otu ọkwọ ụgbọ ala n'ime VF).

Mara:
Enweghị ike ịnye FME na VF, yabụ PR na ọrụ njikwa ndị ọzọ dị naanị site na PF.

Òtù Ọkwọ ụgbọala

PCIe Module Device ọkwọ ụgbọ ala

Òtù Ọkwọ ụgbọala

Ngwa FPGA na-apụta dị ka ngwaọrụ PCIe mgbe niile; ya mere, a na-ebu ụzọ ebu onye ọkwọ ụgbọ ala FPGA PCIe (intel-FPGA-PCI.ko) ozugbo achọpụtara FPGA PCIe PF ma ọ bụ VF. Onye ọkwọ ụgbọ ala a na-arụ ọrụ akụrụngwa n'ime ụlọ ndị ọkwọ ụgbọ ala. Ọ:

• Na-emepụta ngwaọrụ akpa FPGA dị ka nne na nna nke ngwaọrụ njirimara.
• Na-eje ije site na Ndepụta Njirimara Ngwaọrụ, nke a na-emejuputa na ebe nchekwa ngwaọrụ PCIe, iji chọpụta ngwaọrụ njirimara na akụkụ ha ma mepụta ngwaọrụ ikpo okwu maka ha n'okpuru ngwaọrụ akpa.
• Na-akwado SR-IOV.
• Na-ewebata akụrụngwa akụrụngwa njiri mara, nke na-edobe ọrụ maka obere akụkụ ma kpughee ọrụ ndị a na-ahụkarị na ndị ọkwọ ụgbọ ala ngwaọrụ.

Ọrụ ndị ọkwọ ụgbọ ala PCIe

• Nwere nchọpụta PCIe, ngụkọ ngwaọrụ, na nchọpụta njirimara.
• Na-emepụta akwụkwọ ndekọ aha sysfs maka ngwaọrụ nne na nna, FPGA Management Engine (FME), na Port.
• Na-emepụta oge ọkwọ ụgbọ ala ikpo okwu, na-eme ka Linux kernel na-ebunye ndị ọkwọ ụgbọ ala ikpo okwu ha.

FME Platform Module Device Driver

• Njikwa ike na okpomọkụ, mkpesa njehie, mkpesa arụmọrụ, yana ọrụ akụrụngwa ndị ọzọ. Ị nwere ike nweta ọrụ ndị a site na sysfs interface nke onye ọkwọ ụgbọ ala FME kpughere.
• Nhazigharị akụkụ. Onye ọkwọ ụgbọ ala FME na-edebanye aha onye njikwa FPGA n'oge mmalite nke njiri mara PR; ozugbo ọ natara FPGA_FME_PORT_PR ioctl n'aka gị, ọ na-akpọku ọrụ interface a na-ahụkarị n'aka onye njikwa FPGA iji mezue nhazigharị akụkụ nke bitstream na Port e nyere.
• Njikwa ọdụ ụgbọ mmiri maka ime ihe n'ezie. Onye ọkwọ ụgbọ ala FME na-ewebata iocctls abụọ, FPGA_FME_PORT_RELEASE, nke na-ahapụ Port e nyere site na PF; yana FPGA_FME_PORT_ASSIGN, nke na-ekenye ọdụ ụgbọ mmiri azụ na PF. Ozugbo ewepụtara Port na PF, enwere ike kenye ya na VF site na oghere SR-IOV nke onye ọkwọ ụgbọ ala PCIe nyere. Maka ozi ndị ọzọ, rụtụ aka na “FPGA Virtualization”.

Ọrụ ndị ọkwọ ụgbọ ala FME Platform

• Na-emepụta ọnụ ngwaọrụ agwa FME.
• Na-emepụta sysfs FME files ma mejuputa FME sysfs file ngwa ngwa.
• Na-emejuputa ndị ọkwọ ụgbọ ala nkeonwe FME.
• Ndị ọrụ ụgbọ ala FME nkeonwe:
  • FME isi
  • Njikwa okpomọkụ
  • Njikwa Ike
  • Njehie zuru ụwa ọnụ
  • Nhazigharị akụkụ
  • Ọrụ zuru ụwa ọnụ

Ihe eji akwọ ụgbọ mmiri Modul
Dị ka onye ọkwọ ụgbọ ala FME, a na-enyocha onye ọkwọ ụgbọ mmiri FPGA Port (na AFU) (intel-fpga-afu. ko) ozugbo emepụtara ngwaọrụ ikpo okwu Port. Isi ọrụ nke modul a bụ ịnye interface maka ngwa oghere onye ọrụ iji nweta ndị na-eme ngwa ngwa, gụnyere njikwa nrụpụta isi na Port, mbupụ mpaghara AFU MMIO, ọrụ nchekwa nchekwa DMA, ọkwa UMsg(1), na ọrụ nbipu nke dịpụrụ adịpụ ( lee n'elu).

A na-akwado UMsg naanị site na Stack Acceleration maka Intel Xeon® Processor nwere FPGA Integrated.

Ọrụ ndị ọkwọ ụgbọ ala Module Port Platform

• Na-emepụta ọnụ ngwaọrụ Port.
• Na-emepụta Port sysfs files ma na-emejuputa Port sysfs file ngwa ngwa.
• Na-emejuputa ndị ọkwọ ụgbọ ala nkeonwe Port.
• Ndị na-anya ụgbọ mmiri nkeonwe:
  • Isi Port
  • AFU
  • Njehie Port
  • UMsg(2)
  • Pịa mgbaama

Ngwa FPGA Ngwaọrụ
Akụkụ a na-ewebata ka ngwa si agụta ngwaọrụ FPGA site na ndị isi sysfs n'okpuru /sys/class/fpga. Na exampN'okpuru ebe a, etinyere ngwaọrụ abụọ Intel FPGA na onye ọbịa. Ngwa FPGA ọ bụla nwere otu FME na ọdụ ụgbọ mmiri abụọ (AFU). Maka ngwaọrụ FPGA ọ bụla, a na-emepụta ndekọ ngwaọrụ n'okpuru /sys/class/fpga:

/sys/class/fpga/intel-fpga-dev.0
/sys/class/fpga/intel-fpga-dev.1

Ọnụ ọ bụla nwere otu FME na ọdụ ụgbọ mmiri abụọ (AFU) dị ka ngwaọrụ ụmụaka:
/sys/class/fpga/intel-fpga-dev.0/intel-fpga-fme.0
/sys/class/fpga/intel-fpga-dev.0/intel-fpga-port.0
/sys/class/fpga/intel-fpga-dev.0/intel-fpga-port.1
/sys/class/fpga/intel-fpga-dev.1/intel-fpga-fme.1
/sys/class/fpga/intel-fpga-dev.1/intel-fpga-port.2
/sys/class/fpga/intel-fpga-dev.1/intel-fpga-port.3

N'ozuzu, a na-akpọ interfaces FME/Port sysfs dị ka ndị a:
/sys/class/fpga/intel-fpga-dev.i/intel-fpga-fme.j/
/sys/class/fpga/intel-fpga-dev.i/intel-fpga-port.k/

site na m na-ede nọmba ngwa ngwa niile n'usoro, jịnye nọmba FME na k na-esokwa nọmba ọdụ ụgbọ mmiri niile.

Enwere ike ịkọwa ọnụ ngwaọrụ eji maka ioctl() na mmap() site na:
/dev/intel-fpga-fme.j
/dev/intel-fpga-port.k

Ọnụ ọgụgụ ndị ọkwọ ụgbọ ala PCIe
Nkebi a na-enye ihe karịrịview nke koodu eruba maka ngụkọ ngwaọrụ nke intel-fpga-pci.ko rụrụ. A na-akọwapụta usoro na ọrụ ndị bụ isi data. Nkebi nke a kacha mma soro mgbe viewna-eso koodu isi mmalite (pcie.c).

Nhazi data nchịkọta

enum fpga_id_type {
PARENT_ID,
FME_ID,
PORT_ID,
FPGA_ID_MAX
};
static struct idr fpga_ids[FPGA_ID_MAX];
nhazi fpga_chardev_info {
const char * aha;
dev_t devt;
};
struct fpga_chardev_info fpga_chrdevs[] = {
{ .aha = FPGA_FEATURE_DEV_FME },
{ .aha = FPGA_FEATURE_DEV_PORT },
};
klas static struct * fpga_class;
static struct pci_device_id cci_pcie_id_tbl[] = {
{PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIe_DEVICE_ID_RCiEP0_MCP),},
{PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIe_DEVICE_ID_VF_MCP),},
{PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIe_DEVICE_ID_RCiEP0_SKX_P),},
{PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIe_DEVICE_ID_VF_SKX_P),},
{PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIe_DEVICE_ID_RCiEP0_DCP),},
{PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIe_DEVICE_ID_VF_DCP),},
{0,}
};
static struct pci_driver cci_pci_driver = {
.aha = DRV_NAME,
.id_table = cci_pcie_id_tbl,
.nyocha = cci_pci_probe,
.wepu = cci_pci_wepu,
.sriov_configure = cci_pci_sriov_configure
};
nhazi cci_drvdata {
ngwaọrụ int;
ngwaọrụ nhazi * fme_dev;
struct mutex mkpọchi;
struct list_head port_dev_list;
int wepụtara_port_num;
mpaghara ndepụta_isi;
};
struct build_feature_devs_info {
struct pc_dev *pdev;
efu __iomem *ioaddr;
efu __iomem *ioend;
int current_bar;
efu __iomem *pfme_hdr;
ngwaọrụ nhazi *parent_dev;
struct platform_device * feature_dev;
};

Usoro ngụkọ

• ccidrv_init()
  • Melite fpga_ids site na iji idr_init().
  • Bido fpga_chrdevs[i].devt iji alloc_chrdev_region().
  • Melite fpga_class site na iji class_create().
  • pci_register_driver(&cci_pci_driver);
• cci_pci_probe()
  • Kwado ngwaọrụ PCI, rịọ ka ị nweta mpaghara ya, tọọ ọnọdụ onye isi PCI, wee hazie DMA.
• cci_pci_create_feature_devs() build_info_alloc_and_init()
  • Kenye struct build_feature_devs_info, bido ya.
    .parent_dev ka edobere na ndekọ ndekọ sysfs nne na nna (intel-fpga-dev.id) nke nwere akwụkwọ ndekọ aha FME na Port sysfs.
• parse_feature_list()
  • Gaa na Ndepụta Njirimara Ngwaọrụ BAR0 iji chọpụta FME, Port na atụmatụ nzuzo ha.
• parse_feature() parse_feature_afus() parse_feature_fme()
  • Mgbe enwere FME:
• build_info_create_dev()
  • Kenye ngwaọrụ ikpo okwu maka FME, na-echekwa na build_feature_devs_info.feature_dev.
  • Emalitere feature_dev.id ka ọ bụrụ nsonaazụ idr_alloc(fpga_ids[FME_ID],
  • feature_dev.parent atọrọ ka build_feature_devs_info.parent_dev.
  • Kenye ọtụtụ akụrụngwa nhazi na feature_dev.resource.
• Wepụta atụmatụ_platform_data struct, bido ya, wee chekwaa pointer na feature_dev.dev.platform_data
  • create_feature_instance() build_info_add_sub_feature()
  • Malite atụmatụ_dev.resource[FME_FEATURE_ID_HEADER].
  • atụmatụ_platform_data_gbakwunye()
  • Malite feature_platform_data.features[FME_FEATURE_ID_HEADER], ihe niile ma .fops.
• parse_feature() parse_feature_afus() parse_feature_port()
  • Mgbe a na-ezute ọdụ ụgbọ mmiri:
• build_info_create_dev()
  • Kenye ngwaọrụ ikpo okwu maka ọdụ ụgbọ mmiri, na-echekwa na build_feature_devs_info.feature_dev.
  • Emalitere feature_dev.id ka ọ bụrụ nsonaazụ idr_alloc(fpga_ids[PORT_ID],
  • feature_dev.parent atọrọ ka build_feature_devs_info.parent_dev.
  • Kenye akụrụngwa nhazi n'usoro na feature_dev.resource.
  • Wepụta atụmatụ_platform_data struct, bido ya, wee chekwaa pointer na feature_dev.dev.platform_data
• build_info_commit_dev()
  • Tinye struct feature_platform_data.node maka Port na ndepụta ọdụ ụgbọ mmiri dị na cci_drvdata.port_dev_list.
• create_feature_instance() build_info_add_sub_feature()
  • Malite atụmatụ_dev.resource[PORT_FEATURE_ID_HEADER].
• atụmatụ_platform_data_gbakwunye()
  • Malite feature_platform_data.features[PORT_FEATURE_ID_HEADER], ihe niile ma .fops.
• parse_feature() parse_feature_afus() parse_feature_port_uafu()
  • Mgbe enwere AFU:
• create_feature_instance() build_info_add_sub_feature()
  • Malite atụmatụ_dev.resource[PORT_FEATURE_ID_UAFU].
• atụmatụ_platform_data_gbakwunye()
  • Malite feature_platform_data.features[PORT_FEATURE_ID_UAFU], ihe niile ma .fops.
• parse_feature() parse_feature_private() parse_feature_fme_private()
  • Mgbe enwere ihe nzuzo FME:
• create_feature_instance() build_info_add_sub_feature()
  • Malite feature_dev.resource[id].
• atụmatụ_platform_data_gbakwunye()
  • Malite feature_platform_data.features[id], ihe niile ma .fops.
• parse_feature() parse_feature_private() parse_feature_port_private()
• Mgbe a na-ezute ihe nzuzo Port: * create_feature_instance() build_info_add_sub_feature() * Bido feature_dev.resource[id]. * feature_platform_data_add() malite feature_platform_data.features[id], ihe niile ma .fops.
• parse_ports_from_fme()
  • Ọ bụrụ na eburu ọkwọ ụgbọala ahụ na arụ ọrụ anụ ahụ (PF), mgbe ahụ:
• Gbaa ọsọ parse_feature_list() na ọdụ ụgbọ mmiri ọ bụla akọwara na nkụnye eji isi mee FME.
• Jiri BAR a kpọtụrụ aha na ntinye Port ọ bụla na nkụnye eji isi mee.

Mmalite ngwaọrụ Platform FME
Nkebi a na-enye ihe karịrịview nke koodu eruba maka mmalite ngwaọrụ FME nke intel-fpga-fme.ko rụrụ. A na-ebuli usoro na ọrụ ndị bụ isi data. Nkebi nke a kacha mma soro mgbe viewna-eso koodu isi mmalite (fme-main.c).

Nhazi data ngwaọrụ Platform FME

struct feature_ops {
int (* init) ( struct platform_device * pdev, atụmatụ struct * atụmatụ);
int (* uinit) ( struct platform_device * pdev, atụmatụ struct * atụmatụ);
ogologo (* ioctl) ( struct platform_device * pdev, atụmatụ nhazi * njirimara,
int cmd na-edeghị akwụkwọ, ogologo arg na-edeghị akwụkwọ);
int (* ule) ( struct platform_device * pdev, atụmatụ struct * atụmatụ);
};
atụmatụ nhazi {
const char * aha;
int resource_index;
efu __iomem *ioaddr;
struct feature_ops * ops;
};
struct feature_platform_data {
struct list_head node;
struct mutex mkpọchi;
ogologo dev_status enweghị akara;
cdev cdev;
struct platform_device * dev;
enweghị ike ịbanye disable_count;
efu * nkeonwe;
ọnụ ọgụgụ;
int (* config_port) (usoro platform_device *, u32, bool);
struct platform_device *(*fpga_for_each_port)(ngwaọrụ_ngwaọrụ *,
efu *, int (* egwuregwu) (usoro ikpo okwu *, efu *)); nhazi
njirimara njirimara[0];
};
struct perf_object {
int id;
const struct attribute_group ** attr_groups;
ngwaọrụ nhazi * fme_dev;
struct list_head node;
struct list_head ụmụaka;
struct kobject kobj;
};
nhazi fpga_fme {
u8 port_id;
u64 pr_err;
ngwaọrụ nhazi * dev_err;
struct perf_object * perf_dev;
struct feature_platform_data *pdata;
};

Usoro mmalite ngwaọrụ FME Platform

Usoro mmalite mmalite FME

• fme_probe() fme_dev_init()
  • Bido fpga_fme struct ma chekwaa ya n'ọhịa_platform_data.private.
• fme_probe() fpga_dev_feature_init() feature_instance_init()
  • Chekwaa struct feature_ops n'ime njirimara_platform_data.features maka njiri mara nke ọ bụla.
  • Kpọọ ọrụ nnwale, ọ bụrụ na ọ bụla, site na nhazi ahụ.
  • Kpọọ ọrụ init site na struct.
• fme_probe() fpga_register_dev_ops()
  • Mepụta ọnụ ngwaọrụ agwa FME, na-edebanye aha struct file_ọrụ.

Mmalite ngwaọrụ Port Platform
Nkebi a na-enye ihe karịrịview nke koodu eruba maka mmalite ngwaọrụ ọdụ ụgbọ mmiri nke intel-fpga-afu.ko rụrụ. A na-akọwapụta usoro na ọrụ ndị bụ isi data. Nkebi nke a kacha mma soro mgbe viewna koodu isi mmalite na-eso (afu.c).

Nhazi data ngwaọrụ Port Platform

struct feature_ops {
int (* init) ( struct platform_device * pdev, atụmatụ struct * atụmatụ);
int (* uinit) ( struct platform_device * pdev, atụmatụ struct * atụmatụ);
ogologo (* ioctl) ( struct platform_device * pdev, atụmatụ nhazi * njirimara,
int cmd na-edeghị akwụkwọ, ogologo arg na-edeghị akwụkwọ);
int (* ule) ( struct platform_device * pdev, atụmatụ struct * atụmatụ);
};
atụmatụ nhazi {
const char * aha;
int resource_index;
efu __iomem *ioaddr;
struct feature_ops * ops;
};
struct feature_platform_data {
struct list_head node;
struct mutex mkpọchi;
ogologo dev_status enweghị akara;
cdev cdev;
struct platform_device * dev;
enweghị ike ịbanye disable_count;
efu * nkeonwe;
ọnụ ọgụgụ;
int (* config_port) (usoro platform_device *, u32, bool);
struct platform_device *(*fpga_for_each_port)(ngwaọrụ_ngwaọrụ *,
efu *, int (* egwuregwu) (usoro ikpo okwu *, efu *));
atụmatụ atụmatụ [0];
};
nhazi fpga_afu_region {
u32 index;
u32 ọkọlọtọ;
u64 nha;
u64 akwụ ụgwọ;
u64 phys;
struct list_head node;
};
nhazi fpga_afu_dma_region {
u64 user_addr;
u64 ogologo;
u64 iova;
ibe nhazi ** ibe;
struct rb_node ọnụ;
bool in_use;
};
nhazi fpga_afu {
u64 mpaghara_cur_offset;
int num_mpaghara;
u8 num_umsgs;
mpaghara ndepụta_isi;
nhazi rb_root dma_regions;
struct feature_platform_data *pdata;
};

Usoro mmalite ngwaọrụ Port Platform

Usoro mmalite Port

• afu_probe() afu_dev_init()
  • Bido fpga_afu struct ma chekwaa ya n'ubi feature_platform_data.private.
• afu_probe() fpga_dev_feature_init() feature_instance_init()
  • Chekwaa struct feature_ops n'ime njirimara_platform_data.features maka njiri mara nke ọ bụla.
  • Kpọọ ọrụ nnwale, ọ bụrụ na ọ bụla, site na nhazi ahụ.
  • Kpọọ ọrụ init site na struct.
• afu_probe() fpga_register_dev_ops()
  • Mepụta ọnụ ngwaọrụ Port, na-edebanye aha struct file_ọrụ.

Ndị FME IOCTL
IOCTL ndị a na-akpọ na oghe file nkọwa maka /dev/intel-fpga-fme.j FPGA_GET_API_VERSION — weghachi ụdị ugbu a dị ka integer, malite na 0.

FPGA_CHECK_EXTENSION—anaghị akwado ya ugbu a.

FPGA_FME_PORT_RELEASE—arg bụ ntụnye aka na:

nhazi fpga_fme_port_release {
__u32 argsz; // na: sizeof (nhazi fpga_fme_port_release)
__u32 ọkọlọtọ; // na: ga-abụrịrị 0
__u32 ọdụ ụgbọ mmiri; // na: ID ọdụ ụgbọ mmiri (site na 0) ka ahapụ ya.
};

FPGA_FME_PORT_ASSIGN—arg bụ ntụnye aka na:

nhazi fpga_fme_port_assign {
__u32 argsz; // na: sizeof (usoro fpga_fme_port_assign)
__u32 ọkọlọtọ; // na: ga-abụrịrị 0
__u32 ọdụ ụgbọ mmiri; // na: ID ọdụ ụgbọ mmiri (site na 0) iji kenye. (ga-abụrịrị
FPGA_FME_PORT_RELEASE wepụtara na mbụ)
};

FPGA_FME_PORT_PR—arg bụ ntụnye aka na:

nhazi fpga_fme_port_pr {
__u32 argsz; // na: sizeof (usoro fpga_fme_port_pr)
__u32 ọkọlọtọ; // na: ga-abụrịrị 0
__u32 ọdụ ụgbọ mmiri; // na: ID ọdụ ụgbọ mmiri (site na 0)
__u32 ihe nchekwa_nha; // na: nha nke ihe nchekwa bitstream na bytes. Kwesịrị ịbụ 4-byte
kwadoro.
__u64 ebe nchekwa_adreesị; // na: adreesị nhazi nke ihe nchekwa bitstream
__u64 ọnọdụ; // pụta: ọnọdụ njehie (bitmask)
};

Port IOCTL
IOCTL ndị a na-akpọ na oghe file nkọwa maka /dev/intel-fpga-port.k FPGA_GET_API_VERSION—weghachite ụdị ugbu a dị ka integer, malite na 0. FPGA_CHECK_EXTENSION—anaghị akwado ya ugbu a.

FPGA_PORT_GET_INFO—arg bụ ntụnye aka na:

nhazi fpga_port_info {
__u32 argsz; // na: sizeof (usoro fpga_port_info)
__u32 ọkọlọtọ; // pụta: laghachi 0
__u32 ọnụọgụ_mpaghara; // pụta: ọnụ ọgụgụ nke mpaghara MMIO, 2 (1 maka AFU na 1 maka
STP)
__u32 num_umsgs; // pụta: ọnụọgụ UMsg nke ngwaike na-akwado
};

FPGA_PORT_GET_REGION_INFO—arg bụ ntụnye aka na:

nhazi fpga_port_region_info {
__u32 argsz; // na: sizeof (nhazi fpga_port_region_info)
__u32 ọkọlọtọ; // pụta: (bitmask) {FPGA_REGION_READ, FPGA_REGION_WRITE,
FPGA_REGION_MMAP }
__u32 ndeksi; // na: FPGA_PORT_INDEX_UAFU ma ọ bụ FPGA_PORT_INDEX_STP
__u32 mpe mpe akwa; // na: ga-abụrịrị 0
__u64 nha; // pụta: nha mpaghara MMIO na bytes
__u64 kwụsịrị; // pụta: nkwụghachi nke mpaghara MMIO site na mmalite nke ngwaọrụ fd
};

FPGA_PORT_DMA_MAP—arg bụ ntụnye aka na:
nhazi fpga_port_dma_map {
__u32 argsz; // na: sizeof (usoro fpga_port_dma_map)
__u32 ọkọlọtọ; // na: ga-abụrịrị 0 __u64 user_addr; // na: usoro mebere
adreesị. Ekwesịrị ịkwado ibe ya.
__u64 ogologo; // na: ogologo nke nkewa na bytes. Ga-abụrịrị otutu ibe
nha.
__u64 iova; // pụta: IO mebere adreesị };

FPGA_PORT_DMA_UNMAP—arg bụ ntụnye aka na:
nhazi fpga_port_dma_unmap {
__u32 argsz; // na: sizeof (usoro fpga_port_dma_unmap)
__u32 ọkọlọtọ; // na: ga-abụrịrị 0
__u64 iova; // na: IO mebere adreesị nke gara aga weghachiri
FPGA_PORT_DMA_MAP };

• FPGA_PORT_RESET—arg ga-abụrịrị NULL.
• FPGA_PORT_UMSG_ENABLE—arg ga-abụrịrị NULL.
• FPGA_PORT_UMSG_DISABLE—args ga-abụrịrị NULL.

FPGA_PORT_UMSG_SET_MODE—arg bụ ntụnye aka na:

nhazi fpga_port_umsg_cfg {
__u32 argsz; // na: sizeof (nhazi fpga_port_umsg_cfg)
__u32 ọkọlọtọ; // na: ga-abụrịrị 0
__u32 hint_bitmap; // n'ime: UMsg ihe nrịba ama bitmap. Na-egosi ndị UMsg bụ
enyere.
};

FPGA_PORT_UMSG_SET_BASE_ADDR—

• UMsg ga-enwe nkwarụ tupu enye ioctl a.
• Oghere iova ga-abụrịrị maka ihe nchekwa buru ibu maka UMsg niile (num_umsgs * PAGE_SIZE).
  • Akara ihe nchekwa ahụ dị ka “a na-eji ya” site na njikwa nchekwa nke onye ọkwọ ụgbọ ala.
  • Ọ bụrụ na iova bụ NULL, mpaghara ọ bụla gara aga enweghị akara dị ka “a na-eji”.
• arg bụ ihe atụ maka:
  nhazi fpga_port_umsg_base_addr {
  • u32 argz; // na: sizeof (nhazi fpga_port_umsg_base_addr)
  • u32 ọkọlọtọ; // na: ga-abụrịrị 0
  • nke 64 ova; // na: IO mebere adreesị si FPGA_PORT_DMA_MAP. };

Mara:

• Iji kpochapụ njehie ọdụ ụgbọ mmiri, ị ga-ederịrị bitmask kpọmkwem nke njehie dị ugbu a, maka example, pusi njehie> doro anya
• A na-akwado UMsg naanị site na Stack Acceleration maka Intel Xeon Processor nwere FPGA Integrated.

sysfs Files

Isi FME sysfs files
intel-fpga-dev.i/intel-fpga-fme.j/

sysfs file	ubi mm	ụdị	ohere
ọdụ ụgbọ mmiri_num	fme_header.capability.num_ports	decimal int	Ọgụgụ-naanị
cache_size	fme_header.capability.cache_size	decimal int	Ọgụgụ-naanị
ụdị	fme_header.capability.fabric_verid	decimal int	Ọgụgụ-naanị
socket_id	fme_header.capability.socket_id	decimal int	Ọgụgụ-naanị
bitstream_id	fme_header.bitstream_id	hex uint64_t	Ọgụgụ-naanị
bitstream_metadata	fme_header.bitstream_md	hex uint64_t	Ọgụgụ-naanị

FME Thermal Management sysfs files
intel-fpga-dev.i/intel-fpga-fme.j/thermal_mgmt/

sysfs file	ubi mm	ụdị	ohere
ọnụ ụzọ 1	thermal.threshold.tmp_thshold1	decimal int	Onye ọrụ: Mgbọrọgwụ na-agụ naanị: Gụọ-dee
ọnụ ụzọ 2	thermal.threshold.tmp_thshold2	decimal int	Onye ọrụ: Mgbọrọgwụ na-agụ naanị: Gụọ-dee
njem_threshold	thermal.threshold.therm_trip_thshold	decimal int	Ọgụgụ-naanị
threshold1_eru	thermal.threshold.thshold1_ọnọdụ	decimal int	Ọgụgụ-naanị
threshold2_eru	thermal.threshold.thshold2_ọnọdụ	decimal int	Ọgụgụ-naanị
threshold1_usoro iwu	thermal. threshold.thshold_policy	decimal int	Onye ọrụ: Mgbọrọgwụ na-agụ naanị: Gụọ-dee
okpomọkụ	thermal.rdsensor_fm1.fpga_temp	decimal int	Ọgụgụ-naanị

Njikwa ike FME sysfs files
intel-fpga-dev.i/intel-fpga-fme.j/power_mgmt/

sysfs file	ubi mm	ụdị	ohere
eripịa	power.status.pwr_riri	hex uint64_t	Ọgụgụ-naanị
ọnụ ụzọ 1	ike.threshold.threshold1	hex uint64_t	Onye ọrụ: Mgbọrọgwụ na-agụ naanị: Gụọ-dee
ọnụ ụzọ 2	ike.threshold.threshold2	hex uint64_t	Onye ọrụ: Mgbọrọgwụ na-agụ naanị: Gụọ-dee
threshold1_ọnọdụ	ike.threshold.threshold1_ọnọdụ	onu ogugu onu ogugu onu ogugu onu ogugu onu ogugu	Ọgụgụ-naanị
threshold2_ọnọdụ	ike.threshold.threshold2_ọnọdụ	onu ogugu onu ogugu onu ogugu onu ogugu onu ogugu	Ọgụgụ-naanị
rtl	power.status.fpga_latency_report	onu ogugu onu ogugu onu ogugu onu ogugu onu ogugu	Ọgụgụ-naanị

Njehie zuru ụwa ọnụ FME sysfs files
intel-fpga-dev.i/intel-fpga-fme.j/errors/

sysfs file	ubi mm	ụdị	ohere
pcie0_njehie	gerror.pcie0_err	hex uint64_t	Gụọ-dee
pcie1_njehie	gerror.pcie1_err	hex uint64_t	Gụọ-dee
inject_error	gerror.ras_error_inj	hex uint64_t	Gụọ-dee

intel-fpga-dev.i/intel-fpga-fme.j/errors/fme-errors/

sysfs file	ubi mm	ụdị	ohere
mmejọ	gerror.fme_err	hex uint64_t	Ọgụgụ-naanị
mbụ_error	gerror.fme_first_err.err_reg_status	hex uint64_t	Ọgụgụ-naanị
next_error	gerror.fme_next_err.err_reg_status	hex uint64_t	Ọgụgụ-naanị
doro anya	Na-ekpochapụ mperi, first_error, next_error	dị iche iche uint64_t	Naanị dee

Mara:
Iji kpochapụ mmejọ FME, ị ga-ederịrị bitmask nke njehie dị ugbu a, maka example pusi njehie> doro anya.

Nhazigharị akụkụ FME sysfs files
intel-fpga-dev.i/intel-fpga-fme.j/pr/

sysfs file	ubi mm	ụdị	ohere
interface_id	pr.fme_pr_intfc_id0_h, pr.fme_pre_intfc_id0_l	hex 16-byte	Ọgụgụ-naanị

FME Global Performance sysfs files
intel-fpga-dev.i/intel-fpga-fme.j/dperf/clock

sysfs file	ubi mm	ụdị	ohere
elekere	gperf.clk.afu_interf_clock	hex uint64_t	Ọgụgụ-naanị

intel-fpga-dev.i/intel-fpga-fme.j/dperf/cache/ (Ọ dịghị mma maka Acceleration Stack maka Intel Xeon CPU na FPGAs)

sysfs file	ubi mm	ụdị	ohere
ifriizi	gperf.ch_ctl.freeze	decimal int	Gụọ-dee
gụọ_hit	gperf.CACHE_RD_HIT	hex uint64_t	Ọgụgụ-naanị
gụọ_miss	gperf.CACHE_RD_MISS	hex uint64_t	Ọgụgụ-naanị
dee_hit	gperf.CACHE_WR_HIT	hex uint64_t	Ọgụgụ-naanị
dee_miss	gperf.CACHE_WR_MISS	hex uint64_t	Ọgụgụ-naanị
jide_arịrịọ	gperf.CACHE_HOLD_REQ	hex uint64_t	Ọgụgụ-naanị
tx_req_stall	gperf.CACHE_TX_REQ_STALL	hex uint64_t	Ọgụgụ-naanị

sysfs file	ubi mm	ụdị	ohere
rx_req_stall	gperf.CACHE_RX_REQ_STALL	hex uint64_t	Ọgụgụ-naanị
data_write_port_content	gperf.CACHE_DATA_WR_PORT_CONTEN	hex uint64_t	Ọgụgụ-naanị
tag_dee_ọdụ ụgbọ mmiri	gperf.CACHE_TAG_WR_PORT_CONTEN	hex uint64_t	Ọgụgụ-naanị

intel-fpga-dev.i/intel-fpga-fme.j/dperf/iommu/ (Ọ dịghị mma maka Acceleration Stack maka Intel Xeon CPU na FPGAs)

sysfs file	ubi mm	ụdị	ohere
ifriizi	gperf.vtd_ctl.freeze	decimal int	Onye ọrụ: Mgbọrọgwụ na-agụ naanị: Gụọ-dee

intel-fpga-dev.i/intel-fpga-fme.j/dperf/iommu/afuk/ (Ọ dịghị mma maka Acceleration Stack maka Intel Xeon CPU na FPGAs)

sysfs file	ubi mm	ụdị	ohere
read_transaction	gperf.VTD_AFU0_MEM_RD_TRANS	hex uint64_t	Ọgụgụ-naanị
dee_transaction	gperf.VTD_AFU0_MEM_WR_TRANS	hex uint64_t	Ọgụgụ-naanị
tlb_read_hit	gperf.VTD_AFU0_TLB_RD_HIT	hex uint64_t	Ọgụgụ-naanị
tlb_write_hit	gperf.VTD_AFU0_TLB_WR_HIT	hex uint64_t	Ọgụgụ-naanị

intel-fpga-dev.i/intel-fpga-fme.j/dperf/fabric/

sysfs file	ubi mm	ụdị	ohere
mee ka	gperf.fab_ctl.(gbanyere)	decimal int	Onye ọrụ: Mgbọrọgwụ na-agụ naanị: Gụọ-dee
ifriizi	gperf.fab_ctl.freeze	decimal int	Onye ọrụ: Mgbọrọgwụ na-agụ naanị: Gụọ-dee
pcie0_agụ	gperf.FAB_PCIE0_RD	hex uint64_t	Ọgụgụ-naanị
pcie0_dee	gperf.FAB_PCIE0_WR	hex uint64_t	Ọgụgụ-naanị
pcie1_agụ	gperf.FAB_PCIE1_RD	hex uint64_t	Ọgụgụ-naanị
pcie1_dee	gperf.FAB_PCIE1_WR	hex uint64_t	Ọgụgụ-naanị
elu_agụ	gperf.FAB_UPI_RD	hex uint64_t	Ọgụgụ-naanị
elu_dee	gperf.FAB_UPI_WR	hex uint64_t	Ọgụgụ-naanị

intel-fpga-ev.i/intel-fpga/fme.j/dperf/fabric/portk/

sysfs file	ubi mm	ụdị	ohere
pcie0_agụ	gperf.FAB_PCIE0_RD	hex uint64_t	Ọgụgụ-naanị
pcie0_dee	gperf.FAB_PCIE0_WR	hex uint64_t	Ọgụgụ-naanị
pcie1_agụ	gperf.FAB_PCIE1_RD	hex uint64_t	Ọgụgụ-naanị
pcie1_dee	gperf.FAB_PCIE1_WR	hex uint64_t	Ọgụgụ-naanị
elu_agụ	gperf.FAB_UPI_RD	hex uint64_t	Ọgụgụ-naanị
elu_dee	gperf.FAB_UPI_WR	hex uint64_t	Ọgụgụ-naanị

Isi Port sysfs files
intel-fpga-dev.i/intel-fpga-port.k/

sysfs file	ubi mm	ụdị	ohere
id	port_header.capability.port_number	decimal int	Ọgụgụ-naanị
ltr	port_header.control.latency_tolerance	decimal int	Ọgụgụ-naanị

Port AFU Header sysfs files
intel-fpga-dev.i/intel-fpga-port.k/

sysfs file	ubi mm	ụdị	ohere
afu_id	afu_header.guid	hex 16-byte	Ọgụgụ-naanị

Njehie Port sysfs files
intel-fpga-dev.i/intel-fpga-port.k/errors/

sysfs file	ubi mm	ụdị	ohere
mmejọ	perror.port_error	hex uint64_t	Ọgụgụ-naanị
mbụ_error	perror.port_first_error	hex uint64_t	Ọgụgụ-naanị
nke mbụ_malformed_req	perror.malreq	hex 16-byte	Ọgụgụ-naanị
doro anya	ụjọ (njehie niile)	dị iche iche uint64_t	Naanị dee

Mara:
Iji kpochapụ mperi Port, ị ga-ederịrị bitmask nke njehie dị ugbu a, maka example pusi njehie> doro anya.

Akụkọ ngbanwe

Ụdị akwụkwọ	Mgbanwe
2017.10.02	Mwepụta mbụ.

OPAE Intel FPGA Linux ntuziaka nhazi ihe owuwu onye ọkwọ ụgbọ ala

Akwụkwọ / akụrụngwa

intel OPAE FPGA Linux Driver Architecture [pdf] Ntuziaka onye ọrụ OPAE FPGA Linux Architecture ọkwọ ụgbọ ala, OPAE FPGA, Linux Device Architecture, Ọkwọ ụgbọ ala, Nhazi

Ntụaka

• Akwụkwọ ntuziaka onye ọrụ