Intel OPAE FPGA Linux Device Driver Architecture

OPAE Intel FPGA Linux Device Driver Architecture

Iyo OPAE Intel FPGA mutyairi inopa mainterface emushandisi-nzvimbo zvikumbiro kugadzirisa, kuverenga, kuvhura, uye kuwana FPGA accelerators pamapuratifomu akashongedzerwa neIntel FPGA mhinduro uye inogonesa system-level manejimendi mabasa akadai seFPGA reconfiguration, simba manejimendi, uye virtualization.

Hardware Architecture

Kubva pane iyo OS nzvimbo ye view, iyo FPGA hardware inoita seyakajairwa PCIe mudziyo. Iyo FPGA mudziyo ndangariro yakarongwa uchishandisa yakafanotsanangurwa data chimiro (Chishandiso Chinyorwa Rondedzero). Zvimiro zvinotsigirwa neFPGA mudziyo zvinoburitswa kuburikidza neizvi data zvimiro, sezvinoratidzwa pazasi mumufananidzo unotevera:

FPGA PCIe Chishandiso

Mutyairi anotsigira PCIe SR-IOV kugadzira Virtual Functions (VFs) iyo inogona kushandiswa kupa munhu accelerator kumashini chaiwo.

Intel Corporation. Kodzero dzese dzakachengetwa. Intel, iyo Intel logo, uye mamwe maIntel mamaki zviratidzo zveIntel Corporation kana vatsigiri vayo. Intel inobvumira kushanda kweFPGA yayo uye semiconductor zvigadzirwa kune zvazvino zvakatemwa zvinoenderana neIntel yakajairwa waranti asi inochengeta kodzero yekuita shanduko kune chero zvigadzirwa nemasevhisi chero nguva pasina chiziviso. Intel haitore mutoro kana mutoro unobva mukushandisa kana kushandiswa kwechero ruzivo, chigadzirwa, kana sevhisi inotsanangurwa pano kunze kwekunge yakabvumiranwa nekunyora neIntel. Vatengi veIntel vanorairwa kuti vawane yazvino vhezheni yezvakatemwa zvemudziyo vasati vavimba nechero ruzivo rwakaburitswa uye vasati vaisa maodha ezvigadzirwa kana masevhisi.

Mamwe mazita nemhando anogona kunzi zvinhu zvevamwe.

Virtualized FPGA PCIe Chishandiso

FPGA Management Injini (FME)
Iyo FPGA Management Injini inoita simba uye yekupisa manejimendi, kushuma kukanganisa, kugadzirisazve, kushuma kuita, uye mamwe mabasa ezvivakwa. Imwe neimwe FPGA ine FME imwe, inogara ichiwanikwa kuburikidza nePhysical Function (PF). Mushandisi-nzvimbo maapplication anogona kuwana yakasarudzika mukana kuFME uchishandisa yakavhurika (), uye kuisunungura uchishandisa close () semushandisi ane rombo rakanaka (mudzi).

Port
Chiteshi chinomiririra chinongedzo pakati peiyo static FPGA jira (iyo "FPGA Interface Manager (FIM)") uye dunhu rinogadziriswa zvishoma rine Accelerator Basa (AF). Iyo Port inodzora kutaurirana kubva kune software kuenda kune accelerator uye inofumura maficha akadai seti reset uye debug. Chishandiso chePCIe chinogona kunge chine MaPorts akati wandei, uye Port yega yega inogona kuburitswa kuburikidza neVF nekuigovera uchishandisa iyo FPGA_FME_PORT_ASSIGN ioctl paFME mudziyo.

Accelerator Basa (AF) Chikamu

• An Accelerator Function (AF) Yuniti yakasungirirwa paPort uye inofumura 256K MMIO dunhu kuti rishandiswe kune accelerator-chaiwo marejista ekudzora.
• Mushandisi-nzvimbo maapplication anogona kuwana yakasarudzika mukana kune AFU yakasungirirwa kuPort nekushandisa yakavhurika () paPort mudziyo, uye kuisunungura uchishandisa close ().
• Mushandisi-nzvimbo maapplication anogona zvakare mmap () accelerator MMIO matunhu.

Partial Reconfiguration
Sezvambotaurwa pamusoro, zvinomhanyisa zvinogona kugadziridzwa kuburikidza nechikamu chekugadzirisa kweAccelerator Basa (AF) file. Iyo Accelerator Basa (AF) inofanirwa kunge yakagadzirirwa iyo chaiyo FIM uye yakanangwa static dunhu (Port) yeFPGA; kana zvisina kudaro, iyo reconfiguration operation ichakundikana uye zvichida kukonzera kusagadzikana kwehurongwa. Kuenderana uku kunogona kutariswa nekuenzanisa iyo interface ID inocherechedzwa muAF musoro uchipokana neiyo interface ID yakafumurwa neFME kuburikidza nesysfs. Cheki iyi inowanzoitwa nenzvimbo yemushandisi isati yadaidza kugadziridzazve IOCTL.

Cherechedza:
Parizvino, chero chirongwa chesoftware chinowana iyo FPGA, kusanganisira iyo inomhanya muine virtualized host, inofanirwa kuvharwa isati yaedza kugadziridza zvishoma. Matanho angave:

1. Burutsa mutyairi kubva kumuenzi
2. Bvisa VF kubva kumuenzi
3. Dzima SR-IOV
4. Ita chikamu chekugadzirisa zvakare
5. Gonesa SR-IOV
6. Batanidza VF kumuenzi
7. Isa mutyairi muenzi

FPGA Virtualization
Kugonesa kuwana accelerator kubva kumaapplication ari kuita muVM, chiteshi cheAFU chakasiyana chinoda kupihwa kuVF uchishandisa matanho anotevera:

1. Iyo PF ine ese maAFU ports nekukasira. Chero chiteshi chinoda kupihwa kuVF chinofanira kutanga chaburitswa kubva muPF kuburikidza neFPGA_FME_PORT_RELEASE ioctl paFME mudziyo.
2. Kamwe maN ports aburitswa kubva kuPF, murairo uri pazasi unogona kushandiswa kugonesa SRIOV neVFs. VF yega yega ine chiteshi chimwe chete neAFU. echo N > PCI_DEVICE_PATH/sriov_nuMVfs
3. Pfuura maVF kuenda kuVMs.
4. Iyo AFU iri pasi peVF inowanikwa kubva kune zvikumbiro muVM (uchishandisa mutyairi mumwechete mukati meVF).

Cherechedza:
FME haigone kupihwa kuVF, nekudaro PR uye mamwe mabasa ekutungamira anongowanikwa kuburikidza nePF.

Mutyairi Sangano

PCIe Module Device Driver

Mutyairi Sangano

Iyo FPGA michina inoratidzika seyakajairwa PCIe zvishandiso; saka, FPGA PCIe mudziyo mutyairi (intel-FPGA-PCI.ko) inogara yakarodha kekutanga kana FPGA PCIe PF kana VF yaonekwa. Uyu mutyairi anotamba infrastructural basa mudhiraivha architecture. Izvo:

• Inogadzira mudziyo weFPGA mudziyo semubereki wemidziyo yemhando.
• Inofamba kuburikidza neChishandiso Chinyorwa Rondedzero, iyo inoshandiswa muPCIe mudziyo BAR ndangariro, kuwana maficha emidziyo uye madiki-maficha uye kugadzira mapuratifomu emidziyo yavo pasi pemudziyo mudziyo.
• Inotsigira SR-IOV.
• Inosuma chimiro chemudziyo wemidziyo, iyo inobvisa mashandiro ezvidiki-zvimiro uye inofumura mabasa akajairika kuratidza madhiraivha emidziyo.

PCIe Module Device Driver Mabasa

• Iine PCIe kuwanikwa, kuverengera kwechishandiso, uye kuwanikwa kwezvinhu.
• Inogadzira sysfs madhairekitori emudziyo wevabereki, FPGA Management Injini (FME), uye Port.
• Inogadzira zviitiko zvemutyairi wepuratifomu, zvichiita kuti Linux kernel itakure madhiraivha avo epuratifomu.

FME Platform Module Device Driver

• Simba nemafuta manejimendi, kuburitsa kukanganisa, kushuma kuita, uye mamwe mabasa ezvivakwa. Unogona kuwana aya mabasa kuburikidza nesysfs interfaces inoburitswa nemutyairi weFME.
• Partial Reconfiguration. Mutyairi weFME anonyoresa FPGA Maneja panguva yePR sub-feature yekutanga; kana yangogashira FPGA_FME_PORT_PR ioctl kubva kwauri, inodaidza iyo yakajairwa interface basa kubva kuFPGA Maneja kuti apedze chidimbu chekugadzirisazve bitstream kune yakapihwa Port.
• Port manejimendi ye virtualization. Mutyairi weFME anosuma maoctls maviri, FPGA_FME_PORT_RELEASE, anoburitsa Port yakapihwa kubva kuPF; uye FPGA_FME_PORT_ASSIGN, iyo inopa Port kudzokera kuPF. Kana Port yangoburitswa kubva kuPF, inogona kupihwa kuVF kuburikidza neSR-IOV nzvimbo dzinopihwa nemutyairi wePCIe. Kuti uwane rumwe ruzivo, tarisa ku "FPGA Virtualization".

FME Platform Module Dhivha Dhivha Mabasa

• Inogadzira iyo FME hunhu mudziyo node.
• Inogadzira iyo FME sysfs files uye inoshandisa iyo FME sysfs file accessors.
• Inoshandisa iyo FME yakavanzika chimiro sub-madhiraivha.
• FME yakavanzika madhiraivha madhiraivha:
  • FME Header
  • Thermal Management
  • Power Management
  • Global Error
  • Partial Reconfiguration
  • Global Performance

Port Platform Module Device Driver
Zvakafanana nemutyairi weFME, FPGA Port (uye AFU) mutyairi (intel-fpga-afu. ko) inoongororwa kana mudziyo wePort platform wagadzirwa. Basa guru reiyi module nderekupa interface yevashandisi-nzvimbo zvikumbiro kuti uwane iyo yega accelerators, kusanganisira yekutanga reset control paPort, AFU MMIO dunhu rekunze, DMA buffer mepu sevhisi, UMsg (1) ziviso, uye kure debug mabasa ( ona pamusoro).

UMsg inotsigirwa chete kuburikidza neAcceleration Stack yeIntel Xeon® processor ine Integrated FPGA.

Port Platform Module Device Driver Mabasa

• Inogadzira iyo Port character mudziyo node.
• Inogadzira iyo Port sysfs files uye inoshandisa iyo Port sysfs file accessors.
• Inoshandisa iyo Port yakavanzika madhiraivha madhiraivha.
• Port private feature sub-drivers:
  • Port Header
  • AFU
  • Port Error
  • Msg(2)
  • Signal Tap

Kushandisa FPGA Device Enumeration
Ichi chikamu chinosuma manyorero anoita maapplication eFPGA mudziyo kubva kune sysfs hierarchy pasi pe/sys/class/fpga. Mune exampuye pazasi, maviri Intel FPGA zvishandiso zvakaiswa mune inotambira. Imwe neimwe FPGA mudziyo ine imwe FME uye maviri Ports (AFUs). Kune yega yega FPGA mudziyo, dhairekitori remudziyo rinogadzirwa pasi pe/sys/class/fpga:

/sys/class/fpga/intel-fpga-dev.0
/sys/class/fpga/intel-fpga-dev.1

Imwe neimwe node ine imwe FME uye maviri Ports (AFUs) semidziyo yevana:
/sys/class/fpga/intel-fpga-dev.0/intel-fpga-fme.0
/sys/class/fpga/intel-fpga-dev.0/intel-fpga-port.0
/sys/class/fpga/intel-fpga-dev.0/intel-fpga-port.1
/sys/class/fpga/intel-fpga-dev.1/intel-fpga-fme.1
/sys/class/fpga/intel-fpga-dev.1/intel-fpga-port.2
/sys/class/fpga/intel-fpga-dev.1/intel-fpga-port.3

Kazhinji, iyo FME/Port sysfs interfaces inodaidzwa seizvi:
/sys/class/fpga/intel-fpga-dev.i/intel-fpga-fme.j/
/sys/class/fpga/intel-fpga-dev.i/intel-fpga-port.k/

pamwe ndinonyora manhamba ese emidziyo yemidziyo, j achiteedzana manhamba eFME uye k achiteedzana manhamba ese maPorts.

Manodhi emudziyo anoshandiswa ioctl () uye mmap () anogona kutaurwa kuburikidza:
/dev/intel-fpga-fme.j
/dev/intel-fpga-port.k

PCIe Driver Enumeration
Ichi chikamu chinopa pamusoroview yekodhi inoyerera yekuverengera kwemudziyo kunoitwa neintel-fpga-pci.ko. Iwo makuru data zvimiro uye mabasa anosimbiswa. Ichi chikamu chinonyatso kuteverwa kana viewkuisa iyo inoperekedza kodhi kodhi (pcie.c).

Enumeration Data Structures

enum fpga_id_type {
PARENT_ID,
FME_ID,
PORT_ID,
FPGA_ID_MAX
};
static struct idr fpga_ids[FPGA_ID_MAX];
gadzira fpga_chardev_info {
const char *zita;
dev_t devt;
};
struct fpga_chardev_info fpga_chrdevs[] = {
{ .name = FPGA_FEATURE_DEV_FME },
{ .name = FPGA_FEATURE_DEV_PORT },
};
static struct kirasi *fpga_class;
static struct pci_device_id cci_pcie_id_tbl[] = {
{PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIe_DEVICE_ID_RCiEP0_MCP),},
{PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIe_DEVICE_ID_VF_MCP),},
{PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIe_DEVICE_ID_RCiEP0_SKX_P),},
{PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIe_DEVICE_ID_VF_SKX_P),},
{PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIe_DEVICE_ID_RCiEP0_DCP),},
{PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIe_DEVICE_ID_VF_DCP),},
{0,}
};
static struct pci_driver cci_pci_driver = {
.zita = DRV_NAME,
.id_table = cci_pcie_id_tbl,
.probe = cci_pci_probe,
.remove = cci_pci_remove,
.sriov_configure = cci_pci_sriov_configure
};
struct cci_drvdata {
int device_id;
struct device *fme_dev;
struct mutex lock;
struct list_head port_dev_list;
int released_port_num;
struct list_head regions;
};
gadzira kuvaka_feature_devs_info {
struct pci_dev *pdev;
void __iomem *ioaddr;
void __iomem *ioend;
int current_bar;
pasina __iomem *pfme_hdr;
struct device *parent_dev;
struct platform_device *feature_dev;
};

Kuyerera Kwenhamba

• ccidrv_init()
  • Tanga fpga_ids uchishandisa idr_init().
  • Tanga fpga_chrdevs[i].devt uchishandisa alloc_chrdev_region().
  • Tanga fpga_class uchishandisa class_create ().
  • pci_register_driver(&cci_pci_driver);
• cci_pci_probe()
  • Gonesa iyo PCI mudziyo, kumbira kupinda kumatunhu ayo, isa PCI master mode, uye gadzirisa DMA.
• cci_pci_create_feature_devs() build_info_alloc_and_init()
  • Govera chimiro kuvaka_feature_devs_info, itangisa.
    .parent_dev yakaiswa kumubereki sysfs dhairekitori (intel-fpga-dev.id) rine madhairekitori eFME nePort sysfs.
• parse_feature_list()
  • Famba iyo BAR0 Device Feature Rondedzero kuti uwane iyo FME, iyo Port, uye yavo yakavanzika maficha.
• parse_feature() parse_feature_afus() parse_feature_fme()
  • Kana FME yasangana:
• build_info_create_dev()
  • Govera mudziyo wepuratifomu weFME, uchichengeta mukuvaka_feature_devs_info.feature_dev.
  • feature_dev.id inotangwa kune mhedzisiro yeidr_alloc(fpga_ids[FME_ID],
  • feature_dev.parent is set to build_feature_devs_info.parent_dev.
  • Govera ruzhinji rwezviwanikwa mu feature_dev.resource.
• Govera chimiro_platform_data, itangisa, uye chengeta chinongedzo muchikamu_dev.dev.platform_data
  • create_feature_instance() build_info_add_sub_feature()
  • Tanga feature_dev.resource[FME_FEATURE_ID_HEADER].
  • feature_platform_data_add()
  • Tanga feature_platform_data.features[FME_FEATURE_ID_HEADER], zvese kunze kwe .fops.
• parse_feature() parse_feature_afus() parse_feature_port()
  • Kana Port yasangana:
• build_info_create_dev()
  • Govera mudziyo wepuratifomu wePort, uchichengeta mukuvaka_feature_devs_info.feature_dev.
  • feature_dev.id inotangwa kune mhedzisiro yeidr_alloc(fpga_ids[PORT_ID],
  • feature_dev.parent is set to build_feature_devs_info.parent_dev.
  • Govera ruzhinji rwezvishandiso mu feature_dev.resource.
  • Govera chimiro_platform_data, itangisa, uye chengeta chinongedzo muchikamu_dev.dev.platform_data
• build_info_commit_dev()
  • Wedzera iyo struct feature_platform_data.node yePort kune runyorwa rwePorts mune struct cci_drvdata.port_dev_list
• create_feature_instance() build_info_add_sub_feature()
  • Tanga feature_dev.resource[PORT_FEATURE_ID_HEADER].
• feature_platform_data_add()
  • Tanga feature_platform_data.features[PORT_FEATURE_ID_HEADER], zvese kunze kwe .fops.
• parse_feature() parse_feature_afus() parse_feature_port_uafu()
  • Kana AFU yasangana:
• create_feature_instance() build_info_add_sub_feature()
  • Tanga feature_dev.resource[PORT_FEATURE_ID_UAFU].
• feature_platform_data_add()
  • Tanga feature_platform_data.features[PORT_FEATURE_ID_UAFU], zvese kunze kwe .fops.
• parse_feature() parse_feature_private() parse_feature_fme_private()
  • Kana chinhu chakavanzika cheFME chikasangana:
• create_feature_instance() build_info_add_sub_feature()
  • Tanga feature_dev.resource[id].
• feature_platform_data_add()
  • Tanga feature_platform_data.features[id], zvese asi .fops.
• parse_feature() parse_feature_private() parse_feature_port_private()
• Kana iyo Port yakavanzika chimiro chasangana: * create_feature_instance() build_info_add_sub_feature() * Tanga feature_dev.resource[id]. * feature_platform_data_add() Tanga feature_platform_data.features[id], zvose kunze kwe .fops.
• parse_ports_from_fme()
  • Kana mutyairi akaremerwa paPhysical Function (PF), zvino:
• Mhanyai parse_feature_list () inoyerera pachiteshi chega chega chinotsanangurwa mumusoro weFME.
• Shandisa BAR inotaurwa mune imwe neimwe Port yekupinda mumusoro.

FME Platform Chishandiso Kutanga
Ichi chikamu chinopa pamusoroview yekodhi inoyerera yeFME mudziyo kutanga kunoitwa ne intel-fpga-fme.ko. Iwo makuru data zvimiro uye mabasa akakwidziridzwa. Ichi chikamu chinonyatso kuteverwa kana viewing iyo inoperekedza sosi kodhi (fme-main.c).

FME Platform Device Data Structures

gadzira chimiro_ops {
int (* init) (struct platform_device * pdev, struct feature * feature);
int (* unit) (struct platform_device * pdev, struct feature * feature);
kureba (* ioctl)(struct platform_device *pdev, struct feature * feature,
isina kusaina int cmd, isina kusaina refu arg);
int (* bvunzo) (struct platform_device * pdev, struct feature * feature);
};
chimiro {
const char *zita;
int resource_index;
void __iomem *ioaddr;
struct feature_ops *ops;
};
struct feature_platform_data {
struct list_head node;
struct mutex lock;
isina kusaina kureba dev_status;
struct cdev cdev;
struct platform_device *dev;
isina kusaina int disable_count;
void *private;
int num;
int (* config_port) (struct platform_device *, u32, bool);
struct platform_device *(*fpga_for_each_port)(struct platform_device*,
void *, int (* match)(struct platform_device *, void *)); struct
maficha[0];
};
struct perf_object {
iwe ruoko;
const struct attribute_group **atr_groups;
struct device *fme_dev;
struct list_head node;
struct list_head children;
struct kobject kobj;
};
gadzira fpga_fme {
u8 port_id;
u64 pr_err;
struct device *dev_err;
struct perf_object *perf_dev;
struct feature_platform_data *pdata;
};

FME Platform Device Initialization Flow

FME Kutanga Kuyerera

• fme_probe() fme_dev_init()
  • Tanga struct fpga_fme uye uichengete mundima_platform_data.private field.
• fme_probe() fpga_dev_feature_init() feature_instance_init()
  • Sevha struct feature_ops muchikamu_platform_data.features kune yega yega ine vanhu.
  • Dana iyo bvunzo basa, kana iripo, kubva kune iyo struct.
  • Dana iyo init basa kubva kune chimiro.
• fme_probe() fpga_register_dev_ops()
  • Gadzira iyo FME hunhu mudziyo node, kunyoresa chimiro file_operations.

Port Platform Chishandiso Kutanga
Ichi chikamu chinopa pamusoroview yekodhi inoyerera yechiteshi chekushandisa kutanga kunoitwa ne intel-fpga-afu.ko. Iwo makuru data zvimiro uye mabasa anosimbiswa. Ichi chikamu chinonyatso kuteverwa kana viewing iyo inoperekedza sosi kodhi (afu.c).

Port Platform Device Data Structures

gadzira chimiro_ops {
int (* init) (struct platform_device * pdev, struct feature * feature);
int (* unit) (struct platform_device * pdev, struct feature * feature);
kureba (* ioctl)(struct platform_device *pdev, struct feature * feature,
isina kusaina int cmd, isina kusaina refu arg);
int (* bvunzo) (struct platform_device * pdev, struct feature * feature);
};
chimiro {
const char *zita;
int resource_index;
void __iomem *ioaddr;
struct feature_ops *ops;
};
struct feature_platform_data {
struct list_head node;
struct mutex lock;
isina kusaina kureba dev_status;
struct cdev cdev;
struct platform_device *dev;
isina kusaina int disable_count;
void *private;
int num;
int (* config_port) (struct platform_device *, u32, bool);
struct platform_device *(*fpga_for_each_port)(struct platform_device*,
void *, int (* match)(struct platform_device *, void *));
chimiro chechimiro[0];
};
gadzira fpga_afu_region {
u32 index;
u32 mireza;
u64 size;
u64 offset;
u64 phys;
struct list_head node;
};
gadzira fpga_afu_dma_region {
u64 user_addr;
u64 kureba;
u64 iova;
struct peji **mapeji;
struct rb_node node;
bool in_use;
};
gadzira fpga_afu {
u64 region_cur_offset;
int num_regions;
u8 num_umsgs;
struct list_head regions;
struct rb_root dma_regions;
struct feature_platform_data *pdata;
};

Port Platform Device Initialization Flow

Port Initialization Flow

• afu_probe() afu_dev_init()
  • Tanga struct fpga_afu woichengeta muchikamu_platform_data.private field.
• afu_probe() fpga_dev_feature_init() feature_instance_init()
  • Sevha struct feature_ops muchikamu_platform_data.features kune yega yega ine vanhu.
  • Dana iyo bvunzo basa, kana iripo, kubva kune iyo struct.
  • Dana iyo init basa kubva kune chimiro.
• afu_probe() fpga_register_dev_ops()
  • Gadzira iyo Port hunhu mudziyo node, kunyoresa chimiro file_operations.

FME IOCTLs
IOCTL inodaidzwa payakavhurika file descriptor for /dev/intel-fpga-fme.j FPGA_GET_API_VERSION—dzosa shanduro yazvino sehuwandu, kutanga kubva pa0.

FPGA_CHECK_EXTENSION-haikosi kutsigirwa parizvino.

FPGA_FME_PORT_RELEASE-arg inongedzo kune:

gadzira fpga_fme_port_release {
__u32 argsz; // mu: saiziof(struct fpga_fme_port_release)
__u32 mireza; // mukati: inofanira kuva 0
__u32 port_id; // mu: port ID (kubva pa0) kuburitsa.
};

FPGA_FME_PORT_ASSIGN-arg inongedzo kune:

gadzira fpga_fme_port_assign {
__u32 argsz; // mu: sizeof(struct fpga_fme_port_assign)
__u32 mireza; // mukati: inofanira kuva 0
__u32 port_id; // mu: port ID (kubva ku0) kugovera. (inofanira kunge iri
yakamboburitswa neFPGA_FME_PORT_RELEASE)
};

FPGA_FME_PORT_PR-arg inongedzo kune:

gadzira fpga_fme_port_pr {
__u32 argsz; // mu: sizeof(struct fpga_fme_port_pr)
__u32 mireza; // mukati: inofanira kuva 0
__u32 port_id; // mu: port ID (kubva ku0)
__u32 buffer_size; // mukati: saizi yebitstream buffer mumabhaiti. Inofanira kuva 4-byte
zvakaenzanirana.
__u64 buffer_address; // mukati: process kero ye bitstream buffer
__u64 chinzvimbo; // kunze: mamiriro ekukanganisa (bitmask)
};

Port IOCTLs
IOCTL inodaidzwa payakavhurika file descriptor for /dev/intel-fpga-port.k FPGA_GET_API_VERSION—dzosa shanduro yazvino sechidimbu, kutanga kubva pa0. FPGA_CHECK_EXTENSION—haisi kutsigirwa parizvino.

FPGA_PORT_GET_INFO-arg inongedzo kune:

gadzira fpga_port_info {
__u32 argsz; // mu: sizeof(struct fpga_port_info)
__u32 mireza; // kunze: inodzoka 0
__u32 num_region; // kunze: nhamba yeMMIO matunhu, 2 (1 yeAFU uye 1 ye
STP)
__u32 num_umsgs; // kunze: nhamba yeUMsg inotsigirwa nehardware
};

FPGA_PORT_GET_REGION_INFO-arg inongedzo kune:

gadzira fpga_port_region_info {
__u32 argsz; // mu: sizeof(struct fpga_port_region_info)
__u32 mireza; // kunze: (bitmask) {FPGA_REGION_READ, FPGA_REGION_WRITE,
FPGA_REGION_MMAP }
__u32 index; // mu: FPGA_PORT_INDEX_UAFU kana FPGA_PORT_INDEX_STP
__u32 padding; // mukati: inofanira kuva 0
__u64 size; // kunze: saizi yeMMIO dunhu mumabheti
__u64 offset; // kunze: kubviswa kweMMIO dunhu kubva pakutanga kwemudziyo fd
};

FPGA_PORT_DMA_MAP-arg inongedzo kune:
gadzira fpga_port_dma_map {
__u32 argsz; // mu: sizeof(struct fpga_port_dma_map)
__u32 mireza; // mu: inofanira kuva 0 __u64 user_addr; // mu: process virtual
kero. Inofanirwa kuenderana nepeji.
__u64 kureba; // mukati: kureba kwemepu mumabhaiti. Inofanira kuva yakawanda yemapeji
saizi.
__u64 iova; // kunze: IO chaiyo kero };

FPGA_PORT_DMA_UNMAP-arg inongedzo kune:
gadzira fpga_port_dma_unmap {
__u32 argsz; // mu: sizeof(struct fpga_port_dma_unmap)
__u32 mireza; // mukati: inofanira kuva 0
__u64 iova; // mukati: IO kero chaiyo yakadzoserwa neyekare
FPGA_PORT_DMA_MAP };

• FPGA_PORT_RESET—arg inofanira kuva NULL.
• FPGA_PORT_UMSG_ENABLE—arg inofanira kuva NULL.
• FPGA_PORT_UMSG_DISABLE—args inofanira kuva NULL.

FPGA_PORT_UMSG_SET_MODE-arg inongedzo kune:

gadzira fpga_port_umsg_cfg {
__u32 argsz; // mu: sizeof(struct fpga_port_umsg_cfg)
__u32 mireza; // mukati: inofanira kuva 0
__u32 hint_bitmap; // mu: UMsg hint mode bitmap. Zvinoratidza kuti maUMsg ndeapi
enabled.
};

FPGA_PORT_UMSG_SET_BASE_ADDR—

• UMsg inofanira kuvharwa isati yaburitsa iyi ioctl.
• Iyo iova ndima inofanira kuva yebuffer yakakura inokwana maUMsg ese (num_umsgs * PAGE_SIZE).
  • Iyo buffer yakanyorwa se "iri kushandiswa" nemutyairi buffer manejimendi.
  • Kana iova iri NULL, chero nzvimbo yapfuura haina kunyorwa se "iri kushandiswa".
• arg chiratidzo kune:
  gadzira fpga_port_umsg_base_addr {
  • u32 argsz; // mu: sizeof(struct fpga_port_umsg_base_addr)
  • u32 mireza; // mukati: inofanira kuva 0
  • u64 iova; // mukati: IO kero chaiyo kubva kuFPGA_PORT_DMA_MAP. };

Cherechedza:

• Kuti ubvise zvikanganiso zvechiteshi, unofanirwa kunyora iyo chaiyo bitmask yezvikanganiso zvazvino, zve example, katsi zvikanganiso > zvakajeka
• UMsg inotsigirwa chete kuburikidza neAcceleration Stack yeIntel Xeon processor ine Integrated FPGA.

sysfs Files

FME Header sysfs files
intel-fpga-dev.i/intel-fpga-fme.j/

sysfs file	mmio field	type	access
ports_num	fme_header.capability.num_ports	decimal int	Kuverenga-chete
cache_size	fme_header.capability.cache_size	decimal int	Kuverenga-chete
shanduro	fme_header.capability.fabric_verid	decimal int	Kuverenga-chete
socket_id	fme_header.capability.socket_id	decimal int	Kuverenga-chete
bitstream_id	fme_header.bitstream_id	hex uint64_t	Kuverenga-chete
bitstream_metadata	fme_header.bitstream_md	hex uint64_t	Kuverenga-chete

FME Thermal Management sysfs files
intel-fpga-dev.i/intel-fpga-fme.j/thermal_mgmt/

sysfs file	mmio field	type	access
chikumbaridzo1	thermal.threshold.tmp_thshold1	decimal int	Mushandisi: Kuverenga-chete Mudzi: Verenga-nyora
chikumbaridzo2	thermal.threshold.tmp_thshold2	decimal int	Mushandisi: Kuverenga-chete Mudzi: Verenga-nyora
threshold_trip	thermal.threshold.therm_trip_thshold	decimal int	Kuverenga-chete
chikumbaridzo1_chasvika	thermal.threshold.thshold1_status	decimal int	Kuverenga-chete
chikumbaridzo2_chasvika	thermal.threshold.thshold2_status	decimal int	Kuverenga-chete
threshold1_policy	thermal. threshold.thshold_policy	decimal int	Mushandisi: Kuverenga-chete Mudzi: Verenga-nyora
tembiricha	thermal.rdsensor_fm1.fpga_temp	decimal int	Kuverenga-chete

FME Power Management sysfs files
intel-fpga-dev.i/intel-fpga-fme.j/power_mgmt/

sysfs file	mmio field	type	access
kudyiwa	power.status.pwr_consumed	hex uint64_t	Kuverenga-chete
chikumbaridzo1	simba.chikumbaridzo.chikumbaridzo1	hex uint64_t	Mushandisi: Kuverenga-chete Mudzi: Verenga-nyora
chikumbaridzo2	simba.chikumbaridzo.chikumbaridzo2	hex uint64_t	Mushandisi: Kuverenga-chete Mudzi: Verenga-nyora
threshold1_status	power.threshold.threshold1_status	decimal isina kusaina	Kuverenga-chete
threshold2_status	power.threshold.threshold2_status	decimal isina kusaina	Kuverenga-chete
rtl	power.status.fpga_latency_report	decimal isina kusaina	Kuverenga-chete

FME Global Error sysfs files
intel-fpga-dev.i/intel-fpga-fme.j/errors/

sysfs file	mmio field	type	access
pcie0_zvikanganiso	gerror.pcie0_err	hex uint64_t	Verenga-nyora
pcie1_zvikanganiso	gerror.pcie1_err	hex uint64_t	Verenga-nyora
jekiseni_ kukanganisa	gerror.ras_error_inj	hex uint64_t	Verenga-nyora

intel-fpga-dev.i/intel-fpga-fme.j/errors/fme-errors/

sysfs file	mmio field	type	access
kukanganisa	gerror.fme_err	hex uint64_t	Kuverenga-chete
first_ error	gerror.fme_first_err.err_reg_status	hex uint64_t	Kuverenga-chete
next_ error	gerror.fme_next_err.err_reg_status	hex uint64_t	Kuverenga-chete
clear	Inodzima zvikanganiso, kutanga_kukanganisa, kunotevera_kukanganisa	zvakasiyana uint64_t	Nyora-chete

Cherechedza:
Kuti ubvise zvikanganiso zveFME, unofanirwa kunyora iyo chaiyo bitmask yezvikanganiso zvazvino, zveexample katsi zvikanganiso> zvakajeka.

FME Partial Reconfiguration sysfs files
intel-fpga-dev.i/intel-fpga-fme.j/pr/

sysfs file	mmio field	type	access
interface_id	pr.fme_pr_intfc_id0_h, pr.fme_pre_intfc_id0_l	hex 16-byte	Kuverenga-chete

FME Global Performance sysfs files
intel-fpga-dev.i/intel-fpga-fme.j/dperf/clock

sysfs file	mmio field	type	access
wachi	gperf.clk.afu_interf_clock	hex uint64_t	Kuverenga-chete

intel-fpga-dev.i/intel-fpga-fme.j/dperf/cache/ (Haisi kushanda kuAcceleration Stack yeIntel Xeon CPU ine FPGAs)

sysfs file	mmio field	type	access
freeze	gperf.ch_ctl.freeze	decimal int	Verenga-nyora
read_hit	gperf.CACHE_RD_HIT	hex uint64_t	Kuverenga-chete
read_miss	gperf.CACHE_RD_MISS	hex uint64_t	Kuverenga-chete
write_hit	gperf.CACHE_WR_HIT	hex uint64_t	Kuverenga-chete
write_miss	gperf.CACHE_WR_MISS	hex uint64_t	Kuverenga-chete
hold_request	gperf.CACHE_HOLD_REQ	hex uint64_t	Kuverenga-chete
tx_req_stall	gperf.CACHE_TX_REQ_STALL	hex uint64_t	Kuverenga-chete

sysfs file	mmio field	type	access
rx_req_stall	gperf.CACHE_RX_REQ_STALL	hex uint64_t	Kuverenga-chete
data_write_port_contention	gperf.CACHE_DATA_WR_PORT_CONTEN	hex uint64_t	Kuverenga-chete
tag_nyora_port_contention	gperf.CACHE_TAG_WR_PORT_CONTEN	hex uint64_t	Kuverenga-chete

intel-fpga-dev.i/intel-fpga-fme.j/dperf/iommu/ (Haisi kushanda kuAcceleration Stack yeIntel Xeon CPU ine FPGAs)

sysfs file	mmio field	type	access
freeze	gperf.vtd_ctl.freeze	decimal int	Mushandisi: Kuverenga-chete Mudzi: Verenga-nyora

intel-fpga-dev.i/intel-fpga-fme.j/dperf/iommu/afuk/ (Haisi kushanda kuAcceleration Stack yeIntel Xeon CPU ine FPGAs)

sysfs file	mmio field	type	access
read_transaction	gperf.VTD_AFU0_MEM_RD_TRANS	hex uint64_t	Kuverenga-chete
write_transaction	gperf.VTD_AFU0_MEM_WR_TRANS	hex uint64_t	Kuverenga-chete
tlb_read_hit	gperf.VTD_AFU0_TLB_RD_HIT	hex uint64_t	Kuverenga-chete
tlb_write_hit	gperf.VTD_AFU0_TLB_WR_HIT	hex uint64_t	Kuverenga-chete

intel-fpga-dev.i/intel-fpga-fme.j/dperf/fabric/

sysfs file	mmio field	type	access
enable	gperf.fab_ctl.(enabled)	decimal int	Mushandisi: Kuverenga-chete Mudzi: Verenga-nyora
freeze	gperf.fab_ctl.freeze	decimal int	Mushandisi: Kuverenga-chete Mudzi: Verenga-nyora
pcie0_verenga	gperf.FAB_PCIE0_RD	hex uint64_t	Kuverenga-chete
pcie0_nyora	gperf.FAB_PCIE0_WR	hex uint64_t	Kuverenga-chete
pcie1_verenga	gperf.FAB_PCIE1_RD	hex uint64_t	Kuverenga-chete
pcie1_nyora	gperf.FAB_PCIE1_WR	hex uint64_t	Kuverenga-chete
upi_read	gperf.FAB_UPI_RD	hex uint64_t	Kuverenga-chete
upi_write	gperf.FAB_UPI_WR	hex uint64_t	Kuverenga-chete

intel-fpga-ev.i/intel-fpga/fme.j/dperf/fabric/portk/

sysfs file	mmio field	type	access
pcie0_verenga	gperf.FAB_PCIE0_RD	hex uint64_t	Kuverenga-chete
pcie0_nyora	gperf.FAB_PCIE0_WR	hex uint64_t	Kuverenga-chete
pcie1_verenga	gperf.FAB_PCIE1_RD	hex uint64_t	Kuverenga-chete
pcie1_nyora	gperf.FAB_PCIE1_WR	hex uint64_t	Kuverenga-chete
upi_read	gperf.FAB_UPI_RD	hex uint64_t	Kuverenga-chete
upi_write	gperf.FAB_UPI_WR	hex uint64_t	Kuverenga-chete

Port Header sysfs files
intel-fpga-dev.i/intel-fpga-port.k/

sysfs file	mmio field	type	access
id	port_header.capability.port_number	decimal int	Kuverenga-chete
ltr	port_header.control.latency_tolerance	decimal int	Kuverenga-chete

Port AFU Header sysfs files
intel-fpga-dev.i/intel-fpga-port.k/

sysfs file	mmio field	type	access
afu_id	afu_header.guid	hex 16-byte	Kuverenga-chete

Port Error sysfs files
intel-fpga-dev.i/intel-fpga-port.k/errors/

sysfs file	mmio field	type	access
kukanganisa	kukanganisa.port_error	hex uint64_t	Kuverenga-chete
first_ error	perrror.port_first_error	hex uint64_t	Kuverenga-chete
first_malformed_req	perror.malreq	hex 16-byte	Kuverenga-chete
clear	kukanganisa.(zvose kukanganisa)	zvakasiyana uint64_t	Nyora-chete

Cherechedza:
Kuti ubvise zvikanganiso zvePort, unofanirwa kunyora iyo chaiyo bitmask yezvikanganiso zvazvino, zvemuenzanisoample katsi zvikanganiso> zvakajeka.

Revision History

Document Version	Kuchinja
2017.10.02	Kutanga Kusunungurwa.

OPAE Intel FPGA Linux Device Driver Architecture Guide

Zvinyorwa / Zvishandiso

Intel OPAE FPGA Linux Device Driver Architecture [pdf] Bhuku reMushandisi OPAE FPGA Linux Device Driver Architecture, OPAE FPGA, Linux Device Driver Architecture, Driver Architecture, Architecture

References

• User Manual