onsemi FDMS2D5N08C MOSFET Datasheet
Product: MOSFET - Dual, N-Channel, Shielded Gate, POWERTRENCH®
Model: FDMS2D5N08C
Key Specifications: 80 V, 166 A, 2.7 mΩ
Manufacturer: onsemi
Website: www.onsemi.com
Overview
This document details the FDMS2D5N08C, an N-Channel MV MOSFET manufactured using onsemi's Advanced POWERTRENCH Process. This process incorporates Shielded Gate technology, optimized to minimize on-state resistance while maintaining superior switching performance and an excellent soft body diode.
Features
- Shielded Gate MOSFET Technology
- Max RDS(on) = 2.7 mΩ at VGS = 10 V, ID = 68 A
- Max RDS(on) = 6.7 mΩ at VGS = 6 V, ID = 34 A
- 50% Lower Qrr compared to other MOSFET suppliers
- Lowers Switching Noise/EMI
- MSL1 Robust Package Design
- 100% UIL Tested
- Pb-Free and RoHS Compliant
Typical Applications
- Primary DC-DC MOSFET
- Synchronous Rectifier in DC-DC and AC-DC converters
- Motor Drive
- Solar applications
Device Schematic and Package
N-CHANNEL MOSFET Schematic: A diagram illustrating the N-channel MOSFET structure with Gate (G), Drain (D), and Source (S) terminals.
PQFN8 5X6 Package Outline: A top view of the PQFN8 5X6 package, a square surface-mount component with 8 pins.
Marking Diagram: Illustrates the standard marking on the device package, including the model number (FDMS2D5N08C), assembly plant code, date code, and lot code.
Absolute Maximum Ratings
(TA = 25 °C unless otherwise noted)
| Symbol | Parameter | Value | Unit |
|---|---|---|---|
| VDS | Drain to Source Voltage | 80 | V |
| VGS | Gate to Source Voltage | ±20 | V |
| ID | Drain Current - Continuous (TC = 25 °C) (Note 5) | 166 | A |
| Drain Current - Continuous (TC = 100 °C) (Note 5) | 105 | A | |
| Drain Current - Continuous (TA = 25 °C) (Note 1a) | 24 | A | |
| Drain Current - Pulsed (Note 4) | 823 | A | |
| EAS | Single Pulse Avalanche Energy (Note 3) | 600 | mJ |
| PD | Power Dissipation (TA = 25 °C) | 138 | W |
| Power Dissipation (TA = 25 °C) (Note 1a) | 2.7 | W | |
| TJ, Tstg | Operating and Storage Junction Temperature Range | -55 to +150 | °C |
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected.
Ordering Information
| Device | Package | Shipping |
|---|---|---|
| FDMS2D5N08C | PQFN-8 (Pb-Free) | 3000 / Tape & Reel |
For information on tape and reel specifications, including part orientation and tape sizes, please refer to the Tape and Reel Packaging Specifications Brochure, BRD8011/D.
Thermal Characteristics
| Symbol | Parameter | Value | Unit |
|---|---|---|---|
| R〉JC | Thermal Resistance, Junction to Case | 0.9 | °C/W |
| R〉JA | Thermal Resistance, Junction to Ambient (Note 1a) | 45 | °C/W |
Thermal Resistance Diagrams (Page 3): Two diagrams illustrate the Junction-to-Ambient thermal resistance (R〉JA). Diagram (a) shows 45 °C/W when mounted on a 1 in² pad of 2 oz copper. Diagram (b) shows 115 °C/W when mounted on a minimum pad of 2 oz copper.
Electrical Characteristics
(TJ = 25 °C unless otherwise noted)
Off Characteristics
| Symbol | Parameter | Test Conditions | Min | Typ | Max | Unit |
|---|---|---|---|---|---|---|
| BVDSS | Drain to Source Breakdown Voltage | ID = 250 µA, VGS = 0 V | 80 | - | - | V |
| ╯BVDSS / ╯TJ | Breakdown Voltage Temperature Coefficient | ID = 250 µA, Referenced to 25 °C | - | 62 | - | mV/°C |
| IDSS | Zero Gate Voltage Drain Current | VDS = 64 V, VGS = 0 V | - | - | 1 | µA |
| IGSS | Gate to Source Leakage Current | VGS = ±20 V, VDS = 0 V | - | - | 100 | nA |
On Characteristics
| Symbol | Parameter | Test Conditions | Min | Typ | Max | Unit |
|---|---|---|---|---|---|---|
| VGS(th) | Gate to Source Threshold Voltage | VGS = VDS, ID = 380 µA | 2.0 | 2.9 | 4.0 | V |
| ╯VGS(th) / ╯TJ | Gate to Source Threshold Voltage Temperature Coefficient | ID = 380 µA, Referenced to 25 °C | - | -8.3 | - | mV/°C |
| RDS(on) | Static Drain-Source On-Resistance | VGS = 10 V, ID = 68 A | - | 2.2 | 2.7 | mΩ |
| VGS = 6 V, ID = 34 A, | - | 3.3 | 6.7 | mΩ | ||
| VGS = 10 V, ID = 68 A, TJ = 125°C | - | 3.7 | 4.7 | mΩ | ||
| gFS | Forward Transconductance | VDS = 5 V, ID = 68 A | - | 148 | - | S |
Dynamic Characteristics
| Symbol | Parameter | Test Conditions | Min | Typ | Max | Unit |
|---|---|---|---|---|---|---|
| Ciss | Input Capacitance | VDS = 40 V, VGS = 0 V, f = 1 MHz | - | 4455 | 6240 | pF |
| Coss | Output Capacitance | VDS = 40 V, VGS = 0 V, f = 1 MHz | - | 1480 | 2070 | pF |
| Crss | Reverse Transfer Capacitance | VDS = 40 V, VGS = 0 V, f = 1 MHz | - | 59 | 85 | pF |
| Rg | Gate Resistance | VDS = 40 V, VGS = 0 V, f = 1 MHz | - | 0.8 | 1.6 | Ω |
Switching Characteristics
| Symbol | Parameter | Test Conditions | Min | Typ | Max | Unit |
|---|---|---|---|---|---|---|
| td(on) | Turn-On Delay Time | VDD = 40 V, ID = 68 A, VGS = 10 V, RGEN = 6 Ω | - | 21 | 34 | ns |
| tr | Rise Time | VDD = 40 V, ID = 68 A, VGS = 10 V, RGEN = 6 Ω | - | 11 | 20 | ns |
| td(off) | Turn-Off Delay Time | VDD = 40 V, ID = 68 A, VGS = 10 V, RGEN = 6 Ω | - | 29 | 47 | ns |
| tf | Fall Time | VDD = 40 V, ID = 68 A, VGS = 10 V, RGEN = 6 Ω | - | 7 | 13 | ns |
| Qg | Total Gate Charge | VGS = 0 V to 10 V, VDD = 40 V, ID = 68 A | - | 60 | 84 | nC |
| Qgs | Gate to Source Gate Charge | VDD = 40 V, ID = 68 A | - | 38 | 54 | nC |
| Qgd | Gate to Drain "Miller" Charge | VDD = 40 V, ID = 68 A | - | 19 | - | nC |
| Qoss | Output Charge | VDD = 40 V, VGS = 0 V | - | 84 | - | nC |
| QSYNC | Total Gate Charge Sync | VDD = 0 V, ID = 68 A | - | 51 | - | nC |
Drain-Source Diode Characteristics and Maximum Ratings
| Symbol | Parameter | Test Conditions | Min | Typ | Max | Unit |
|---|---|---|---|---|---|---|
| VSD | Source to Drain Diode Forward Voltage | VGS = 0 V, IS = 2.2 A (Note 2) | - | 0.7 | 1.2 | V |
| VGS = 0 V, IS = 68 A (Note 2) | - | 0.8 | 1.3 | V | ||
| trr | Reverse Recovery Time | IF = 34 A, di/dt = 300 A/µs | - | 30 | 48 | ns |
| Qrr | Reverse Recovery Charge | IF = 34 A, di/dt = 300 A/µs | - | 55 | 88 | nC |
| trr | Reverse Recovery Time | IF = 34 A, di/dt = 1000 A/µs | - | 24 | 39 | ns |
| Qrr | Reverse Recovery Charge | IF = 34 A, di/dt = 1000 A/µs | - | 139 | 222 | nC |
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions.
Notes and Explanations
Note 1: R〉JA is determined with the device mounted on a 1 in² oz. copper pad on a 1.5 x 1.5 in. board of FR-4 material. R〉CA is determined by the user's board design.
Note 2: Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2.0%.
Note 3: EAS of 600 mJ is based on starting TJ = 125 °C; N-ch: L = 3 mH, IAS = 20 A, VDD = 80 V, VGS =10 V. 100% test at L = 0.1 mH, IAS = 63 A.
Note 4: Pulsed ID: Please refer to Figure 11 SOA graph for more details.
Note 5: Computed continuous current limited to Max Junction Temperature only; actual continuous current will be limited by thermal & electro-mechanical application board design.
Typical Characteristics
All graphs are presented for TC = 25 °C unless otherwise noted.
Figure 1: On-Region Characteristics
This graph shows Drain Current (ID) versus Drain-to-Source Voltage (VDS) for various Gate-to-Source Voltages (VGS) at a constant temperature. It illustrates the device's behavior in the on-region.
Figure 2: Normalized On-Resistance vs. Drain Current and Gate Voltage
This plot displays the normalized Drain-to-Source On-Resistance (RDS(on)) as a function of Drain Current (ID) and Gate-to-Source Voltage (VGS). It highlights how RDS(on) changes with current and gate drive.
Figure 3: Normalized On-Resistance vs. Junction Temperature
This graph illustrates the normalized Drain-to-Source On-Resistance (RDS(on)) as a function of Junction Temperature (TJ). It shows the temperature dependency of the device's on-state resistance.
Figure 4: On-Resistance vs Gate to Source Voltage
This plot shows the Drain-to-Source On-Resistance (RDS(on)) as a function of Gate-to-Source Voltage (VGS) for a specific Drain Current (ID = 68 A) and temperature conditions.
Figure 5: Transfer Characteristics
This graph plots Drain Current (ID) versus Gate-to-Source Voltage (VGS) for a constant Drain-to-Source Voltage (VDS = 5 V) and different Junction Temperatures (TJ). It shows the device's transconductance characteristics.
Figure 6: Source to Drain Diode Forward Voltage vs Source Current
This plot shows the Source-to-Drain Diode Forward Voltage (VSD) as a function of Source Current (IS) for different temperature conditions. It characterizes the body diode's forward conduction.
Figure 7: Gate Charge Characteristics
This graph displays Gate Charge (Qg) versus Gate-to-Source Voltage (VGS) for different Drain-to-Source Voltage (VDD) conditions. It details the charge required to switch the MOSFET.
Figure 8: Capacitance vs Drain to Source Voltage
This plot shows various capacitances (Ciss, Coss, Crss) as a function of Drain-to-Source Voltage (VDS) at a frequency of 1 MHz and VGS = 0 V. It characterizes the device's parasitic capacitances.
Figure 9: Unclamped Inductive Switching Capability
This graph illustrates the Avalanche Current (IAS) versus Time in Avalanche (tAV) for different Junction Temperatures (TJ). It defines the device's capability under unclamped inductive load conditions.
Figure 10: Maximum Continuous Drain Current vs. Case Temperature
This plot shows the Maximum Continuous Drain Current (ID) as a function of Case Temperature (TC) for a specific thermal resistance (R〉JC = 0.9 °C/W). It indicates the current handling capability at different operating temperatures.
Figure 11: Forward Bias Safe Operating Area
This graph defines the Safe Operating Area (SOA) for the MOSFET, showing Drain Current (ID) versus Drain-to-Source Voltage (VDS) for various pulse conditions and temperature limits.
Figure 12: Single Pulse Maximum Power Dissipation
This plot shows the maximum power dissipation for a single pulse as a function of pulse width (t) for a given thermal resistance and case temperature.
Figure 13: Junction-to-Ambient Transient Thermal Response Curve
This graph plots the Normalized Effective Transient Thermal Resistance (r(t)) versus Rectangular Pulse Duration (t) for different duty cycles. It helps in calculating peak junction temperature under transient conditions.
Mechanical Outline
Package: PQFN8 5X6, 1.27P, CASE 483AF, ISSUE A
Package Dimensions (Millimeters):
- A: 0.90 - 1.10
- A1: 0.00 - 0.05
- A3: 0.20 REF.
- b: 0.37 - 0.47
- D: 4.90 - 5.10
- D2: 4.13 - 4.33
- E: 5.90 - 6.10
- E2: 4.23 - 4.43
- E3: 0.35 REF.
- e: 1.27 BSC
- e1: 0.635 BSC
- L: 0.52 - 0.62
- L4: 0.55 - 0.75
- Z: 0.38 REF.
Land Pattern Recommendation: For additional information on soldering and mounting techniques, refer to the onsemi Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
Notes: Dimensions are in millimeters. Dimensions do not include burrs or mold flash. Mold flash or burrs do not exceed 0.10mm. Dimensioning and tolerancing per ASME Y14.5M-2009. It is recommended to have no traces or vias within the keep-out area.
Revision History
| Revision | Description of Changes | Date |
|---|---|---|
| Ex-FCS | Preview Datasheet (or Advanced datasheet) Rev A published by Fairchild Semiconductor. | 7/1/2016 |
| 1.0 | Final Datasheet Released and Change to ON Semiconductor Brand name logo. | 3/1/2017 |
| 1.1 | By using official ON Semiconductor datasheet format. | 5/1/2017 |
| 2 | Converted the Data Sheet to onsemi format. | 8/19/2025 |
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Additional Information
Technical Publications:
- Technical Library: www.onsemi.com/design/resources/technical-documentation
- onsemi Website: www.onsemi.com
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