Kupanga Heterogeneous Memory Systems mu FPGA SDK ya OpenCL Custom Platforms
Malangizo

Kupanga Heterogeneous Memory Systems mu Intel® FPGA SDK ya OpenCL Custom Platforms

Kukhazikitsa kukumbukira kosasinthika mu Custom Platform kumapangitsa kuti pakhale bandwidth yowonjezereka yakunja (EMIF) komanso njira zazikulu komanso zofulumira kukumbukira. Kuphatikizika kwamakumbukidwe kosiyanasiyana ndi kokometsedwa
OpenCL ™(1)kernel ikhoza kupangitsa kuti makina anu a OpenCL asinthe.
Cholemba ichi chimapereka chitsogozo pakupanga makina okumbukira mosiyanasiyana mu Pulatifomu Yachizolowezi kuti mugwiritse ntchito ndi Intel® FPGA SDK ya OpenCL(2). Intel akuganiza kuti ndinu wopanga FPGA wodziwa zambiri yemwe akupanga Custom Platforms omwe ali ndi machitidwe okumbukira.
Musanapange makina amakumbukidwe osasinthika, dziwani Intel FPGA SDK ya OpenCL zolemba zomwe zafotokozedwa pansipa.
Zambiri Zogwirizana

• Intel FPGA SDK ya OpenCL Programming Guide
• Intel FPGA SDK ya OpenCL Best Practices Guide
• Intel FPGA SDK ya OpenCL Arria 10 GX FPGA Development Kit Reference Porting Guide

1.1. Kutsimikizira Kugwira Ntchito kwa FPGA Board ndi EMIF Interfaces

Tsimikizirani mawonekedwe aliwonse amakumbukidwe pawokha ndikukhazikitsa Custom Platform yanu pogwiritsa ntchito kukumbukira kwapadziko lonse lapansi.

1. Tsimikizirani mawonekedwe aliwonse amakumbukidwe pogwiritsa ntchito mapangidwe a Hardware omwe amatha kuyesa kuthamanga ndi kukhazikika kwa mawonekedwe aliwonse.
2. Yambitsani Custom Platform yanu pogwiritsa ntchito kukumbukira kwapadziko lonse lapansi.
   1. Za example, ngati muli ndi mawonekedwe atatu a DDR, imodzi mwazo iyenera kujambulidwa ngati kukumbukira kosasinthika. Pankhaniyi, tsimikizirani magwiridwe antchito a stack ya OpenCL ndi mawonekedwe aliwonse a DDR paokha.
      OpenCL ndi logo ya OpenCL ndi zizindikiro za Apple Inc. zogwiritsidwa ntchito ndi chilolezo cha Khronos Group™ .
   2.  Intel FPGA SDK ya OpenCL idakhazikitsidwa ndi Khronos Specification, ndipo yadutsa Khronos Conformance Testing Process. Mkhalidwe wamakono ukupezeka pa www.khronos.org/conformance.

Malingaliro a kampani Intel Corporation Maumwini onse ndi otetezedwa. Intel, logo ya Intel, ndi zizindikiro zina za Intel ndi zizindikiro za Intel Corporation kapena mabungwe ake. Intel imatsimikizira kugwira ntchito kwa FPGA yake ndi zida za semiconductor malinga ndi zomwe zili pano malinga ndi chitsimikizo cha Intel, koma ili ndi ufulu wosintha zinthu ndi ntchito zilizonse nthawi iliyonse popanda kuzindikira. Intel sakhala ndi udindo kapena udindo chifukwa cha kugwiritsa ntchito kapena kugwiritsa ntchito zidziwitso zilizonse, malonda, kapena ntchito zomwe zafotokozedwa pano kupatula monga momwe Intel adavomerezera momveka bwino. Makasitomala a Intel amalangizidwa kuti apeze mtundu waposachedwa kwambiri wamakina a chipangizocho asanadalire zidziwitso zilizonse zosindikizidwa komanso asanayike maoda azinthu kapena ntchito. *Mayina ena ndi mtundu zitha kunenedwa kuti ndi za ena.
ISO 9001:2015 Adalembetsedwa
Kapenanso, ngati muli ndi mawonekedwe awiri a DDR ndi mawonekedwe a quad data rate (QDR), tsimikizirani magwiridwe antchito a OpenCL stack ya ma DDR awiri olumikizirana ndi mawonekedwe a QDR modziyimira pawokha.
Intel ikulimbikitsa kuti mugwiritse ntchito PCI Express® - (PCIe® -) kapena EMIF-pang'onopang'ono mapangidwe kuti muyese kukumbukira kwanu. Mukatsimikizira kuti mawonekedwe aliwonse okumbukira akugwira ntchito komanso kuti mapangidwe anu a OpenCL amagwira ntchito ndi kagawo kakang'ono ka kukumbukira, pitilizani.
kuti apange dongosolo la kukumbukira logwira ntchito mokwanira. 
1.2. Kusintha board_spec.xml File
Sinthani board_spec.xml file kuti mufotokozere mitundu yamitundu yosiyanasiyana yamakumbukiro yomwe imapezeka ku ma OpenCL kernels.
Pakuphatikiza kernel, Intel FPGA SDK ya OpenCL Offline Compiler imagawira mikangano ya kernel pamtima potengera mkangano wamalo omwe mumatchula.
1. Sakatulani ku board_spec.xml file mu chikwatu cha hardware cha Custom Platform yanu.
2. Tsegulani board_spec.xml file mu mkonzi wamalemba ndikusintha XML molingana.
Za exampKomanso, ngati makina anu a hardware ali ndi zikumbukiro ziwiri za DDR monga memory globalmemory ndi mabanki awiri a QDR omwe mumatengera kukumbukira kosasinthasintha, sinthani magawo a kukumbukira board_spec.xml file kufanana ndi izi:
















1.3. Kukhazikitsa Magawo Ambiri a Memory mu Qsys
Pakadali pano, OpenCL Memory Bank Divider mu kapangidwe ka Qsys sichigwirizana ndi ma banki opanda mphamvu a 2, zomwe sizili malire pamasinthidwe wamba. Komabe, pali zochitika zomwe palibe mphamvu-ya-2 nambala yamakumbukidwe ndiyofunikira. Kuti mugwirizane ndi malo opanda mphamvu-ya-2, gwiritsani ntchito ma OpenCL Memory Bank Dividers kuti mupange makina okumbukira omwe alibe mphamvu-ya-2 yamabanki okumbukira. Muyenera kupanga angapo OpenCL Memory Bank Divider mukakhala ndi makina okumbukira osasinthika. Ganizirani dongosolo lomwe lili ndi mawonekedwe amodzi a DDR kukumbukira ndi mawonekedwe amodzi a QDR kukumbukira. Chifukwa mabanki awiriwa ali ndi ma topology osiyanasiyana, simungathe kuwaphatikiza pansi pamtima umodzi wapadziko lonse lapansi.
Chithunzi 1. Chojambula cha Block cha Three-Bank Heterogeneous Memory System
Dongosolo la kukumbukira losasinthikali lili ndi ma DDR memory interfaces ndi mawonekedwe amodzi a QDR memory.Ngati mukugwiritsa ntchito mtundu 16.0, 16.0.1, kapena 16.0.2 wa pulogalamu ya Intel Quartus® Prime ndi Altera SDK ya OpenCL, OpenCL Memory Bank Divider imayendetsa molakwika kuphulika kwa maadiresi kudutsa malire a maadiresi. Kuti muthetse vutoli, onjezani mlatho wa mapaipi ophulika kukula kwa 1 ndikulumikiza mbuye wake wa Avalon ®Memory-Mapped (Avalon-MM) ku doko la akapolo la OpenCL Memory Bank Divider.
Zindikirani:
Nkhani yodziwikayi idakhazikitsidwa mu pulogalamu ya Intel Quartus Prime ndi Intel FPGA SDK ya OpenCL mtundu 16.1.
Chithunzi 2. Chojambula cha Block cha Three-Bank Heterogeneous Memory System ndi Pipeline Bridge 1.4. Kusintha Boardtest Program ndi Host Code for Your Heterogeneous Memory Solution
Gwiritsani ntchito boardtest.cl kernel yomwe imabwera ndi Intel FPGA SDK ya OpenCL Custom Platform Toolkit kuyesa magwiridwe antchito ndi machitidwe a Custom Platform yanu.
Pulogalamu ya boardtest ndi OpenCL kernel yomwe imakulolani kuti muyese bandwidth ya host-to-device, memory bandwidth, ndi magwiridwe antchito a Custom Platform yanu.

1. Sakatulani ku /board/ custom_platform_toolkit/test/boardtest directory.
2. Tsegulani boardtest.cl file m'mawu osintha ndikugawa malo osungira pamikangano iliyonse yapadziko lonse lapansi.
   Za exampLe:
   __kopanda kanthu
   mem_stream (__global__attribute__((buffer_location(“DDR”))) uint *src, __global __attribute__((buffer_location(“QDR”)))) uint *dst, uint arg, uint arg2)
   Apa, uint *src imaperekedwa ku kukumbukira kwa DDR, ndipo uint *dst imaperekedwa ku kukumbukira kwa QDR. The board_spec.xml file imatchula mawonekedwe a makina onse okumbukira.
3. Kuti muwongolere njira yanu yamakumbukiro mu OpenCL yanu, sinthani khodi yanu yopezera powonjezera mbendera ya CL_MEM_HETEROGENEOUS_INTELFPGA ku foni yanu ya clCreateBuffer.
   Za exampLe:
   ddatain = clCreateBuffer(context, CL_MEM_READ_WRITE | memflags
   CL_MEM_HETEROGENEOUS_INTELFPGA, sizeof(osasainidwa) * vectorSize, NULL, &status);
   Intel ikukulimbikitsani kuti muyike malo achitetezo ngati mkangano wa kernel musanalembe buffer. Mukamagwiritsa ntchito kukumbukira kumodzi kwapadziko lonse, mutha kulemba ma buffers musanayambe kapena mutawagawira kukangana kwa kernel. M'makina okumbukira mosiyanasiyana, wolandirayo amakhazikitsa malo achitetezo asanalembe buffer. Mwa kuyankhula kwina, wolandirayo adzayitana clSetKernelArgument ntchito asanayitane clEnqueueWriteBuffer ntchito.
   Mu code yanu yopezera, imbani mafoni a clCreateBuffer, clSetKernelArg, ndi clEnqueueWriteBuffer motere:
   ddatain = clCreateBuffer(context, CL_MEM_READ_WRITE | memflags |
   CL_MEM_HETEROGENEOUS_INTELFPGA, sizeof(osasainidwa) * vectorSize, NULL, &status);
   … status = clSetKernelArg(kernel[k], 0, sizeof(cl_mem), (void*)&ddatain);
   … udindo = clEnqueueWriteBuffer(mzere, ddatain, CL_FALSE, 0, sizeof(osasainidwa) * vectorSize,hdatain, 0, NULL, NULL);
   ALTERAOCLSDKROOT/board/custom_platform_toolkit/tests/boardtest/host/memspeed.cpp file imapereka dongosolo lofanana la mafoni awa.
4.  Mukamaliza kusintha boardtest.cl file ndi code host, phatikizani code host ndi kernel ndikutsimikizira magwiridwe antchito awo.
   Mukamapanga khodi yanu ya kernel, muyenera kuletsa kuphulika kwa makina onse amakumbukiro mwa kuphatikiza -no-interleaving. njira mu aoc command.

Zambiri Zogwirizana
Kulepheretsa Burst-Interleaving of Global Memory (-no-interleaving )

1.5. Kutsimikizira Kugwira Ntchito Kwa Memory Yanu Yosiyanasiyana Dongosolo
Kuti muwonetsetse kuti makina okumbukira anzeru akugwira ntchito moyenera, sinthani mbendera ya CL_CONTEXT_COMPILER_MODE_INTELFPGA mu khodi yanu yopezera.
M'makina a OpenCL okhala ndi kukumbukira kofanana, muyenera kusankha kuyika CL_CONTEXT_COMPILER_MODE_INTELFPGA=3 mbendera mu code yanu yopezera kuti muyimitse kuwerenga kwa .aocx file ndi kukonzanso kwa FPGA. Kukhazikitsa CL_CONTEXT_COMPILER_MODE_INTELFPGA=3 mbendera ndikothandiza mukakhazikitsa gulu lanu kuti mutsimikize magwiridwe antchito a Custom Platform yanu popanda kupanga pulani yapansi ndi kutchula zigawo za LogicLock™.
Ndi makina amakumbukiro osasinthika, malo othamanga ayenera kuwerenga malo a buffer a buffer iliyonse, yofotokozedwa mu .aocx file, kutsimikizira magwiridwe antchito a memory system. Komabe, mungafune kutsimikizira magwiridwe antchito a Custom Platform yanu osagwiritsa ntchito zomaliza zamapangidwe a board, monga kupanga pulani yapansi ndikutchula zigawo za LogicLock.

1. Tsimikizirani kuti mbendera ya CL_CONTEXT_COMPILER_MODE_INTELFPGA sinakhazikitsidwe m'khodi yanu yopezera.
2. Pitani ku gulu / /source/host/mmd directory ya Custom Platform yanu.
3. Tsegulani acl_pcie_device.cpp memory-mapped device (MMD) file mu text editor.
4.  Sinthani ntchito ya reprogram mu acl_pcie_device.cpp file powonjezera kubwerera 0; mzere, monga momwe zilili pansipa:
   int ACL_PCIE_DEVICE::kupanganso (zopanda *data, size_t data_size)
   {
   kubwerera 0;
   // kuganiza kulephera
   int reprogram_failed = 1;
   // musaganize rbf kapena hashi mu fpga.bin
   int rbf_or_hash_not_provided = 1;
   // lingalirani kuti maziko ndi ma hashes obwereza sagwirizana
   int hash_mismatch = 1;
   …
   }
5. Lembani fayilo ya acl_pcie_device.cpp file.
6. Onetsetsani kuti mbendera ya CL_CONTEXT_COMPILER_MODE_INTELFPGA sinakhazikitsidwe.
   Chenjerani: Mukawonjezera kubwerera 0; ku reprogram ntchito ndikubwezeretsanso MMD file, malo othamanga adzawerenga .aocx file ndikugawa malo osungira koma osakonzanso FPGA. Muyenera kufananitsa pamanja chithunzi cha FPGA ndi .aocx file. Kuti musinthe khalidweli, chotsani kubwerera 0; kuchokera pa ntchito ya reprogram ndikubwezeretsanso MMD file.

1.6. Document Revision History

Tsiku	Baibulo	Zosintha
Dec-17	2017.12.01	• Inasinthidwanso kukhala CL_MEM_HETEROGENEOUS_ALTERA kukhala CL_MEM_HETEROGENEOUS_INTELFPGA.
Dec-16	2016.12.13	• Inasinthidwa dzina la CL_CONTEXT_COMPILER_MODE_ALTERA kukhala CL_CONTEXT_COMPILER_MODE_INTELFPGA.

Kupanga Heterogeneous Memory Systems mu Intel® FPGA SDK ya OpenCL
Mapulatifomu Amakonda
Tumizani Ndemanga
Baibulo Lomasulira
Tumizani Ndemanga
ID: 683654
Mtundu: 2016.12.13

Zolemba / Zothandizira

intel Kupanga Heterogeneous Memory Systems mu FPGA SDK ya OpenCL Custom Platforms [pdf] Malangizo Kupanga Heterogeneous Memory Systems mu FPGA SDK ya OpenCL Custom Platforms, Kupanga Heterogeneous Memory Systems, FPGA SDK ya OpenCL Custom Platforms

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