onsemi 8-Pin DIP High Speed Transistor Optocouplers

Single-Channel: 6N135M, 6N136M, HCPL4503M

Dual-Channel: HCPL2530M, HCPL2531M

Description

The 6N135M, 6N136M, HCPL4503M, HCPL2530M, and HCPL2531M optocouplers consist of an AlGaAs LED optically coupled to a high-speed photodetector transistor for each channel. A separate connection for the bias of the photodiode improves the speed by several orders of magnitude over conventional phototransistor optocouplers by reducing the base-collector capacitance of the input transistor.

The HCPL4503M has no internal connection to the phototransistor base for improved noise immunity. An internal noise shield provides superior common mode rejection of up to 50,000 V/μs.

Features

High Speed - 1 MBit/s
Dual-Channel: HCPL2530M, HCPL2531M
CTR Guaranteed 0°C to 70°C
No Base Connection for Improved Noise Immunity (HCPL4503M)
Superior CMR of 15,000 V/µs Minimum (HCPL4503M)
Safety and Regulatory Approvals: UL1577, 5,000 VACRMS for 1 Minute; DIN EN/IEC60747-5-5
Pb-Free Devices

Applications

Line Receivers
Pulse Transformer Replacement
Output Interface to CMOS-LSTTL-TTL
Wide-Bandwidth Analog Coupling

Marking Diagram

Device Number: 6N135

V: DIN EN/IEC60747-5-5 Option (only appears on component ordered with this option)

XX: Two Digit Year Code

YY: Two Digit Work Week Ranging from '01' to '53'

B: Assembly Package Code

Ordering Information

See detailed ordering and shipping information on page 11 of this data sheet.

Note: Some of the devices on this data sheet have been DISCONTINUED. Please refer to the table on page 11.

Schematics

Figure 1. Schematics

6N135M, 6N136M, HCPL4503M: Pin 7 is not connected in the HCPL4503M.

HCPL2530M, HCPL2531M

Safety and Insulation Ratings

(As per DIN EN/IEC 60747–5–5, this optocoupler is suitable for "safe electrical insulation" only within the safety limit data. Compliance with the safety ratings shall be ensured by means of protective circuits.)

Parameter	Characteristics
Installation Classifications per DIN VDE 0110/1.89 Table 1, For Rated Mains Voltage	<150 VRMS (I-IV), <300 VRMS (I-IV), <450 VRMS (HIII), <600 VRMS (I-III)
Climatic Classification	40/100/21
Pollution Degree (DIN VDE 0110/1.89)	2
Comparative Tracking Index	175

Symbol	Parameter	Value	Unit
V_PR	Input-to-Output Test Voltage, Method A, V_IORM x 1.6 = V_PR, Type and Sample Test with t_m = 10 s, Partial Discharge < 5 pC	1,335	V_peak
V_PR	Input-to-Output Test Voltage, Method B, V_IORM x 1.875 = V_PR, 100% Production Test with t_m = 1 s, Partial Discharge < 5 pC	1,669	V_peak
V_IORM	Maximum Working Insulation Voltage	890	V_peak
V_IOTM	Highest Allowable Over-Voltage	6,000	V_peak
External Creepage	≥8.0	mm
External Clearance	≥7.4	mm
External Clearance (for Option TV, 0.4" Lead Spacing)	≥10.16	mm
DTI	Distance Through Insulation (Insulation Thickness)	≥0.5	mm
T_S	Case Temperature (Note 1)	150	°C
I_{S, INPUT}	Input Current (Note 1)	200	mA
P_{S, OUTPUT}	Output Power (Duty Factor ≤ 2.7%) (Note 1)	300	mW
R_IO	Insulation Resistance at T_S, V_IO = 500 V (Note 1)	>10⁹	Ω

1. Safety limit value - maximum values allowed in the event of a failure.

Absolute Maximum Ratings

(T_A = 25°C unless otherwise noted)

Symbol	Parameter	Test Conditions	Value	Unit
T_STG	Storage Temperature		-40 to +125	°C
T_OPR	Operating Temperature		-40 to +100	°C
T_J	Junction Temperature		-40 to +125	°C
T_SOL	Lead Solder Temperature	260 for 10 s		°C
EMITTER
I_{F (avg)}	DC/Average Forward Input Current Each Channel (Note 2)		25	mA
I_{F (pk)}	Peak Forward Input Current Each Channel (Note 3)	50% Duty Cycle, 1 ms P.W.	50	mA
I_{F (trans)}	Peak Transient Input Current Each Channel	≤1 µs P.W., 300 pps	1.0	A
V_R	Reverse Input Voltage Each Channel		5	V
P_D	Input Power Dissipation Each Channel (Note 4)		45	mW
DETECTOR
I_{O (avg)}	Average Output Current Each Channel		8	mA
I_{O (pk)}	Peak Output Current Each Channel		16	mA
V_EBR	Emitter-Base Reverse Voltage	6N135M and 6N136M	5	V
V_CC	Supply Voltage		0.5 to 30	V
V_O	Output Voltage		-0.5 to 20	V
I_B	Base Current	6N135M and 6N136M	5	mA
P_D	Output Power Dissipation Each Channel (Note 5)		100	mW

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected.

2. Derate linearly above 70°C free-air temperature at a rate of 0.8 mA/°C.

3. Derate linearly above 70°C free-air temperature at a rate of 1.6 mA/°C.

4. Derate linearly above 70°C free-air temperature at a rate of 0.9 mW/°C.

5. Derate linearly above 70°C free-air temperature at a rate of 2.0 mW/°C.

Recommended Operating Conditions

Symbol	Parameter	Min	Max	Unit
V_CC	Supply Voltage	4.5	20.0	V
T_A	Ambient Operating Temperature	0	70	°C
I_FL	Input Current, Low Level	0	250	µA
I_FH	Input Current, High Level (Note 6)	6.3	20.0	mA

Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability.

6. 6.3 mA is a guard banded value which allows for at least 20% CTR degradation. Initial input current threshold value is 5.0 mA or less.

Electrical Characteristics

(T_A = 25°C, unless otherwise noted.)

Individual Component Characteristics

Symbol	Parameter	Device	Test Conditions	Min	Typ	Max	Unit
EMITTER
V_F	Input Forward Voltage	All	I_F = 16 mA, T_A = 25°C	1.45	1.70		V
B_VR	Input Reverse Breakdown Voltage	All	I_R = 10 µA	5	21		V
ΔV_F/ΔT_A	Temperature Coefficient of Forward Voltage	All	I_F = 16 mA		-1.7		mV/°C
DETECTOR
I_OH	Logic High Output Current	All	I_F = 0 mA, V_CC = 5.5 V, T_A = 25°C	0.0007	0.5	1	µA
		6N135M, 6N136M, HCPL4503M	I_F = 0 mA, V_CC = 15 V, T_A = 25°C	0.0019			µA
I_OL	Logic Low Supply Current	All	I_F = 0 mA, V_CC = 15 V		50		µA
		6N135M, 6N136M, HCPL4503M	I_F = 16 mA, V_O = Open, V_CC = 15 V	163	200		µA
I_CCL		HCPL2530M, HCPL2531M	I_F1 = I_F2 = 16 mA, V_O = Open, V_CC = 15 V		400		µA
I_CCH	Logic High Supply Current	6N135M, 6N136M, HCPL4503M	I_F = 0 mA, V_O = Open, V_CC = 15 V	0.0004	2		µA
		HCPL2530M, HCPL2531M	I_F = 0 mA, V_O = Open, V_CC = 15 V		4		µA
TRANSFER CHARACTERISTICS (T_A = 0°C to 70°C unless otherwise specified.)
COUPLED
CTR	Current Transfer Ratio (Note 7)	6N135M, HCPL2530M	I_F = 16 mA, V_O = 0.4 V, V_CC = 4.5 V, T_A = 25°C	7	38	50	%
		6N136M, HCPL4503M, HCPL2531M		19	38	50	%
V_OL	Logic LOW Output Voltage	6N135M, HCPL2530M	I_F = 16 mA, I_O = 0.4 mA, V_CC = 4.5 V, T_A = 25°C	0.12	0.4		V
		6N136M, HCPL4503M, HCPL2531M	I_F = 16 mA, I_O = 1.1 mA, V_CC = 4.5 V, T_A = 25°C	0.20	0.4	0.5	V
		6N135M, HCPL2530M	I_F = 16 mA, I_O = 0.8 mA, V_CC = 4.5 V, T_A = 25°C	0.11	0.5		V
		6N136M, HCPL4503M, HCPL2531M	I_F = 16 mA, I_O = 2.4 mA, V_CC = 4.5 V, T_A = 25°C	0.18	0.5		V

Switching Characteristics

(T_A = 0°C to 70°C unless otherwise specified.)

Symbol	Device	Test Conditions	Typ	Max	Unit
t_PHL Propagation Delay Time to Logic LOW
	6N135M, HCPL2530M	T_A = 25°C, R_L = 4.1 kΩ, I_F = 16 mA (Note 8) (Figure 14)	0.23	1.5	µs
	6N136M, HCPL4503M	T_A = 25°C, R_L = 1.9 kΩ, I_F = 16 mA (Note 9) (Figure 14)	0.25	0.8	µs
	HCPL2531M		0.28		µs
t_PLH Propagation Delay Time to Logic HIGH
	6N135M, HCPL2530M	T_A = 25°C, R_L = 4.1 kΩ, I_F = 16 mA (Note 8) (Figure 14)	0.45	1.5	µs
	6N136M, HCPL4503M	T_A = 25°C, R_L = 1.9 kΩ, I_F = 16 mA (Note 9) (Figure 14)	0.26	0.8	µs
	HCPL2531M		0.18		µs
\|C_MH\| Common Mode Transient Immunity at Logic High
	6N135M, HCPL2530M	I_F = 0 mA, V_CM = 10 V_p-p, R_L = 4.1 kΩ, T_A = 25°C (Note 10) (Figure 15)	10,000		V/µs
	6N136M, HCPL2531M	I_F = 0 mA, V_CM = 10 V_p-p, R_L = 1.9 kΩ, T_A = 25°C (Note 10) (Figure 15)	10,000		V/µs
	HCPL4503M	I_F = 0 mA, V_CM = 1,500 V_p-p, R_L = 4.1 kΩ, T_A = 25°C (Note 10) (Figure 15)	15,000	50,000	V/µs
\|C_ML\| Common Mode Transient Immunity at Logic Low
	6N135M, HCPL2530M	I_F = 16 mA, V_CM = 10 V_p-p, R_L = 4.1 kΩ, T_A = 25°C (Note 10) (Figure 16)	10,000		V/µs
	6N136M, HCPL2531M	I_F = 16 mA, V_CM = 10 V_p-p, R_L = 1.9 kΩ, T_A = 25°C (Note 10) (Figure 15)	10,000		V/µs
	HCPL4503M	I_F = 16 mA, V_CM = 1,500 V_p-p, R_L = 4.1 kΩ, T_A = 25°C (Note 10) (Figure 15)	15,000	50,000	V/µs

Isolation Characteristics

(T_A = 25°C, unless otherwise noted.)

Symbol	Parameter	Device	Test Conditions	Typ	Unit
V_ISO	Withstand Isolation Test Voltage	All	RH ≤ 50%, I_f ≤ 10 µA, t = 1 minute, f = 50 Hz (Note 11) (Note 13)	5,000	VAC_RMS
R_IO	Resistance (Input to Output)	All	V_IO = 500 V_DC (Note 11)	10¹¹	Ω
C_IO	Capacitance (Input to Output)	All	f = 1 MHz, V_IO = 0 V_DC (Note 11)	1	pF
I_LI	Input-Input Insulation Leakage Current	HCPL2530M, HCPL2531M	RH ≤ 45%, V_II = 500 V_DC, t = 5 s (Note 12)	<1	nA
R_II	Input-Input Resistance	HCPL2530M, HCPL2531M	V_II = 500 V_DC (Note 12)	10¹²	Ω
C_II	Input-Input Capacitance	HCPL2530M, HCPL2531M	f = 1 MHz (Note 12)	0.2	pF

Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions.

7. Current Transfer Ratio is defined as a ratio of output collector current, I_O, to the forward LED input current, I_F, times 100%.

8. The 4.1 kΩ load represents 1 LSTTL unit load of 0.36 mA and 6.1 kΩ pull-up resistor.

9. The 1.9 kΩ load represents 1 TTL unit load of 1.6 mA and 5.6 kΩ pull-up resistor.

10. Common mode transient immunity in logic high level is the maximum tolerable (positive) dV_CM/dt on the leading edge of the common mode pulse signal, V_CM, to assure that the output will remain in a logic high state (i.e., V_O > 2.0 V).

Common mode transient immunity in logic low level is the maximum tolerable (negative) dV_CM/dt on the trailing edge of the common mode pulse signal, V_CM, to assure that the output will remain in a logic low state (i.e., V_O < 0.8 V).

11. Device is considered a two terminal device: pins 1, 2, 3 and 4 are shorted together and pins 5, 6, 7 and 8 are shorted together.

12. Measured between pins 1 and 2 shorted together, and pins 3 and 4 shorted together.

13. 5000 VRMS for 1 minute duration is equivalent to 6000 VRMS for 1 second duration.

Typical Performance Curves

(For single-channel devices; 6N135M, 6N136M, and HCPL4503M.)

Figure 2. Normalized CTR vs. Forward Current

Figure 3. Normalized CTR vs. Temperature

Figure 4. Output Current vs. Output Voltage

Figure 5. Logic High Output Current vs. Temperature

Figure 6. Propagation Delay vs. Temperature

Figure 7. Propagation Delay vs. Load Resistance

(For dual-channel devices; HCPL2530M and HCPL2531M.)

Figure 8. Normalized CTR vs. Forward Current

Figure 9. Normalized CTR vs. Temperature

Figure 10. Output Current vs. Output Voltage

Figure 11. Logic High Output Current vs. Temperature

Figure 12. Propagation Delay vs. Temperature

Figure 13. Propagation Delay vs. Load Resistance

Test Circuit

Figure 14. Switching Time Test Circuit

Figure 15. Common Mode Immunity Test Circuit

Reflow Profile

Figure 16. Reflow Profile

Profile Feature	Pb-Free Assembly Profile
Temperature Min. (T_Smin)	150°C
Temperature Max. (T_Smax)	200°C
Time (t_S) from (T_Smin to T_Smax)	60 to 120 s
Ramp-up Rate (t_p to T_p)	3°C/second maximum
Liquidous Temperature (T_L)	217°C
Time (t₁) Maintained Above (T_L)	60 to 150 s
Peak Body Package Temperature	260°C +0°C/-5°C
Time (t_p) within 5°C of 260°C	30 s
Ramp-down Rate (T_p to T_L)	6°C/s maximum
Time 25°C to Peak Temperature	8 minutes maximum

Ordering Information

Part Number	Package	Shipping
6N135M	PDIP8 6.6x3.81, 2.54P DIP 8-Pin	50 Units / Tube
6N135SM	PDIP8 GW SMT 8-Pin (Lead Bend)	50 Units / Tube
6N135SDM	PDIP8 GW SMT 8-Pin (Lead Bend)	1,000 / Tape and Reel
6N135VM	PDIP8 9.655x6.61, 2.54P DIP 8-Pin, DIN IEC60747-5-5 Option	50 Units / Tube
6N135SVM	PDIP8 GW SMT 8-Pin (Lead Bend), DIN EN/IEC 60747-5-5 Option	50 Units / Tube
6N135SDVM	PDIP8 GW SMT 8-Pin (Lead Bend), DIN EN/IEC 60747-5-5 Option	1,000 / Tape and Reel
6N135TSVM	PDIP8 GW SMT 8-Pin, 0.4" Lead Spacing, DIN EN/IEC 60747-5-5 Option	50 Units / Tube
6N135TSR2VM	PDIP8 GW SMT 8-Pin, 0.4" Lead Spacing, DIN EN/IEC 60747-5-2 Option	1,000 / Tape and Reel
6N135TVM	PDIP8 6.6x3.81, 2.54P DIP 8-Pin, 0.4" Lead Spacing, DIN EN/IEC 60747-5-5 Option	50 Units / Tube
DISCONTINUED (Note 14)

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.

NOTE: The product orderable part number system listed in this table also applies to the 6N136M, HCPL4503M, HCPL2530M and HCPL2531M product families.

14. DISCONTINUED: This device is not recommended for new design. Please contact your onsemi representative for information. The most current information on this device may be available on www.onsemi.com.

Mechanical Case Outline

PDIP8 6.6x3.81, 2.54P CASE 646BW ISSUE O

DATE: 31 JUL 2016

NOTES:

A) NO STANDARD APPLIES TO THIS PACKAGE

B) ALL DIMENSIONS ARE IN MILLIMETERS.

C) DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH, AND TIE BAR EXTRUSION

PDIP8 9.655x6.6, 2.54P CASE 646CQ ISSUE O

DATE: 18 SEP 2017

NOTES:

A) NO STANDARD APPLIES TO THIS PACKAGE

B) ALL DIMENSIONS ARE IN MILLIMETERS.

C) DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH, AND TIE BAR EXTRUSION

PDIP8 GW CASE 709AC ISSUE O

DATE: 31 JUL 2016

LAND PATTERN RECOMMENDATION

NOTES:

A) NO STANDARD APPLIES TO THIS PACKAGE

B) ALL DIMENSIONS ARE IN MILLIMETERS.

C) DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH, AND TIE BAR EXTRUSION

PDIP8 GW CASE 709AD ISSUE O

DATE: 31 JUL 2016

LAND PATTERN RECOMMENDATION

NOTES:

A) NO STANDARD APPLIES TO THIS PACKAGE

B) ALL DIMENSIONS ARE IN MILLIMETERS.

C) DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH, AND TIE BAR EXTRUSION

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Description

Features

Applications

Marking Diagram

Ordering Information

Schematics

Safety and Insulation Ratings

Absolute Maximum Ratings

Recommended Operating Conditions

Electrical Characteristics

Individual Component Characteristics

Switching Characteristics

Isolation Characteristics

Typical Performance Curves

Test Circuit

Reflow Profile

Ordering Information

Mechanical Case Outline

PDIP8 6.6x3.81, 2.54P CASE 646BW ISSUE O

PDIP8 9.655x6.6, 2.54P CASE 646CQ ISSUE O

PDIP8 GW CASE 709AC ISSUE O

PDIP8 GW CASE 709AD ISSUE O

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