onsemi NL5X4002, NL5X4E02: 2-Bit 24 Mbps Configurable Dual-Supply Autosense Level Translator

Product Overview

The NL5X4002 and NL5X4E02 are 2-bit configurable dual-supply bidirectional autosense translators that do not require directional control pins. The A and B ports are designed to track two different power supply rails, VCCA and VCCB, respectively. Both VCCA and VCCB supply rails are configurable from 1.65 V to 5.5 V. This allows voltage logic signals on the VCCA side to be translated into lower, higher, or equal value voltage logic signals on the VCCB side, and vice-versa.

The NL5X4002 translator has integrated 10 kΩ pullup resistors on the I/O lines. The integrated pullup resistors are used to pull the I/O lines up to either VCCA or VCCB.

The NL5X4E02 translator does not have integrated pullup resistors on the I/O lines. External pullup resistors are needed to pull the I/O lines up to either VCCA or VCCB.

These devices are excellent matches for open-drain applications such as the I2C communication bus.

Features

• Wide VCCA, VCCB Operating Range: 1.65 V to 5.5 V
• VCCA and VCCB are independent
• VCCA may be greater than, equal to, or less than VCCB
• High-Speed w/ 24 Mbps Guaranteed Date Rate
• Low Bit-to-Bit skew
• Overvoltage Tolerant Enable and I/O Pins
• Non-preferential Power-Up Sequencing
• Integrated 10 kΩ Pullup Resistors (NL5X4002)
• Available packaging: SOIC-8, Micro8, UDFN8, UQFN8
• -Q Suffix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC-Q101 Qualified and PPAP Capable
• These Devices are Pb-Free, Halogen Free/BFR Free and are RoHS Compliant

Typical Applications

• I2C, SMBus, PMBus
• Low Voltage ASIC Level Translation
• Mobile Phones, PDAs, Cameras

Block Diagrams

NL5X4002 Block Diagram (1 I/O Line): A simplified block diagram shows two input/output channels, each with an enable input (EN), a VCCA input, a VCCB input, and A and B ports. The NL5X4002 includes integrated pull-up resistors (RPU) on the I/O lines.

NL5X4E02 Block Diagram (1 I/O Line): Similar to the NL5X4002, but without integrated pull-up resistors, indicating the need for external pull-up resistors.

Pin Assignments

SOIC-8/Micro8 Package: Pin 1 is VCCA, Pin 2 is A1, Pin 3 is A2, Pin 4 is GND, Pin 5 is EN. Pin 8 is VCCB, Pin 7 is B1, Pin 6 is B2.

UDFN8 Package: Pin 1 is VCCA, Pin 2 is A1, Pin 3 is A2, Pin 4 is GND, Pin 5 is EN. Pin 8 is VCCB, Pin 7 is B1, Pin 6 is B2.

UQFN8 Package: Pin 1 is VCCA, Pin 2 is A1, Pin 3 is A2, Pin 4 is GND, Pin 5 is EN. Pin 8 is VCCB, Pin 7 is B1, Pin 6 is B2.

Pin Descriptions

Function Table

Maximum Ratings

Maximum ratings for VCCA, VCCB, VEN, and Vio are provided, along with input/output current, thermal resistance, power dissipation, and moisture sensitivity levels. Stresses exceeding these limits may damage the device.

Recommended Operating Conditions

Recommended operating conditions include VCCA, VCCB, VEN, and Vio supply voltages, as well as the operating temperature range and input transition rise or fall rate.

DC Electrical Characteristics

Detailed DC electrical characteristics are provided for various conditions, including input/output voltages, supply currents, tristate output mode currents, and leakage currents. Pull-up resistor values for the NL5X4002 are also specified.

Timing Characteristics

Timing characteristics are presented for both Rail-to-Rail Driving Configuration and Open Drain Driving Configuration under various VCCA and VCCB voltage combinations. Parameters include rise time, fall time, propagation delay, enable time, disable time, skew, and maximum data rate.

Test Setups and Timing Measurements

Diagrams illustrate the test setups for Rail-to-Rail Driving (A to B, B to A) and Open-Drain Driving (A to B, B to A). Timing diagrams define parameters such as propagation delay (tPD), rise/fall times (tr/tf), and skew (tSKEW).

Applications Information

Level Translator Architecture

The NL5X4002 and NL5X4E02 are auto-sense translators for bi-directional voltage level shifting in multi-supply voltage systems. They translate signals between VCCA and VCCB, adapting to the logic levels of each port. The NL5X4002 features internal 10 kΩ pull-up resistors, while the NL5X4E02 requires external pull-up resistors.

Output Performance

The rise and fall times of the open-drain outputs are influenced by the pull-up resistor values. Propagation times, skew, and maximum data rate depend on the impedance of the connected device.

Enable Input

The Enable (EN) pin provides tri-state operation. A low logic level on EN minimizes power consumption and places the A and B ports in a high-impedance state. A high logic level enables normal translation. The EN pin is referenced to VCCA and has overvoltage tolerant protection.

Power Supply Guidelines

VCCA can be greater than, less than, or equal to VCCB during normal operation. Power supply sequencing does not damage the device. For optimal performance, 0.01 µF to 0.1 µF decoupling capacitors are recommended on VCCA and VCCB pins, preferably ceramic capacitors placed close to the supply and ground pins to maximize noise immunity.

Device Ordering Information

A table lists various device order numbers, corresponding device markings, package types, pin 1 quadrant information, and tape & reel sizes. It also specifies the -Q suffix for automotive applications.

Pin 1 Orientation in Tape and Reel: Diagrams illustrate the pin 1 orientation in tape and reel for different quadrants.

Revision History

The revision history indicates the initial release (Revision 0) and subsequent updates, such as the addition of the AEC-Q100 Qualified note (Revision 1).

Package Dimensions

Detailed package dimensions are provided for various package types including SOIC-8 NB (CASE 751), Micro8 (CASE 846A), UDFN8 (CASE 517AJ), UDFN8 (CASE 517BZ), and UQFN8 (CASE 523AS). Each section includes diagrams, notes on dimensions, and generic marking diagrams.