onsemi Ignition Gate Drive IC
FAD1100-F085
Product Preview
Overview
The FAD1100-F085 is designed to directly drive an ignition IGBT and control the current and spark event of the coil. The coil current is controlled via the input pin. When the input is driven high, the output of the FAD1100-F085 is enabled to turn on the IGBT and start charging the coil. The FAD1100-F085 will sink a current (IIN) into the input pin based on programmed current on the RA line.
An input spike filter suppresses input signals of less than 13 µs in duration. A Max Dwell timer is included in the FAD1100-F085 which will turn off the IGBT if the input stays active for longer than the programmed time. This time interval can be modified through an external capacitor on the CSSD pin. When the Max Dwell timer is exceeded, the FAD1100-F085 will enter a Soft-Shut-Down mode (SSD) slowly dropping the collector current by lowering the gate drive to the IGBT, thereby discharging the coil such as to inhibit a spark event. Once the soft shutdown operation has started, any transitions on the input signal are ignored until after completion of the soft shutdown function. The FAD1100-F085 will also limit the collector current of the IGBT to Ic(lim) during charging. This is done through the sense resistor in the emitter leg of the Ignition IGBT developing a signal input to the VSENSE pin of the FAD1100-F085.
Features
- 5 V Output Level Optimized to Drive Ignition IGBTs
- Programmable Input Current through RA Line with 13 µs Input Spike Filter
- IGBT Current Sense and Current Limit
- Configurable Maximum Dwell Time with Soft Shut Down Protection
- Operation from Ignition on Battery Line down to 6 V
- 28 V Battery Capable for Jump Start
- Over Voltage Protection
- Ground Shift Tolerance ±1.5 V
- SO8 Package or Die Sales
- AEC-Q100 Grade 0 Qualified
- This Device is Pb-Free and is RoHS Compliant
Typical Applications
- 12 V Automotive Ignition Systems
Marking Diagram
The marking diagram shows the FAD1100 device with specific codes for Assembly Lot Code, Year, Work Week, and Pb-Free Package status.
Pin Connections
The FAD1100-F085 has 8 pins with the following functions:
- Pin 1: GND (Ground Reference of the Control IC)
- Pin 2: Input (Signal input)
- Pin 3: NC (No Connection)
- Pin 4: CSSD (Maximum dwell time and Soft-Shut-Down current output)
- Pin 5: RA (Input reference current output)
- Pin 6: Output (Gate Drive to the IGBT)
- Pin 7: VSENSE (Sense Input used for Ilim function)
- Pin 8: VBAT (Supply voltage)
Simplified Block Diagram
The simplified block diagram illustrates the internal components of the FAD1100, including a clamp, Vreg, bias Vref, input buffer, spike filter/delay, output driver, current limiter, and GND connection.
Recommended External Components
The following external components are recommended for optimal performance:
Component | Description | Vendor | Parameter | Typ. | Unit |
---|---|---|---|---|---|
RBAT | Limits transient currents during load dump | Vishay (0603 or bigger) | R | 200 to 300 | Ω |
CBAT1 | Battery or Ignition voltage filtering | TDK (dielectric material X7R) | C | 0.47 | μF |
CBAT | Battery noise transients | TDK (dielectric material X7R) | C | 10 | nF |
CIN | Noise immunity | TDK (dielectric material X7R) | C | 10 to 1000 | pF |
RSENSE | Sense the collector current | Bourns (1206 or bigger) | R | 20 | mΩ |
RB | Input resistor | Vishay 0603 | R | 10-200 | Ω |
RIN | Input resistor | Vishay 0603 | R | >100 kΩ, or disconnected | kΩ |
Typical Application Schematic
Figure 1 shows a typical application schematic for the FAD1100, illustrating the connections between the ECU, FAD1100, and the ignition coil, including external components like resistors and capacitors.
Absolute Maximum Ratings
The following table lists the absolute maximum ratings for the FAD1100-F085. Exceeding these limits may damage the device.
Symbol | Parameter | Min. | Max. | Unit |
---|---|---|---|---|
VBAT | Voltage at VBAT pin (excl. EMC transients) | -0.3 | 28 | V |
VIN | Voltage at Input pin with external RIN | -2 | 16 | V |
VRA, VCSSD | Voltage at RA and at CSSD | -0.3 | 3.6 | V |
VOUTPUT | Voltage at Gate Output | -0.3 | 6.5 | V |
VSENSE | Voltage on VSENSE pin | 0 | 400 | mV |
TA | Maximum Ambient Operating Temperature | -40 | 150 | °C |
TSTG | Storage Temperature Range | -55 | 150 | °C |
PMAX | Maximum continuous power dissipation at TA = 25 °C | 0 | 0.625 | W |
RΘJA | Thermal Resistance Junction-to-Ambient (Note 1) | 200 | °C /W | |
ESDHBM | Electrostatic Discharge Voltage Capability (Human Body Model) (Note 2) | 2 | kV | |
TSLD | Lead Temperature Soldering (Note 3) | 260 | °C |
Notes:
- 1. Refer to JESD51-2 and JESD51-3 standards.
- 2. Tested by EIA/JESD22-A114.
- 3. Refer to onsemi's Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
Recommended Operating Conditions
The following table lists the recommended operating conditions for the FAD1100-F085.
Symbol | Characteristic | Min. | Typ. | Max. | Units |
---|---|---|---|---|---|
ICQ | Collector (Coil) Operating Current | 12 | A | ||
LP | Coil Primary Inductance | 1.5 | mH | ||
RP | Coil Primary Resistance (25°C) | 0.4 | Ω | ||
RLOAD | Load Resistance (for delay time measurements) | 2 | Ω |
Electrical Characteristics
The following tables detail the electrical characteristics of the FAD1100-F085 under various conditions.
Power Supply Conditions
Symbol | Parameter | Conditions | Min. | Typ. | Max. | Unit |
---|---|---|---|---|---|---|
VBAT1 | Operating voltage | Coil switching function only | 4 | 28 | V | |
VBAT2 | Operating voltage | All functions | 6 | 28 | V | |
IBAT | Supply current | TJ = 150 °C, VBAT = 28 V, RA open, Input = 5 V | 5 | mA | ||
VCLAMP | Battery clamp voltage | IBAT = 10 mA | 33 | 40 | V |
Sense Pin Conditions
Symbol | Parameter | Conditions | Min. | Typ. | Max. | Unit |
---|---|---|---|---|---|---|
VLIMIT | Sense Voltage threshold at current limit | VBAT > 8 V | 185 | 215 | mV | |
6 V < VBAT < 8V | 170 | mV | ||||
ISENSE | Current sourced out of VSENSE Pin | 50 | 70 | μA |
Input Spike Filter
Symbol | Parameter | Conditions | Min. | Typ. | Max. | Unit |
---|---|---|---|---|---|---|
TSPIKE | Input spike filter | Delay on rising and falling edge of Input | 13 | μs |
Input Control Conditions
Symbol | Parameter | Conditions | Min. | Typ. | Max. | Unit |
---|---|---|---|---|---|---|
VINL | Input low voltage | 1.2 | 1.5 | V | ||
VINH | Input high voltage | 1.8 | 2.0 | V | ||
VINHys | Input voltage hysteresis | 0.3 | V | |||
IIN | Input current (see Figure 6) | RA = 200 kΩ | 0.5 | mA | ||
RA = 5.2 kΩ | 15 | mA |
Gate Output Voltage Max
Symbol | Parameter | Conditions | Min. | Typ. | Max. | Unit |
---|---|---|---|---|---|---|
VOUTPUT(MAX) | Max Gate Output Voltage | 16 kΩ pulldown resistor | 4.5 | 5.25 | 6 | V |
VOUTPUT(LOW) | Min Gate Output Voltage | (0 mA < IGATE < 0.4 mA at TA = 25 °C) | 0.0 | 0.4 | V |
Diagnostic Functions and Protection
Symbol | Parameter | Conditions | Min. | Typ. | Max. | Unit |
---|---|---|---|---|---|---|
RA | Resistor for input reference current (Figure 6) | 5.2 | 200 | kΩ | ||
CCSSDMIN | Minimum dwell time capacitor | 2.3 | nF | |||
TDMAX | Maximum dwell time | (CSSD = 20 nF) | 30 | 60 | ms | |
ISLEW | Soft-Shut-Down slew rate | (IC: 80-20% ICLIM) | 0.7 | 1.5 | A/ms | |
ICSSD1 | CSSD Pin current for TDMAX | 0.75 | 1.0 | 1.25 | μA |
Typical Performance Characteristics
Input and Spike Filter
When the input signal voltage reaches VINH, the IGBT will be switched on, charging the coil. When the input voltage goes below VINL, the coil current through the IGBT will be turned off. If the FAD1100-F085 is in SSD (Soft Shut Down) mode, the input signal control is disabled. After an SSD sequence, input control will be re-enabled after the input has reached a valid low. Positive and negative spikes of less than TSPIKE duration at the input line will be filtered out and will not turn on/off the IGBT.
Maximum Dwell Time and Soft-Shutdown (SSD)
When the IGBT is turned on, a delay timer, dependent on the value of the external CSSD capacitor, is started. If a valid falling edge has not been received after the time TDMAX, the IGBT will be turned off slowly. The coil current will not exceed a slew rate of typical 1.5 A/ms. If a valid falling edge is received after the time TDMAX, the edge will be ignored and the soft shutdown will be completed. The IGBT cannot be subsequently turned on until a valid rising edge is detected.
If the CSSD pin is shorted to ground, the maximum dwell time and SSD functions will be disabled. For CSSD capacitor smaller than 2.3 nF, the maximum dwell time and SSD functions might be disabled and cannot be guaranteed. For CSSD capacitor above 2.3 nF, the maximum dwell time is active.
Figure 4 illustrates the Dwell Time and Soft-Shut-Down behavior, showing VIN, IClim, Ic, Tdmax, Islew, and the SSD Phase over time.
Relationship between CSSD Capacitor and Max Dwell Time
Figure 5 shows the relationship between the CSSD capacitor and the maximum dwell time (TDMAX). As the capacitance increases, the maximum dwell time also increases linearly.
Relationship between Signal Input Current and RA Resistance
Figure 6 shows the relationship between the signal input current and the RA resistance. The input current is inversely proportional to the RA resistance.
Package Dimensions
The FAD1100-F085 is available in an SOIC8 package (CASE 751EB, ISSUE A). The dimensions and land pattern recommendation are provided in detail, including notes on conformance to JEDEC standards and dimension units.
Revision History
Revision | Description of Changes | Date |
---|---|---|
PO | Initial document version release. | 7/15/2025 |
Additional Information
For technical publications, visit the Technical Library at www.onsemi.com/design/resources/technical-documentation. For general information about onsemi, visit www.onsemi.com. For online support, visit www.onsemi.com/support or contact your local Sales Representative.
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