DGD0506A High-Frequency Half-Bridge Gate Driver
The DGD0506A is NOT RECOMMENDED FOR NEW DESIGNS. PLEASE CONTACT US.
Description
The DGD0506A is a high-frequency half-bridge gate driver capable of driving n-channel MOSFETs in a half-bridge configuration. The floating high-side driver is rated up to 50V. The DGD0506A logic inputs are compatible with standard TTL and CMOS levels (down to 3.3V) to interface easily with MCUs. UVLO for high-side and low-side will protect a MOSFET with loss of supply. To protect MOSFETs, cross conduction prevention logic prevents the HO and LO outputs from being on at the same time. Fast and well-matched propagation delays allow a higher switching frequency, enabling a smaller, more compact power switching design using smaller associated components. The DGD0506A is offered in the W-DFN3030-10 (Type TH) and MSOP-10 packages and operates over an extended -40°C to +125°C temperature range.
Features
- 50V Floating High-Side Driver
- Drives Two N-Channel MOSFETs in a Half-Bridge Configuration
- 1.5A Source/2.0A Sink Output Current Capability
- Internal Bootstrap Diode Included
- Undervoltage Lockout for High-Side and Low-Side Drivers
- Programmable Deadtime to Protect MOSFETs
- Logic Input (IN and EN) 3.3V Capability
- Ultra-Low Standby Currents (< 1μA)
- Extended Temperature Range: -40°C to +125°C
- Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2)
- Halogen and Antimony Free. "Green" Device (Note 3)
- For automotive applications requiring specific change control (i.e. parts qualified to AEC-Q100/101/104/200, PPAP capable, and manufactured in IATF 16949 certified facilities), please contact Diodes or your local Diodes representative. https://www.diodes.com/quality/product-definitions/
Applications
- DC-DC converters
- Motor control
- Battery-powered hand tools
- eCig devices
- Class D power amplifiers
Mechanical Data
Packages: W-DFN3030-10, MSOP-10
Package Material: Molded Plastic. "Green" Molding Compound. UL Flammability Classification Rating 94V-0
Moisture Sensitivity: Level 3 per J-STD-020
Terminals: Finish - Matte Tin Plated Leads, Solderable per MIL-STD-202, Method 208
Weight
W-DFN3030-10 (Type TH): 0.017 grams (Approximate)
MSOP-10: 0.0286 grams (Approximate)
Typical Configuration
The typical configuration shows a standard half-bridge circuit. The DGD0506A drives two n-channel MOSFETs, one on the high side and one on the low side. The high-side driver is connected to the VB supply, while the low-side driver is referenced to COM. Input signals IN and EN control the gate drive outputs HO (high-side) and LO (low-side).
Notes
- 1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS), 2011/65/EU (RoHS 2) & 2015/863/EU (RoHS 3) compliant.
- 2. See https://www.diodes.com/quality/lead-free/ for more information about Diodes Incorporated's definitions of Halogen- and Antimony-free, "Green" and Lead-free.
- 3. Halogen- and Antimony-free "Green" products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and <1000ppm antimony compounds.
Ordering Information
| Orderable Part Number | Package | Marking | Reel Size (inches) | Tape Width (mm) | Qty. | Carrier |
|---|---|---|---|---|---|---|
| DGD0506AFN-7 | W-DFN3030-10 (Type TH) | DGD0506A | 7 | 8 | 3,000 | Reel |
| DGD0506AM10-13 | MSOP-10 | DGD0506A | 13 | 12 | 2,500 | Reel |
Note 4: For packaging details, go to https://www.diodes.com/design/support/packaging/diodes-packaging/.
Marking Information
The marking information provides details on how the DGD0506A product type, year, and week are encoded on the device for both W-DFN3030-10 (Type TH) and MSOP-10 packages.
Pin Diagrams
W-DFN3030-10 (Type TH)
Top View: Illustrates the pin layout for the W-DFN3030-10 package, showing the arrangement of pins 1 through 10 and the exposed pad.
MSOP-10
Top View: Illustrates the pin layout for the MSOP-10 package, showing the arrangement of pins 1 through 10 and the exposed pad.
Pin Descriptions
| Pin Number | Pin Name | Function |
|---|---|---|
| 1 | VCC | Low-Side and Logic Supply |
| 2 | VB | High-Side Floating Supply |
| 3 | HO | High-Side Gate Drive Output |
| 4 | VS | High-Side Floating Supply Return |
| 5 | NC | No Connect (No Internal Connection) |
| 6 | DT | Deadtime Control |
| 7 | EN | Logic Input Enable, a Logic Low turns off Gate Driver |
| 8 | IN | Logic Input for High-Side and Low-Side Gate Driver Outputs (HO and LO), in Phase with HO |
| 9 | COM | Low-Side and Logic Return |
| 10 | LO | Low-Side Gate Drive Output |
| PAD | Substrate | Connect to COM on PCB |
Functional Block Diagram
The DGD0506A integrates several functional blocks to manage high-frequency half-bridge driving. Key components include UV Detect circuits for both high-side and low-side supplies, a Dead Time Control block, and a High-Voltage (HV) Level Shift stage. Input signals (IN, EN, DT) are processed, and the Dead Time Control ensures proper sequencing between the high-side output (HO) and the low-side output (LO) to prevent cross-conduction. A delay block is also present. The outputs HO and LO drive external N-channel MOSFETs, with HO connected to the high-side driver and LO to the low-side driver, referenced to COM.
Absolute Maximum Ratings
| Characteristic | Symbol | Value | Unit |
|---|---|---|---|
| High-Side Floating Positive Supply Voltage | VB | -0.3 to +60 | V |
| High-Side Floating Negative Supply Voltage | VS | VB-14 to VB+0.3 | V |
| High-Side Floating Output Voltage | VHO | VS-0.3 to VB+0.3 | V |
| Offset Supply Voltage Transient | dVs/dt | 50 | V/ns |
| Logic and Low-Side Fixed Supply Voltage | VCC | -0.3 to +14 | V |
| Low-Side Output Voltage | VLO | -0.3 to VCC+0.3 | V |
| Logic Input Voltage (IN and EN) | VIN | -0.3 to VCC+0.3 | V |
Thermal Characteristics – W-DFN3030-10 (Type TH)
| Characteristic | Symbol | Value | Unit |
|---|---|---|---|
| Power Dissipation Linear Derating Factor (Note 5) | PD | 0.4 | W |
| Thermal Resistance, Junction to Ambient (Note 5) | RθJA | 64 | °C/W |
| Thermal Resistance, Junction to Case (Note 5) | RθJC | 42 | °C/W |
| Operating Temperature | TJ | +150 | °C |
| Lead Temperature (Soldering, 10s) | TL | +300 | °C |
| Storage Temperature Range | TSTG | -55 to +150 | °C |
Note 5: When mounted on a standard JEDEC 2-layer FR-4 board.
Thermal Characteristics – MSOP-10
| Characteristic | Symbol | Value | Unit |
|---|---|---|---|
| Power Dissipation Linear Derating Factor (Note 6) | PD | 0.75 | W |
| Thermal Resistance, Junction to Ambient (Note 6) | RθJA | 166 | °C/W |
| Thermal Resistance, Junction to Case (Note 6) | RθJC | 32 | °C/W |
| Operating Temperature | TJ | +150 | °C |
| Lead Temperature (Soldering, 10s) | TL | +300 | °C |
| Storage Temperature Range | TSTG | -55 to +150 | °C |
Note 6: When mounted on a standard JEDEC 2-layer FR-4 board with minimum recommended pad layout.
Recommended Operating Conditions
| Parameter | Symbol | Min | Max | Unit |
|---|---|---|---|---|
| High-Side Floating Supply | VB | VS + 8 | VS + 14 | V |
| High-Side Floating Supply Offset Voltage | VS | (Note 7) | 50 (Note 8) | V |
| High-Side Floating Output Voltage | VHO | VS | VB | V |
| Logic and Low-Side Fixed Supply Voltage | VCC | 8 | 14 | V |
| Low-Side Output Voltage | VLO | 0 | VCC | V |
| Logic Input Voltage (IN and EN) | VIN | 0 | 5 | V |
| Ambient Temperature | TA | -40 | +125 | °C |
Notes: 7. Logic operation for VS of -5V to +50V. 8. Provided VB does not exceed absolute maximum rating of 60V.
DC Electrical Characteristics
(VCC = VBS = 12V, COM = VS = 0, @TA = +25°C, unless otherwise specified.) (Note 9)
| Parameter | Symbol | Min | Typ | Max | Unit | Condition |
|---|---|---|---|---|---|---|
| Logic "1" Input Voltage | VIH | 2.4 | -- | -- | V | -- |
| Logic "0" Input Voltage | VIL | -- | -- | 0.8 | V | -- |
| Enable Logic "1" Input Voltage | VENIH | 1.5 | -- | -- | V | -- |
| Enable Logic "0" Input Voltage | VENIL | -- | -- | 0.7 | V | -- |
| Input Voltage Hysteresis | VINHYS | -- | 0.6 | -- | V | -- |
| High-Level Output Voltage, VBIAS - VO | VOH | -- | 0.45 | 0.6 | V | IO+ = 100mA |
| Low-Level Output Voltage, VO | VOL | -- | 0.15 | 0.22 | V | IO- = 100mA |
| Offset Supply Leakage Current | ILK | -- | 10 | 50 | μA | VB = VS = 60V |
| VCC Shutdown Supply Current | ICCSD | -- | 0 | 1 | μA | VIN = 0 or 5V, VEN = 0 |
| VCC Quiescent Supply Current | ICCQ | -- | 0.28 | 0.5 | mA | VIN = 0 or 5V |
| VCC Operating Supply Current | ICCOP | -- | 7.6 | -- | mA | fS = 500kHz, CL = 1000pF |
| VBS Quiescent Supply Current | IBSQ | -- | 32 | 100 | μA | VIN = 0 or 5V |
| VBS Operating Supply Current | IBSOP | -- | 7.6 | -- | mA | fS = 500kHz, CL = 1000pF |
| Logic "1" Input Bias Current | IIN+ | -- | 25 | 60 | μA | VIN = 5V |
| Logic "0" Input Bias Current | IIN- | -- | 0 | 1 | μA | VIN = 0 |
| VBS Supply Undervoltage Positive Going Threshold | VBSUV+ | 6.0 | 7.0 | 8.0 | V | -- |
| VBS Supply Undervoltage Negative Going Threshold | VBSUV- | 5.6 | 6.6 | 7.6 | V | -- |
| VCC Supply Undervoltage Positive Going Threshold | VCCUV+ | 6.0 | 7.0 | 8.0 | V | -- |
| VCC Supply Undervoltage Negative Going Threshold | VCCUV- | 5.6 | 6.6 | 7.6 | V | -- |
| Output High Short-Circuit Pulsed Current | IO+ | 0.9 | 1.5 | -- | A | VO = 0, PW ≤ 10μs |
| Output Low Short-Circuit Pulsed Current | IO- | 1.5 | 2.0 | -- | A | VO = 15V, PW ≤ 10μs |
| Forward Voltage of Bootstrap Diode | VF1 | -- | 0.67 | -- | V | IF = 100μA |
| Forward Voltage of Bootstrap Diode | VF2 | -- | 1.7 | -- | V | IF = 100mA |
Note 9: The VIN and IIN parameters are applicable to the two logic pins: IN and EN. The VO and IO parameters are applicable to the respective output pins: HO and LO.
AC Electrical Characteristics
(VCC = VBS = 12V, COM = VS = 0, CL = 1000pF, @TA = +25°C, unless otherwise specified.)
| Parameter | Symbol | Min | Typ | Max | Unit | Condition |
|---|---|---|---|---|---|---|
| Turn-On Propagation Delay, HO & LO | ton | 65 | 96 | 125 | ns | RDT = 10kΩ |
| Turn-Off Propagation Delay, HO & LO | toff | 350 | 463 | 580 | ns | RDT = 100kΩ |
| Turn-On Rise Time | tr | -- | 22 | 56 | ns | -- |
| Turn-Off Fall Time | tf | -- | 17 | 35 | ns | -- |
| Delay Matching | tDM | -- | 12 | 25 | ns | -- |
| Deadtime: tDT LO-HO & tDT HO-LO | tDT | 40 | 70 | 100 | ns | RDT = 10kΩ |
| 300 | 430 | 560 | ns | RDT = 100kΩ | ||
| Deadtime Matching | tMDT | -- | -- | 50 | ns | RDT = 100kΩ |
Timing Waveforms
Figure 1: Switching Time Waveform Definitions. Illustrates definitions for turn-on delay (ton), turn-off delay (toff), rise time (tr), fall time (tf), and deadtime (tDT) for HO and LO outputs relative to the IN signal.
Figure 2: Input / Output Timing Diagram. Shows the relationship between the IN and EN input signals and the resulting HO and LO output signals over time.
Typical Performance Characteristics
(VCC = 12V, @TA = +25°C, unless otherwise specified.)
Figure 3: Turn-on Propagation Delay vs. Supply Voltage. Displays how turn-on propagation delay for both high-side and low-side drivers varies with supply voltage.
Figure 4: Turn-on Propagation Delay vs. Temperature. Shows turn-on propagation delay for high-side and low-side drivers as a function of temperature.
Figure 5: Turn-off Propagation Delay vs. Supply Voltage. Illustrates turn-off propagation delay for high-side and low-side drivers against supply voltage.
Figure 6: Turn-off Propagation Delay vs. Temperature. Displays turn-off propagation delay for high-side and low-side drivers as a function of temperature.
Figure 7: Rise Time vs. Supply Voltage. Shows the rise time for high-side and low-side drivers as a function of supply voltage.
Figure 8: Rise Time vs. Temperature. Displays the rise time for high-side and low-side drivers as a function of temperature.
Figure 9: Fall Time vs. Supply Voltage. Illustrates the fall time for high-side and low-side drivers against supply voltage.
Figure 10: Fall Time vs. Temperature. Shows the fall time for high-side and low-side drivers as a function of temperature.
Figure 11: Quiescent Current vs. Supply Voltage. Displays quiescent supply currents (IBSQ and ICCQ) for both VBS and VCC supplies as a function of supply voltage.
Figure 12: Quiescent Current vs. Temperature. Shows quiescent supply currents (IBSQ and ICCQ) as a function of temperature.
Figure 13: Delay Matching vs. Supply Voltage. Illustrates the delay matching (tDM(ON) and tDM(OFF)) for high-side and low-side drivers as a function of supply voltage.
Figure 14: Delay Matching vs. Temperature. Displays the delay matching (tDM(ON) and tDM(OFF)) as a function of temperature.
Figure 15: Output Source Current vs. Supply Voltage. Shows the output source current (IO+) for high-side and low-side drivers as a function of supply voltage.
Figure 16: Output Source Current vs. Temperature. Displays the output source current (IO+) for high-side and low-side drivers as a function of temperature.
Figure 17: Output Sink Current vs. Supply Voltage. Illustrates the output sink current (IO-) for high-side and low-side drivers as a function of supply voltage.
Figure 18: Output Sink Current vs. Temperature. Shows the output sink current (IO-) for high-side and low-side drivers as a function of temperature.
Figure 19: Logic Input Voltage vs. Supply Voltage. Displays the logic input voltage thresholds (VIH and VIL) for the IN/EN pins as a function of supply voltage.
Figure 20: Logic Input Voltage vs. Temperature. Shows the logic input voltage thresholds (VIH and VIL) as a function of temperature.
Figure 21: Enable Input Voltage vs. Supply Voltage. Displays the enable input voltage thresholds (VENIH and VENIL) as a function of supply voltage.
Figure 22: Enable Input Voltage vs. Temperature. Shows the enable input voltage thresholds (VENIH and VENIL) as a function of temperature.
Figure 23: VCC UVLO vs. Temperature. Illustrates the VCC undervoltage lockout thresholds (VCCUV+ and VCCUV-) as a function of temperature.
Figure 24: Offset Supply Leakage Current vs. Temperature. Displays the offset supply leakage current as a function of temperature.
Package Outline Dimensions
W-DFN3030-10 (Type TH)
| Dim | Min | Max | Typ |
|---|---|---|---|
| A | 0.70 | 0.80 | 0.75 |
| A1 | -- | 0.05 | 0.02 |
| A3 | 0.18 | 0.25 | 0.20 |
| b | 0.18 | 0.30 | 0.25 |
| D | 2.90 | 3.10 | 3.00 |
| D2 | 2.40 | 2.60 | 2.50 |
| e | 0.50BSC | ||
| e1 | 2.00BSC | ||
| E | 2.90 | 3.10 | 3.00 |
| E2 | 1.45 | 1.65 | 1.55 |
| h | 0.20 | 0.30 | 0.25 |
| L | 0.30 | 0.50 | 0.40 |
All Dimensions in mm
MSOP-10
| Dim | Min | Max | Typ |
|---|---|---|---|
| A | -- | 1.10 | -- |
| A1 | 0.05 | 0.15 | 0.10 |
| A2 | 0.75 | 0.95 | 0.86 |
| A3 | 0.29 | 0.49 | 0.39 |
| b | 0.17 | 0.27 | 0.20 |
| c | 0.08 | 0.23 | 0.15 |
| D | 2.95 | 3.05 | 3.00 |
| e | 0.50 | ||
| E | 4.80 | 5.00 | 4.90 |
| E1 | 2.95 | 3.05 | 3.00 |
| E3 | 2.85 | 3.05 | 2.95 |
| L | 0.40 | 0.80 | 0.60 |
| X | 0.750 | ||
| Y | 0.750 | ||
| a | 0° | 8° | 4° |
All Dimensions in mm
Suggested Pad Layout
W-DFN3030-10 (Type TH)
Describes the suggested pad layout dimensions (C, X, X1, X2, Y, Y1, Y2) in mm for the W-DFN3030-10 package.
MSOP-10
Describes the suggested pad layout dimensions (C, X, Y, Y1) in mm for the MSOP-10 package.
Note 10: For high-voltage applications, industry sector guidelines for creepage and clearance distances should be considered.
Important Notice
Diodes Incorporated disclaims all warranties, express or implied, regarding the information in this document. The information is for informational purposes only and intended for skilled engineers. Users are responsible for ensuring their applications comply with legal and regulatory requirements and safety standards. Diodes assumes no liability for application-related information or feedback. Products may be covered by patents and trademarks. Diodes' products are subject to standard terms and conditions of sale. Products and technology must not be used in violation of applicable laws and regulations. Diodes does not warrant that the information is error-free but reserves the right to make changes. The English version of this document is the definitive one. Unauthorized copying or distribution is prohibited.
