DGD05473 High-Frequency High-Side and Low-Side Gate Driver
Note: The DGD05473 is not recommended for new designs. Please contact Diodes Incorporated for alternatives.
Description
The DGD05473 is a high-frequency gate driver capable of driving n-channel MOSFETs. It features a floating high-side driver rated up to 50V. The logic inputs are compatible with standard TTL and CMOS levels down to 3.3V for easy interfacing with MCUs. Undervoltage lockout (UVLO) for both high-side and low-side drivers protects MOSFETs during supply loss. Cross-conduction prevention logic ensures that the HO and LO outputs are never active simultaneously. Fast and well-matched propagation delays enable higher switching frequencies, leading to more compact power switching designs. An internal bootstrap diode is included to minimize space. The DGD05473 is available in the V-DFN3030-10 package and operates within an extended temperature range of -40°C to +125°C.
Features
- 50V Floating High-Side Driver
- Drives Two N-Channel MOSFETs in a Half-Bridge Configuration
- 1.5A Source / 2.5A Sink Output Current Capability
- Internal Bootstrap Diode Included
- Undervoltage Lockout for High-Side and Low-Side Drivers
- Delay Matching Maximum of 5ns
- Propagation Delay Typical of 20ns
- Logic Input (HIN, LIN, and EN) 3.3V Capability
- Ultra-Low Standby Currents (< 1μA)
- Extended Temperature Range: -40°C to +125°C
- Totally Lead-Free & Fully RoHS Compliant
- Halogen and Antimony Free. "Green" Device
- For automotive applications requiring specific change control, contact Diodes representative.
Applications
- DC-DC converters
- Motor control
- Battery-powered hand tools
- eCig devices
- Class-D power amplifiers
Mechanical Data
- Package: V-DFN3030-10
- Package Material: Molded Plastic, "Green" Molding Compound, UL Flammability Classification Rating 94V-0
- Lead Level: Level 3 per J-STD-020
- Finish: Matte Tin Finish, Solderable
- Weight: 0.017 grams (Approximate)
Pin Assignments
The V-DFN3030-10 (Standard) package has 10 pins. The top view shows pins 1-5 and 10, while the bottom view shows pins 6-9. A substrate pad is also present.
| Pin Number | Pin Name | Function |
|---|---|---|
| 1 | Vcc | Low-Side and Logic Supply |
| 2 | NC | No Connect (No Internal Connection) |
| 3 | VB | High-Side Floating Supply |
| 4 | HO | High-Side Gate Drive Output |
| 5 | Vs | High-Side Floating Supply Return |
| 6 | EN | Logic Input Enable, a Logic Low turns off Gate Driver |
| 7 | HIN | Logic Input for High-Side Gate Driver, in Phase with HO |
| 8 | LIN | Logic Input for Low-Side Gate Driver, in Phase with LO |
| 9 | COM | Low-Side and Logic Return |
| 10 | LO | Low-Side Gate Drive Output |
| PAD | Substrate | Connect to COM on PCB |
Functional Block Diagram
The functional block diagram illustrates the internal structure of the DGD05473, including UV detection, level shifting, cross-conduction prevention logic, and delay elements controlling the high-side (HO) and low-side (LO) gate drive outputs.
Absolute Maximum Ratings
These ratings must not be exceeded to avoid device damage. Ratings are specified at a certain temperature and may be subject to derating.
| Characteristic | Symbol | Value | Unit |
|---|---|---|---|
| High-Side Floating Positive Supply Voltage | VB | -0.3 to +60 | V |
| High-Side Floating Negative Supply Voltage | Vs | VB-14 to VB+0.3 | V |
| High-Side Floating Output Voltage | VHO | VS-0.3 to VB+0.3 | V |
| Offset Supply Voltage Transient | dVs / dt | 50 | V/ns |
| Logic and Low-Side Fixed Supply Voltage | Vcc | -0.3 to +14 | V |
| Low-Side Output Voltage | VLO | -0.3 to Vcc+0.3 | V |
| Logic-Input Voltage (HIN, LIN and EN) | VIN | -0.3 to Vcc+0.3 | V |
| Bootstrap Diode Current (Pulsed < 10μs) | IBD | - | A |
Thermal Characteristics
| Characteristic | Symbol | Value | Unit |
|---|---|---|---|
| Power Dissipation Linear Derating Factor (Note 5) | PD | 0.4 | W/°C |
| Thermal Resistance, Junction to Ambient (Note 5) | ROJA | 64 | °C/W |
| Thermal Resistance, Junction to Case (Note 5) | ROJC | - | °C/W |
| Operating Temperature | TA | -40 to +125 | °C |
| Lead Temperature (Soldering, 10s) | TL | +260 | °C |
| Storage Temperature Range | Tstg | -65 to +150 | °C |
Note 5: When mounted on a standard JEDEC 2-layer FR-4 board.
Recommended Operating Conditions
| Parameter | Symbol | Min | Typ | Max | Unit | |
|---|---|---|---|---|---|---|
| High-Side Floating Supply | VB | Vs + 4.2 | - | Vs + 14 | V | |
| High-Side Floating Supply Offset Voltage | VBS | (Note 6) | 1.2 | (Note 6) | 50 (Note 7) | V |
| High-Side Floating Output Voltage | VHO | Vs | - | VB | V | |
| Logic and Low-Side Fixed Supply Voltage | Vcc | 4.5 (Note 8) | - | 14 | V | |
| Low-Side Output Voltage | VLO | 0 | - | Vcc | V | |
| Logic-Input Voltage (HIN, LIN and EN) | VIN | 0 | - | 5 | V | |
| Ambient Temperature | TA | -40 | - | +125 | °C |
Notes:
6. Logic operation for Vs of -5V to +50V.
7. Provided VB does not exceed absolute maximum rating of 60V.
8. For operation of Vcc = 4.5V to 4.9V, an external bootstrap Schottky diode (0.3V Voltage drop, 1A) and resistor are not required.
DC Electrical Characteristics
Characteristics for Vcc = VBS = 12V, @ TA = +25°C, unless otherwise specified.
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions |
|---|---|---|---|---|---|---|
| Logic "1" Input Voltage | VIH | - | 2.4 | - | V | - |
| Logic "0" Input Voltage | VIL | - | 0.8 | - | V | - |
| Enable Logic "1" Input Voltage | VENIH | - | 1.6 | - | V | - |
| Enable Logic "0" Input Voltage | VENIL | - | 0.7 | - | V | - |
| Input Voltage Hysteresis | VINHYS | - | 0.6 | - | V | - |
| Enable Input Voltage Hysteresis | VENINHYS | - | 0.1 | - | V | - |
| High-Level Output Voltage, VBIAS - VO | VOH | - | 0.45 | 0.6 | V | lo+ = 100mA |
| Low-Level Output Voltage, Vo | VOL | - | 0.15 | 0.22 | V | lo- = 100mA |
| Offset Supply Leakage Current | ILK | - | 1 | 5 | μA | VB VS = 60V |
| Vcc Shutdown Supply Current | ICCSD | - | 0 | 1 | μA | VIN = 0 or 5V, VEN = 0 |
| Vcc Quiescent Supply Current | ICCQ | - | 130 | 200 | μA | VIN = 0 or 5V |
| Vcc Operating Supply Current | ICCOP | - | 7.3 | - | mA | fs = 500kHz, CL = 1000pF |
| VBS Quiescent Supply Current | IBSQ | - | 40 | 100 | μA | VIN = 0 or 5V |
| VBS Operating Supply Current | IBSOP | - | 7.3 | - | mA | fs = 500kHz, CL = 1000pF |
| Logic "1" Input Bias Current | IIN+ | - | 50 | - | μA | VIN = 5V |
| Logic "0" Input Bias Current | IIN- | - | 5 | - | μA | VIN = 0 |
| Enable Logic "1" Input Bias Current | IENIN+ | - | 43 | 60 | μA | VIN = 5V |
| Enable Logic "0" Input Bias Current | IENIN- | - | 0 | 5 | μA | VIN = 0 |
| VBS Supply Undervoltage Positive Going Threshold | VBSUV+ | 3.3 | 3.8 | 4.4 | V | - |
| VBS Supply Undervoltage Negative Going Threshold | VBSUV- | 2.9 | 3.3 | 3.9 | V | - |
| Vcc Supply Undervoltage Positive Going Threshold | VccUv+ | 3.3 | 3.8 | 4.4 | V | - |
| Vcc Supply Undervoltage Negative Going Threshold | VccUV- | 2.9 | 3.3 | 3.9 | V | - |
| Output High Short-Circuit Pulsed Current | lo+ | 1.0 | 1.5 | A | Vo = 0, Pw ≤ 10μs | |
| Output Low Short-Circuit Pulsed Current | lo- | 1.9 | 2.5 | A | Vo = 15V, Pw ≤ 10μs | |
| Forward Voltage of Bootstrap Diode | VF1 | - | 0.67 | - | V | IF = 100μA |
| Forward Voltage of Bootstrap Diode | VF2 | - | 1.2 | - | V | IF = 100mA |
Note 9: The VIN and IIN parameters are applicable to the logic pins: HIN, LIN and EN. The Vo and lo parameters are applicable to the respective output pins: HO and LO.
AC Electrical Characteristics
Characteristics for Vcc = VBS = 12V, COM = Vs = 0, CL = 1000pF, @ TA = +25°C, unless otherwise specified.
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions |
|---|---|---|---|---|---|---|
| Turn-On Propagation Delay | ton | - | 20 | 35 | ns | - |
| Turn-Off Propagation Delay | toff | - | 23 | 56 | ns | Vs = 50V |
| Delay Matching, HO & LO Turn-On | tDM | - | 5 | - | ns | - |
| Turn-On Rise Time | tr | - | 16 | 30 | ns | - |
| Turn-Off Fall Time | tf | - | 12 | 25 | ns | - |
Timing Waveforms
The document includes figures illustrating switching time waveform definitions, delay matching waveform definitions, and input/output timing diagrams. These diagrams visually represent the operational timing characteristics of the DGD05473.
Typical Performance Characteristics
The document presents various graphs showing the typical performance characteristics of the DGD05473 across different supply voltages and temperatures. These include:
- Turn-On Propagation Delay vs. Supply Voltage and Temperature
- Turn-Off Propagation Delay vs. Supply Voltage and Temperature
- Rise Time vs. Supply Voltage and Temperature
- Fall Time vs. Supply Voltage and Temperature
- Quiescent Current vs. Supply Voltage and Temperature
- Delay Matching vs. Supply Voltage and Temperature
- Output Source Current vs. Supply Voltage and Temperature
- Output Sink Current vs. Supply Voltage and Temperature
- Logic 1 Input Voltage vs. Supply Voltage and Temperature
- Logic 0 Input Voltage vs. Supply Voltage and Temperature
- Offset Supply Leakage Current vs. Temperature
Package Outline Dimensions
Detailed dimensions for the V-DFN3030-10 (Standard) package are provided in millimeters. This includes dimensions for the overall package, lead frame, and other critical features. A link to the Diodes Incorporated website for the latest version of package outlines is also provided.
Suggested Pad Layout
A suggested pad layout for the V-DFN3030-10 (Standard) package is shown, with dimensions provided in millimeters. This layout is intended to facilitate proper PCB design for the component. A link to the Diodes Incorporated website for the latest version of suggested pad layouts is also provided.
Important Notice
Diodes Incorporated makes no warranties regarding the information in this document. Customers are responsible for ensuring their applications comply with all applicable legal and regulatory requirements, safety standards, and functional-safety requirements. Diodes assumes no liability for any application-related information or support provided. Products may be covered by patents. Diodes' products are subject to their standard Conditions of Sale. Diodes' products and technology may not be used in violation of applicable laws and regulations. While efforts have been made to ensure accuracy, this document may contain inaccuracies. The English version of this document is the final and determinative format. Unauthorized copying or distribution is prohibited.
