Description
The DGD0507A is a high-frequency gate driver capable of driving n-channel MOSFETs. The floating high-side driver is rated up to 50V. The DGD0507A logic inputs are compatible with standard TTL and CMOS levels (down to 3.3V) to interface easily with MCUs. UVLO (Undervoltage Lockout) for high-side and low-side will protect a MOSFET with loss of supply. Cross conduction prevention logic prevents the HO and LO outputs from being on at the same time. Fast and well-matched propagation delays enable higher switching frequencies, leading to smaller, more compact power switching designs. An internal bootstrap diode is included to minimize space. The DGD0507A is offered in the W-DFN3030-10 (Type TH) package and operates over an extended temperature range of -40°C to +125°C.
Applications
- DC-DC converters
- Motor control
- Battery-powered hand tools
- eCig devices
- Class D power amplifiers
Features
- 50V Floating High-side Driver
- Drives Two N-channel MOSFETs in a Half-Bridge Configuration
- 1.5A Source / 2.0A Sink Output Current Capability
- Internal Bootstrap Diode Included
- Undervoltage Lockout for High-Side and Low-Side Drivers
- Delay Matching: Typical of 5ns
- Propagation Delay: Typical of 20ns
- Logic Input (HIN, LIN, EN) 3.3V Capability
- Ultra-Low Standby Currents (< 1µA)
- Extended Temperature Range: -40°C to +125°C
- Totally Lead-Free & Fully RoHS Compliant
- Halogen and Antimony free. “Green” Device
- For automotive applications requiring specific change control (e.g., AEC-Q100/101/104/200 qualified, PPAP capable, IATF 16949 certified facilities), contact Diodes Incorporated or a local representative. More information on quality definitions.
Mechanical Data
- Package: W-DFN3030-10
- Package Material: Molded Plastic. “Green” Molding Compound. UL Flammability Classification Rating 94V-0.
- Moisture Sensitivity: Level 3 per J-STD-020.
- Terminals: Matte Tin Finish, Solderable per MIL-STD-202, Method 208.
- Weight: 0.017 grams (Approximate).
Package Outline Dimensions
Refer to Diodes.com/package-outlines.html for the latest version.
W-DFN3030-10 (Type TH) Dimensions (in mm):
| Dim | Min | Max | Typ |
|---|---|---|---|
| A | 0.70 | 0.80 | 0.75 |
| A1 | -- | 0.05 | 0.02 |
| A3 | 0.18 | 0.25 | 0.20 |
| b | 0.18 | 0.30 | 0.25 |
| D | 2.90 | 3.10 | 3.00 |
| D2 | 2.40 | 2.60 | 2.50 |
| e | 0.50BSC | ||
| e1 | 2.00BSC | ||
| E | 2.90 | 3.10 | 3.00 |
| E2 | 1.45 | 1.65 | 1.55 |
| h | 0.20 | 0.30 | 0.25 |
| L | 0.30 | 0.50 | 0.40 |
Suggested Pad Layout
Refer to Diodes.com/package-outlines.html for the latest version.
W-DFN3030-10 (Type TH) Pad Dimensions (in mm):
| Dimensions | Value (in mm) |
|---|---|
| C | 0.500 |
| X | 0.300 |
| X1 | 2.300 |
| X2 | 2.600 |
| Y | 0.600 |
| Y1 | 3.300 |
| Y2 | 1.650 |
Ordering Information
| Orderable Part Number | Package | Marking | Reel Size (inches) | Tape Width (mm) | Packing Qty. | Carrier |
|---|---|---|---|---|---|---|
| DGD0507AFN-7 | W-DFN3030-10 (Type TH) | DGD0507A | 7 | 8 | 3,000 | Reel |
Notes:
- No purposely added lead. Fully EU Directive 2002/95/EC (RoHS), 2011/65/EU (RoHS 2) & 2015/863/EU (RoHS 3) compliant.
- See https://www.diodes.com/quality/lead-free/ for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free, "Green" and Lead-free.
- Halogen- and Antimony-free "Green" products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and <1000ppm antimony compounds.
- For packaging details, go to https://www.diodes.com/design/support/packaging/diodes-packaging/.
Marking Information
W-DFN3030-10 (Type TH)
DGD0507A = Product Type Marking Code
YY = Year (e.g., 25 = 2025)
WW = Week (01 to 53)
Example Marking: DGD0507A YYWW
Pin Assignments
Top View: W-DFN3030-10 (Type TH)
| Pin Number | Pin Name | Function |
|---|---|---|
| 1 | VCC | Low-Side and Logic Supply |
| 2 | NC | No Connect (No Internal Connection) |
| 3 | VB | High-Side Floating Supply |
| 4 | HO | High-Side Gate Drive Output |
| 5 | VS | High-Side Floating Supply Return |
| 6 | EN | Logic Input Enable, a Logic Low turns off Gate Driver |
| 7 | HIN | Logic Input for High-Side Gate Driver, in Phase with HO |
| 8 | LIN | Logic Input for Low-Side Gate Driver, in Phase with LO |
| 9 | COM | Low-Side and Logic Return |
| 10 | LO | Low-Side Gate Drive Output |
| PAD | Substrate | Connect to COM on PCB |
Functional Block Diagram
The DGD0507A integrates several functional blocks to manage high-side and low-side MOSFET driving. Key components include:
- UV Detect: Monitors supply voltages for undervoltage conditions.
- Level Shift: Interfaces logic inputs with the high-side driver.
- High Side Driver: Drives the high-side MOSFET.
- Low Side Driver: Drives the low-side MOSFET.
- Delay Block: Manages timing to prevent shoot-through.
- Logic Inputs: HIN (High-Side Input), LIN (Low-Side Input), EN (Enable).
- Outputs: HO (High-Side Output), LO (Low-Side Output).
- Supplies/Returns: VCC (Low-Side Supply), VB (High-Side Supply), VS (High-Side Return), COM (Low-Side Return).
- Substrate: Connected to COM on the PCB.
The diagram illustrates how these blocks are interconnected to control the MOSFETs, with logic inputs triggering the respective drivers, protected by UVLO and cross-conduction prevention.
Electrical Characteristics
Absolute Maximum Ratings
(@TA = +25°C, unless otherwise specified.)
| Characteristic | Symbol | Value | Unit |
|---|---|---|---|
| High-Side Floating Positive Supply Voltage | VB | -0.3 to +60 | V |
| High-Side Floating Negative Supply Voltage | VS | VB-14 to VB+0.3 | V |
| High-Side Floating Output Voltage | VHO | VS-0.3 to VB+0.3 | V |
| Offset Supply Voltage Transient | dVS/dt | 50 | V/ns |
| Logic and Low-Side Fixed Supply Voltage | VCC | -0.3 to +14 | V |
| Low-Side Output Voltage | VLO | -0.3 to VCC+0.3 | V |
| Logic Input Voltage (HIN, LIN and EN) | VIN | -0.3 to VCC+0.3 | V |
Thermal Characteristics
(@TA = +25°C, unless otherwise specified.)
| Characteristic | Symbol | Value | Unit |
|---|---|---|---|
| Power Dissipation Linear Derating Factor (Note 5) | PD | -- | W/°C |
| Thermal Resistance, Junction to Ambient (Note 5) | RJA | 64 | °C/W |
| Thermal Resistance, Junction to Case (Note 5) | RJC | 42 | °C/W |
| Operating Temperature | TJ | -40 to +150 | °C |
| Lead Temperature (Soldering, 10s) | TL | +300 | °C |
| Storage Temperature Range | TSTG | -55 to +150 | °C |
Note 5: When mounted on a standard JEDEC 2-layer FR-4 board.
Recommended Operating Conditions
| Parameter | Symbol | Min | Max | Unit |
|---|---|---|---|---|
| High-Side Floating Supply | VS | VB - 14 | VB + 8 | V |
| High-Side Floating Supply Offset Voltage | VS | -- | -- | V |
| High-Side Floating Output Voltage | VHO | -- | 50 (Note 7) | V |
| Logic and Low-Side Fixed Supply Voltage | VCC | 8 | 14 | V |
| Low-Side Output Voltage | VLO | 0 | VCC | V |
| Logic Input Voltage (HIN, LIN and EN) | VIN | 0 | 5 | V |
| Ambient Temperature | TA | -40 | +125 | °C |
Notes: 6. Logic operation for VS of -5V to +50V. 7. Provided VB does not exceed absolute maximum rating of 60V.
DC Electrical Characteristics
(VCC = VBS = 12V, COM = VS = 0, @TA = +25°C, unless otherwise specified.) (Note 8)
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions |
|---|---|---|---|---|---|---|
| Logic "1" Input Voltage | VIH | 2.4 | -- | -- | V | -- |
| Logic "0" Input Voltage | VIL | -- | -- | 0.8 | V | -- |
| Enable Logic "1" Input Voltage | VENIH | 1.5 | -- | -- | V | -- |
| Enable Logic "0" Input Voltage | VENIL | -- | -- | 0.7 | V | -- |
| Input Voltage Hysteresis | VINHYS | -- | 0.6 | -- | V | -- |
| Enable Input Voltage Hysteresis | VENINHYS | -- | 0.1 | -- | V | -- |
| High-Level Output Voltage, VBIAS - VO | VOH | -- | 0.45 | 0.6 | V | IO+ = 100mA |
| Low-Level Output Voltage, VO | VOL | -- | 0.15 | 0.22 | V | IO- = 100mA |
| Offset Supply Leakage Current | ILK | -- | 1 | 5 | µA | VB = VS = 60V |
| VCC Shutdown Supply Current | ICCSD | -- | 0 | 1 | µA | VIN = 0 or 5V, VEN = 0 |
| VCC Quiescent Supply Current | ICCQ | -- | 130 | 200 | µA | VIN = 0 or 5V |
| VCC Operating Supply Current | ICCOP | -- | 7.3 | -- | mA | fS = 500kHz, CL = 1000pF |
| VBS Quiescent Supply Current | IBSQ | -- | 40 | 100 | µA | VIN = 0 or 5V |
| VBS Operating Supply Current | IBSOP | -- | 7.3 | -- | mA | fS = 500kHz, CL = 1000pF |
| Logic "1" Input Bias Current | IIN+ | -- | -- | 50 | µA | VIN = 5V |
| Logic "0" Input Bias Current | IIN- | -- | -- | 5 | µA | VIN = 0 |
| Enable Logic "1" Input Bias Current | IENIN+ | -- | 43 | 60 | µA | VIN = 5V |
| Enable Logic "0" Input Bias Current | IENIN- | -- | 0 | 5 | µA | VIN = 0 |
| VBS Supply Undervoltage Positive Going Threshold | VBSUV+ | 6.0 | 7.0 | 8.0 | V | -- |
| VBS Supply Undervoltage Negative Going Threshold | VBSUV- | 5.6 | 6.6 | 7.6 | V | -- |
| VCC Supply Undervoltage Positive Going Threshold | VCCUV+ | 6.0 | 7.0 | 8.0 | V | -- |
| VCC Supply Undervoltage Negative Going Threshold | VCCUV- | 5.6 | 6.6 | 7.6 | V | -- |
| Output High Short-Circuit Pulsed Current | IO+ | -- | 0.9 | 1.5 | A | VO = 0, PW ≤ 10µs |
| Output Low Short-Circuit Pulsed Current | IO- | -- | 1.5 | 2.0 | A | VO = 15V, PW ≤ 10µs |
| Forward Voltage of Bootstrap Diode | VF1 | -- | 0.67 | -- | V | IF = 100µA |
| Forward Voltage of Bootstrap Diode | VF2 | -- | 1.7 | -- | V | IF = 100mA |
Note 8: The VIN and IIN parameters are applicable to the three logic pins: HIN, LIN and EN. The VO and IO parameters are applicable to the respective output pins: HO and LO.
AC Electrical Characteristics
(VCC = VBS = 12V, COM = VS = 0, CL = 1000pF, @TA = +25°C, unless otherwise specified.)
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions |
|---|---|---|---|---|---|---|
| Turn-On Propagation Delay | tON | -- | 20 | 35 | ns | -- |
| Turn-Off Propagation Delay | tOFF | -- | 23 | 56 | ns | VS = 50V |
| Delay Matching, HO & LO Turn-On | tDM | -- | -- | 5 | ns | -- |
| Turn-On Rise Time | tR | -- | 16 | 30 | ns | -- |
| Turn-Off Fall Time | tF | -- | 18 | 25 | ns | -- |
Timing Waveforms
The datasheet includes several timing diagrams illustrating device behavior:
- Figure 1: Switching Time Waveform Definitions shows the definition of turn-on (tON) and turn-off (tOFF) propagation delays and rise/fall times (tR, tF) for the HO and LO outputs relative to the HIN and LIN input signals.
- Figure 2: Delay Matching Waveform Definitions illustrates the delay matching (tDM) between the HO and LO outputs for turn-on events.
- Figure 3: Input / Output Timing Diagram provides a visual example of how the HIN, LIN, and EN input signals translate to the HO and LO output signals over time, demonstrating switching behavior and delays.
Typical Performance Characteristics
The following graphs illustrate the typical performance of the DGD0507A across various supply voltages and temperatures (unless otherwise specified, VCC = 12V, @TA = +25°C):
- Figures 4 & 5: Turn-on Propagation Delay vs. Supply Voltage / Temperature: Shows how turn-on delay for both high-side and low-side drivers varies with supply voltage and temperature.
- Figures 6 & 7: Turn-off Propagation Delay vs. Supply Voltage / Temperature: Displays the variation of turn-off delay for both drivers with supply voltage and temperature.
- Figures 8 & 9: Rise Time vs. Supply Voltage / Temperature: Illustrates the rise time of the output signals as a function of supply voltage and temperature.
- Figures 10 & 11: Fall Time vs. Supply Voltage / Temperature: Shows the fall time of the output signals across different supply voltages and temperatures.
- Figures 12 & 13: Quiescent Current vs. Supply Voltage / Temperature: Depicts the quiescent supply currents (ICCQ and IBSQ) for both VCC and VBS supplies as they change with supply voltage and temperature.
- Figures 14 & 15: Delay Matching vs. Supply Voltage / Temperature: Illustrates the delay matching (tDM(ON) and tDM(OFF)) between the high-side and low-side outputs as a function of supply voltage and temperature.
- Figures 16 & 17: Output Source Current vs. Supply Voltage / Temperature: Shows the output source current capability (IO+) for high-side and low-side drivers versus supply voltage and temperature.
- Figures 18 & 19: Output Sink Current vs. Supply Voltage / Temperature: Displays the output sink current capability (IO-) for high-side and low-side drivers versus supply voltage and temperature.
- Figures 20 & 21: Logic 1 Input Voltage vs. Supply Voltage / Temperature: Plots the threshold voltage for a logic '1' input (VIH) for both high-side and low-side logic inputs against supply voltage and temperature.
- Figures 22 & 23: Logic 0 Input Voltage vs. Supply Voltage / Temperature: Shows the threshold voltage for a logic '0' input (VIL) for both high-side and low-side logic inputs against supply voltage and temperature.
- Figure 24: VCC UVLO vs. Temperature: Illustrates the VCC Undervoltage Lockout thresholds (positive and negative going) as a function of temperature.
- Figure 25: Offset Supply Leakage Current vs. Temperature: Depicts the offset supply leakage current (ILK) across the operating temperature range.
Important Notice
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