onsemi NFAM3812SCBUT Intelligent Power Module (IPM)

Inverter, 1200 V, 50 A

General Description

The NFAM3812SCBUT is a fully-integrated inverter power module featuring an independent High-side gate driver, LVIC, six SiC MOSFETs, and a temperature sensor (VTS or Thermistor). It is suitable for driving permanent magnet synchronous (PMSM) motors, brushless DC (BLDC) motors, and AC asynchronous motors. The MOSFETs are configured in a three-phase bridge with separate source connections for the lower legs, offering maximum flexibility in control algorithm selection. The power stage includes undervoltage lockout protection (UVP), and internal bootstrap diodes/resistors are provided for high-side control.

Features

1200 V, 50 A, 3-Phase MOSFET Inverter with integrated Control ICs for Gate Drive and Protections
Active Logic Interface
Built-in Under-voltage Protection (UVP)
Built-in Bootstrap Diodes/Resistors
Separate Low-side MOSFET Source Connections for Individual Current Sensing of Each Phase
Temperature Sensor (VTS Output by LVIC or Thermistor)
UL Certification: E209204
Pb-Free Device

Typical Application

Industrial Drives
Industrial Pumps
Industrial Fans
Industrial Automation

Pin Configuration

The NFAM3812SCBUT is available in the DIP39, 54.5x31.0 EP-2 package (Case MODGC).

Figure 1. Pin Configuration – Top View illustrates the pinout of the module. Key pins include:

VS(U), VS(V), VS(W): High-Side Bias Voltage Ground
VB(U), VB(V), VB(W): High-Side floating supply voltage
VDD(UH), VDD(VH), VDD(WH): High-Side control power supply
HIN(U), HIN(V), HIN(W): Signal Input for High-Side
VTS: Output for LVIC Temperature Sensing Voltage
LIN(U), LIN(V), LIN(W): Signal Input for Low-Side
VFO: Fault Output
CFOD: Capacitor for Fault Output Duration Selection
CIN: Input for Current Protection
VSS: Low-Side Common Supply Ground
VDD(L): Low-Side Bias Voltage for IC and MOSFETs Driving
NU, NV, NW: Negative DC-Link Input for U, V, W Phases
U, V, W: Output for U, V, W Phases
P: Positive DC-Link Input
TH1, TH2: Thermistor connection

Figure 2. Pin Configuration – Top View provides a detailed diagram of the pin assignments.

Pin Description

Pin	Name	Description
1	VS(U)	High-Side Bias Voltage Ground for U-Phase MOSFET Driving
3	VB(U)	High-Side floating supply voltage for U-Phase MOSFET Driving
4	VDD(UH)	High-Side control power supply for U-Phase IC
6	HIN(U)	Signal Input for High-Side U-Phase
7	VS(V)	High-Side Bias Voltage Ground for V-Phase MOSFET Driving
9	VB(V)	High-Side floating supply voltage for V-Phase MOSFET Driving
10	VDD(VH)	High-Side control power supply for V-Phase IC
12	HIN(V)	Signal Input for High-Side V-Phase
13	VS(W)	High-Side Bias Voltage Ground for W-Phase MOSFET Driving
15	VB(W)	High-Side floating supply voltage for W-Phase MOSFET Driving
16	VDD(WH)	High-Side control power supply for W-Phase IC
18	HIN(W)	Signal Input for High-Side W-Phase
20	VTS	Output for LVIC Temperature Sensing Voltage
21	LIN(U)	Signal Input for Low-Side U-Phase
22	LIN(V)	Signal Input for Low-Side V-Phase
23	LIN(W)	Signal Input for Low-Side W-Phase
24	VFO	Fault Output
25	CFOD	Capacitor for Fault Output Duration Selection
26	CIN	Input for Current Protection
27	VSS	Low-Side Common Supply Ground
28	VDD(L)	Low-Side Bias Voltage for IC and MOSFETs Driving
31	NW	Negative DC-Link Input for W-Phase
32	NV	Negative DC-Link Input for V-Phase
33	NU	Negative DC-Link Input for U-Phase
34	W	Output for W-Phase
35	V	Output for V-Phase
36	U	Output for U-Phase
37	P	Positive DC-Link Input
38	TH1	Thermistor connection (T) / No connection
39	TH2	Thermistor connection *optional for T

Note: Pins in parentheses () are dummy pins for internal connection and should not be connected externally.

Internal Equivalent Circuit

Figure 3. Internal Block Diagram shows the internal circuitry, including the High-side Gate Drivers (HVIC1, HVIC2, HVIC3), the Low-side Intelligent Gate Driver (LVIC), MOSFETs, and the temperature sensing circuit.

Absolute Maximum Ratings

The following table lists the absolute maximum ratings for the NFAM3812SCBUT. Exceeding these limits may cause device damage.

Symbol	Parameter	Test Condition	Max	Unit
INVERTER PART
VPN	Supply Voltage	Applied between P – NU, NV, NW	900	V
VPN (surge)	Supply Voltage (Surge)	Applied between P – NU, NV, NW (Note 1)	1000	V
VDS	Drain-Source Voltage	P to U, V, W; U to NU, V to NV, W to NW	1200	V
ID	Output Current	P, NU, NV, NW, U, V, W terminal current	50	A
IDP	Output Peak Current	P, NU, NV, NW, U, V, W terminal current, pulse width 1 ms	100	A
Pd	Power Dissipation	Tc = 25 °C per One Chip (Note 2)	157	W
Tj	Operating Junction Temperature		-40~175	°C
CONTROL PART
VDD	Control Supply Voltage	Applied between VDD(H), VDD(L) – VSS	20	V
VBS	High-Side Control Bias Voltage	Applied between VB(U) – VS(U), VB(V) – VS(V), VB(W) – VS(W)	20	V
VIN	Input Signal Voltage	Applied between HIN(U), HIN(V), HIN(W), LIN(U), LIN(V), LIN(W) – VSS	-0.3 ~ VDD + 0.3	V
VFO	Fault Output Supply Voltage	Applied between VFO - VSS	-0.3 ~ VDD + 0.3	V
IFO	Fault Output Current	Sink Current at VFO pin	2	mA
VCIN	Current Sensing Input Voltage	Applied between CIN – VSS	-0.3 ~ VDD + 0.3	V
TOTAL SYSTEM
VPN(prot)	Self-Protection Supply Voltage Limit (Short Circuit Protection Capability)	VDD = VBS = 13.5 V to 18.0 V, Tj = 150 °C, Non-repetitive, less than 2 µs	800	V
Tc	Case Operation Temperature	See Figure 2	-40~150	°C
Tstg	Storage Temperature		-40~150	°C
Viso	Isolation Voltage	60 Hz, Sinusoidal, AC 1 minute, Connection Pins to Heat Sink Plate	2500	Vrms

Note 1: Surge voltage developed by the switching operation due to the wiring inductance between P and NU, NV, NW terminal.

Note 2: Calculation value considered to design factor.

Thermal Resistance

Symbol	Rating	Conditions	Min	Typ	Max	Unit
θj-c(T)	Junction to Case Thermal Resistance (Note 3)	MOSFET per 1/6 module	-	0.95	-	°C/W

Note 3: For the measurement point of case temperature (Tc), please refer to Figure 2.

Electrical Characteristics

The following tables detail the electrical characteristics of the NFAM3812SCBUT under specified conditions.

INVERTER PART

Symbol	Description	Conditions	Min	Typ	Max	Unit
IDSS	Drain - Source Leakage Current	VDS = 1200 V, Tj = 25 °C	-	1	-	mA
		VDS = 1200 V, Tj = 150 °C	-	10	-	mA
RDS(ON)	Drain to Source On Resistance	ID = 50 A, VDD = VBS = 18 V, Tj = 25 °C	-	38	56	mΩ
		ID = 50 A, VDD = VBS = 18 V, Tj = 150 °C	-	67	-	mΩ
VSD	Diode Forward Voltage	VDD = VBS = 18 V, ISD = 50 A, Tj = 25 °C	HIN/LIN = OFF	4.55	5.25	V
			HIN/LIN = ON	1.53	2.35	V
		VDD = VBS = 18 V, HIN/LIN = ON, ISD = 50 A, Tj = 150 °C	HIN/LIN = OFF	5.30	-	V
			HIN/LIN = ON	2.80	-	V
Switching times (ton, toff)	High Side Switching Times	VPN = 600 V, VDD = 18 V, ID = 50 A, Tj = 25 °C, Inductive Load Switching (See Figure 4, 25, 26) (Note 4)	tc(on)	0.55	1.05	1.55	µs
			toff	0.15	0.55	-	µs
			tc(off)	1.05	1.45	-	µs
			trr	0.08	0.15	-	µs
Eon	Turn-on switching loss	ID = 50 A, VPN = 600 V, Tj = 25 °C	-	1.95	-	mJ
Eoff	Turn-off switching loss		-	1.70	-	mJ
Eon	Turn-on switching loss	ID = 50 A, VPN = 600 V, Tj = 150 °C	-	1.85	-	mJ
Eoff	Turn-off switching loss		-	2.00	-	mJ
Erec	Diode reverse recovery energy	ID = 50 A, VPN = 600 V, Tj = 25 °C (di/dt set by internal driver)	-	0.15	-	mJ
		Tj = 150 °C	-	0.20	-	mJ

CONTROL PART

Symbol	Description	Conditions	Min	Typ	Max	Unit
IQDDH	Quiescent VDD Supply Current	VDD(UH, VH, WH) = 18 V, HIN(U,V,W) = 0 V	VDD(UH) – VSS, VDD(VH) – VSS, VDD(WH) – VSS	-	0.3	-	mA
IQDDL		VDD(L) = 18 V, LIN(U, V, W) = 0 V	VDD(L) - VSS	-	2.5	-	mA
IPDDH	Operating VDD Supply Current	VDD(UH, VH, WH) = 18 V, fPWM = 60 kHz, duty = 50%, applied to one PWM Signal Input for High-Side	VDD(UH) – VSS, VDD(VH) – VSS, VDD(WH) – VSS	-	0.4	-	mA
IPDDL		VDD(L) = 18 V, fPWM = 60 kHz, duty = 50%, applied to one PWM Signal Input for Low-Side	VDD(L) - VSS	-	6.0	-	mA
IQBS	Quiescent VBS Supply Current	VBS(U, V, W) = 18 V, HIN(U, V, W) = 0 V	VB(U) – VS(U), VB(V) – VS(V), VB(W) – VS(W)	-	0.4	-	mA
IPBS	Operating VBS Supply Current	VDD(UH,VH,WH) = VBS(U, V, W) = 18 V, fPWM = 60 kHz, duty = 50%, applied to one PWM Signal Input for High-Side	VB(U) - VS(U), VB(V) – VS(V), VB(W) – VS(W)	-	4.0	-	mA
VIN(ON)	ON Threshold Voltage	HIN(U, V, W) – VSS, LIN(U, V, W) – VSS	-	-	2.6	V
VIN(OFF)	OFF Threshold Voltage		-	0.8	-	V
VIN hys	Input Voltage Threshold Hysteresis		-	-	2.6	V
IIN+	Input Current	VIN = 5 V	-	0.7	1.5	mA
VCIN(ref)	Over Current Trip Level	VDD = 18 V	CIN – VSS	-	0.46	0.50	V
UVDDD	Supply Circuit Under-Voltage Protection	VDD supply undervoltage negative going input threshold	-	10.3	12.5	V
UVDDR		VDD supply undervoltage positive going input threshold	-	10.8	13.0	V

CONTROL PART (Continued)

Symbol	Description	Conditions	Min	Typ	Max	Unit
UVBSD	Supply Circuit Under-Voltage Protection	VBS supply undervoltage negative going input threshold	-	10.0	12.0	V
UVBSR		VBS supply undervoltage positive going input threshold	-	10.5	12.5	V
VTS	Voltage Output for LVIC Temperature Sensing Unit	Pull down R = 5.1 kΩ, Temp. = 85 °C	2.50	2.63	2.76	V
VFOH	Fault Output Voltage	VDD(L) = 0 V, CIN = 0 V, VFO Circuit: 10 kΩ to 5 V Pull-up	-	4.9	-	V
VFOL		VDD(L) = 0 V, CIN = 1 V, VFO Circuit: 10 kΩ to 5 V Pull-up	-	0.95	-	V
tFOD	Fault-Out Pulse Width	CFOD = 22 nF (Note 6)	-	1.6	2.2	ms

BOOTSTRAP PART

Symbol	Description	Conditions	Min	Typ	Max	Unit
VF BD	Bootstrap Diode Forward Current	If = 0.1 A (See Figure 7)	-	2.1	2.5	2.9	V
R BOOT	Built-in Limiting Resistance		-	12.5	15.5	18.5	Ω

Note 4: ton and toff include the propagation delay of the internal drive IC. tc(on) and tc(off) are the switching times of MOSFET under the given gate-driving condition internally. For the detailed information, please see Figure 4.

Note 5: TLVIC is the temperature of LVIC itself. VTS is only for sensing temperature of LVIC and cannot shutdown MOSFETs automatically. The relationship between VTS voltage output and LVIC temperature is described in Figure 5. It is recommended to add 5.1kΩ pull down resistor between VTS and VSS (Signal Ground) as described in Figure 6 for linear output characteristics at low temperature. To reduce noise, 10 nF cap is recommended as well. Refer to the application note for usage of VTS.

Note 6: The fault-out pulse width tFOD depends on the capacitance value of CFOD according to the following approximate equation: tFOD = 0.1 x 10^6 x CFOD [s].

Switching Time Definitions

Figure 4. Switching Time Definitions illustrates the various switching times including turn-on delay (td(on)), turn-on time (ton), turn-off delay (td(off)), turn-off time (toff), and reverse recovery time (trr).

Typical Characteristics

The following figures show typical characteristics of the NFAM3812SCBUT:

Figure 13. Typ. Drain-Source Saturation Voltage
Figure 14. Drain-Source Saturation Voltage
Figure 15. Typ. Source-Drain Forward Voltage
Figure 16. Typ. Turn-on Switching Energy Loss
Figure 17. Typ. Turn-off Switching Energy Loss
Figure 18. Typ. Reverse Recovery Energy Loss
Figure 19. Typ. Turn-on Propagation Delay Time
Figure 20. Typ. Turn-on Switching Time
Figure 21. Typ. Turn off Propagation Delay Time
Figure 22. Typ. Turn off Switching Time
Figure 23. Typ. Reverse Recovery Time
Figure 24. MOSFET Transient Thermal Resistance

Switching Waveforms

Figure 25. Turn-on Switching Waveform and Figure 26. Turn-off Switching Waveform show typical switching waveforms at Tj = 25 °C. Figure 27. Turn-on Switching Waveform and Figure 28. Turn-off Switching Waveform show typical switching waveforms at Tj = 150 °C.

Recommended Operating Conditions

Symbol	Rating	Conditions	Min	Typ	Max	Unit
VPN	Supply Voltage	Applied between P – NU, NV, NW	-	600	800	V
VDD	Control Supply Voltage	Applied between VDD(H) – VSS, VDD(L) - VSS	13.0	18.0	19.0	V
VBS	High-Side Bias Voltages	Applied between VB(U) – VS(U), VB(V) – VS(V), VB(W) – VS(W)	13.5	18.0	19.5	V
dVDD / dt, dVBS / dt	Supply Voltage Variation		-1	-	1	V/µs
DT	Dead Time	Turn-off to Turn-on (external)	-	0.80	-	µs
fPWM	PWM Input Signal	-40 °C ≤ Tc ≤ 125 °C, -40 °C ≤ Tj ≤ 150 °C	-	60	-	kHz
Io	Allowable r.m.s. Current	VPN = 600 V, VDD = VBS = 18 V, P.F. = 0.8, Tc ≤ 125 °C, Tj ≤ 150 °C (Note 7)	fPWM = 5 kHz	-	27.0	-	A rms
		fPWM = 15 kHz	-	23.0	-	A rms
		fPWM = 30 kHz	-	18.5	-	A rms
PWIN(ON)	Minimum Input Pulse Width	VDD = VBS = 18 V, Wiring Inductance between NU,V,W and DC Link N < 10 nH (Note 8)	-	1.0	-	µs
PWIN(OFF)			-	1.0	-	µs
Package Mounting Torque		M3 Type Screw	-	0.6	0.7	0.9	Nm

Note 7: Allowable output current value is the reference data for the safe operation of this product. This may be different from the actual application and operating condition.

Note 8: Product might not make response if input pulse width is less than the recommended value.

Time Charts of Protective Function

Figure 9. Under-Voltage Protection (Low-Side) and Figure 10. Under-Voltage Protection (High-Side) illustrate the under-voltage protection mechanisms. Figure 11. Short-Circuit Current Protection (Low-Side Operation only) depicts the short-circuit current protection behavior.

Typical Application Circuit

Figure 12. Typical Application Circuit shows a typical configuration for using the NFAM3812SCBUT in a 3-phase inverter system. Key considerations include minimizing input wiring inductance and proper placement of decoupling capacitors.

Revision History

Revision	Description of Changes	Date
0	Initial document version release.	2/5/2025
1	Figure 12 updated.	2/6/2025
2	Update of Figures 25 and 26.	2/10/2025
3	Rds(on) Max value changed from 55 to 56 mOhm in Electrical Characteristics table (p.6); Update of Figure 5 (p.8) and Figure 12 (p.12).	7/4/2025
4	Figure 5 updated.	7/31/2025

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