Fa'ailoga Fa'ailoga INTEL

Intel Corporation, tala'aga - Intel Corporation, fa'ailogaina e pei o le intel, o se fa'alapotopotoga fa'apisinisi tele a Amerika ma kamupani fa'atekonolosi o lo'o fa'auluulu i Santa Clara. webnofoaga o Intel.com.

E mafai ona maua i lalo se lisi o tusi fa'aoga ma fa'atonuga mo oloa Intel. O oloa a Intel e pateni ma fa'ailogaina i lalo ole fa'ailoga Intel Corporation.

Fa'amatalaga Fa'afeso'ota'i:

tuatusi: 2200 Mission College Blvd, Santa Clara, CA 95054, Iunaite Setete
Numera telefoni: +1 408-765-8080
Aofai o tagata faigaluega: 110200
Fa'atuina: Iulai 18, 1968
Fa'avae: Gordon Moore, Robert Noyce & Andrew Grove
Tagata Autu: Andy D. Bryant, Reed E. Hundt

intel AN 921 Device Migration Guidelines mo Stratix 10 HF35 Package User Guide

A'oa'o e uiga i ta'iala o femalaga'iga mo le Intel's Stratix 10 HF35 package i le AN 921. O lenei tusi fa'aoga o lo'o aofia ai iloiloga ma la'asaga a'o le'i fa'ata'atia mo femalagaiga manuia i le va o le GX/SX 400 i le GX/SX 650. Su'esu'e faletupe I/O femalaga'i ma lē femalaga'i. i le Laulau 1.

intel Reference Design Faʻavaveina Fesoʻotaʻiga Mataʻutia ma Galuega Puipuiga Taiala mo Tagata Faʻaoga

A'oa'o pe fa'apefea e le Intel's NetSec Accelerator Reference Design, o se PCIe fa'aopoopo card, fa'avavevaveina feso'ota'iga taua ma galuega tau puipuiga e pei ole IPsec, SSL/TLS, firewall, SASE, au'ili'iliga, ma fa'ailo. Lelei mo siosiomaga tufatufaina mai le pito i le ao, o lenei faʻataʻitaʻiga mamanu faʻaleleia le faʻatinoga ma le lelei mo tagata faʻatau. Su'esu'e pe fa'afefea ona fa'afetauia e le fa'ata'ita'iga saogalemu le 'au'aunaga avanoa (SASE) mana'oga mo le puipuiga fou i si'osi'omaga fa'anatinati, fa'apipi'iina e ala i le fa'afeso'ota'iina o le puipuiga malu ma le WAN i totonu o se seti o auaunaga e tu'uina atu i ao.

intel Agilex Logic Array Blocks ma Adaptive Logic Modules Taiala mo Tagata

Aoao e uiga i le Intel® Agilex™ Logic Array Blocks (LABs) ma Adaptive Logic Modules (ALMs) i totonu o lenei tusi lesona. Saili pe fa'afefea ona fa'atulaga LABs ma ALMs mo galuega fa'atatau, numera ma resitala. Su'esu'e atili e uiga i le Intel Hyperflex™ Core Architecture ma Hyper-Registers o lo'o maua i so'o se vaega o feso'ota'iga auala i totonu o le ie autu. Su'esu'e pe fa'afefea ona galue le Intel Agilex LAB ma le ALM Architecture and Features, e aofia ai le MLAB, o se superset o le LAB.

intel HDMI PHY FPGA IP Design Example User Guide

A'oa'o pe fa'apefea ona gaosia ma su'e le HDMI PHY FPGA IP Design Example mo Intel Arria 10 masini ma lenei taiala amata vave. O lenei tusi lesona faʻaoga e aofia ai faʻatonuga taʻitasi mo le fatuina o se mamanu ma faʻaalia se mamanu toe faʻasalalau e lagolagoina le HDMI 2.0 RX-TX. Lelei mo soʻo se tasi o loʻo vaʻavaʻai e faʻaleleia a latou tomai faʻatulagaina FPGA IP.

intel Fronthaul Compression FPGA IP Ta'iala Fa'aaogā

O lenei ta'iala fa'aoga o lo'o tu'uina atu ai fa'amatalaga au'ili'ili ile Fronthaul Compression FPGA IP, version 1.0.1, fa'atulagaina mo Intel® Quartus® Prime Design Suite 21.4. O le IP o loʻo ofoina atu le faʻamalosi ma le faʻamalo mo U-vaalele IQ faʻamatalaga, faʻatasi ai ma le lagolago mo le µ-law poʻo le poloka poloka faʻafefe-vaega faʻamalosi. E aofia ai foʻi filifiliga faʻatulagaina faʻamautu ma faʻamalosi mo le faʻatulagaina o le IQ ma le ulutala faʻapipiʻi. O lenei taʻiala o se punaoa taua mo soʻo se tasi e faʻaaogaina lenei FPGA IP mo le faʻatulagaina o fausaga ma suʻesuʻega faʻaaogaina punaoa, faʻataʻitaʻiga, ma isi mea.

intel Interlaken (Augatupulaga Lona Lua) Agilex FPGA IP Design Example User Guide

A'oa'o pe fa'apefea ona fa'aoga le Interlaken 2nd Generation Agilex FPGA IP Design Example fa'atasi ma lenei ta'iala fa'aoga. O le taʻiala e aofia ai se taʻiala vave amata, faʻataʻitaʻiga poloka maualuga, ma mea e manaʻomia ma masini komepiuta. Su'esu'e le fa'aogaina o simulators ma meafaigaluega fa'apipi'i mo lenei Intel IP design example.

intel F-Tile DisplayPort FPGA IP Design Example User Guide

O lenei taiala fa'aoga o lo'o tu'uina atu ai fa'atonuga mo le F-Tile DisplayPort FPGA IP Design Example, faʻaalia faʻataʻitaʻiga ma suʻega meafaigaluega mo le Intel Quartus Prime Design Suite. O le ta'iala e aofia ai fa'amatalaga vave amata ma atina'e stagmo le DisplayPort SST parallel loopback design examples. Fa'afou mo le IP Version 21.0.1 ma fetaui ma le Intel Agilex, o lenei ta'iala e ofoina atu au'ili'ili fausaga fa'atonuga ma vaega. files mo su'ega meafaigaluega manuia.

Intel Chip ID FPGA IP Cores User Guide

A'oa'o pe fa'apefea ona fa'aoga le Chip ID Intel FPGA IP cores e faitau ai le ID chip ID tulaga ese 64-bit o lau masini Intel FPGA lagolago mo le fa'ailoaina. O lenei tusi lesona e aofia ai le faʻamatalaga galue, ports, ma faʻamatalaga e fesoʻotai i ai mo le Chip ID Intel Stratix 10, Arria 10, Afā 10 GX, ma MAX 10 FPGA IP cores. Lelei mo inisinia ma tagata mamanu o loʻo vaʻavaʻai e faʻamaonia a latou FPGA IP cores.

intel Mailbox Client ma Avalon Streaming Interface FPGA IP User Guide

A'oa'o pe fa'apefea ona fa'aoga le Pusa Meli Client ma Avalon Streaming Interface FPGA IP (Mailbox Client with Avalon ST Client IP) e feso'ota'i ai ma le pule o masini saogalemu (SDM) i totonu o lenei ta'iala fa'aoga. Saili pe fa'afefea ona maua e lau fa'aaganu'u aganu'u le Chip ID, Temperature Sensor, Voltage Sensor, ma le Quad SPI flash memory. O lenei ta'iala o lo'o aofia ai fo'i fa'auigaina tulaga maualuga o le lagolago a aiga mo Intel FPGA IPs.