Intel Corporation, histori - Intel Corporation, e entsoeng ka setaele e le intel, ke k'hamphani ea machaba ea Amerika le khamphani ea theknoloji e ikarabellang ho Santa Clara Ofisiri ea bona. website ke Intel.com.
Lenane la libuka tsa basebelisi le litaelo tsa lihlahisoa tsa Intel li ka fumanoa ka tlase. Lihlahisoa tsa Intel li na le tokelo ea molao 'me li tšoailoe tlas'a tsa brand Intel Corporation.
Litaba tsa Boikopanyo:
Aterese: 2200 Mission College Blvd, Santa Clara, CA 95054, United States
Ithute ho kenya ts'ebetsong ntlafatso e se nang thuso u sebelisa J e ka hareTAG segokanyimmediamentsi sa sebolokigolo bakeng sa lisebelisoa tsa khetho ea Intel® MAX® 10 DD tse nang le AN-963 MAX 10 Hitless user manual. Fumana litataiso tsa ho shebella le ho laola matšoao a bohlokoa ntle le tšitiso. Ntlafatsa ts'ebetso ea sesebelisoa sa hau habonolo.
Ithute kamoo Intel's NetSec Accelerator Reference Design, karete ea kenyelletso ea PCIe, e potlakisang mesebetsi ea bohlokoa ea marang-rang le ts'ireletso joalo ka IPsec, SSL/TLS, firewall, SASE, analytics, le inferencing. E loketse libaka tse ajoang ho tloha pheletsong ho ea ho maru, moralo ona oa litšupiso o ntlafatsa ts'ebetso le katleho ho bareki. Fumana hore na mofuta oa ts'ireletso ea phihlello e sireletsehileng (SASE) o kopana joang le litlhoko tse ncha tsa ts'ireletso maemong a matla, a hlalosoang ke software ka ho fetolela ts'ireletso e hlalositsoeng ke software le mesebetsi ea WAN hore e be litšebeletso tse fanoang ke maru.
Ithute ka Intel® Agilex™ Logic Array Blocks (LABs) le Adaptive Logic Modules (ALM) bukeng ena ea mosebedisi. Fumana mokhoa oa ho hlophisa li-LAB le li-ALM bakeng sa mesebetsi ea logic, arithmetic le ngoliso. Fumana lintlha tse ling ka Intel Hyperflex™ Core Architecture le Hyper-Registers e fumanehang karolong e 'ngoe le e 'ngoe ea likhokahano tsa marang-rang ho pholletsa le lesela la mantlha. Lekola hore na Intel Agilex LAB le ALM Architecture and Features li sebetsa joang, ho kenyeletsoa le MLAB, e leng setsi se seholo sa LAB.
Ithute ho hlahisa le ho leka HDMI PHY FPGA IP Design Example bakeng sa lisebelisoa tsa Intel Arria 10 tse nang le tataiso ena e potlakileng ea ho qala. Bukana ena ea mosebelisi e kenyelletsa litaelo tsa mohato ka mohato bakeng sa ho theha moralo mme e na le moralo oa ho fetisa o tšehetsang HDMI 2.0 RX-TX. E nepahetse ho mang kapa mang ea batlang ho ntlafatsa litsebo tsa bona tsa FPGA IP.
Tataiso ena ea mosebelisi e fana ka lintlha tse felletseng mabapi le Fronthaul Compression FPGA IP, mofuta 1.0.1, e etselitsoeng Intel® Quartus® Prime Design Suite 21.4. IP e fana ka compression le decompression bakeng sa data ea U-plane IQ, ka tšehetso bakeng sa µ-law kapa block floating-point compression. E boetse e kenyelletsa likhetho tse tsitsitseng le tse matla tsa sebopeho sa IQ le sehlooho sa compression. Tataiso ena ke sesebelisoa sa bohlokoa ho mang kapa mang ea sebelisang FPGA IP ena bakeng sa meralo ea sistimi le lithuto tsa tšebeliso ea lisebelisoa, papiso, le tse ling.
Ithute ho sebelisa Interlaken 2nd Generation Agilex FPGA IP Design Example ka tataiso ena ea mosebelisi. Tataiso e kenyelletsa tataiso e potlakileng ea ho qala, setšoantšo sa li-block tsa boemo bo holimo, le litlhoko tsa hardware le software. Tseba li-simulator tse tšehetsoeng le tlhophiso ea lisebelisoa bakeng sa moralo ona oa Intel IP example.
Tataiso ena ea mosebelisi e fana ka litaelo bakeng sa F-Tile DisplayPort FPGA IP Design Example, e nang le lipapiso le liteko tsa hardware bakeng sa Intel Quartus Prime Design Suite. Tataiso e kenyelletsa tlhahisoleseding ea ho qala kapele le ntshetsopele stagke bakeng sa sebopeho sa DisplayPort SST se tšoanang sa loopback examples. E ntlafalitsoe bakeng sa IP Version 21.0.1 mme e tsamaisana le Intel Agilex, tataiso ena e fana ka likarolo tse qaqileng tsa li-directory le likarolo. files bakeng sa tlhahlobo e atlehileng ea lisebelisoa.
Ithute mokhoa oa ho sebelisa li-cores tsa Chip ID tsa Intel FPGA IP ho bala ID e ikhethang ea 64-bit ea sesebelisoa sa hau se tšehetsoeng sa Intel FPGA bakeng sa boitsebahatso. Bukana ena ea mosebelisi e akaretsa litlhaloso tsa ts'ebetso, likou, le tlhaiso-leseling e amanang le eona bakeng sa Chip ID Intel Stratix 10, Arria 10, Cyclone 10 GX, le MAX 10 FPGA IP cores. E loketse lienjiniere le baqapi ba batlang ho ntlafatsa li-cores tsa bona tsa FPGA IP.
Ithute mokhoa oa ho sebelisa Client ea Mailbox e nang le Avalon Streaming Interface FPGA IP (Mailbox Client with Avalon ST Client IP) ho buisana le molaoli oa sesebelisoa o sireletsehileng (SDM) bukeng ena ea mosebedisi. Fumana hore na mokhoa oa hau oa ho nahana o ka fihlella Chip ID joang, Sensor ea Mocheso, Moqtage Sensor, le Quad SPI flash memory. Tataiso ena e boetse e akaretsa litlhaloso tsa boemo ba tšehetso ea lelapa bakeng sa Intel FPGA IPs.
Moqapi ona oa FPGA IP ExampLe Tataiso ea Mosebelisi ke ea moralo oa F-Tile 25G Ethernet Intel FPGA IP, o ntlafalitsoeng bakeng sa mofuta oa Intel Quartus Prime Design Suite 22.3. Tataiso e fana ka qalo e potlakileng le sebopeho sa directory bakeng sa ho hlahisa moralo oa thepa ea khaleamples le testbenches. E kenyeletsa file litlhaloso, skrini sa mohlophisi oa parameter, le mehato ea ho theha projeke e ncha ea Quartus Prime.
