onsemi NBC12429, NBC12429A: 3.3 V/5 V Programmable PLL Synthesized Clock Generator

Description

The NBC12429 and NBC12429A are general purpose, Phase-Lock-Loop (PLL) based synthesized clock sources. The VCO operates over a frequency range of 200 MHz to 400 MHz. The VCO frequency is sent to the N-output divider, where it can be configured to provide division ratios of 1, 2, 4, or 8. The VCO and output frequency can be programmed using the parallel or serial interfaces to the configuration logic. Output frequency steps of 125 kHz, 250 kHz, 500 kHz, or 1.0 MHz can be achieved using a 16 MHz crystal, depending on the output dividers. The PLL loop filter is fully integrated and does not require any external components.

Features

• Best-in-Class Output Jitter Performance, ±20 ps Peak-to-Peak
• 25 MHz to 400 MHz Programmable Differential PECL Outputs
• Fully Integrated Phase-Lock-Loop with Internal Loop Filter
• Parallel Interface for Programming Counter and Output Dividers During Powerup
• Minimal Frequency Overshoot
• Serial 3-Wire Programming Interface
• Crystal Oscillator Interface
• Operating Range: Vcc = 3.135 V to 5.25 V
• CMOS and TTL Compatible Control Inputs
• Pin and Function Compatible with Motorola MC12429 and MPC9229
• 0°C to 70°C Ambient Operating Temperature (NBC12429)
• -40°C to 85°C Ambient Operating Temperature (NBC12429A)
• These Devices are Pb-Free and are RoHS Compliant

Ordering Information

Note 1: DISCONTINUED: These devices are not recommended for new design. Please contact your onsemi representative for information. The most current information on these devices may be available on www.onsemi.com.

Block Diagram

A block diagram illustrates the internal architecture of the NBC12429/NBC12429A, showing the Phase Detector, VCO, 9-bit counter, output dividers (N=1, 2, 4, 8), and serial/parallel interfaces for programming.

Pin Descriptions

Detailed pin descriptions for the LQFP-32 and QFN-32 packages are provided, including functions for crystal inputs, serial and parallel interface signals, output enable, and power supply pins.

Functional Description

The internal oscillator uses an external crystal for frequency reference. The VCO operates from 200-400 MHz and its output is scaled by a programmable divider (N=1, 2, 4, 8). The PLL loop forces the VCO output frequency to be M times the reference frequency. The device features both parallel and serial interfaces for programming the M and N counters. The TEST output provides visibility into internal nodes and can be used for functional debug.

Programming Interface

The output frequency is determined by the formula: FOUT = (FXTAL ÷ 16) × M÷N. The NBC12429 and NBC12429A allow programming through parallel or serial interfaces. For stable PLL operation, M must be configured to match the VCO frequency range of 200 MHz to 400 MHz. Tables provide programming details for VCO frequency and output divider functions.

Jitter Performance

Jitter is defined as the deviation in a clock's output transition from its ideal position. The datasheet details Cycle-to-Cycle Jitter and Period Jitter, providing typical performance values for various output frequencies and M/N settings. Lower output frequencies generally result in higher jitter.

Power Supply Filtering

The NBC12429 and NBC12429A have separate power supplies for digital circuitry (Vcc) and the internal PLL (PLL_Vcc) to minimize noise. Recommendations for power supply filtering are provided to ensure optimal performance, especially in noisy digital environments. A typical power supply filter circuit using a resistor and capacitors is illustrated.

Package Dimensions

Mechanical case outlines for the LQFP-32 and QFN-32 packages are provided, including detailed dimensions and marking diagrams for each package type.

Application Notes and Resources

A list of relevant onsemi application notes is provided for further information on topics such as ECL clock distribution, PECL design, interfacing, and termination of ECL logic devices.