onsemi MC74LVX257 Quad 2-Channel Multiplexer with 3-State Outputs

Part Number: MC74LVX257

Product Overview

The MC74LVX257 is an advanced high-speed CMOS quad 2-channel multiplexer fabricated with silicon gate CMOS technology. It consists of four 2-input digital multiplexers with common select (S) and enable (OE) inputs. When OE is held High, selection of data is inhibited and all outputs go Low. The select decoding determines whether the A or B inputs get routed to the corresponding Y outputs. The inputs tolerate voltages up to 5.5 V, allowing the interface of 5.0 V systems to 3.0 V systems.

Features

High Speed: t_PD = 4.5 ns (Typ) at V_CC = 3.3 V
Low Power Dissipation: I_CC = 4 μA (Max) at T_A = 25 °C
High Noise Immunity: V_NIH = V_NIL = 28% V_CC
Power Down Protection Provided on Inputs
Balanced Propagation Delays
Designed for 2.0 V to 5.5 V Operating Range
Low Noise: V_OLP = 0.8 V (Max)
Pin and Function Compatible with Other Standard Logic Families
Latchup Performance Exceeds 100 mA
Chip Complexity: FETs = 100; Equivalent Gates = 25
ESD Performance: Human Body Model > 2000 V
These Devices are Pb-Free and are RoHS Compliant

Pin Assignment

Figure 1. Pin Assignment shows the pin configuration for the MC74LVX257. Key pins include VCC, GND, OE, S, A0-A3, B0-B3, and Y0-Y3.

Logic Diagrams

Figure 2. Expanded Logic Diagram illustrates the internal logic of the MC74LVX257, showing the multiplexer and gate structure. Figure 3. IEC Logic Symbol provides a standardized representation of the device's logic function.

Function Table

OE	S	Yo - Y3
H	X	Z
L	L	A0-A3
L	H	B0-B3

Note: A0 - A3, B0 - B3 are the levels of the respective Data-Word Inputs.

Maximum Ratings

The following table summarizes the maximum electrical ratings for the MC74LVX257. Stresses exceeding these limits may damage the device.

Symbol	Parameter	Value	Unit
V_CC	DC Supply Voltage	-0.5 to +6.5	V
V_IN	DC Input Voltage	-0.5 to +6.5	V
V_OUT	DC Output Voltage	-0.5 to V_CC+0.5	V
I_IN	DC Input Current, per Pin	±20	mA
I_OUT	DC Output Current, Per Pin	±25	mA
I_CC	DC Supply Current, V_CC and GND Pins	±75	mA
I_IK	Input Clamp Current	-20	mA
I_OK	Output Clamp Current	+20	mA
T_STG	Storage Temperature Range	-65 to +150	°C
T_L	Lead Temperature, 1 mm from Case for 10 secs	260	°C
T_J	Junction Temperature Under Bias	+150	°C
θ_JA	Thermal Resistance (Note 1) SOIC-16 / TSSOP-16	126 / 159	°C/W
P_D	Power Dissipation in Still Air at 25 °C SOIC-16 / TSSOP-16	995 / 787	mW

Note 1: Measured with minimum pad spacing on an FR4 board, using 76 mm-by-114 mm, 2-ounce copper trace no air flow per JESD51-7.

Note 2: HBM tested to EIA / JESD22-A114-A. CDM tested to JESD22-C101-A.

Recommended Operating Conditions

The following table lists the recommended operating conditions for the MC74LVX257. Functional operation above these stresses is not implied.

Symbol	Characteristics	Min	Max	Unit
V_CC	DC Supply Voltage	2.0	3.6	V
V_IN	DC Input Voltage	0	5.5	V
V_OUT	DC Output Voltage	0	V_CC	V
T_A	Operating Temperature Range, all Package Types	-40	85	°C
t_r, t_f	Input Rise or Fall Time (V_CC = 3.3 V ± 0.3 V)	0	100	ns/V

Electrical Characteristics

DC Characteristics provide voltage referenced parameters at specified temperatures. AC Electrical Characteristics detail propagation delays and timing parameters.

Symbol	Parameter	Condition	TA = 25 °C			-40 °C ≤ TA ≤ 85 °C		Unit
			Min	Typ	Max	Min	Max
V_IH	Minimum High-Level Input Voltage	V_CC = 2.0 V / 3.0 V / 3.6 V	0.75 V_CC / 0.7 V_CC / 0.7 V_CC			0.75 V_CC / 0.7 V_CC / 0.7 V_CC		V
V_IL	Maximum Low-Level Input Voltage	V_CC = 2.0 V / 3.0 V / 3.6 V	0.25 V_CC / 0.3 V_CC / 0.3 V_CC			0.25 V_CC / 0.3 V_CC / 0.3 V_CC		V
V_OH	High-Level Output Voltage	I_OH = -50 μA (V_CC = 2.0 V / 3.0 V / 3.0 V)	1.9 / 2.9 / 2.58	2.0 / 3.0 / 2.48		1.9 / 2.9 / 2.48		V
V_OL	Low-Level Output Voltage	I_OL = 50 μA / 4 mA (V_CC = 2.0 V / 3.0 V / 3.0 V)	0.0 / 0.0 / 0.36	0.1 / 0.1 / 0.44		0.1 / 0.1 / 0.44		V
I_OZ	Maximum 3-State Leakage Current	VIN = V_IH or V_IL, V_OUT = V_CC or GND	±0.1		±1.0	±0.1	±1.0	μA
I_IN	Input Leakage Current	VIN = 5.5 V or GND	±0.1		±1.0	±0.1	±1.0	μA
I_CC	Maximum Quiescent Supply Current (per package)	VIN = V_CC or GND	1.0	2.0	40			μA

Symbol	Parameter	Test Conditions	TA = 25 °C			-40 °C ≤ TA ≤ 85 °C		Unit
			Min	Typ	Max	Min	Max
t_PLH, t_PHL	Maximum Propagation Delay, A or B to Y	V_CC = 2.7 V, C_L = 15 pF / 50 pF V_CC = 3.3 V ± 0.3 V, C_L = 15 pF / 50 pF	6.5 / 9.5 4.5 / 7.5	10.0 / 14.0 8.0 / 12.0	15.0 / 18.5 10.0 / 13.5	1.0 / 1.0 1.0 / 1.0	15.0 / 18.5 10.0 / 13.5	ns
t_PLH, t_PHL	Maximum Propagation Delay, S to Y	V_CC = 2.7 V, C_L = 15 pF / 50 pF V_CC = 3.3 V ± 0.3 V, C_L = 15 pF / 50 pF	8.0 / 10.5 6.0 / 8.5	12.0 / 15.5 10.0 / 13.5	17.0 / 20.0 12.0 / 15.5	1.0 / 1.0 1.0 / 1.0	17.0 / 20.0 12.0 / 15.5	ns
t_PZL, t_PZH	Maximum Output Enable Time, OE to Y	V_CC = 2.7 V, C_L = 15 pF, R_L = 1 kΩ V_CC = 3.3 V ± 0.3 V, C_L = 15 pF, R_L = 1 kΩ V_CC = 2.7 V, C_L = 50 pF, R_L = 1 kΩ V_CC = 3.3 V ± 0.3 V, C_L = 50 pF, R_L = 1 kΩ	7.5 / 5.5 / 10.5 / 8.5	11.5 / 9.5 / 15.0 / 13.0	16.5 / 11.5 / 18.0 / 15.0	1.0 / 1.0 / 1.0 / 1.0	16.5 / 11.5 / 18.0 / 15.0	ns
t_PLZ, t_PHZ	Maximum Output Disable Time, OE to Y	V_CC = 2.7 V, C_L = 50 pF, R_L = 1 kΩ V_CC = 3.3 V ± 0.3 V, C_L = 50 pF, R_L = 1 kΩ	13.0 / 12	17.0 / 17.0	18.0 / 18.0	1.0 / 1.0	18.0 / 18.0	ns
C_IN	Maximum Input Capacitance		4		10			pF
C_PD	Power Dissipation Capacitance (Note 3)	Typical @ 25°C, V_CC = 3.3 V		20				pF

Note 3: C_PD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: I_CC(OPR) = C_PD • V_CC • f_in + I_CC. C_PD is used to determine the no-load dynamic power consumption; P_D = C_PD • V_CC² • f_in + I_CC • V_CC.

Noise Characteristics

Noise characteristics at T_A = 25 °C for input t_r = t_f = 3.0 ns, C_L = 50 pF, V_CC = 3.3 V.

Symbol	Characteristic	Typ	Max	Unit
V_OLP	Quiet Output Maximum Dynamic V_OL	0.3	0.5	V
V_OLV	Quiet Output Minimum Dynamic V_OL	-0.3	-0.5	V
V_IHD	Minimum High Level Dynamic Input Voltage	2.0		V
V_ILD	Maximum Low Level Dynamic Input Voltage		0.8	V

Switching Waveforms and Test Circuits

Figure 4. Switching Waveform and Figure 5. Switching Waveform illustrate the timing for various signal transitions. Figure 6. Test Circuit and Figure 7. Test Circuit depict the setup for measuring these parameters. Figure 8. Input Equivalent Circuit shows the typical input structure.

Ordering Information

The following table provides ordering information for the MC74LVX257 device. For detailed tape and reel specifications, refer to the onsemi Tape and Reel Packaging Specifications Brochure, BRD8011/D.

Device	Marking	Package	Shipping
MC74LVX257DTR2G	LVX257	TSSOP-16	2500 / Tape & Reel
MC74LVX257DR2G	LVX257G	SOIC-16	2500 / Tape & Reel

Revision History

This section details the revisions made to the datasheet.

Revision	Description of Changes	Date
6	Modified voltage ratings from 7.0 V to 6.5 V. Rebranded the Data Sheet to onsemi format.	07/09/2025

Mechanical Case Outlines

SOIC-16 9.90x3.90x1.37 1.27P CASE 751B ISSUE M and TSSOP-16 WB CASE 948F ISSUE B provide detailed package dimensions and recommended soldering footprints for the device.

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