Vishay SiHS90N65E E Series Power MOSFET Datasheet

Vishay SiHS90N65E E Series Power MOSFET

Vishay Siliconix

Product Summary

VDS (V) at Tj max. 700
RDS(on) (Ω) typ. at 25 °C VGS = 10 V: 0.025
Qg (nC) max. 591
Qgs (nC) 84
Qgd (nC) 160
Configuration Single

Features

  • Low figure-of-merit (FOM) Ron x Qg
  • Low input capacitance (Ciss)
  • Reduced switching and conduction losses
  • Ultra low gate charge (Qg)
  • Avalanche energy rated (UIS)
  • Material categorization: for definitions of compliance please see www.vishay.com/doc?99912

Applications

  • Server and telecom power supplies
  • Switch mode power supplies (SMPS)
  • Power factor correction power supplies (PFC)
  • Lighting
    • High-intensity discharge (HID)
    • Fluorescent ballast lighting
  • Industrial
    • Welding
    • Induction heating
    • Motor drives
    • Battery chargers
    • Renewable energy
    • Solar (PV inverters)

Ordering Information

Package Lead (Pb)-free
Super-247 SiHS90N65E-GE3

Absolute Maximum Ratings

(Tc = 25 °C, unless otherwise noted)

PARAMETER SYMBOL LIMIT UNIT
Drain-source voltage VDS 650 V
Gate-source voltage VGS ± 30 V
Continuous drain current (TJ = 150 °C) ID 87 (Tc = 25 °C)
55 (Tc = 100 °C)
A
Pulsed drain current a IDM 323 A
Linear derating factor 5 W/°C
Single pulse avalanche energy b EAS 1930 mJ
Maximum power dissipation PD 625 W
Operating junction and storage temperature range TJ, Tstg -55 to +150 °C
Drain-source voltage slope dV/dt 41 V/ns
Reverse diode dV/dt d 4.1 V/ns
Soldering recommendations (peak temperature) c 300 (for 10 s) °C

Notes:

  • a. Repetitive rating; pulse width limited by maximum junction temperature
  • b. VDD = 140 V, starting Tj = 25 °C, L = 28.2 mH, Rg = 25 Ω, IAS = 11.7 A
  • c. 1.6 mm from case
  • d. ISD ≤ ID, dI/dt = 100 A/µs, starting TJ = 25 °C

Thermal Resistance Ratings

PARAMETER SYMBOL TYP. MAX. UNIT
Maximum junction-to-ambient RthJA - 40 °C/W
Maximum junction-to-case (drain) RthJC - 0.2 °C/W

Specifications

(TJ = 25 °C, unless otherwise noted)

Static

PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT
Drain-source breakdown voltage VDS VGS = 0 V, ID = 250 μA 650 - - V
VDS temperature coefficient AVDS/TJ Reference to 25 °C, ID = 1 mA - 0.83 - V/°C
Gate threshold voltage (N) VGS(th) VDS = VGS, ID = 250 μA 2.0 - 4.0 V
Gate-source leakage IGSS VGS = ± 20 V - - ± 100 nA
VGS = ± 30 V - - ± 1 μA
Zero gate voltage drain current IDSS VDS = 650 V, VGS = 0 V - - 1 μA
VDS = 520 V, VGS = 0 V, TJ = 125 °C - - 25 μA
Drain-source on-state resistance RDS(on) VGS = 10 V, ID = 45 A - 0.025 0.029 Ω
VDS = 30 V, ID = 45 A - 32 - S
Forward transconductance a gfs - - - S

Dynamic

PARAMETER SYMBOL TEST CONDITIONS TYP. UNIT
Input capacitance Ciss VGS = 0 V, VDS = 100 V, f = 300 kHz 11 826 pF
Output capacitance Coss ID = 45 A 528 pF
Reverse transfer capacitance Crss 9 pF
Effective output capacitance, energy related a Co(er) VGS = 0 V, VDS = 0 V to 520 V 384 pF
Effective output capacitance, time related b Co(tr) 1502 pF
Total gate charge Qg VGS = 10 V, ID = 45 A, VDS = 520 V 394 nC
Gate-source charge Qgs 84 nC
Gate-drain charge Qgd 160 nC
Turn-on delay time td(on) VDD = 520 V, ID = 45 A, VGS = 10 V, Rg = 9.1 Ω 85 ns
Rise time tr 152 ns
Turn-off delay time td(off) 323 ns
Fall time tf 267 ns
Gate input resistance Rg f = 1 MHz, open drain 0.6 Ω

Drain-Source Body Diode Characteristics

PARAMETER SYMBOL TEST CONDITIONS TYP. MAX. UNIT
Continuous source-drain diode current Is MOSFET symbol showing the integral reverse p - n junction diode 87 - A
Pulsed diode forward current ISM 323 - A
Diode forward voltage VSD TJ = 25 °C, Is = 45 A, VGS = 0 V 0.9 1.2 V
Reverse recovery time trr TJ = 25 °C, IF = Is = 45 A, dI/dt = 100 A/µs, VR = 25 V 971 1942 ns
Reverse recovery charge Qrr 26 52 μC
Reverse recovery current IRRM 42 - A

Notes:

  • a. Coss(er) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0% to 80 % VDS
  • b. Coss(tr) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0% to 80% VDS

Typical Characteristics

(25 °C, unless otherwise noted)

Figure 1: Typical Output Characteristics

Graph showing Drain-to-Source Current (ID) vs. Drain-to-Source Voltage (VDS) for various Gate-to-Source Voltages (VGS) at TJ = 25 °C.

Figure 2: Typical Output Characteristics

Graph showing Drain-to-Source Current (ID) vs. Drain-to-Source Voltage (VDS) for various Gate-to-Source Voltages (VGS) at TJ = 150 °C.

Figure 3: Typical Transfer Characteristics

Graph showing Drain-to-Source Current (ID) vs. Gate-to-Source Voltage (VGS) at TJ = 25 °C and TJ = 150 °C, with VDS = 14.6 V.

Figure 4: Normalized On-Resistance vs. Temperature

Graph showing Normalized Drain-to-Source On-Resistance (RDS(on)) vs. Junction Temperature (TJ) for ID = 45 A and VGS = 10 V.

Figure 5: Typical Capacitance vs. Drain-to-Source Voltage

Graph showing Capacitance (Ciss, Coss, Crss) vs. Drain-to-Source Voltage (VDS) at VGS = 0 V and f = 300 kHz.

Figure 6: Coss and Eoss vs. VDS

Graph showing Output Capacitance (Coss) and Energy related Output Capacitance (Eoss) vs. Drain-to-Source Voltage (VDS).

Figure 7: Typical Gate Charge vs. Gate-to-Source Voltage

Graph showing Gate Charge (Qg) vs. Gate-to-Source Voltage (VGS) for different Drain-to-Source Voltages (VDS).

Figure 8: Typical Source-Drain Diode Forward Voltage

Graph showing Source-Drain Diode Forward Voltage (VSD) vs. Reverse Drain Current (ISD) at TJ = 25 °C and TJ = 150 °C, with VGS = 0 V.

Figure 9: Maximum Safe Operating Area

Graph showing Drain Current (ID) vs. Drain-to-Source Voltage (VDS) with various operating limits indicated (RDS(on), IDM, BVDSS, pulse limits).

Figure 10: Maximum Drain Current vs. Case Temperature

Graph showing Maximum Drain Current (ID) vs. Case Temperature (TC).

Figure 11: Temperature vs. Drain-to-Source Voltage

Graph showing Drain-to-Source Breakdown Voltage (VDS) vs. Junction Temperature (TJ) for ID = 250 μA.

Figure 12: Normalized Thermal Transient Impedance, Junction-to-Case

Graph showing Normalized Effective Transient Thermal Impedance vs. Pulse Time (s) for various duty cycles and single pulse.

Figure 13: Switching Time Test Circuit

Diagram illustrating the test circuit for switching time measurements.

Figure 14: Switching Time Waveforms

Waveforms illustrating switching times (td(on), tr, td(off), tf).

Figure 15: Unclamped Inductive Test Circuit

Diagram illustrating the test circuit for unclamped inductive switching.

Figure 16: Unclamped Inductive Waveforms

Waveforms illustrating unclamped inductive switching.

Figure 17: Basic Gate Charge Waveform

Waveform illustrating gate charge characteristics.

Figure 18: Gate Charge Test Circuit

Diagram illustrating the test circuit for gate charge measurements.

Figure 19: Peak Diode Recovery dV/dt Test Circuit

Diagram illustrating the test circuit for peak diode recovery dV/dt measurements, including circuit layout considerations and waveform descriptions.

Package Information

TO-274AA (High Voltage) - Version 1: FACILITY CODE = Y

MILLIMETERS INCHES
DIM. MIN. MAX. MIN. MAX.
A4.705.300.1850.209
A11.502.500.0590.098
A22.252.650.0890.104
b1.301.600.0510.063
b21.802.200.0710.087
b43.003.250.1180.128
C (1)0.380.890.0150.035
D19.8020.800.7800.819
D115.5016.100.6100.634
D20.701.300.0280.051
E15.1016.100.5940.634
E113.3013.900.5240.547
e5.45 BSC0.215 BSC
L13.7014.700.5390.579
L11.001.600.0390.063
R2.003.000.0790.118

Notes:

  • Dimensioning and tolerancing per ASME Y14.5M-1994
  • Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at the outer extremes of the plastic body
  • Outline conforms to JEDEC® outline to TO-274AA
  • (1) Dimension measured at tip of lead

TO-274AA (High Voltage) - Version 2: FACILITY CODE = N

MILLIMETERS MILLIMETERS
DIM. MIN. MAX. DIM. MIN. MAX.
A4.835.21D116.2517.65
A12.292.54D20.500.80
A21.912.16E15.7516.13
b'1.071.28E113.1014.15
b1.071.33E23.685.10
b11.912.41E31.001.90
b21.912.16E412.3813.43
b32.873.38e5.44 BSC
b42.873.13N3
c'0.550.65L19.8120.32
c0.550.68L13.704.00
D20.8021.10Q5.496.00

Notes:

  • Dimensioning and tolerancing per ASME Y14.5M-1994
  • Outline conforms to JEDEC® outline to TO-274AD
  • Dimensions are measured in mm, angles are in degree
  • Metal surfaces are tin plated, except area of cut

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© 2021 Vishay Intertechnology, Inc. All Rights Reserved

Models: SiHS90N65E Power MOSFET, SiHS90N65E, Power MOSFET, MOSFET

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